CN111564492A - Depletion type GaN-based HFET device and preparation method thereof - Google Patents

Abstract

The invention provides a depletion-mode GaN-based HFET device and a preparation method thereof. The method includes: providing a depletion-mode GaN-based HFET device thin film structure; respectively forming ohmic contact source electrodes and drain electrodes, and transition metals on the thin film structure Dihalide semiconductor gate electrode; forming a metal gate electrode on the transition metal dihalide semiconductor gate electrode outside the 2DEG channel; depositing a passivation layer to protect the device structure. The HFET device formed by the invention integrates the overvoltage protection function through the transition metal dihalide semiconductor gate electrode itself, and does not need to additionally increase the overvoltage protection function through subsequent circuit design; the preparation process of the molybdenum sulfide semiconductor gate electrode is simple, and the pattern is completed in one step at room temperature. chemical treatment, eliminating the cost of preparing molybdenum sulfide at high temperature, with high process repeatability and low cost.

Description

Depletion-mode GaN-based HFET device and preparation method thereof

technical field

The invention belongs to the field of semiconductor device manufacturing, in particular to a depletion-mode GaN-based HFET device and a preparation method thereof.

Background technique

Compared with the first and second generation semiconductor materials, the third generation semiconductor material gallium nitride (GaN) material has a wide band gap (3.4eV), high breakdown field strength (3.0MV/cm), and high electron saturation velocity (2.5× 10 ⁷ cm/s). The AlGaN/GaN heterostructure formed by its ternary compound AlGaN and binary compound GaN can generate a high concentration of two-dimensional electron gas (2DEG) under the action of the polarization effect, making GaN-based heterojunction field effect transistors (HFETs). ) has a series of advantages such as high current density, high power density, high breakdown voltage, low on-resistance, high operating frequency, and small volume during the period, and has applications in the fields of high current, low power consumption, high voltage switching devices and radio frequency devices. Prospect is the current research and development hotspot in the field of semiconductor power electronic devices.

In the existing n-type depletion-mode GaN-based HFET devices, the source, gate, and drain electrodes usually use metal electrodes, wherein the gate electrode should form an n-type Schottky contact with rectification characteristics, and the source electrode and drain electrode should form an n-type contact. Ohmic contact. As voltage-driven GaN HFETs, they are extremely susceptible to overvoltage, and large gate overvoltages can easily lead to severe threshold voltage instability and even degradation (eg, breakdown) of the semiconductor barrier layer. Although power FETs are designed to withstand large drain biases, they are equally susceptible to gate overload. Conventional overvoltage protection techniques can be divided into two types: current limiting and voltage limiting. However, all of these solutions require external peripheral circuits or components, which not only result in higher cost and more parasitics, but also add additional manufacturing costs and overall integration difficulties.

SUMMARY OF THE INVENTION

In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide a depletion-mode GaN-based HFET device and a preparation method thereof, which are used to solve the need to realize the depletion-mode GaN-based HFET device by setting peripheral circuits or components in the prior art. Overvoltage protection of HFET devices results in higher device cost and more parasitics, as well as additional manufacturing costs and overall integration difficulties.

In order to achieve the above object and other related objects, the present invention provides a preparation method of a depletion-mode GaN-based HFET device, the preparation method comprising:

A depletion-mode GaN-based HFET device thin film structure is provided, and the depletion-mode GaN-based HFET device thin film structure sequentially includes a semiconductor substrate layer, an AlGaN buffer layer, a GaN channel layer and an AlGaN barrier layer along its growth direction;

A source electrode region and a drain electrode region are defined on the depletion-mode GaN-based HFET thin film structure by using a photolithography mask, and an ohmic contact source electrode and a drain electrode are formed on the source electrode region and the drain electrode region ;

defining a semiconductor gate electrode region on the depletion-mode GaN-based HFET device thin film structure, and forming a transition metal dichalide semiconductor gate electrode in the semiconductor gate electrode region;

A metal gate electrode region is defined on the thin film structure of the depletion-mode GaN-based HFET device, and a metal gate electrode is formed in the metal gate electrode region, and the metal gate electrode is formed on the transition metal dihalide outside the 2DEG channel on the semiconductor gate electrode to control the transition metal dichalide semiconductor gate electrode;

A passivation layer is deposited on the surface of the structure formed by the above steps.

Optionally, the thin film structure of the depletion-mode GaN-based HFET device further includes a GaN cap layer formed on the AlGaN barrier layer; and after forming the source electrode and the drain electrode, it further includes forming a local area by an ion implantation process. A passive region is used to achieve electrical isolation between two adjacent depletion-mode GaN-based HFET devices; and before forming the transition metal dihalide semiconductor gate electrode, a cleaning step of oxygen plasma oxidation and acid etching is also included.

Optionally, the material of the passivation layer includes at least one selected from the group consisting of silicon oxide, silicon nitride, hafnium oxide, aluminum oxide and zirconium oxide; the source electrode and the leakage current are formed by an annealing process The annealing temperature is between 800°C and 900°C, and the annealing time is between 30s and 90s.

Optionally, the material of the transition metal dihalide semiconductor gate electrode includes molybdenum sulfide or tungsten sulfide.

Optionally, the transition metal dihalide semiconductor gate electrode is a molybdenum sulfide semiconductor gate electrode, and the step of forming the molybdenum sulfide semiconductor gate electrode includes:

Coating molybdenum source resin Mo4S4(ROCS2)6 on the depletion-mode GaN-based HFET device thin film structure, R is an alkyl group;

The molybdenum source resin Mo4S4(ROCS2)6 in the semiconductor gate electrode region is exposed by an electron beam exposure process, so that it is cross-linked and cured, and chemically converted into molybdenum sulfide;

The molybdenum source resin Mo4S4(ROCS2)6 that has not been exposed to electron beams is removed by chloroform, and then rinsed by isopropanol to obtain the molybdenum sulfide semiconductor gate electrode.

Optionally, oxygen plasma etching and H ₂ S annealing processes are used for the molybdenum sulfide semiconductor gate electrode to determine the precise thickness of the molybdenum sulfide semiconductor gate electrode.

Optionally, the thickness of the transition metal dichalide semiconductor gate electrode is less than 5 nm, the length is less than 10 nm, and the width is less than 10 nm.

The present invention also provides a depletion-mode GaN-based HFET device, the depletion-mode GaN-based HFET device comprising:

A thin film structure of a depletion-mode GaN-based HFET device includes a semiconductor substrate layer, an AlGaN buffer layer, a GaN channel layer and an AlGaN barrier layer stacked in sequence;

source electrodes and drain electrodes of ohmic contacts formed on the depletion-mode GaN-based HFET device thin film structure;

a transition metal dihalide semiconductor gate electrode formed on the thin film structure of the depletion-mode GaN-based HFET device, and the source electrode and the drain electrode are located at both ends of the transition metal dihalide semiconductor gate electrode;

a metal gate electrode formed on the transition metal dichalide semiconductor gate electrode outside the 2DEG channel;

A passivation layer is formed on the thin film structure of the depletion-mode GaN-based HFET device.

Optionally, the depletion-mode GaN-based HFET device thin film structure further includes a GaN cap layer formed on the AlGaN barrier layer, and the material of the passivation layer includes silicon oxide, silicon nitride, hafnium oxide, At least one of the group consisting of alumina and zirconia.

Optionally, the material of the transition metal dihalide semiconductor gate electrode includes molybdenum sulfide or tungsten sulfide.

Optionally, the thickness of the transition metal dichalide semiconductor gate electrode is less than 5 nm, the length is less than 10 nm, and the width is less than 10 nm.

As described above, in the depletion-mode GaN-based HFET device and the preparation method thereof of the present invention, by using transition metal dihalide as the gate electrode material above the channel of the depletion-mode GaN-based HFET device, since the transition metal dihalide is the layer It is a two-dimensional semiconductor, so the semiconductor gate electrode above the channel can be made very thin, for example, the thickness of the semiconductor gate electrode can be made to the atomic level, and the required thickness can be adjusted by the number of transition metal halide layers, which is beneficial to The semiconductor gate electrode is fully depleted, so that the device itself has an overvoltage protection function, and there is no need to add an additional overvoltage protection function through the peripheral circuit design; at the same time, because the transition metal dichalcogenide has no dangling bond surface and is an n-type semiconductor material Surface scattering caused by surface dangling bonds and high-concentration doping (compensating for negative interface spontaneous polarization charges) can be effectively suppressed, so that the device can maintain high carrier mobility; in addition, the coating process combined with electron beam exposure The process produces cross-linking curing and chemical transformation to form a transition metal dichalcogenide semiconductor gate electrode. The preparation process is simple. The patterning process of the semiconductor gate electrode is completed in the next step at room temperature, without stripping and etching steps, eliminating the need for high-temperature preparation transitions. The cost of the metal dichalcogenide is high, and the process repeatability is high. Compared with the existing lithography patterning process, the electron beam exposure has high precision, and the pattern setting can be flexibly performed, no additional mask is required, and the cost is low.

Description of drawings

FIG. 1 shows a process flow diagram of a method for fabricating a depletion-mode GaN-based HFET device according to Embodiment 1 of the present invention.

FIG. 2 is a schematic structural diagram of step S1 of the fabrication method of the depletion-mode GaN-based HFET device according to the first embodiment of the present invention.

FIG. 3 is a schematic structural diagram of forming a source electrode region and a drain electrode region in step S2 of the method for fabricating the depletion-mode GaN-based HFET device according to the first embodiment of the present invention.

FIG. 4 is a schematic diagram showing the structure of forming the source electrode and the drain electrode in step S2 of the fabrication method of the depletion-mode GaN-based HFET device according to the first embodiment of the present invention.

FIG. 5 is a schematic diagram showing the structure of coating the molybdenum source resin in step S3 of the preparation method of the depletion-mode GaN-based HFET device according to the first embodiment of the present invention.

FIG. 6 is a schematic structural diagram of exposing the molybdenum source resin in the semiconductor gate electrode region in step S3 of the manufacturing method of the depletion-mode GaN-based HFET device according to the first embodiment of the present invention.

FIG. 7 is a schematic diagram showing the structure of the transition metal dichalide semiconductor gate formed in step S3 of the method for fabricating the depletion-mode GaN-based HFET device according to the first embodiment of the present invention.

FIG. 8 is a top view of FIG. 7 .

FIG. 9 is a top view showing the formation of the metal gate electrode region in step S4 of the method for fabricating the depletion-mode GaN-based HFET device according to the first embodiment of the present invention.

10 is a top view of forming a metal gate electrode in step S4 of the method for fabricating a depletion-mode GaN-based HFET device according to Embodiment 1 of the present invention.

FIG. 11 is a schematic diagram of the structure of FIG. 10 .

FIG. 12 is a schematic structural diagram of step S5 of the method for fabricating the depletion-mode GaN-based HFET device according to the first embodiment of the present invention. FIG. 12 also shows a schematic structural diagram of the depletion-mode GaN-based HFET device according to the second embodiment of the present invention.

Component label description

100 Depletion-mode GaN-based HFET device thin film structure, 101 semiconductor substrate, 102 AlGaN buffer layer, 103 GaN channel layer, 104 AlGaN barrier layer, 105 source electrode region, 106 drain electrode region, 107 source electrode, 108 drain electrode , 109 semiconductor gate electrode region, 110 transition metal dihalide semiconductor gate electrode, 111 molybdenum source resin, 112 metal gate electrode region, 113 metal gate electrode, 114 passivation layer, 115 patterned photoresist layer, 116 2DEG channel , the width of L1 source and drain electrodes, the width of L2 transition metal dichalide semiconductor gate electrode, the steps S1~S5.

Detailed ways

The embodiments of the present invention are described below through specific specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

See Figures 1 through 12. It should be noted that the diagrams provided in this embodiment are only to illustrate the basic concept of the present invention in a schematic way, so the diagrams only show the components related to the present invention rather than the number, shape and the number of components in the actual implementation. For dimension drawing, the type, quantity and proportion of each component can be changed according to specific needs in actual implementation, and the component layout may also be more complicated.

Example 1

This embodiment provides a method for fabricating a depletion-mode GaN-based HFET device. By using transition metal dihalide as the gate electrode material above the channel of the depletion-mode GaN-based HFET device, since the transition metal dihalide is a layered two-dimensional Therefore, the semiconductor gate electrode above the channel can be made very thin, for example, the thickness of the semiconductor gate electrode can be made to the atomic level, and the required thickness can be adjusted by the number of transition metal halide layers, which is beneficial to the semiconductor gate electrode. The electrode is completely depleted, so that the device itself has an overvoltage protection function, and there is no need to add an additional overvoltage protection function through the peripheral circuit design; at the same time, because the transition metal dichalcogenide has a surface without dangling bonds and is a natural n-type semiconductor material, it can Effectively suppress the surface scattering caused by surface dangling bonds and high-concentration doping (compensating the negative interface spontaneous polarization charge), so that the device can maintain a high carrier mobility; in addition, the coating process combined with the electron beam exposure process Cross-linking curing and chemical conversion to form a transition metal halide semiconductor gate electrode, the preparation process is simple, the patterning treatment of the semiconductor gate electrode is completed in the next step at room temperature, no stripping and etching steps are required, and high temperature preparation of transition metals is avoided. The cost of the dihalide compound is high, and the process repeatability is high. Compared with the existing lithography patterning process, the electron beam exposure has high precision, and the pattern setting can be flexibly performed, no additional mask is required, and the cost is low.

As shown in Figure 1 to Figure 12, the preparation method includes the following steps:

As shown in FIG. 1 and FIG. 2 , step S1 is first performed to provide a depletion-mode GaN-based HFET device thin film structure 100 , and the depletion-mode GaN-based HFET device thin film structure 100 sequentially includes a semiconductor substrate layer 101 , an AlGaN device layer along its growth direction The buffer layer 102 , the GaN channel layer 103 and the AlGaN barrier layer 104 .

As an example, the semiconductor substrate layer 101 can be any suitable semiconductor substrate, for example, the semiconductor substrate layer 101 can be a Si substrate, a SiC substrate, an aluminum nitride substrate, an aluminum oxide substrate or a sapphire substrate And so on, in this embodiment, the semiconductor substrate layer 101 is preferably selected as a SiC substrate.

The AlGaN buffer layer 102 is used to release the stress generated between the epitaxially grown heterostructure and the substrate due to lattice mismatch and thermal mismatch. As an example, the AlGaN buffer layer can be grown along the AlGaN buffer layer. A composite layer with gradually decreasing Al composition in the direction.

It should be noted here that the thin film structure 100 of the depletion-mode GaN-based HFET device can be grown by epitaxial technology by itself, or can be obtained by outsourcing, as long as the structure can realize the subsequent depletion-mode GaN-based HFET device of this embodiment.

As an example, the depletion-mode GaN-based HFET device thin film structure 100 may further include a GaN cap layer (not shown in the figure) formed on the AlGaN barrier layer 104, and the GaN cap layer may protect the AlGaN potential The barrier layer 104 can prevent the surface of the barrier layer 104 from being degraded due to the influence of the environment, thereby generating interface defects, effectively increasing the height of the potential barrier, and also facilitating the preparation of metal ohmic contacts between the source electrode and the drain electrode.

As shown in FIG. 1 , FIG. 3 and FIG. 4 , then step S2 is performed, and a source electrode region 105 and a drain electrode region 106 are defined on the depletion-mode GaN-based HFET device thin film structure 100 by using a photolithography mask (as shown in FIG. 3), and the source electrode 107 and the drain electrode 108 in ohmic contact are formed on the source electrode region 105 and the drain electrode region 106 (as shown in FIG. 4 ).

As shown in FIG. 3 , as an example, a photoresist layer is formed on the thin film structure 100 of the depletion-mode GaN-based HFET device; The patterned photoresist layer 115 is formed, and the open area on the patterned photoresist layer 115 is the source electrode area 105 and the drain electrode area 106 .

As shown in FIG. 4, as an example, based on the above patterned photoresist layer 115, a metal layer is deposited thereon, and then the patterned photoresist layer 115 is removed to form the source electrode region 105 and the drain electrode. The region 106 forms the source electrode 107 and the drain electrode 108 . Preferably, the metal layer can be deposited by an electron beam evaporation process, and the metal layer is a stacked structure of Ti/Al/Ni/Au, and the thickness of each layer of metal material in the stacked structure can be set according to specific needs, In this embodiment, the thickness of each layer of metal material in the stacked structure is selected to be 30nm/120nm/40nm/60nm in sequence.

As a further preferred example, after the source electrode 107 and the drain electrode 108 are formed, a rapid annealing process (RTA for short) may be performed on them to form an ohmic contact between the source electrode 107 and the drain electrode 108 and reduce the ohmic contact The resistance and rapid annealing process parameters are set according to the actual situation. In this embodiment, the parameters of the rapid thermal annealing process are selected as rapid thermal annealing in an N2 environment with a temperature between 800°C and 900°C for 30 seconds to 90 seconds.

As an example, after forming the source electrode 107 and the drain electrode 108 , the method further includes forming a local passive region by an ion implantation process, so as to realize electrical isolation between two adjacent depletion-mode GaN-based HFET devices. Preferably, the ions to be implanted can be hydrogen ions, helium ions, nitrogen ions, fluorine ions, magnesium ions, argon ions, or zinc ions, etc. Nitrogen ions are preferred in this embodiment.

As shown in FIG. 1 , FIG. 5 to FIG. 8 , then step S3 is performed, a semiconductor gate electrode region 109 (as shown in FIG. 6 ) is defined on the depletion-mode GaN-based HFET device thin film structure 100 , and a semiconductor gate electrode region 109 is defined on the semiconductor thin film structure 100 . The gate electrode region 109 forms a transition metal dichalide semiconductor gate electrode 110 (shown in FIG. 7 ).

As an example, the material of the transition metal dichalcogenide semiconductor gate electrode 110 can be any suitable for the transition metal dichalcogenide (TMD for short) of the depletion-mode GaN-based HFET device of this embodiment, for example, can be molybdenum sulfide (MoS2 ) or tungsten sulfide (WS2).

The inherent overvoltage protection design theory of traditional depletion-mode GaN-based HFET devices is: use metal conductors or highly doped polysilicon as the metal gate electrode of the device, and use a doped semiconductor thin layer as the semiconductor gate electrode of the device, and the metal gate electrode Used to control the semiconductor gate electrode, the conductivity of which can be effectively modulated by the gate electric field, as in the case of n-channel HFETs, where a positive gate bias applied to the n-type semiconductor gate electrode partially depletes the semiconductor For the gate electrode, by adjusting the doping concentration of the semiconductor gate electrode material, the semiconductor gate electrode can be completely depleted when the channel under the gate electrode is fully opened. At this time, any other voltage applied to the gate electrode terminal of the semiconductor will be isolated from the barrier layer and the underlying channel layer, thereby realizing the gate electrode overvoltage protection function in the device. It can be seen from the above discussion that the semiconductor gate electrode can be depleted by a large forward gate bias voltage, and the depletion depth depends on the doping concentration of the semiconductor gate electrode. In other words, to achieve full depletion of the semiconductor gate electrode, the semiconductor gate electrode should have The same carrier type as the channel (for example, both are n-type), and more importantly, the semiconductor gate electrode should be thin enough and moderately doped, so as to ensure that its conductivity can be effectively modulated by the electric field of the metal gate electrode. However, these requirements are difficult to achieve for existing semiconductors. Although n-GaN can be epitaxially grown on the AlGaN barrier layer, the thickness of n-GaN should be kept small while suppressing the effects of surface dangling bonds and high concentration doping. The surface scattering caused by impurities (compensating for the spontaneous polarization charge of the negative interface) has high requirements on the existing GaN fabrication process and is difficult to achieve. Because the thinner the material, the greater the influence (scattering) by the interface, so it is difficult at the process level. Achieving perfect materials and interfaces that are both thin and defect-free, it is still a great challenge to use semiconductor gate electrodes for existing depletion-mode GaN-based HFET devices.

In this embodiment, transition metal dichalcogenide is used as the gate electrode material above the channel of the depletion-mode GaN-based HFET device. Since the transition metal dichalcogenide is a layered two-dimensional semiconductor, the semiconductor gate electrode above the channel can be used as the gate electrode material. For example, the thickness of the semiconductor gate electrode can be achieved at the atomic level, and the required thickness can be adjusted by the number of transition metal dichalcogenide layers, and a semiconductor gate electrode with a thickness of less than 5nm can be achieved. , it is very beneficial to be fully depleted, so that the device itself can have an overvoltage protection function, and there is no need to add an additional overvoltage protection function through the peripheral circuit design; at the same time, the transition metal dichalcogenide has a surface without dangling bonds and itself is n It can effectively suppress the surface scattering caused by surface dangling bonds and high-concentration doping (compensating for the spontaneous polarization charge at the negative interface), so that the device can maintain a high carrier mobility.

As shown in FIGS. 5 to 8 , as an example, this embodiment uses molybdenum sulfide (MoS2) in transition metal dichalcogenides as the semiconductor gate electrode material. Preferably, the method for forming the molybdenum sulfide semiconductor gate electrode includes:

As shown in FIG. 5 , first, a molybdenum source resin 111 is coated on the entire surface of the depletion-mode GaN-based HFET device thin film structure 100 , the molybdenum source resin is Mo4S4(ROCS2)6, and R is an alkyl group;

As shown in FIG. 6 , the molybdenum source resin Mo4S4(ROCS2)6 in the semiconductor gate electrode region 109 is then exposed by an electron beam exposure process to be cross-linked and cured, and chemically converted to form molybdenum sulfide;

As shown in FIG. 7 , finally, the molybdenum source resin Mo4S4(ROCS2)6 that has not been exposed by electron beam is removed by chloroform (chloroform), and then rinsed by isopropyl alcohol (IPA) to obtain the molybdenum sulfide semiconductor gate electrode 110 .

Molybdenum sulfide semiconductor gate electrode is formed by molybdenum source resin. Molybdenum sulfide is a layered two-dimensional material, so the thickness of molybdenum sulfide semiconductor gate electrode is determined by the number of molybdenum sulfide layers. Generally, the thickness of a single-layer sulfide layer is about 0.6 nm. To achieve a thin semiconductor gate electrode with fewer layers of molybdenum sulfide, the number of molybdenum sulfide layers can be reduced by diluting the molybdenum source resin, while if the exact number of molybdenum sulfide layers needs to be determined, oxygen plasma can be applied to the molybdenum sulfide semiconductor gate electrode. Bulk etching and H ₂ S annealing are performed to obtain a molybdenum sulfide semiconductor gate electrode with a controllable number of layers. Specifically, it can be selected according to the needs of the device structure.

The preparation methods of molybdenum sulfide (MoS2) in the traditional process include direct growth on epitaxial films and transfer of molybdenum sulfide (MoS2) deposited on other substrates to the surface of the desired epitaxial film by film transfer technology. ) generally need to be prepared at high temperature (700 ° C ~ 1000 ° C), followed by lithography patterning definition, in order to achieve the desired shape of the device structure, this method has strict requirements on substrate matching and high temperature epitaxy process. , and imposes strict constraints on the shape and size of molybdenum sulfide (MoS2) crystals precisely patterned at the desired locations, i.e., demanding photolithography processes. In this embodiment, electron beam exposure lithography is performed on the molybdenum source resin 111 used by direct coating combined with electron beam exposure process. After exposure, the molybdenum source resin is partially cross-linked and cured, and chemically transferred to form molybdenum sulfide (MoS2), which is not The exposed molybdenum source resin can be removed with chloroform. The preparation process is simple, and the patterning treatment of the semiconductor gate electrode can be completed in one step at room temperature, without stripping and etching steps, and eliminating the need for high-temperature preparation of transition metal dichalcogenides In addition, compared with the existing lithography patterning process, the use of electron beam exposure has high precision, and the length and width of the semiconductor gate electrode can be manufactured with a size of less than 10 nm, and the semiconductor gate electrode The pattern of the electron beam is set by setting the trajectory of the electron beam, which is easy to set and has high flexibility, and it is easy to realize the miniaturization of the device, and it does not need an additional photolithography mask, and the cost is relatively low.

As an example, before forming the transition metal dihalide semiconductor gate electrode 110, a cleaning step of oxygen plasma oxidation and acid (selective hydrochloric acid HCl) etching is included to clean the surface of the formed structure and remove the surface of the structure Residual organics, oxides and other impurities.

As shown in FIG. 8 , the width L2 of the transition metal dichalide semiconductor gate electrode 110 is greater than the width L1 of the source electrode 107 and the drain electrode 108 , and the width L1 extending from the source electrode 107 to the drain electrode 108 Below the region is the 2DEG channel 116 of the device formed in this embodiment.

As shown in FIG. 1 , FIG. 9 to FIG. 11 , then step S4 is performed, a metal gate electrode region 112 (as shown in FIG. 9 ) is defined on the depletion-mode GaN-based HFET device thin film structure 110 , and a metal gate electrode region 112 (as shown in FIG. 9 ) is defined on the metal The gate electrode region 112 forms a metal gate electrode 113 (as shown in FIG. 10 ), the metal gate electrode 113 is formed on the transition metal dichalide semiconductor gate electrode 110 outside the 2DEG channel 116 to control the transition metal The dihalide semiconductor gate electrode 110 .

As shown in FIG. 9 , as an example, a photoresist layer is formed on the thin film structure 100 of the depletion-mode GaN-based HFET device; The photoresist layer 115 is patterned, and the opening area on the patterned photoresist layer 115 is the metal gate electrode area 112 . It should be noted here that FIG. 9 is a top view. In this embodiment, the source electrode 107 , the drain electrode 108 , the transition metal dichalide semiconductor gate electrode 110 and the metal gate electrode region 112 are shown for easy understanding. Regarding the positional relationship, those skilled in the art can understand that after the photoresist layer is coated, the source electrode 107 , the drain electrode 108 and the transition metal dichalide semiconductor gate electrode 110 cannot be seen in the actual top view.

As shown in FIG. 10 , as an example, based on the above patterned photoresist layer 115 , a metal layer is deposited thereon, and then the patterned photoresist layer 115 is removed to form a metal gate electrode in the metal gate electrode region 112 113. Preferably, the metal layer can be formed by a thermal evaporation deposition process. The metal layer is a Ni/Au stack structure. The thickness of each layer of metal material in the stack structure can be set according to specific needs. The thickness of each layer of metal material in the stacked structure is 30nm/120nm in sequence.

It should be noted here that FIG. 11 is a cross-sectional view of FIG. 10 . In this embodiment, the positional relationship between the transition metal dichalide semiconductor gate electrode 110 and the metal gate electrode 113 is shown for ease of understanding. Those skilled in the art can understand that the metal gate electrode 113 cannot be seen in the actual cross-sectional view.

As shown in FIG. 1 and FIG. 12 , step S5 is finally performed, and a passivation layer 114 is deposited on the surface of the structure formed by the above steps.

The current collapse effect is mainly caused by the device surface defects, specifically, the device surface defects additionally tune the 2DEG, thereby affecting the current characteristics. Therefore, a good device interface can suppress defects as much as possible, and providing the passivation layer 114 can provide better interface quality, thereby effectively suppressing the current collapse effect. This passivation layer can also protect the molybdenum sulfide semiconductor gate electrode, because the molybdenum sulfide exposed to the air is easily degraded, thereby affecting the material properties.

As an example, the material of the passivation layer 114 may be selected to be at least one selected from the group consisting of silicon oxide, silicon nitride, hafnium oxide, aluminum oxide, and zirconium oxide, and the thickness is between 20 nm and 100 nm. Preferably, the aluminum oxide passivation layer can be formed by atomic layer deposition (ALD), and the formed passivation layer has better interface quality.

In fact, the preparation method of the depletion-mode GaN-based HFET device in this embodiment is applicable to the preparation of all HFET devices that need overvoltage protection, for example, GaAs-based HFET devices.

Embodiment 2

This embodiment provides a depletion-mode GaN-based HFET device. The depletion-mode GaN-based HFET device can be fabricated by using the preparation method of the first embodiment, but is not limited to the preparation method described in the first embodiment. A full-scale GaN-based HFET device is sufficient. For the beneficial effects that can be achieved by the depletion-mode GaN-based HFET device, please refer to Embodiment 1, which will not be repeated below.

As shown in Figure 12, the depletion-mode GaN-based HFET device includes:

The depletion-mode GaN-based HFET device thin film structure 100 includes a semiconductor substrate layer 101, an AlGaN buffer layer 102, a GaN channel layer 103 and an AlGaN barrier layer 104 stacked in sequence;

forming ohmic contact source electrodes 107 and drain electrodes 108 on the depletion-mode GaN-based HFET device thin film structure 100;

The transition metal dihalide semiconductor gate electrode 110 is formed on the depletion-mode GaN-based HFET device thin film structure 100 , and the source electrode 107 and the drain electrode 108 are separated from the transition metal dihalide semiconductor gate electrode 110 both ends;

a metal gate electrode 113 formed on the transition metal dichalide semiconductor gate electrode 110 outside the 2DEG channel 116;

A passivation layer 114 is formed on the thin film structure 100 of the depletion-mode GaN-based HFET device.

As an example, the depletion-mode GaN-based HFET device thin film structure 100 further includes a GaN cap layer formed on the AlGaN barrier layer 104, and the material of the passivation layer 114 includes silicon oxide, silicon nitride, oxide At least one of the group consisting of hafnium, alumina and zirconia.

As an example, the material of the transition metal dihalide semiconductor gate electrode 110 includes molybdenum sulfide or tungsten sulfide.

As an example, the thickness of the transition metal dichalide semiconductor gate electrode 110 is less than 5 nm, the length is less than 10 nm, and the width is less than 10 nm.

In summary, the present invention provides a depletion-mode GaN-based HFET device and a method for fabricating the same. The material is a layered two-dimensional semiconductor, so the semiconductor gate electrode above the channel can be made very thin, for example, the thickness of the semiconductor gate electrode can be achieved at the atomic level, and the required thickness can be achieved by the number of transition metal halide layers. Adjustment is beneficial for the semiconductor gate electrode to be fully depleted, so that the device itself has an overvoltage protection function, and there is no need to add an additional overvoltage protection function through the peripheral circuit design. Semiconductor materials, which can effectively suppress surface scattering caused by surface dangling bonds and high-concentration doping (compensating for the spontaneous polarization charge at the negative interface), so that the device can maintain a high carrier mobility; in addition, the coating process combines The electron beam exposure process produces cross-linking curing and chemical conversion to form a transition metal dichalcogenide semiconductor gate electrode. The preparation process is simple. The patterning process of the semiconductor gate electrode is completed in the next step at room temperature, and no stripping and etching steps are required. The cost of preparing transition metal dichalcogenides at high temperature, the process repeatability is high, compared with the existing lithography patterning process, the electron beam exposure has high precision, and the pattern setting can be flexibly performed, no additional mask is required, and the cost lower. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has high industrial utilization value.

The above-mentioned embodiments merely illustrate the principles and effects of the present invention, but are not intended to limit the present invention. Anyone skilled in the art can modify or change the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or changes made by those with ordinary knowledge in the technical field without departing from the spirit and technical idea disclosed in the present invention should still be covered by the claims of the present invention.

Claims (11)

1. A preparation method of a depletion mode GaN-based HFET device is characterized by comprising the following steps:

providing a depletion type GaN-based HFET device film structure, wherein the depletion type GaN-based HFET device film structure sequentially comprises a semiconductor substrate layer, an AlGaN buffer layer, a GaN channel layer and an AlGaN barrier layer along the growth direction of the depletion type GaN-based HFET device film structure;

defining a source electrode area and a drain electrode area on the film structure of the depletion type GaN-based HFET device by using a photoetching mask, and forming a source electrode and a drain electrode which are in ohmic contact with each other in the source electrode area and the drain electrode area;

defining a semiconductor gate electrode region on the film structure of the depletion mode GaN-based HFET device, and forming a transition metal dihalide semiconductor gate electrode in the semiconductor gate electrode region;

defining a metal gate electrode area on the film structure of the depletion mode GaN-based HFET device, and forming a metal gate electrode in the metal gate electrode area, wherein the metal gate electrode is formed on the transition metal dihalide semiconductor gate electrode outside the 2DEG channel so as to control the transition metal dihalide semiconductor gate electrode;

and depositing a passivation layer on the surface of the structure formed in the step.

2. The method of claim 1, wherein the step of forming the depletion mode GaN-based HFET comprises: the depletion type GaN-based HFET device film structure further comprises a GaN cap layer formed on the AlGaN barrier layer; forming a local passive region by adopting an ion implantation process after the source electrode and the drain electrode are formed so as to realize the electrical isolation between two adjacent depletion type GaN-based HFET devices; the method also comprises a cleaning step of oxidizing by oxygen plasma and etching by acid before forming the transition metal dihalide semiconductor gate electrode.

3. The method of claim 1, wherein the step of forming the depletion mode GaN-based HFET comprises: the material of the passivation layer comprises at least one of the group consisting of silicon oxide, silicon nitride, hafnium oxide, aluminum oxide and zirconium oxide; and forming the source electrode and the drain electrode by adopting an annealing process, wherein the annealing temperature is between 800 and 900 ℃, and the annealing time is between 30 and 90 seconds.

4. The method of claim 1, wherein the step of forming the depletion mode GaN-based HFET comprises: the material of the transition metal dihalide semiconductor gate electrode includes molybdenum sulfide or tungsten sulfide.

5. The method of claim 4, wherein the step of forming the depletion mode GaN-based HFET comprises: the transition metal dihalide semiconductor gate electrode is a molybdenum sulfide semiconductor gate electrode, and the step of forming the molybdenum sulfide semiconductor gate electrode includes:

coating a molybdenum source resin Mo4S4(ROCS2)6 (R is alkyl) on the film structure of the depletion mode GaN-based HFET device;

exposing the molybdenum source resin Mo4S4(ROCS2)6 of the semiconductor gate electrode region by adopting an electron beam exposure process, crosslinking and curing the molybdenum source resin, and chemically converting the molybdenum source resin into molybdenum sulfide;

the molybdenum source resin Mo4S4(ROCS2)6, which was not exposed to the electron beam, was removed by chloroform and then rinsed by isopropyl alcohol to obtain the molybdenum sulfide semiconductor gate electrode.

6. The method of claim 5, wherein the step of forming the depletion mode GaN-based HFET comprises: etching the molybdenum sulfide semiconductor gate electrode by adopting oxygen plasma and H₂And S annealing process to determine the accurate thickness of the molybdenum sulfide semiconductor gate electrode.

7. The method of claim 1, wherein the step of forming the depletion mode GaN-based HFET comprises: the thickness of the transition metal dihalide semiconductor gate electrode is less than 5nm, the length is less than 10nm, and the width is less than 10 nm.

8. A depletion mode GaN-based HFET device, comprising:

the depletion type GaN-based HFET device thin film structure comprises a semiconductor substrate layer, an AlGaN buffer layer, a GaN channel layer and an AlGaN barrier layer which are sequentially stacked;

the source electrode and the drain electrode are formed on the thin film structure of the depletion type GaN-based HFET device and are in ohmic contact with each other;

a transition metal dihalide semiconductor gate electrode formed on the thin film structure of the depletion mode GaN-based HFET device, wherein the source electrode and the drain electrode are respectively arranged at two ends of the transition metal dihalide semiconductor gate electrode;

a metal gate electrode formed on the transition metal dihalide semiconductor gate electrode outside the 2DEG channel;

and the passivation layer is formed on the thin film structure of the depletion mode GaN-based HFET device.

9. The depletion mode GaN-based HFET device of claim 8, wherein: the depletion mode GaN-based HFET device film structure further comprises a GaN cap layer formed on the AlGaN barrier layer, and the material of the passivation layer comprises at least one of the group consisting of silicon oxide, silicon nitride, hafnium oxide, aluminum oxide and zirconium oxide.

10. The depletion mode GaN-based HFET device of claim 8, wherein: the material of the transition metal dihalide semiconductor gate electrode includes molybdenum sulfide or tungsten sulfide.

11. The depletion mode GaN-based HFET device of claim 8, wherein: the thickness of the transition metal dihalide semiconductor gate electrode is less than 5nm, the length is less than 10nm, and the width is less than 10 nm.

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