CN111487826A - Display panel, manufacturing method thereof and display terminal - Google Patents
Display panel, manufacturing method thereof and display terminal Download PDFInfo
- Publication number
- CN111487826A CN111487826A CN202010395411.0A CN202010395411A CN111487826A CN 111487826 A CN111487826 A CN 111487826A CN 202010395411 A CN202010395411 A CN 202010395411A CN 111487826 A CN111487826 A CN 111487826A
- Authority
- CN
- China
- Prior art keywords
- layer
- gate insulating
- substrate
- display panel
- insulating layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Liquid Crystal (AREA)
- Thin Film Transistor (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
本揭示提供一种显示面板及其制作方法、显示终端,显示面板包括背光模组、第一基板、第二基板和液晶层,第一基板包括衬底基板、过渡层和栅极绝缘层,栅极绝缘层设置于第一衬底基板远离背光模组的一侧上,过渡层设置于衬底基板与栅极绝缘层之间,且所述过渡层的折射率小于所述栅极绝缘层的折射率,以此减小玻璃基板与栅极绝缘层在交界面处的光反射,提升显示面板的背光穿透率。
The present disclosure provides a display panel, a manufacturing method thereof, and a display terminal. The display panel includes a backlight module, a first substrate, a second substrate and a liquid crystal layer. The first substrate includes a base substrate, a transition layer and a gate insulating layer. The polar insulating layer is arranged on the side of the first base substrate away from the backlight module, the transition layer is arranged between the base substrate and the gate insulating layer, and the refractive index of the transition layer is smaller than that of the gate insulating layer. Refractive index, thereby reducing light reflection at the interface between the glass substrate and the gate insulating layer, and improving the backlight transmittance of the display panel.
Description
技术领域technical field
本发明涉及显示技术领域,尤其涉及一种显示面板及其制作方法、显示终端。The present invention relates to the field of display technology, and in particular, to a display panel, a manufacturing method thereof, and a display terminal.
背景技术Background technique
现有液晶显示面板(liquid crystal display,LCD)通常包括背光模组、阵列基板、液晶层和彩膜基板,由背光模组提供光源,其发出的光线入射至阵列基板,并经由液晶层偏转从彩膜基板远离背光模组一侧出射,从而产生显示画面。An existing liquid crystal display (LCD) generally includes a backlight module, an array substrate, a liquid crystal layer and a color filter substrate. The backlight module provides a light source, and the light emitted by the backlight module is incident on the array substrate, and is deflected from the array substrate by the liquid crystal layer. The color filter substrate is emitted from the side away from the backlight module, thereby generating a display image.
采用底栅结构的非晶硅薄膜晶体管器件的阵列基板中,部分栅极绝缘层与靠近背光源一侧的玻璃基板直接接触,由于栅极绝缘层与玻璃基板之间材料的特性差异,导致背光模组发出的光线在栅极绝缘层与玻璃基板交界面处被大量反射,降低了液晶显示面板的背光穿透率,无法满足大尺寸、高分辨率的液晶显示面板对于高背光穿透率的要求。In the array substrate of the amorphous silicon thin film transistor device using the bottom gate structure, part of the gate insulating layer is in direct contact with the glass substrate on the side close to the backlight. The light emitted by the module is largely reflected at the interface between the gate insulating layer and the glass substrate, which reduces the backlight transmittance of the liquid crystal display panel, and cannot meet the requirements of large-size, high-resolution liquid crystal display panels for high backlight transmittance. Require.
综上所述,现有液晶显示面板存在栅极绝缘层与玻璃基板交界面处光线被大量反射导致液晶显示面板背光穿透率降低的问题。故,有必要提供一种显示面板及其制作方法、显示终端来改善这一缺陷。To sum up, the existing liquid crystal display panel has the problem that the light rays at the interface between the gate insulating layer and the glass substrate are largely reflected, which reduces the transmittance of the backlight of the liquid crystal display panel. Therefore, it is necessary to provide a display panel, a manufacturing method thereof, and a display terminal to improve this defect.
发明内容SUMMARY OF THE INVENTION
本揭示实施例提供一种显示面板及其制作方法、显示终端,用于解决现有液晶显示面板存在的栅极绝缘层与玻璃基板交界面处光线被大量反射导致液晶显示面板背光穿透率降低的问题。Embodiments of the present disclosure provide a display panel, a method for fabricating the same, and a display terminal, which are used to solve the problem that a large amount of light is reflected at the interface between the gate insulating layer and the glass substrate existing in the existing liquid crystal display panel, which reduces the transmittance of the backlight of the liquid crystal display panel. The problem.
本揭示实施例提供一种显示面板,包括:An embodiment of the present disclosure provides a display panel, including:
背光模组;Backlight module;
第一基板,设置于所述背光模组的出光侧;a first substrate, disposed on the light-emitting side of the backlight module;
第二基板,设置于所述第一基板远离所述背光模组的一侧;以及a second substrate disposed on a side of the first substrate away from the backlight module; and
液晶层,设置于所述第一基板和所述第二基板之间;a liquid crystal layer, disposed between the first substrate and the second substrate;
其中,所述第一基板包括衬底基板、过渡层和栅极绝缘层,所述栅极绝缘层设置于所述第一衬底基板远离所述背光模组的一侧上,所述过渡层设置于所述衬底基板与所述栅极绝缘层之间,且所述过渡层的折射率小于所述栅极绝缘层的折射率。Wherein, the first substrate includes a base substrate, a transition layer and a gate insulating layer, the gate insulating layer is disposed on a side of the first base substrate away from the backlight module, and the transition layer It is disposed between the base substrate and the gate insulating layer, and the refractive index of the transition layer is smaller than that of the gate insulating layer.
根据本揭示一实施例,所述第一基板还包括位于所述衬底基板与所述过渡层之间的图案化的第一金属层,所述图案化的第一金属层包括多个栅极和多个金属电极。According to an embodiment of the present disclosure, the first substrate further includes a patterned first metal layer between the base substrate and the transition layer, and the patterned first metal layer includes a plurality of gates and multiple metal electrodes.
根据本揭示一实施例,所述第一基板还包括层叠设置于所述栅极绝缘层上的钝化保护层以及透明电极层,所述第一基板上设有多个贯穿所述钝化保护层、所述栅极绝缘层和所述过渡层的过孔,所述透明电极层通过所述过孔与所述金属连接。According to an embodiment of the present disclosure, the first substrate further includes a passivation protection layer and a transparent electrode layer stacked on the gate insulating layer, and a plurality of passivation protection layers are provided on the first substrate. layer, the gate insulating layer and the via hole of the transition layer, and the transparent electrode layer is connected to the metal through the via hole.
根据本揭示一实施例,所述栅极绝缘层的材料包括氮化硅,所述过渡层的材料包括氮氧化硅。According to an embodiment of the present disclosure, the material of the gate insulating layer includes silicon nitride, and the material of the transition layer includes silicon oxynitride.
根据本揭示一实施例,所述过渡层的膜层厚度介于80nm~100nm之间。According to an embodiment of the present disclosure, the thickness of the transition layer is between 80 nm and 100 nm.
根据本揭示一实施例,所述过渡层的折射率介于1.70~1.80之间。According to an embodiment of the present disclosure, the refractive index of the transition layer is between 1.70 and 1.80.
本揭示实施例还提供一种显示终端,包括终端主体和如上述的显示面板,所述显示面板设置于所述终端主体上。An embodiment of the present disclosure further provides a display terminal, including a terminal body and the above-mentioned display panel, where the display panel is disposed on the terminal body.
本揭示实施例还提供一种显示面板的制作方法,包括:Embodiments of the present disclosure also provide a method for fabricating a display panel, including:
提供衬底基板,通入反应气体,在所述衬底基板上沉积形成过渡层;providing a base substrate, feeding a reactive gas, and depositing a transition layer on the base substrate;
在所述过渡层远离所述衬底基板的一侧上形成栅极绝缘层;以及forming a gate insulating layer on a side of the transition layer away from the base substrate; and
在所述栅极绝缘层远离所述过渡层的一侧上形成层叠设置的钝化保护层以及像素电极层;forming a stacked passivation protection layer and a pixel electrode layer on the side of the gate insulating layer away from the transition layer;
其中,所述过渡层的折射率小于所述栅极绝缘层的折射率。Wherein, the refractive index of the transition layer is smaller than the refractive index of the gate insulating layer.
根据本揭示一实施例,所述制作方法还包括:According to an embodiment of the present disclosure, the manufacturing method further includes:
在形成所述过渡层之前,在所述第一衬底基板上沉积金属材料,刻蚀所述金属材料形成图案化的第一金属层,所述第一金属层包括多个栅极和多个金属电极。Before forming the transition layer, a metal material is deposited on the first base substrate, and the metal material is etched to form a patterned first metal layer, where the first metal layer includes a plurality of gate electrodes and a plurality of metal electrodes.
根据本揭示一实施例,形成所述像素电极层的步骤包括:According to an embodiment of the present disclosure, the step of forming the pixel electrode layer includes:
通入刻蚀气体,刻蚀形成贯穿所述钝化保护层、所述栅极绝缘层以及所述过渡层的第一过孔,以暴露出部分所述金属电极;以及Passing an etching gas to form a first via hole through the passivation protection layer, the gate insulating layer and the transition layer by etching, so as to expose a part of the metal electrode; and
在所述钝化保护层上沉积透明导电材料,刻蚀所述透明导电材料,形成图案化的透明电极层,所述透明电极层通过所述过孔与所述金属电极连接。A transparent conductive material is deposited on the passivation protection layer, and the transparent conductive material is etched to form a patterned transparent electrode layer, and the transparent electrode layer is connected to the metal electrode through the via hole.
本揭示实施例的有益效果:本揭示实施例通过在栅极绝缘层与衬底基板之间增设折射率小于栅极绝缘层折射率的过渡层,以此减小玻璃基板与栅极绝缘层在交界面处的光反射量,提升显示面板的背光穿透率。Beneficial effects of the embodiments of the present disclosure: In the embodiments of the present disclosure, a transition layer with a refractive index smaller than that of the gate insulating layer is added between the gate insulating layer and the base substrate, so as to reduce the difference between the glass substrate and the gate insulating layer. The amount of light reflection at the interface improves the backlight transmittance of the display panel.
附图说明Description of drawings
为了更清楚地说明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单介绍,显而易见地,下面描述中的附图仅仅是揭示的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。In order to more clearly illustrate the embodiments or technical solutions in the prior art, the following will briefly introduce the accompanying drawings that need to be used in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only for disclosure. In some embodiments, for those of ordinary skill in the art, other drawings can also be obtained according to these drawings without any creative effort.
图1为本揭示提供的显示面板的膜层结构示意图;FIG. 1 is a schematic diagram of a film layer structure of a display panel provided by the present disclosure;
图2为本揭示实施例提供的显示终端的结构示意图;FIG. 2 is a schematic structural diagram of a display terminal according to an embodiment of the present disclosure;
图3为本揭示实施例提供的显示面板的制作方法的流程示意图。FIG. 3 is a schematic flowchart of a method for fabricating a display panel according to an embodiment of the present disclosure.
具体实施方式Detailed ways
以下各实施例的说明是参考附加的图示,用以例示本揭示可用以实施的特定实施例。本揭示所提到的方向用语,例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等,仅是参考附加图式的方向。因此,使用的方向用语是用以说明及理解本揭示,而非用以限制本揭示。在图中,结构相似的单元是用以相同标号表示。The following descriptions of the various embodiments refer to the accompanying drawings to illustrate specific embodiments in which the present disclosure may be practiced. The directional terms mentioned in this disclosure, such as [up], [down], [front], [rear], [left], [right], [inner], [outer], [side], etc., are only for reference Additional schema orientation. Accordingly, the directional terms used are used to describe and understand the present disclosure, rather than to limit the present disclosure. In the figures, structurally similar elements are denoted by the same reference numerals.
下面结合附图和具体实施例对本揭示做进一步的说明。The present disclosure will be further described below with reference to the accompanying drawings and specific embodiments.
本揭示实施例提供一种显示面板,下面结合图1进行详细说明。如图1所示,图1为本揭示实施例提供的显示面板的膜层结构示意图,所述显示面板包括背光模组11、第一基板12、第二基板13和液晶层14,第一基板12为阵列基板,设置于背光模组11的出光侧,第二基板13为彩膜基板,设置于第一基板2远离背光模组11的一侧,液晶层14设置于第一基板12和第二基板13之间,显示面板还包括设置于四周用于密封粘接所述第一基板12和第二基板13的封框胶。An embodiment of the present disclosure provides a display panel, which will be described in detail below with reference to FIG. 1 . As shown in FIG. 1 , FIG. 1 is a schematic diagram of a film layer structure of a display panel according to an embodiment of the disclosure. The display panel includes a
具体地,第一基板12包括第一衬底基板121、设置于第一衬底基板121上的图案化的第一金属层122、设置于第一衬底基板121上并且覆盖所述第一金属层122的栅极绝缘层124、设置于栅极绝缘层124上的有源层125、设置于有源层125上的源漏电极层126、设置于所述栅极绝缘层124上并且覆盖所述源漏电极层126、有源层125的钝化保护层127、以及设置于所述钝化保护层127上的透明电极层128,其中有源层125的材料为非晶硅材料,膜层结构包括位于栅极绝缘层124上的沟道层和欧姆接触层,有源层125与第一金属层122内的栅极以及源漏电极层126内的源极和漏极共同构成显示面板内的底栅结构的非晶硅薄膜晶体管。Specifically, the
在本揭示实施例中,栅极绝缘层124与第一衬底基板121之间设有过渡层123,且过渡层123的折射率小于栅极绝缘层124的折射率,但大于所述第一衬底基板121的折射率,以此使得背光模组11发出的光线在第一基板12的透光子区(即图1中背光模组11发出光线示意的区域)从光疏介质渐次进入光密介质,减少了光线的反射量,避免光线在折射率相差较大的第一衬底基板121和栅极绝缘层124的交界面处被大量反射,从而提高显示面板的背光穿透率。In the disclosed embodiment, a
具体地,在本揭示实施例中,所述过渡层123的折射率为1.70,过渡层123的膜层厚度为80nm。其中过渡层123的折射率可以在成膜过程中通过控制NH3和N2O的气体流量比来进行调节,在一些实施例中,所述过渡层123的折射率也可以为1.80,或者介于1.70~1.80之间即可,膜层厚度也可以为100nm,或者介于80nm~100nm之间即可,此处不做限制,但是在交界面处反射率降低的条件下,过渡层123的膜层厚度应取最小值,以保证显示面板内薄膜晶体管器件的电学性能达到要求。Specifically, in the embodiment of the present disclosure, the refractive index of the
进一步的,本揭示实施例中图案化的所述第一金属层122包括阵列排布的多个薄膜晶体管的栅极1221、多个金属电极1222以及多条扫描线,所述第一金属层122设置于第一衬底基板121与过渡层123之间,过渡层123覆盖所述多个栅极1221、金属电极1222以及多条所述扫描线。其中,过渡层123的材料为氮氧化硅SiOxNy,栅极绝缘层124的材料为氮化硅SiNx,将过渡层123设置在栅极绝缘层124的相邻膜层并且位于第一金属层122上方,通过控制反应装置内成膜温度以及反应气体的流量比,便可以通过一次化学气相沉积制程先后形成所述过渡层123和栅极绝缘层124,简化了过渡层123和栅极绝缘层124的成膜制程,还可以减少过渡层123或栅极绝缘层124等显示面板内膜层界面被杂质微粒污染,保证显示面板内各介电膜层的质量,从而降低薄膜晶体管器件电学性能衰减的风险。Further, the patterned
当然,在一些实施例中,过渡层123也可以设置于第一衬底基板121与第一金属层122之间,其同样可以实现减少交界面处光反射量的技术效果。在另一些实施中,过渡层123也可以仅设置于显示面板显示区内的透光子区,对于非透光子区保持栅极绝缘层124与第一衬底基板121直接接触,同样可用以减少光线在透光子区的第一衬底基板121与栅极绝缘层124交界面处的光反射量,此处不做限制。Of course, in some embodiments, the
在本揭示实施例中,第一基板12上还设有的多个过孔,所述过孔包括第一过孔V1和第二过孔V2,其中第一过孔V1贯穿钝化保护层126并暴露出部分源漏电极层126中的源极或者漏极,透明电极层128包括阵列排布的多个图案化的透明电极,所述透明电极通过所述第一过孔V1与源漏电极层126中的源极或者漏极连接。第二过孔V2贯穿所述钝化保护层127、栅极绝缘层124以及过渡层123并暴露出部分所述金属电极1222,透明电极通过第二过孔V2与金属电极1222连接。采用刻蚀气体NF3、O2、He的组合,通过一次刻蚀即可形成贯穿钝化保护层127、栅极绝缘层124和过渡层123的第二过孔V2,并且位于底层的过渡层123的两侧壁可保持较好的边缘坡度角,有效防止出现顶层倒角不良导致透明电极与金属电极1222搭接不良。In the embodiment of the present disclosure, a plurality of via holes are further provided on the
本揭示实施例的有益效果:本揭示实施例通过在栅极绝缘层与衬底基板之间增设折射率小于栅极绝缘层折射率的过渡层,以此减小玻璃基板与栅极绝缘层在交界面处的光反射,提升显示面板背光穿透率,满足大尺寸、高分辨率的液晶显示面板对于高背光穿透率的要求,同时将过渡层设置于第一金属之上,以通过一次沉积同时形成过渡层和栅极绝缘层,以此简化过渡层和栅极绝缘层的成膜制程,还可以减少过渡层或栅极绝缘层等显示面板内膜层界面被杂质微粒污染,保证显示面板内各介电膜层的质量,从而降低薄膜晶体管器件电学性能衰减的风险,此外还可以防止第二过孔内出现顶层倒角不良导致透明电极与金属电极搭接不良。Beneficial effects of the embodiments of the present disclosure: In the embodiments of the present disclosure, a transition layer with a refractive index smaller than that of the gate insulating layer is added between the gate insulating layer and the base substrate, so as to reduce the difference between the glass substrate and the gate insulating layer. The light reflection at the interface improves the backlight transmittance of the display panel and meets the requirements of large-size, high-resolution LCD panels for high backlight transmittance. The transition layer and the gate insulating layer are formed at the same time by deposition, which simplifies the film formation process of the transition layer and the gate insulating layer, and can also reduce the contamination of the interface of the inner film layer of the display panel such as the transition layer or the gate insulating layer by impurity particles, so as to ensure the display The quality of each dielectric film layer in the panel can be reduced, thereby reducing the risk of electrical performance degradation of the thin film transistor device, and it can also prevent the poor chamfering of the top layer in the second via hole resulting in poor overlap between the transparent electrode and the metal electrode.
本揭示实施例还提供一种显示终端,如图2所示,图2为本揭示实施例提供的显示终端的结构示意图,所述显示终端20包括终端主体21和显示面板22,,所述显示面板22设置于所述终端主体21上。终端主体21与所述显示面板22可结合为一体,所述显示面板22为上述实施例所提供的显示面板。本揭示实施例所提供的终端主体20能够实现与上述实施例所提供的显示面板22相同的技术效果,此处不再赘述。An embodiment of the present disclosure further provides a display terminal. As shown in FIG. 2 , FIG. 2 is a schematic structural diagram of a display terminal provided by an embodiment of the present disclosure. The
本揭示实施例还提供一种显示面板的制作方法,下面结合图3进行详细说明。如图3所示,图3为本揭示实施例提供的显示面板制作方法的流程示意图,所述制作方法包括:An embodiment of the present disclosure further provides a method for fabricating a display panel, which will be described in detail below with reference to FIG. 3 . As shown in FIG. 3 , FIG. 3 is a schematic flowchart of a method for fabricating a display panel according to an embodiment of the present disclosure. The fabrication method includes:
步骤S1:在所述第一衬底基板121上沉积一层金属材料,刻蚀所述金属材料形成如图3中3a所示的图案化的第一金属层122,所述第一金属层122包括多个栅极1221和多个金属电极1222。Step S1: depositing a layer of metal material on the
步骤S2:向反应装置内通入反应气体NH3、N2O以及SiH4,并在第一成膜温度的条件下,在第一衬底基板121上通过化学气相沉积的方法形成如图3中3b所示的材料为SiOxNy的过渡层123;Step S2: The reaction gas NH3, N2O and SiH4 are introduced into the reaction device, and under the condition of the first film formation temperature, the
步骤S3:持续通入上述反应气体,并且在所述第一成膜温度的条件下,在所述过渡层123表面通过化学气相沉积的方法形成如图3中3b所示的栅极绝缘层124;Step S3: Continuously feeding the above-mentioned reactive gas, and under the condition of the first film forming temperature, the
步骤S4:在所述栅极绝缘层124远离所述第一衬底基板121的一侧上形成如图3中3c所示的层叠设置的有源层125和源漏电极层126;Step S4: forming a stacked
步骤S5:在栅极绝缘层124远离第一衬底基板121的一侧上形成如图3中3c所示的覆盖所述有源层125和源漏电极层126的钝化保护层127;Step S5 : forming a
步骤S6:在所述钝化保护层127表面沉积一层光阻,刻蚀所述光阻,形成图案化的光阻层10,通入刻蚀气体NF3、O2以及He,利用所述光阻层10进行刻蚀,形成如图3中3d所示的贯穿所述钝化保护层127并且暴露出部分所述源漏电极层126的第一过孔V1,以及贯穿所述钝化保护层127、栅极绝缘层124以及过渡层123并且暴露出部分所述金属电极1222的第二过孔V2;Step S6: depositing a layer of photoresist on the surface of the
步骤S7:如图3中3e所示,去除所述光阻层10,在所述钝化保护层127上沉积一层透明导电材料,刻蚀所述透明导电材料形成图案化的透明电极层128,所述第一透明电极层128包括阵列排布的多个像素电极,像素电极通过第一过孔V1与源漏电极层126中的源极或者漏极连接,像素电极还通过第二过孔V2与金属电极1222连接。Step S7 : as shown in 3e in FIG. 3 , remove the
步骤S8:在所述电极层上形成保护层以及配向层,此步骤工艺制程以及后续与彩膜基板对盒等工艺制程与现有技术中的工艺制程相同,此处不做赘述。Step S8 : forming a protective layer and an alignment layer on the electrode layer. The process of this step and the subsequent process of cell matching with the color filter substrate are the same as those in the prior art, which will not be repeated here.
在本揭示实施例中,过渡层123的材料为氮氧化硅SiOxNy,栅极绝缘层124的材料为氮化硅SiNx,且过渡层123的折射率小于栅极绝缘层124的折射率,但大于所述第一衬底基板121的折射率,以此使得背光模组11发出的光线在第一基板12的透光子区(即图1中背光模组11发出光线示意的区域)从光疏介质渐次进入光密介质,减少了光线的反射量,避免光线在折射率相差较大的第一衬底基板121和栅极绝缘层124的交界面处被大量反射,从而提高显示面板的背光穿透率。In the disclosed embodiment, the material of the
在步骤S2中,可通过控制反应气体中NH3和N2O的气体流量比来调节过渡层123的折射率,此外在化学气相沉积成膜过程中还可也通入适量N2,提高过渡层123成膜厚度的均一性。在本揭示实施例中,所述过渡层123的折射率为1.70,过渡层123的膜层厚度为80nm。当然,在一些实施例中,所述过渡层123的折射率也可以为1.80,或者介于1.70~1.80之间即可,膜层厚度也可以为100nm,或者介于80nm~100nm之间即可,此处不做限制,但是在交界面处反射率降低的条件下,过渡层123的膜层厚度应取最小值,以保证显示面板内薄膜晶体管器件的电学性能达到要求。In step S2, the refractive index of the
在步骤S2和S3中均采用第一成膜温度,通过保持相同的成膜温度,仅改变反应装置内各反应气体的流量比,并将将过渡层123设置在栅极绝缘层124的相邻膜层并且位于第一金属层122上方,便可以通过一次化学气相沉积制程先后形成所述过渡层123和栅极绝缘层124,简化了过渡层123和栅极绝缘层124的成膜制程,还可以减少过渡层123或栅极绝缘层124等显示面板内膜层界面被杂质微粒污染,保证显示面板内各介电膜层的质量,从而降低薄膜晶体管器件电学性能衰减的风险。In both steps S2 and S3, the first film-forming temperature is used. By maintaining the same film-forming temperature, only the flow ratio of each reaction gas in the reaction device is changed, and the
在步骤S6中,采用NF3、O2以及He组合的刻蚀气体进行过孔的刻蚀,通过降低NF3和O2的气体流量比可以提高栅极绝缘层124和过渡层123的刻蚀选择比,同时还可以提高光阻层10位于两过孔处的边缘向过孔两侧消退,以此降低第二过孔V2两侧壁的钝化保护层127、栅极绝缘层124和过渡层123的刻蚀程度,使得第二过孔V2位于上述三个膜层两侧内壁的边缘坡度角良好,防止出现顶层倒角不良导致透明电极层128与金属电极1222搭接不良的情况,此外加入He可进一步保持在大面积刻蚀的情况下刻蚀的均一性。In step S6, the etching gas of the combination of NF3, O2 and He is used to etch the via hole. By reducing the gas flow ratio of NF3 and O2, the etching selectivity ratio of the
本揭示实施例的有益效果:本揭示实施例提供的显示面板的制作方法通过一次化学气相沉积的方法同时形成过渡层和栅极绝缘层,以此降低第一衬底基板与栅极绝缘层交界面处背光模组发出的光线的反射量,提高显示面板的背光穿透率,此外还可以简化过渡层和栅极绝缘层的成膜制程,并减少过渡层或栅极绝缘层等显示面板内膜层界面被杂质微粒污染,保证显示面板内各介电膜层的质量,从而降低薄膜晶体管器件电学性能衰减的风险,此外还可以防止第二过孔内出现顶层倒角不良导致透明电极与金属电极搭接不良。Beneficial effects of the embodiments of the present disclosure: The manufacturing method of the display panel provided by the embodiments of the present disclosure simultaneously forms the transition layer and the gate insulating layer by one chemical vapor deposition method, thereby reducing the crossover between the first substrate and the gate insulating layer. The amount of reflection of the light emitted by the backlight module at the interface improves the backlight transmittance of the display panel. In addition, it can simplify the film-forming process of the transition layer and the gate insulating layer, and reduce the amount of transition layer or gate insulating layer in the display panel. The interface of the film layer is polluted by impurity particles, which ensures the quality of each dielectric film layer in the display panel, thereby reducing the risk of electrical performance degradation of the thin film transistor device. In addition, it can also prevent the occurrence of poor top chamfering in the second via hole, which may lead to transparent electrodes and metals. Poor electrode connection.
综上所述,虽然本揭示以优选实施例揭露如上,但上述优选实施例并非用以限制本揭示,本领域的普通技术人员,在不脱离本揭示的精神和范围内,均可作各种更动与润饰,因此本揭示的保护范围以权利要求界定的范围为基准。In conclusion, although the present disclosure is disclosed above with preferred embodiments, the above preferred embodiments are not intended to limit the present disclosure. Those of ordinary skill in the art can make various modifications without departing from the spirit and scope of the present disclosure Alterations and modifications, therefore, the scope of protection of the present disclosure is based on the scope defined by the claims.
Claims (10)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010395411.0A CN111487826A (en) | 2020-05-12 | 2020-05-12 | Display panel, manufacturing method thereof and display terminal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010395411.0A CN111487826A (en) | 2020-05-12 | 2020-05-12 | Display panel, manufacturing method thereof and display terminal |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN111487826A true CN111487826A (en) | 2020-08-04 |
Family
ID=71792170
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010395411.0A Pending CN111487826A (en) | 2020-05-12 | 2020-05-12 | Display panel, manufacturing method thereof and display terminal |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111487826A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2024031102A (en) * | 2022-08-25 | 2024-03-07 | 株式会社ジャパンディスプレイ | display device |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1412835A (en) * | 2001-10-12 | 2003-04-23 | 海力士半导体有限公司 | Method for mfg. semiconductor device |
| CN101236897A (en) * | 2007-02-02 | 2008-08-06 | 株式会社半导体能源研究所 | Method for manufacturing semiconductor device |
| CN101825788A (en) * | 2009-03-04 | 2010-09-08 | 北京京东方光电科技有限公司 | Touch display, TFT-LCD (Thin Film Transistor Liquid Crystal Display) array substrate and manufacture method thereof |
| CN102023401A (en) * | 2009-09-18 | 2011-04-20 | 北京京东方光电科技有限公司 | TFT-LCD array substrate and method for manufacturing the same |
| CN204155941U (en) * | 2014-09-05 | 2015-02-11 | 镇江大全太阳能有限公司 | The anti-PID polysilicon solar cell of high transformation efficiency |
| CN105590847A (en) * | 2014-11-14 | 2016-05-18 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Method for releasing microstructure, and deep silicon etching microstructure |
| CN107706110A (en) * | 2016-08-08 | 2018-02-16 | 中芯国际集成电路制造(上海)有限公司 | The manufacture method of FinFET |
| CN110082977A (en) * | 2019-05-15 | 2019-08-02 | 深圳市华星光电技术有限公司 | A kind of tft array substrate and display panel |
| CN110676266A (en) * | 2019-09-25 | 2020-01-10 | 深圳市华星光电技术有限公司 | TFT substrate and preparation method thereof, and display device |
-
2020
- 2020-05-12 CN CN202010395411.0A patent/CN111487826A/en active Pending
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1412835A (en) * | 2001-10-12 | 2003-04-23 | 海力士半导体有限公司 | Method for mfg. semiconductor device |
| CN101236897A (en) * | 2007-02-02 | 2008-08-06 | 株式会社半导体能源研究所 | Method for manufacturing semiconductor device |
| CN101825788A (en) * | 2009-03-04 | 2010-09-08 | 北京京东方光电科技有限公司 | Touch display, TFT-LCD (Thin Film Transistor Liquid Crystal Display) array substrate and manufacture method thereof |
| CN102023401A (en) * | 2009-09-18 | 2011-04-20 | 北京京东方光电科技有限公司 | TFT-LCD array substrate and method for manufacturing the same |
| CN204155941U (en) * | 2014-09-05 | 2015-02-11 | 镇江大全太阳能有限公司 | The anti-PID polysilicon solar cell of high transformation efficiency |
| CN105590847A (en) * | 2014-11-14 | 2016-05-18 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Method for releasing microstructure, and deep silicon etching microstructure |
| CN107706110A (en) * | 2016-08-08 | 2018-02-16 | 中芯国际集成电路制造(上海)有限公司 | The manufacture method of FinFET |
| CN110082977A (en) * | 2019-05-15 | 2019-08-02 | 深圳市华星光电技术有限公司 | A kind of tft array substrate and display panel |
| CN110676266A (en) * | 2019-09-25 | 2020-01-10 | 深圳市华星光电技术有限公司 | TFT substrate and preparation method thereof, and display device |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2024031102A (en) * | 2022-08-25 | 2024-03-07 | 株式会社ジャパンディスプレイ | display device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN100544030C (en) | Channel-etch thin film transistor | |
| CN101345261B (en) | Thin film transistor and manufacturing method of the same | |
| CN117177606A (en) | OLED display panel and display device | |
| CN101520580B (en) | TFT-LCD array substrate structure and manufacturing method thereof | |
| WO2018233405A1 (en) | Thin-film transistor and manufacturing method therefor, array substrate, and display panel | |
| CN102854682A (en) | Array substrate for fringe field switching mode liquid crystal display and method of manufacturing the same | |
| CN102033370B (en) | Liquid crystal display substrate and manufacturing method thereof | |
| WO2020228058A1 (en) | Tft array substrate and display panel | |
| TWI545733B (en) | Display panel | |
| WO2021077674A1 (en) | Method for manufacturing array substrate, and array substrate | |
| US20220069108A1 (en) | Manufacturing Method for Array Substrate and Array Substrate | |
| KR20190131582A (en) | TFT substrate manufacturing method and TFT substrate | |
| TW201705492A (en) | Thin film transistor | |
| WO2022267532A1 (en) | Array substrate and preparation method therefor, and display panel | |
| WO2017008333A1 (en) | Manufacturing method for tft substrate structure | |
| KR20110101905A (en) | LCD array substrate and manufacturing method thereof | |
| US20220028986A1 (en) | Display panel, display panel manufacturing method, and display device | |
| CN105470195A (en) | Fabrication method of thin film transistor (TFT) substrate | |
| CN105629598B (en) | The array substrate and production method of FFS mode | |
| US7956950B2 (en) | Liquid crystal displays and methods of fabricating the same | |
| CN111487826A (en) | Display panel, manufacturing method thereof and display terminal | |
| CN102810558B (en) | Thin film transistor, array substrate and preparation methods of thin film transistor and array substrate, and liquid crystal display | |
| CN101127357A (en) | Passivation layer structure, thin film transistor device and passivation layer manufacturing method | |
| WO2023030108A1 (en) | Metal oxide thin film transistor and manufacturing method therefor, and display panel | |
| CN105826248A (en) | FFS-mode type array substrate and manufacturing method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20200804 |