CN111477174A - Pixel circuit, driving method thereof and display substrate - Google Patents

Abstract

Embodiments of the present disclosure disclose a pixel circuit, a driving method thereof, and a display substrate, which relate to the field of display and are used for reducing the number of thin film transistors in a pixel circuit and reducing display power consumption. The pixel circuit includes an input sub-circuit and a light-emitting control sub-circuit. The input sub-circuit is electrically connected to the data signal terminal and the light-emitting control sub-circuit respectively, and is configured to reset the light-emitting device through the light-emitting control sub-circuit in the reset stage, store the first data signal, store the light-emitting driving voltage in the data writing stage, and store the light-emitting driving voltage in the light-emitting stage. Auxiliary turn-on of the light-emitting control sub-circuit. The data signal provided by the data signal terminal is an AC voltage signal, and the potential of the first data signal and the second data signal are different. The light-emitting control sub-circuit is configured to transmit a reset signal to the light-emitting device in the reset stage, turn on the auxiliary input sub-circuit in the data writing stage, and drive the light-emitting device to emit light in the light-emitting stage. The pixel circuit, the driving method thereof, and the display substrate in the embodiments of the present disclosure are used for AMOLED display.

Description

Pixel circuit and driving method thereof, and display substrate

technical field

The present disclosure relates to the field of display, and in particular, to a pixel circuit, a driving method thereof, and a display substrate.

Background technique

Active-matrix organic light emitting diode (AMOLED) display technology has the characteristics of self-illumination, wide viewing angle, high contrast, fast response speed, ultra-thin and light, etc., and is widely used in the industry.

At present, each pixel in an AMOLED display substrate includes a light-emitting device and a pixel circuit electrically connected to the light-emitting device. A light-emitting driving cycle of a pixel circuit generally includes a reset phase, a data writing phase, and a light-emitting phase. Correspondingly, a pixel circuit generally includes a reset subcircuit configured to perform a reset function, an input subcircuit configured to perform a data writing function, and a light emission control subcircuit configured to drive the light emitting device to emit light. Each sub-circuit includes at least one thin film transistor (Thin Film Transistor, TFT for short), so that the number of TFTs in the pixel circuit is larger, which leads to a larger power consumption of the AMOLED display substrate.

SUMMARY OF THE INVENTION

The purpose of the embodiments of the present disclosure is to provide a pixel circuit, a driving method thereof, and a display substrate, which are used to reduce the number of thin film transistors in the pixel circuit and reduce display power consumption.

To achieve the above purpose, some embodiments of the present disclosure provide the following technical solutions:

In one aspect, a pixel circuit is provided. The pixel circuit includes an input sub-circuit and a light-emitting control sub-circuit. The input sub-circuit is electrically connected to the data signal terminal and the light-emitting control sub-circuit, respectively. The input sub-circuit is configured to: in the reset stage, in response to the second scan signal and the third scan signal, transmit the first data signal provided by the data signal terminal to the light-emitting device through the light-emitting control sub-circuit, so as to reset the light-emitting device, and Store the first data signal; in the data writing stage, in response to the second scan signal and the fourth scan signal, with the assistance of the light-emitting control sub-circuit, store the light-emitting driving voltage according to the second data signal provided by the data signal terminal and, in the light-emitting stage, the light-emitting control sub-circuit is assisted to be turned on according to the light-emitting driving voltage. The data signal provided by the data signal terminal is an AC voltage signal, and the potentials of the first data signal and the second data signal are different. The light-emitting control sub-circuit is also electrically connected to the light-emitting device, and is configured to: in the reset stage, in response to the first scan signal, transmit the first data signal to the light-emitting device; in the data writing stage, in response to the first data signal, the auxiliary input The sub-circuit is turned on; in the light-emitting stage, the light-emitting device is driven to emit light in response to the first scan signal, the fifth scan signal and the light-emitting driving voltage.

The input sub-circuit and the light-emitting control sub-circuit in the pixel circuit of the embodiment of the present disclosure can reset the light-emitting device through the first data signal provided by the data signal terminal in the reset stage. And the input sub-circuit can store the light-emitting driving voltage according to the second data signal provided by the data signal terminal in the data writing stage. In this way, the light-emitting driving sub-circuit can drive the light-emitting device to emit light under the assistance of the light-emitting driving voltage. Wherein, the first data signal and the second data signal are two data signals with different potentials in the AC voltage signal provided by the data signal terminal. That is, the pixel circuit of the embodiment of the present disclosure provides different data signals in different time periods according to the data signal terminals, and through the cooperation of the input sub-circuit and the light-emitting control sub-circuit, one light-emitting driving cycle (including the reset phase, All functions in the data writing stage and the light-emitting stage), such as the reset function, the data writing (ie, storing the light-emitting driving voltage) function, and the light-emitting control function.

Compared with the pixel circuit in the related art that resets the light-emitting device through an independent reset sub-circuit, the pixel circuit in the embodiment of the present disclosure can realize the reset function by using the input sub-circuit and the light-emitting control sub-circuit, so that there is no need to set an independent reset sub-circuit. circuit, that is, the number of thin film transistors corresponding to the reset sub-circuit can be reduced, thereby reducing the display power consumption of the display substrate.

In addition, the data signal provided by the data signal terminal in the pixel circuit in the embodiment of the present disclosure is an AC voltage signal. In this way, the same data signal terminal can provide two data signals with different potentials, the first data signal is used for reset, and the second data signal is used for data writing to realize the storage of the light-emitting driving voltage. Compared with the pixel circuit in the related art that resets the light-emitting device according to the voltage signal provided by the independent reset voltage signal terminal, the pixel circuit in the embodiment of the present disclosure can simplify the independent reset under the condition of ensuring the realization of the reset function. voltage signal terminal, thereby reducing a plurality of signal lines electrically connected to the reset voltage signal terminal and the corresponding reset driving integrated circuit, so as to further reduce the display power consumption of the display substrate.

In some embodiments, the lighting control subcircuit includes a first transistor and a drive transistor. The input sub-circuit includes a second transistor, a third transistor, a fourth transistor, and a storage capacitor.

The control electrode of the first transistor is electrically connected to the first scan signal line, the second electrode of the first transistor is electrically connected to the light emitting device, and the first electrode of the first transistor is electrically connected to the second electrode of the driving transistor. The control electrode of the second transistor is electrically connected to the second scan signal line, the first electrode of the second transistor is electrically connected to the data signal terminal, the second electrode of the second transistor is electrically connected to the first electrode of the first transistor, and the first electrode of the third transistor is One pole and the second pole of the driving transistor are respectively electrically connected. The control electrode of the third transistor is electrically connected to the third scan signal line, and the second electrode of the third transistor is electrically connected to the first electrode of the storage capacitor, the control electrode of the driving transistor, and the second electrode of the fourth transistor, respectively. The control electrode of the fourth transistor is electrically connected to the fourth scan signal line; the first electrode of the fourth transistor is electrically connected to the first electrode of the driving transistor. The second pole of the storage capacitor is electrically connected to the first power signal terminal.

In some embodiments, the lighting control subcircuit further includes a fifth transistor. The control electrode of the fifth transistor is electrically connected to the fifth scanning signal line, the first electrode of the fifth transistor is electrically connected to the first power signal terminal, and the second electrode of the fifth transistor is electrically connected to the first electrode of the driving transistor.

In some embodiments, the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the driving transistor are all P-type thin film transistors.

In some embodiments, the second transistor and the fourth transistor are N-type thin film transistors, and the first transistor, the third transistor, the driving transistor and the fifth transistor are P-type thin film transistors.

The first scan signal line and the fourth scan signal line are the same scan signal line, and the second scan signal line and the fifth scan signal line are the same scan signal line.

In some embodiments, the second transistor, the third transistor, the driving transistor and the fourth transistor are P-type thin film transistors, and the first transistor and the fifth transistor are N-type thin film transistors.

The first scan signal line and the fourth scan signal line are the same scan signal line, and the second scan signal line and the fifth scan signal line are the same scan signal line.

In some embodiments, the second transistor, the third transistor and the fourth transistor are N-type thin film transistors, and the first transistor, the driving transistor and the fifth transistor are P-type thin film transistors.

The first scan signal line and the fourth scan signal line are the same scan signal line, and the second scan signal line and the fifth scan signal line are the same scan signal line.

On the other hand, a driving method of a pixel circuit is provided, which is applied to the pixel circuit described in some of the above embodiments. One light-emitting driving cycle includes a reset phase, a data writing phase, and a light-emitting phase.

The above driving method includes: in the reset stage, the input sub-circuit is responsive to the first scanning signal, the second scanning signal and the third scanning signal, according to the first data signal provided by the data signal terminal, to reset the light-emitting device, and store the first data signal. In the data writing stage, the input sub-circuit stores the light-emitting driving voltage according to the second data signal provided by the data signal terminal in response to the second scan signal, the fourth scan signal and the first data signal. The data signal provided by the data signal terminal is an AC voltage signal. The potentials of the first data signal and the second data signal are different. In the light-emitting stage, the light-emitting control sub-circuit drives the light-emitting device to emit light in response to the first scan signal, the fifth scan signal and the light-emitting driving voltage input to the sub-circuit.

The beneficial effects that can be achieved by the driving method of the pixel circuit in the embodiments of the present disclosure are the same as the beneficial effects that can be achieved by the pixel circuits in the above-mentioned embodiments, and are not repeated here.

In some embodiments, the lighting control sub-circuit includes a first transistor, a drive transistor, and a fifth transistor. The input sub-circuit includes a second transistor, a third transistor, a fourth transistor, and a storage capacitor.

The above driving method further includes:

In the reset stage, the first scan signal controls the first transistor to conduct, the second scan signal controls the second transistor to conduct, and the third scan signal controls the third transistor to conduct; the data signal terminal provides the first data signal; the first data signal The second transistor and the first transistor are transmitted to the light emitting device to reset the light emitting device; the first data signal is transmitted to the storage capacitor through the second transistor and the third transistor; the storage capacitor stores the first data signal.

In the data writing stage, the second scan signal controls the conduction of the second transistor, the first data signal stored in the storage capacitor controls the conduction of the driving transistor, and the fourth scan signal controls the conduction of the fourth transistor; the data signal terminal provides the second data signal; the input sub-circuit stores the light-emitting driving voltage to the storage capacitor according to the second data signal.

In the light-emitting stage, the fifth scanning signal controls the fifth transistor to be turned on, the light-emitting driving voltage stored in the storage capacitor controls the driving transistor to be turned on, and the first scanning signal controls the first transistor to be turned on; the first power supply provided by the first power supply signal terminal The voltage signal is transmitted to the light emitting device through the fifth transistor, the driving transistor and the first transistor, and drives the light emitting device to emit light.

In yet another aspect, a display substrate is provided. The display substrate includes the pixel circuit described in some of the above embodiments.

The beneficial effects that can be achieved by the display substrate in the embodiments of the present disclosure are the same as the beneficial effects that can be achieved by the pixel circuits in the above-mentioned embodiments, which will not be repeated here.

Description of drawings

The accompanying drawings described herein are used to provide further understanding of some embodiments of the present disclosure, and constitute a part of the embodiments of the present disclosure. The schematic embodiments of the present disclosure and their descriptions are used to explain the present disclosure and do not constitute an improper limitation of the present disclosure. . In the attached image:

FIG. 1 is a schematic structural diagram of a pixel circuit according to some embodiments of the present disclosure;

2 is a schematic flowchart of a method for driving a pixel circuit according to some embodiments of the present disclosure;

FIG. 3 is a schematic structural diagram of another pixel circuit provided by some embodiments of the present disclosure;

FIG. 4 is a timing diagram of the pixel circuit shown in FIG. 3;

FIG. 5 is a schematic flowchart of another driving method of a pixel circuit provided by some embodiments of the present disclosure;

6 is a schematic diagram of a signal transmission direction of the pixel circuit shown in FIG. 3 in a reset phase;

7 is a schematic diagram of a signal transmission direction of the pixel circuit shown in FIG. 3 in a data writing stage;

FIG. 8 is a schematic diagram of the signal transmission direction of the pixel circuit shown in FIG. 3 in the light-emitting stage;

FIG. 9 is a schematic structural diagram of still another pixel circuit provided by some embodiments of the present disclosure;

FIG. 10 is a timing diagram of the pixel circuit shown in FIG. 9;

FIG. 11 is a schematic structural diagram of still another pixel circuit provided by some embodiments of the present disclosure;

FIG. 12 is a timing diagram of the pixel circuit shown in FIG. 11;

FIG. 13 is a schematic structural diagram of still another pixel circuit provided by some embodiments of the present disclosure;

FIG. 14 is a timing diagram of the pixel circuit shown in FIG. 13;

FIG. 15 is a schematic diagram of the layout design of the pixel circuit shown in FIG. 13;

16 is a schematic diagram of a manufacturing process of the pixel circuit shown in FIG. 13;

Fig. 17 is a signal output effect diagram of an analog simulation test of the pixel circuit shown in Fig. 13;

FIG. 18 is a volt-ampere characteristic curve diagram of the OLED in the pixel circuit shown in FIG. 13;

FIG. 19 is a schematic diagram of error analysis of the light-emitting current I(OLED) of the OLED in the pixel circuit shown in FIG. 13;

20 is a graph showing the relationship between the light-emitting current I(OLED) of the OLED and the threshold voltage Vth(DT) of the driving transistor DT in the pixel circuit shown in FIG. 13;

FIG. 21 is a schematic structural diagram of a display substrate according to some embodiments of the disclosure.

Detailed ways

For ease of understanding, the technical solutions provided by some embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are only some, but not all, embodiments of the present disclosure. Based on some embodiments of the present disclosure, all other embodiments that can be obtained by those skilled in the art fall within the protection scope of the present disclosure.

Some embodiments of the present disclosure provide a pixel circuit. Please refer to FIG. 1 , the pixel circuit includes an input sub-circuit 1 and a light-emitting control sub-circuit 2 . The input sub-circuit 1 is electrically connected to the data signal terminal Vdata and the light-emitting control sub-circuit 2 respectively. The input sub-circuit 1 is configured to: in the reset stage, in response to the second scan signal and the third scan signal, through the light-emitting control sub-circuit 2, transmit the first data signal provided by the data signal terminal Vdata to the light-emitting device 3, so as to control the light-emitting device. 3. Reset and store the first data signal; in the data writing stage, in response to the second scanning signal and the fourth scanning signal, with the assistance of the light-emitting control sub-circuit 2, according to the second data signal provided by the data signal terminal Vdata , storing the light-emitting driving voltage; and, in the light-emitting stage, assisting in controlling the light-emitting control sub-circuit 2 to be turned on according to the light-emitting driving voltage. The data signal provided by the data signal terminal is an AC voltage signal. The potentials of the first data signal and the second data signal are different.

Exemplarily, the first data signal is at a low level, and the second data signal is at a high level. Or, the first data signal is at a high level, and the second data signal is at a low level. In this way, the first data signal and the second data signal can each be configured to perform different functions.

For example, the first data signal is at a low level. The input sub-circuit 1 and the light-emitting driving sub-circuit 2 can reset the light-emitting device 3 according to the first data signal. In addition, the input sub-circuit 1 stores the first data signal, and can also perform self-reset according to the first data signal.

The second data signal is at a high level. The input sub-circuit 1 can store the light-emitting driving voltage with the assistance of the light-emitting control sub-circuit 2 according to the second data signal. Here, the light-emitting driving voltage may be expressed as the second data signal, or may be expressed as a new data signal after being changed on the basis of the second data signal. It is specifically set according to actual needs, which is not limited in this embodiment of the present disclosure.

The above-mentioned light-emitting control sub-circuit 2 is also electrically connected to the light-emitting device 3, and is configured to: in the reset stage, in response to the first scan signal, transmit the first data signal in the input sub-circuit 1 to the light-emitting device 3; in the data writing stage , in response to the first data signal, the auxiliary input sub-circuit is turned on; in the light-emitting stage, in response to the first scan signal, the fifth scan signal and the light-emitting driving voltage, the light-emitting device 3 is driven to emit light.

Here, the light-emitting device 3 is an electronic device with a self-luminous function, such as an organic light-emitting diode (Organic Light-Emitting Diode, OLED for short), an active matrix quantum dot light-emitting diode (Quantum Dot Light Emitting Diodes, QLED for short) or a light-emitting diode (Light Emitting Diode). Emitting Diodes, referred to as LED) and so on.

In the pixel circuit of the embodiment of the present disclosure, the input sub-circuit 1 is electrically connected to the data signal terminal Vdata and the light-emitting control sub-circuit 2 respectively, and the light-emitting control sub-circuit 2 is electrically connected to the light-emitting device 3 . In this way, under the control of the second scan signal and the third scan signal, the input sub-circuit 1 can transmit the first data signal provided by the data signal terminal Vdata to the light-emitting control sub-circuit 2 and store the first data signal at the same time. The light control subcircuit 2 turns on the input subcircuit 1 and the light emitting device 3 in response to the first scan signal. In this way, the first data signal is transmitted to the light-emitting device 3 through the light-emitting control sub-circuit 2 to reset the light-emitting device 3 . In the data writing stage, the light-emitting control sub-circuit 2 can assist in turning on the input sub-circuit 1 under the control of the first data signal in the input sub-circuit. Under the control of the second scan signal and the fourth scan signal, the input sub-circuit 1 is turned on by the light-emitting control sub-circuit 2 . In this way, the input sub-circuit 1 can store the light-emitting driving voltage according to the second data signal provided by the data signal terminal Vdata with the assistance of the light-emitting control sub-circuit 2 . In the light-emitting stage, the light-emitting control sub-circuit 2 can drive the light-emitting device 3 to emit light in response to the first scan signal, the fifth scan signal and the light-emitting driving voltage input to the sub-circuit.

It can be seen that the input subcircuit 1 and the light emission control subcircuit 2 in the pixel circuit of the embodiment of the present disclosure can reset the light emitting device 3 through the first data signal provided by the data signal terminal Vdata in the reset stage. And the input sub-circuit 1 can store the light-emitting driving voltage according to the second data signal provided by the data signal terminal Vdata in the data writing stage. In this way, the light-emitting driving sub-circuit 2 can drive the light-emitting device 3 to emit light under the auxiliary control of the light-emitting driving voltage. The first data signal and the second data signal are two data signals with different potentials in the AC voltage signal provided by the data signal terminal Vdata. That is, the pixel circuit of the embodiment of the present disclosure provides different data signals in different time periods according to the data signal terminal Vdata, and through the cooperation of the input sub-circuit 1 and the light-emitting control sub-circuit 2, one light-emitting driving cycle (including All functions within the reset phase, data writing phase, and light-emitting phase), such as reset function, data writing (ie, storing the light-emitting driving voltage) function, and light-emitting control function.

Compared with the pixel circuit in the related art that resets the light-emitting device 3 through an independent reset sub-circuit, the pixel circuit in the embodiment of the present disclosure can use the input sub-circuit 1 and the light-emitting control sub-circuit 2 to realize the reset function, so that there is no need to set an independent reset function. The reset sub-circuit can reduce the number of thin film transistors corresponding to the reset sub-circuit, thereby reducing the display power consumption of the display substrate.

In addition, the data signal provided by the data signal terminal Vdata in the pixel circuit in the embodiment of the present disclosure is an AC voltage signal. In this way, the same data signal terminal Vdata can provide two data signals with different potentials, the first data signal is used for reset, and the second data signal is used for data writing to realize the storage of the light-emitting driving voltage. Compared with the pixel circuit in the related art that resets the light-emitting device 3 according to the voltage signal provided by the independent reset voltage signal terminal, the pixel circuit in the embodiment of the present disclosure can simplify the independent reset function under the condition of ensuring the realization of the reset function. The reset voltage signal terminal is used to reduce a plurality of signal lines electrically connected to the reset voltage signal terminal and the corresponding reset driving integrated circuits, so as to further reduce the display power consumption of the display substrate.

The structures and functions of the pixel circuits in the embodiments of the present disclosure are as described above. It can be seen that in the process of driving the light-emitting device 3 to emit light by the pixel circuit, one light-emitting driving cycle at least includes a reset phase, a data writing phase and a light-emitting phase. The driving method of the pixel circuit includes S100-S300, please refer to FIG. 2 .

S100, in the reset stage, the input sub-circuit 1 transmits the first data signal provided by the data signal terminal to the light-emitting device 3 through the light-emitting control sub-circuit 2 in response to the second scan signal and the third scan signal, so as to reset the light-emitting device 3 , and store the first data signal.

S200 , in the data writing stage, the light-emitting control sub-circuit 2 turns on the auxiliary input sub-circuit 1 in response to the first data signal. In response to the second scan signal and the fourth scan signal, the input sub-circuit 1 stores the light-emitting driving voltage according to the second data signal provided by the data signal terminal Vdata with the assistance of the light-emitting control sub-circuit 2 . The data signal provided by the data signal terminal Vdata is an AC voltage signal. The potentials of the first data signal and the second data signal are different.

S300 , in the light-emitting stage, the light-emitting control sub-circuit 2 drives the light-emitting device 3 to emit light in response to the first scan signal, the fifth scan signal and the light-emitting driving voltage input to the sub-circuit 1 .

The beneficial effects that can be achieved by the driving method of the pixel circuit in the embodiments of the present disclosure are the same as the beneficial effects that can be achieved by the pixel circuits in the above-mentioned embodiments, and are not repeated here.

The functions of the lighting control sub-circuit 2 and the input sub-circuit 1 in the embodiment of the present disclosure are as described above, and their specific structures can be selected and determined according to the actual situation, which is not limited in the embodiment of the present disclosure.

In some embodiments, please refer to FIG. 3 , the lighting control sub-circuit 2 includes a first transistor T1 and a driving transistor DT. The control electrode of the first transistor T1 is electrically connected to the first scanning signal line S1, the second electrode of the first transistor T1 is electrically connected to the light-emitting device 3, and the first electrode of the first transistor T1 is electrically connected to the second electrode of the driving transistor DT. .

Please continue to refer to FIG. 3 , the lighting control sub-circuit 2 further includes a fifth transistor T5. The control electrode of the fifth transistor T5 is electrically connected to the fifth scanning signal line S5, the first electrode of the fifth transistor T5 is electrically connected to the first power supply signal terminal VDD, and the second electrode of the fifth transistor T5 is electrically connected to the first electrode of the driving transistor DT. pole electrical connection.

Please continue to refer to FIG. 3 , the input sub-circuit 1 includes a second transistor T2 , a third transistor T3 , a fourth transistor T4 and a storage capacitor C. As shown in FIG. The control electrode of the second transistor T2 is electrically connected to the second scan signal line S2, the first electrode of the second transistor T2 is electrically connected to the data signal terminal Vdata, and the second electrode of the second transistor T2 is electrically connected to the first electrode of the first transistor T1 , the first pole of the third transistor T3 and the second pole of the driving transistor DT are respectively electrically connected. The control electrode of the third transistor T3 is electrically connected to the third scanning signal line S3, the second electrode of the third transistor T3 is connected to the first electrode of the storage capacitor C, the control electrode of the driving transistor DT, and the second electrode of the fourth transistor T4, respectively electrical connection. The control electrode of the fourth transistor T4 is electrically connected to the fourth scan signal line S4; the first electrode of the fourth transistor T4 is electrically connected to the first electrode of the driving transistor DT. The second pole of the storage capacitor C is electrically connected to the first power signal terminal VDD.

It should be noted that, for the convenience of description, the following embodiments illustrate that the light-emitting device 3 is an OLED. The first pole of the OLED is electrically connected to the pixel circuit in the embodiment of the present disclosure, and the second pole of the OLED is electrically connected to the second power signal terminal VSS. Typically, the first pole of an OLED is the anode and the second pole is the cathode.

In order to explain the driving process of the pixel circuit according to the embodiment of the present disclosure more clearly, the following takes the pixel circuit shown in FIG. 3 as an example for detailed description.

Referring to FIG. 5, the driving method of the pixel circuit includes S100'-S300'.

S100', as shown in FIG. 6 , in the reset stage, the first scan signal controls the first transistor T1 to conduct, the second scan signal controls the second transistor T2 to conduct, and the third scan signal controls the third transistor T3 to conduct. The data signal terminal Vdata provides the first data signal. The first data signal is transmitted to the light emitting device 3 through the second transistor T2 and the first transistor T1 to reset the light emitting device 3 . The first data signal is transmitted to the storage capacitor C through the second transistor T2 and the third transistor T3. The storage capacitor C stores the first data signal.

Here, the first data signal stored in the storage capacitor C is configured to provide a control potential signal to the control electrode of the driving transistor DT, so as to control the driving transistor to be turned on during the data writing phase.

S200 ′, as shown in FIG. 7 , in the data writing stage, the second scan signal controls the second transistor T2 to conduct, the fourth scan signal controls the fourth transistor T4 to conduct, and the first data signal stored in the storage capacitor C controls The driving transistor DT is turned on. The data signal terminal Vdata provides the second data signal. The input sub-circuit 1 stores the light-emitting driving voltage to the storage capacitor C according to the second data signal.

It can be seen from the above that at this stage, the first electrode and the control electrode of the driving transistor DT are turned on through the fourth transistor T4. The second data signal is represented by Vdata(H).

The above-mentioned input sub-circuit 1 stores the light-emitting driving voltage to the storage capacitor C according to the second data signal Vdata(H), which is represented as: the second data signal Vdata(H) is transmitted through the second transistor T2, the driving transistor DT and the fourth transistor T4 To the first pole of the storage capacitor C, the initial potential of the first pole of the storage capacitor C, that is, the first data signal, is pulled low or high. Until the difference between the potential of the first electrode of the storage capacitor C, that is, the potential of the control electrode of the driving transistor DT, and the potential of the second electrode of the driving transistor DT is equal to the threshold voltage Vth(DT) of the driving transistor DT. In this way, the threshold voltage Vth(DT) of the driving transistor DT is written to the first electrode of the storage capacitor. The final potential of the first pole of the storage capacitor is stabilized at Vdata(H)+Vth(DT). This potential is also the above-mentioned light emission drive voltage.

S300 ′, as shown in FIG. 8 , in the light-emitting stage t3 , the fifth scanning signal controls the fifth transistor T5 to be turned on, the light-emitting driving voltage stored in the storage capacitor C controls the driving transistor DT to be turned on, and the first scanning signal controls the first transistor T1 is turned on. The first power supply voltage signal provided by the first power supply signal terminal VDD is transmitted to the light emitting device 3 through the fifth transistor T5, the driving transistor DT and the first transistor T1, and the light emitting device 3 is driven to emit light.

In some embodiments, the control electrode of each transistor used in the pixel circuit is the gate electrode of the transistor, the first electrode is one of the source electrode and the drain electrode of the transistor, and the second electrode is the other one of the source electrode and the drain electrode of the transistor. Since the source and drain of the transistor may be symmetrical in structure, the source and drain of the transistor may be indistinguishable in structure, that is, the first electrode and the second electrode of the transistor in the embodiments of the present disclosure Diodes may be indistinguishable in structure.

Exemplarily, the control electrode of each of the above thin film transistors is the gate electrode, the first electrode is the source electrode, and the second electrode is the drain electrode. In addition, in transistors other than the driving transistor DT, the gate electrodes of different transistors may be electrically connected to different scanning signal lines, respectively, or to the same scanning signal line.

It should be noted that, in some embodiments of the present disclosure, the transistors included in the pixel circuit (eg, the first transistor T1, the driving transistor DT, the second transistor T2, the third transistor T3, the fourth transistor T4, or the fifth transistor T5) may be N-type thin film transistor or P-type thin film transistor. Specifically, it can be selected and determined according to actual needs, which is not limited in this embodiment of the present disclosure.

In addition, in transistors other than the driving transistor DT, the gate electrodes of different transistors may be electrically connected to different scanning signal lines, respectively, or to the same scanning signal line.

It is easy to understand that when the above pixel circuits use different types of transistors to perform the same function, the on or off states of the transistors at the corresponding connection positions and the transmission process of related signals in the pixel circuit can remain unchanged. Only the timing of the scanning signal lines corresponding to the transistors can be adaptively adjusted. In some examples, among other transistors other than the driving transistor DT, the control electrodes of different transistors are electrically connected to different scan signal lines, that is, each transistor is controlled by its independent scan signal, as shown in FIG. 3 .

By way of example, in the pixel circuit shown in FIG. 3 , the first transistor T1 , the driving transistor DT, the second transistor T2 , the third transistor T3 , the fourth transistor T4 and the fifth transistor T5 are all P-type thin film transistors.

The first transistor T1 is controlled by the first scan signal provided by the first scan signal line S1, the second transistor T2 is controlled by the second scan signal provided by the second scan signal line S2, and the third transistor T3 is provided by the third scan signal line S3 The fourth transistor T4 is controlled by the fourth scan signal provided by the fourth scan signal line S4, and the fifth transistor T5 is controlled by the fifth scan signal provided by the fifth signal line S5. Correspondingly, the timing sequence of each scan signal line in FIG. 3 is shown in FIG. 4 .

In the reset period t1, the first scan signal line S1, the second scan signal line S2 and the third scan signal line S3 provide a low potential signal. The fourth scan signal line S4 and the fifth signal line S5 provide a high potential signal. In the data writing phase t2, the first scan signal line S1, the third scan signal line S3 and the fifth signal line S5 provide a high potential signal. The second scan signal line S2 and the fourth scan signal line S4 provide a low potential signal. In the light-emitting period t3, the first scan signal line S1 and the fifth signal line S5 provide a low potential signal. The second scan signal line S2, the third scan signal line S3 and the fourth scan signal line S4 provide a high potential signal.

In other examples, among other transistors other than the driving transistor DT, some transistors are controlled by the same scan signal, that is, the control electrodes of multiple transistors may be electrically connected to the same scan signal line according to actual conditions. For example, as shown in FIG. 9 , FIG. 11 and FIG. 13 , the control electrode of the first transistor T1 and the control electrode of the fourth transistor T4 are electrically connected to the same scan signal line, and the second transistor T2 and the fifth transistor T5 are electrically connected to the same scan signal line electrical connection. That is, the first scan signal line S1 and the fourth scan signal line S4 are the same scan signal line, that is, the sixth scan signal line S6. The second scan signal line S2 and the fifth scan signal line S5 are the same scan signal line, that is, the seventh scan signal line S7.

9, the second transistor T2 and the fourth transistor T4 are N-type thin film transistors, and the first transistor T1, the third transistor T3, the driving transistor DT and the fifth transistor T5 are P-type thin film transistors. Correspondingly, the timing sequence of each scanning signal line in FIG. 9 is shown in FIG. 10 . In the reset phase t1, the third scan signal line S3 and the sixth scan signal line S6 provide a low-level signal, and the seventh scan signal line S7 provides a high-level signal. In the data writing stage t2, please continue to refer to FIG. 9 and FIG. 10, the third scan signal line S3, the sixth scan signal line S6 and the seventh scan signal line S7 all provide high-level signals. In the light-emitting stage t3, please continue to refer to FIG. 9 and FIG. 10, the third scan signal line S3 provides a high-level signal. The sixth scan signal line S6 and the seventh scan signal line S7 provide a low potential signal.

In addition, it is easy to understand that the pixel circuit in this embodiment uses the combination of P-type thin film transistors and N-type thin film transistors, so that the first transistor T1 and the fourth transistor T4 can be controlled by the scanning signal provided by the same scanning signal line , turn on or off in time division; the second transistor T2 and the fifth transistor T5 can be turned on or off in time division through the scanning signal provided by the same scanning signal line. In this way, the number of scanning signal lines in the pixel circuit can be reduced from five to three (the third scanning signal line S3 , the sixth scanning signal line S6 and the seventh scanning signal line S7 ). The number of scanning signal lines in the pixel circuit is reduced, which also reduces the number of signal lines electrically connected to the reset voltage signal terminal and the corresponding reset driving integrated circuits, thereby reducing the space occupancy rate. In this way, it is also beneficial to realize a narrow frame design corresponding to the display device.

11, the second transistor T2, the third transistor T3, the driving transistor DT and the fourth transistor T4 are P-type thin film transistors, and the first transistor T1 and the fifth transistor T5 are N-type thin film transistors. Correspondingly, the timing sequence of each scanning signal line in FIG. 11 is shown in FIG. 12 . In the reset phase t1, the third scan signal line S3 and the seventh scan signal line S7 provide a low-level signal, and the sixth scan signal line S6 provides a high-level signal. In the data writing phase t2, the third scan signal line S3 provides a high potential signal. The sixth scan signal line S6 and the seventh scan signal line S7 provide a low potential signal. In the light-emitting stage t3, please refer to FIG. 11 and FIG. 12, the third scan signal line S3, the sixth scan signal line S6 and the seventh scan signal line S7 all provide high-level signals.

It can be seen that, similar to the previous embodiment, this embodiment can also reduce the number of scanning signal lines from five to three. Therefore, the same beneficial effects as those of the previous embodiment can be achieved.

In addition, the third transistor T3 and the fourth transistor T4 in this embodiment are both P-type thin film transistors, that is, the same type of thin film transistors. In the light-emitting stage t3, when the third transistor T3 and the fourth transistor T4 are turned off at the same time, the scan signal applied to the gate electrodes of the two can be the same potential signal. In this way, the potential signal at the position between the two (eg point A) in the pixel circuit can be guaranteed to be stable, that is, the potential signal applied to the control electrode of the driving transistor DT can be guaranteed to be stable. Therefore, the light-emitting device 3 has stable display brightness, and the display effect of the display substrate is effectively guaranteed.

In addition, the third transistor T3 and the fourth transistor T4 are of the same type, so that the two can be processed through an aging process at the same time, which effectively improves the stability of their performance, thereby ensuring the control electrode potential of the driving transistor DT electrically connected to the two. The stability of the light-emitting device 3 and the display effect of the display substrate are guaranteed.

13, the second transistor T2, the third transistor T3 and the fourth transistor T4 are N-type thin film transistors, and the first transistor T1, the driving transistor DT and the fifth transistor T5 are P-type thin film transistors. Correspondingly, the timing sequence of each scanning signal line in FIG. 13 is shown in FIG. 14 . In the reset phase t1, please refer to FIG. 13 and FIG. 14, the third scan signal line S3 and the seventh scan signal line S7 provide a high-level signal, and the sixth scan signal line S6 provides a low-level signal. In the data writing stage t2, please continue to refer to FIG. 13 and FIG. 14, the third scan signal line S3 provides a low-level signal. The sixth scan signal line S6 and the seventh scan signal line S7 provide a high potential signal. In the light-emitting stage t3, please refer to FIG. 13 and FIG. 14, the third scan signal line S3, the sixth scan signal line S6 and the seventh scan signal line S7 all provide low-level signals.

It can be seen that, similar to the previous embodiment, this embodiment can also reduce the number of scan signal lines from five to three, and the third transistor T3 and the fourth transistor T4 are the same type of thin film transistors. Therefore, the same beneficial effects as those of the previous embodiment can be achieved.

In addition, the first transistor T1 and the fifth transistor T5 in the pixel circuit of this embodiment are P-type thin film transistors. In the light-emitting stage t3, the scan signals provided by the sixth scan signal line S6 and the seventh scan signal line S7 are low-level signals. That is, at this time, the gate potential of the first transistor T1 and the gate potential of the fifth transistor T5 are low potential signals. The potential signal provided by the first power signal terminal VDD is a high potential signal. That is, the source potential of the first transistor T1 and the source potential of the fifth transistor T5 are high potential signals. In this way, the potential difference Ugs(T1) between the gate and the source of the first transistor T1 and the potential difference Ugs(T5) between the gate and the source of the fifth transistor T5 are the low potential signal and the high potential difference in signal.

It is easy to understand that if the first transistor T1 and the fifth transistor T5 are N-type thin film transistors, in the light-emitting stage t3, the scan signals provided by the sixth scan signal line S6 and the seventh scan signal line S7 correspond to high potential signals. That is, the source potential of the first transistor T1 and the gate potential of the fifth transistor T5 are high potential signals. In this way, the potential difference Ugs(T1) between the gate and the source of the first transistor T1 and the potential difference Ugs(T5) between the gate and the source of the fifth transistor T5 are the high potential signal and the high potential difference in signal.

It can be seen that, compared with the case where the first transistor T1 and the fifth transistor T5 are N-type thin film transistors, in this embodiment, the first transistor T1 and the fifth transistor T5 use P-type thin film transistors, which can make Ugs(T1) and Ugs( T5) is smaller. Therefore, it is easier to ensure that the first transistor T1 and the fifth transistor T5 satisfy the turn-on conditions, that is, ∣Ugs(T1)∣ is greater than ∣Vth(T1)∣, and ∣Ugs(T5)∣ is greater than ∣Vth(T5)∣. Even make ∣Ugs(T1)∣ much larger than ∣Vth(T1)∣, and ∣Ugs(T5)∣ much larger than ∣Vth(T5)∣.

In this way, even if Vth(T1) or Vth(T5) drifts to a certain extent (for example, due to the manufacturing process, or the transistors are aged for a long time, causing the threshold voltage to drift), the first transistor T1 and the fifth transistor T5 can still be turned on. Therefore, the conduction of the light-emitting control sub-circuit 2 is ensured, so that the light-emitting device 3 emits light normally.

It should be noted that, each transistor in the pixel circuit of the embodiment of the present disclosure may be a top-gate thin film transistor or a bottom-gate thin film transistor.

Illustratively, each transistor in the pixel circuit of the embodiment of the present disclosure is a top-gate thin film transistor. FIG. 15 is a schematic diagram of the layout structure of the pixel circuit shown in FIG. 13 . FIG. 16 is a schematic diagram of the fabrication process of the pixel circuit shown in FIG. 13 . Wherein, a corresponding insulating layer is also arranged between every two adjacent conductive layers. For example, the gate insulating layer provided between the active layer and the gate electrode in the transistor, and the interlayer insulating layer provided between the gate electrode and the source electrode and the drain electrode, etc. This part of the content is omitted in FIG. 15 , and only the conductive patterns are illustrated.

According to the layout design shown in FIG. 16 , the fabrication process of the pixel circuit is as follows.

As shown in (a) of FIG. 16, a patterned semiconductor layer is formed on a substrate (not shown in the figure). The semiconductor layer is configured to form an active layer in each of the transistors (including the first transistor T1, the driving transistor DT, the second transistor T2, the third transistor T3, the fourth transistor T4, and the fifth transistor T5).

As shown in FIG. 16( b ), a patterned first conductive layer is formed on the side of the above-mentioned active layer away from the substrate. The first conductive layer is configured to form gates of respective transistors (including a first transistor T1, a driving transistor DT, a second transistor T2, a third transistor T3, a fourth transistor T4 and a fifth transistor T5), and a third scan signal line S3 , the sixth scan signal line S6 , the seventh scan signal line S7 and the first pole of the storage capacitor C.

Here, a gate insulating layer (not shown in the figure) is provided between the first conductive layer and the active layer.

As shown in FIG. 16( c ), a patterned second conductive layer is formed on the side of the above-mentioned first conductive layer away from the substrate. The second conductive layer is configured to form the second pole of the storage capacitor C. FIG.

Here, a first interlayer insulating layer (not shown in the figure) is disposed between the second conductive layer and the first conductive layer.

As shown in (d) of FIG. 16 , a patterned third conductive layer is formed on the side of the above-mentioned second conductive layer away from the substrate. The third conductive layer is configured to form the source and drain of each transistor (including the first transistor T1, the driving transistor DT, the second transistor T2, the third transistor T3, the fourth transistor T4 and the fifth transistor T5), The data signal terminal Vdata, the first power signal terminal VDD.

Here, a second interlayer insulating layer (not shown in the figure) is disposed between the third conductive layer and the second conductive layer.

It should be noted that, the area O in FIG. 16 is a film layer area connected to the anode 12 in the pixel circuit.

In addition, the layout design manner of the pixel circuit shown in FIG. 13 may be various, which is not limited in the embodiment of the present disclosure. Figure 16 is only one possible scenario.

In order to verify the driving performance of the pixel circuit of the embodiment of the present disclosure, the inventors conducted a simulation experiment. Figures 17 to 20 are related data obtained after the simulation test.

FIG. 17 is a signal output effect diagram after an analog simulation test of the pixel circuit shown in FIG. 13 . In a light-emitting driving cycle, the potential of point A V(A), the potential of point B V(B), the light-emitting current I(OLED) of the OLED and the anode potential V(OLED) of the OLED in the pixel circuit are in various stages (including reset) The changes of the stage t1, the data writing stage t2 and the light-emitting stage t3) are shown in the figure.

It should be noted that, referring to FIG. 13 , in the circuit provided by the embodiments of the present disclosure, points A and B do not represent actual components, but represent the confluence of relevant electrical connections in the circuit diagram, that is, these A node is a node equivalent to a meeting point of related electrical connections in a circuit diagram. For example, point A is a node where the second electrode of the third transistor T3, the control electrode of the driving transistor DT, the second electrode of the fourth transistor T4, and the first electrode of the storage capacitor C meet. Point B is a node where the second electrode of the fifth transistor T5, the first electrode of the fourth transistor, and the first electrode of the driving transistor DT meet.

FIG. 18 is a volt-ampere characteristic curve diagram of the OLED in the pixel circuit shown in FIG. 13 . The inventors obtained the volt-ampere characteristic curve as shown in FIG. 18 by performing simulation tests on the display process of the pixel circuit when driving transistors DT with different threshold voltages Vth(DT) were applied to the pixel circuit. It can be seen from this figure that when the second data signal Vdata(H) provided by the data signal terminal Vdata is the same, for example, when Vdata(H)=3.5V, the threshold voltage Vth(DT) of the driving transistor DT is different ( For example, at 2V, 2.5V, and 3V), the light-emitting current I(OLED) of the OLED is basically the same, and is hardly affected by the threshold voltage Vth(DT) of the driving transistor DT. That is, the pixel circuit can effectively compensate the threshold voltage Vth(DT) of the driving transistor DT, so that the light-emitting current I(OLED) of the OLED is not affected by the offset of Vth(DT), thereby effectively ensuring the display of the display device. Effect.

It can also be seen from this figure that when the threshold voltage Vth(DT) of the driving transistor DT is the same (eg, 2V), the light-emitting current I(OLED) of the OLED is linearly related to the second data signal Vdata(H). That is, the second data signal Vdata(H) can accurately control the magnitude of the light-emitting current I(OLED) of the OLED, thereby controlling the brightness of the OLED, and even the display brightness of the corresponding display device.

FIG. 19 is a schematic diagram of the error analysis of the luminescence current I(OLED) of the OLED obtained after the error analysis is performed according to the data in FIG. 18 . It can be seen from this figure that within the same range of the second data signal Vdata(H) (for example, 3V-3.5V, 3.5V-4V, 4V-4.5V, or 4.5V-5V), the threshold voltage Vth of the driving transistor DT When the (DT) is different (eg, 2V, 2.5V and 3V, respectively), the error of the luminescence current I(OLED) of the OLED is in the range of 0.30% to 0.75%.

This further shows that the pixel circuit shown in FIG. 13 can effectively compensate the threshold voltage Vth(DT) of the driving transistor DT, and control the influence of Vth(DT) on the light-emitting current I(OLED) of the OLED within a small range, thereby enabling The display brightness of the OLED is effectively controlled, thereby ensuring the display effect of the corresponding display device.

FIG. 20 is a graph showing the relationship between the light-emitting current I(OLED) of the OLED and the threshold voltage Vth(DT) of the driving transistor DT in the pixel circuit shown in FIG. 13 . The inventors obtained the relationship curve as shown in FIG. 20 by respectively carrying out simulation and simulation experiments on the display process of the pixel circuit when the second data signal Vdata(H) has different values. It can be seen from this figure that when the threshold voltage Vth(DT) of the driving transistor DT is constant and the second data signal Vdata(H) is different, the light-emitting current I(OLED) of the OLED is different from the second data signal Vdata(H). ) is obviously regularly correlated, that is, the light-emitting current I(OLED) of the OLED decreases with the increase of the second data signal Vdata(H).

It can also be seen from this figure that when the second data signal Vdata(H) is constant and the threshold voltage Vth(DT) of the driving transistor DT is different, the light-emitting current I(OLED) of the OLED remains almost stable.

Therefore, Fig. 20 once again illustrates that the pixel circuit shown in Fig. 20 can effectively eliminate the influence of the shift of the threshold voltage Vth(DT) of the driving transistor DT on the OLED light-emitting current I(OLED), so that the OLED light-emitting current I(OLED) It is only controlled by the second data signal Vdata(H), so that the display effect of the corresponding display device can be effectively guaranteed.

In conclusion, the pixel circuit of the embodiment of the present disclosure can ensure the display effect of the display device under the condition of effectively reducing the power consumption.

Embodiments of the present disclosure also provide a display substrate. The display substrate includes the pixel circuit described in some of the above embodiments.

Here, the above-mentioned display substrate may be an OLED display substrate, a QLED display substrate, an LED display substrate, or the like.

Generally, referring to FIG. 21 , the display substrate includes a substrate 4 , and a plurality of pixels PX disposed on the substrate 4 .

Here, the types of the substrate 4 include multiple types, which can be selected and set according to actual needs, which is not limited in this embodiment of the present disclosure. Illustratively, the substrate 4 includes a rigid substrate, such as a glass substrate. Exemplarily, the substrate 4 includes a flexible substrate, such as a PET (Polyethylene terephthalate, polyethylene terephthalate) substrate, a PEN (Polyethylenenaphthalate two formic acid glycol ester, polyethylene naphthalate) substrate Or PI (Polyimide, polyimide) substrate. The substrate 4 includes a display area AA and a non-display area BB on at least one side of the display area AA.

The above-mentioned plurality of pixels PX are distributed in an array with the display area AA of the substrate 4 . Each pixel PX includes a pixel circuit and a light emitting device 3 as described in some of the above embodiments.

The beneficial effects that can be achieved by the display substrate in the embodiments of the present disclosure are the same as the beneficial effects that can be achieved by the pixel circuits in the above-mentioned embodiments, which will not be repeated here.

Embodiments of the present disclosure also provide a display device. The display device includes the display substrate described in some of the above embodiments.

Here, the display device package may be an OLED display substrate, a QLED display substrate, an LED display substrate, or the like. For example, the above-mentioned display device is specifically any product or component with display function, such as electronic paper, television, monitor, notebook computer, tablet computer, digital photo frame, mobile phone, and navigator.

The beneficial effects that can be achieved by the display device in the embodiments of the present disclosure are the same as the beneficial effects that can be achieved by the display substrates in some of the above-mentioned embodiments, which will not be repeated here.

In the foregoing description of the embodiments, the particular features, structures, materials or characteristics may be combined in any suitable manner in any one or more of the embodiments or examples.

The above are only specific embodiments of the present disclosure, but the protection scope of the present disclosure is not limited to this. Any person skilled in the art who is familiar with the technical scope of the present disclosure can easily think of changes or substitutions. All should be included within the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be based on the protection scope of the claims.

Claims (10)

1. A pixel circuit comprises an input sub-circuit and a light-emitting control sub-circuit; wherein,

the input sub-circuit is electrically connected with the data signal end and the light-emitting control sub-circuit respectively; the input sub-circuit is configured to: in a reset phase, responding to a second scanning signal and a third scanning signal, transmitting a first data signal provided by the data signal terminal to the light-emitting device through the light-emitting control sub-circuit so as to reset the light-emitting device and store the first data signal; in the data writing phase, responding to a second scanning signal and a fourth scanning signal, and storing a light-emitting driving voltage according to a second data signal provided by the data signal end with the assistance of the light-emitting control sub-circuit; and in the light-emitting stage, the light-emitting control sub-circuit is controlled to be conducted in an auxiliary mode according to the light-emitting driving voltage; the data signal provided by the data signal terminal is an alternating voltage signal, and the potentials of the first data signal and the second data signal are different;

the light emission control sub-circuit is also electrically connected with the light emitting device and configured to: transmitting the first data signal in the input sub-circuit to the light emitting device in response to a first scan signal in a reset phase; in a data writing phase, responding to the first data signal, and assisting the input sub-circuit to be conducted; in the light emitting stage, the light emitting device is driven to emit light in response to the first scan signal, the fifth scan signal, and the light emission driving voltage.

2. The pixel circuit according to claim 1,

the light emission control sub-circuit includes a first transistor and a driving transistor; wherein a control electrode of the first transistor is electrically connected to a first scan signal line, a second electrode of the first transistor is electrically connected to the light emitting device, and a first electrode of the first transistor is electrically connected to the second electrode of the driving transistor;

the input sub-circuit comprises a second transistor, a third transistor, a fourth transistor and a storage capacitor; wherein,

a control electrode of the second transistor is electrically connected with a second scanning signal line, a first electrode of the second transistor is electrically connected with the data signal end, and a second electrode of the second transistor is electrically connected with a first electrode of the first transistor, a first electrode of the third transistor and a second electrode of the driving transistor respectively;

a control electrode of the third transistor is electrically connected to a third scanning signal line, and a second electrode of the third transistor is electrically connected to a first electrode of the storage capacitor, a control electrode of the driving transistor, and a second electrode of the fourth transistor, respectively;

a control electrode of the fourth transistor is electrically connected with a fourth scanning signal line; a first pole of the fourth transistor is electrically connected to the first pole of the driving transistor;

and the second pole of the storage capacitor is electrically connected with the first power supply signal end.

3. The pixel circuit according to claim 2,

the light emission control sub-circuit further includes the fifth transistor; a control electrode of the fifth transistor is electrically connected to a fifth scanning signal line, a first electrode of the fifth transistor is electrically connected to the first power signal terminal, and a second electrode of the fifth transistor is electrically connected to the first electrode of the driving transistor.

4. The pixel circuit according to any one of claims 1 to 3,

the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, and the driving transistor are all P-type thin film transistors.

5. The pixel circuit according to any one of claims 1 to 3,

the second transistor and the fourth transistor are N-type thin film transistors, and the first transistor, the third transistor, the driving transistor, and the fifth transistor are P-type thin film transistors;

the first scanning signal line and the fourth scanning signal line are the same scanning signal line, and the second scanning signal line and the fifth scanning signal line are the same scanning signal line.

6. The pixel circuit according to any one of claims 1 to 3,

the second transistor, the third transistor, the driving transistor and the fourth transistor are P-type thin film transistors, and the first transistor and the fifth transistor are N-type thin film transistors;

the first scanning signal line and the fourth scanning signal line are the same scanning signal line, and the second scanning signal line and the fifth scanning signal line are the same scanning signal line.

7. The pixel circuit according to any one of claims 1 to 3,

the second transistor, the third transistor and the fourth transistor are N-type thin film transistors, and the first transistor, the driving transistor and the fifth transistor are P-type thin film transistors;

the first scanning signal line and the fourth scanning signal line are the same scanning signal line, and the second scanning signal line and the fifth scanning signal line are the same scanning signal line.

8. A driving method of a pixel circuit, applied to the pixel circuit according to any one of claims 1 to 7; the method is characterized in that one light-emitting drive period comprises a reset stage, a data writing stage and a light-emitting stage;

the driving method includes:

in a reset phase, the input sub-circuit transmits a first data signal provided by a data signal terminal to the light emitting device through the light emission control sub-circuit in response to the second scan signal and the third scan signal to reset the light emitting device and store the first data signal;

in a data writing phase, the light-emitting control sub-circuit responds to the first data signal to assist the input sub-circuit to be conducted; the input sub-circuit responds to a second scanning signal and a fourth scanning signal, and stores a light-emitting driving voltage according to a second data signal provided by the data signal terminal with the assistance of the light-emitting control sub-circuit; the data signal provided by the data signal end is an alternating voltage signal; the first data signal and the second data signal have different potentials;

in the light emission phase, the light emission control sub-circuit drives the light emitting device to emit light in response to the first scan signal, the fifth scan signal, and the light emission driving voltage in the input sub-circuit.

9. The driving method of the pixel circuit according to claim 8, wherein the emission control sub-circuit includes a first transistor, a driving transistor, and a fifth transistor; the input sub-circuit comprises a second transistor, a third transistor, a fourth transistor and a storage capacitor;

the driving method further includes:

in a reset stage, a first scanning signal controls the first transistor to be conducted, a second scanning signal controls the second transistor to be conducted, and a third scanning signal controls the third transistor to be conducted; the data signal terminal provides the first data signal; the first data signal is transmitted to the light emitting device through the second transistor and the first transistor to reset the light emitting device; the first data signal is transmitted to the storage capacitor through the second transistor and the third transistor; the storage capacitor stores the first data signal;

in a data writing stage, a second scanning signal controls the second transistor to be conducted, the first data signal stored in the storage capacitor controls the driving transistor to be conducted, and a fourth scanning signal controls the fourth transistor to be conducted; the data signal terminal provides the second data signal; the input sub-circuit stores the light-emitting driving voltage to the storage capacitor according to the second data signal;

in a light emitting stage, a fifth scanning signal controls the fifth transistor to be conducted, the light emitting driving voltage stored in the storage capacitor controls the driving transistor to be conducted, and a first scanning signal controls the first transistor to be conducted; and a first power supply voltage signal provided by a first power supply signal end is transmitted to the light-emitting device through the fifth transistor, the driving transistor and the first transistor to drive the light-emitting device to emit light.

10. A display substrate comprising the pixel circuit according to any one of claims 1 to 7.

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