CN111475431A - A mainboard, backplane, identification system and identification method - Google Patents

Abstract

The invention provides a mainboard, a backplane, an identification system and an identification method. The PCH chip acquires and identifies hard disk port coding information; the PCH chip configures the hard disk port coding information as address identification information; the PCH chip passes the address identification information corresponding to the The mainboard connector and backplane connector of the device are sent to the CPLD module; the CPLD module controls the corresponding hard disk port working status light action according to the address identification information. The target hard disk can be accurately identified, and the specified hard disk working status light can be lit and marked. It avoids the misleading use of the hard disk and affecting the work if the working status light of the hard disk is not accurately lit. Moreover, the DIP switch is eliminated in the connection process between the mainboard connector and the backplane connector, which improves production efficiency, reduces misoperation, and reduces maintenance costs. It avoids dialing errors due to misoperation, resulting in product problems.

Description

A mainboard, backplane, identification system and identification method

technical field

The present invention relates to the technical field of storage, in particular to a mainboard, a backplane, an identification system and an identification method.

Background technique

With the continuous development of cloud computing, major Internet operators have more and more requirements for server product configuration, and the hard disk in server products is an essential component.

At present, there are multiple connection ports on the SATA hard disk. When using, it is necessary to determine which connection ports in the SATA hard disk to use.

In order to determine which connection ports in the SATA hard disk are used, the CPLD chip on the backplane can accurately perform lighting operations for the connection ports in the SATA hard disk. In the existing manner, the connection ports in the SATA hard disk are distinguished in the following manner.

The first way is through different backplanes in the design, each backplane has a fixed design method, a fixed connection and a fixed CPLD code encoding method. This method will increase the number of backplane development, increase development costs and maintenance costs.

Another way is to distinguish through the DIP switch, that is, to distinguish the connection ports in the SATA hard disk through the DIP switch. In this way, multiple DIP switches need to be added to the backplane to support the selection of the connection ports in the SATA hard disk. This will increase the production cost of the backplane and increase the production process of the production line. Moreover, it is necessary to manually set the DIP position of the DIP switch and the connection port in the SATA hard disk, which is easy to cause misoperation, so that the DIP position of the DIP switch does not correspond to the connection port in the SATA hard disk, which affects the performance of the server hard disk. later use.

SUMMARY OF THE INVENTION

In order to overcome the deficiencies in the above-mentioned prior art, the present invention provides a mainboard, comprising: a PCH chip and a plurality of mainboard connectors;

The motherboard connectors are respectively connected with the PCH chips, and the PCH chips are connected to the backplane through the motherboard connectors;

The PCH chip is communicatively connected to each motherboard connector;

The PCH chip is used to configure the address identification information corresponding to each motherboard connector;

and is used to acquire and identify hard disk port coding information, configure the hard disk port coding information as address identification information, and send it to the backplane through the motherboard connector corresponding to the address identification information.

The invention also provides a backplane, comprising: a CPLD module, a backplane connector, and at least two hard disks;

Each port of the hard disk is provided with a working status light;

The first end of the CPLD module is connected to the backplane connector, and the CPLD module is connected to the main board through the backplane connector;

The second end of the CPLD module is connected to the ports of each hard disk respectively;

The CPLD module is used to receive the address identification information sent by the main board, and control the corresponding hard disk port working status light action according to the address identification information.

It should be further noted that the CPLD module is also used to obtain the encoding information of each hard disk port;

Match the encoding information of the hard disk port with the address identification information.

The invention also provides an automatic identification hard disk signal system, comprising: a main board and a backplane;

The backplane connector of the backplane is connected with a mainboard connector in the mainboard through a cable;

The PCH chip is used to configure the address identification information corresponding to each motherboard connector;

And for obtaining and identifying hard disk port coding information, the hard disk port coding information is configured as address identification information, and sent to the CPLD module through the mainboard connector and the backplane connector corresponding to the address identification information;

The CPLD module is used to receive the address identification information sent by the main board, and control the corresponding hard disk port working status light action according to the address identification information.

The present invention also provides a method for automatically identifying hard disk signals, the method comprising:

PCH chip obtains and identifies hard disk port coding information;

The PCH chip configures the hard disk port coding information as address identification information;

The PCH chip is sent to the CPLD module through the mainboard connector and the backplane connector corresponding to the address identification information;

The CPLD module controls the action of the corresponding hard disk port working status light according to the address identification information.

It should be further noted that, before the step PCH chip obtains and identifies the hard disk port address information, it also includes:

PCH chip obtains address identification information;

Configure the obtained address identification information to the corresponding motherboard connector.

It should be further noted that, each motherboard connector is configured with a plurality of address identification information.

Each hard disk is configured with multiple hard disk ports;

Set encoding information for each hard disk port;

The encoded information corresponds to the address identification information one-to-one.

As can be seen from the above technical solutions, the present invention has the following advantages:

In the present invention, the hard disk port coding information is acquired and identified by the PCH chip; the PCH chip configures the hard disk port coding information as address identification information; the PCH chip sends the information to the CPLD through the mainboard connector and the backplane connector corresponding to the address identification information module; the CPLD module controls the corresponding hard disk port working status light action according to the address identification information. The target hard disk can be accurately identified, and the specified hard disk working status light can be lit and marked. It avoids the misleading use of the hard disk and affecting the work if the working status light of the hard disk is not accurately lit. Moreover, the DIP switch is eliminated in the connection process between the mainboard connector and the backplane connector, which improves production efficiency, reduces misoperation, and reduces maintenance costs. It avoids dialing errors due to misoperation, resulting in product problems.

The configuration of the backplane does not require the development and design of different backplanes for different connection methods. The encoding information is pre-configured for each hard disk port, and the encoding information corresponds to the address identification information one-to-one. The target hard disk is accurately found, the number of backplane development is reduced, and the cost of backplane development is saved.

Description of drawings

In order to illustrate the technical solutions of the present invention more clearly, the accompanying drawings required in the description will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention, which are not relevant to ordinary skills in the art. As far as personnel are concerned, other drawings can also be obtained from these drawings on the premise of no creative work.

Figure 1 is a schematic diagram of the motherboard.

Figure 2 is a schematic diagram of the backplane.

FIG. 3 is a schematic diagram of an automatic identification hard disk signal system.

FIG. 4 is a schematic diagram of an embodiment of an automatic identification hard disk signal system.

FIG. 5 is a flowchart of a method for automatically identifying hard disk signals.

Detailed ways

Those of ordinary skill in the art can realize that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. Interchangeability, the above description has generally described the components and steps of each example in terms of function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Skilled artisans may implement the described functionality using different methods for each particular application, but such implementations should not be considered beyond the scope of the present invention.

The block diagrams shown in the figures are merely functional entities and do not necessarily necessarily correspond to physically separate entities. That is, these functional entities may be implemented in software, or in one or more hardware modules or integrated circuits, or in different networks and/or processor devices and/or microcontroller devices entity.

In the several embodiments provided in this application, it should be understood that the disclosed system, apparatus and method may be implemented in other manners. For example, the apparatus embodiments described above are only illustrative. For example, the division of the units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components may be combined or Can be integrated into another system, or some features can be ignored, or not implemented. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be indirect coupling or communication connection through some interfaces, devices or units, and may also be electrical, mechanical or other forms of connection.

As a CPLD (Complex Programmable Logic Device) in the present invention, a complex programmable logic device can be used as a power supply and power on and off and a backplane lighting control unit commonly used in servers.

SATA hard disk, the full name of Serial Advanced Technology Attachment, also called serial hard disk, is a bus interface that connects the host bus adapter to the hard disk. It is the mainstream trend of hard drives now and in the future. The current common version 3.0 can achieve a bandwidth of 6Gb/s and a transfer speed of 600MB/s. Its biggest advantage is that it is mature, compatible with many devices, and the popularity is relatively high.

The hard disk involved in the present invention adopts a SATA hard disk, and/or a sas hard disk. Other types of hard disks may also be used, and the specific types of the hard disks are not limited.

In order to facilitate the description of the solution involved in the present invention, the following hard disks take SATA hard disks as an example, and SATA hard disks have two types of 6-channel SATA ports and 8-channel SATA ports.

In this way, regardless of the number of ports, encoding information is set for each hard disk port; one encoding information corresponds to one address identification information.

As the data communication involved in the present invention, it can be composed of three types of protocols, and the corresponding protocols are used for data transmission according to different connected devices. The Serial SCSI Protocol (SSP) is used to transmit SCSI commands; the SCSI Management Protocol (SMP) is used to maintain and manage the connected devices; the SATA Channel Protocol (STP) is used to transmit data between SATA.

Based on the above content, the present invention provides a mainboard, comprising: a PCH chip 3 and a mainboard connector 4; the mainboard connector 4 is connected to the PCH chip 3; the mainboard connector 4 is configured with a mainboard address sending pin and a mainboard data communication pin; the mainboard The address sending pin is used to send the address information of the hard disk to be accessed; the main board data communication pin is used to transmit data information.

In the present invention, a mainboard is also provided, as shown in FIG. 1 , comprising: a PCH chip 3 and a plurality of mainboard connectors 4;

The mainboard connectors 4 are respectively connected with the PCH chip 3, and the PCH chip 3 is connected to the backplane through the mainboard connector 4; the PCH chip 3 is connected in communication with each mainboard connector 4; the PCH chip 3 is used to configure each mainboard connector 4 corresponding to and is used to obtain and identify hard disk port coding information, configure the hard disk port coding information as address identification information, and send it to the backplane through the motherboard connector 4 corresponding to the address identification information.

It can be understood that the motherboard can be used as a module in the server and can be configured based on the needs of the server.

The present invention also provides a backplane, as shown in FIG. 2 , comprising: a CPLD module 6, a backplane connector 5, and at least two hard disks 7; each port of the hard disk 7 is respectively provided with a working status light; One end is connected with the backplane connector 5, and the CPLD module 6 is connected to the mainboard through the backplane connector 5; the second end of the CPLD module 6 is respectively connected to the port of each hard disk; the CPLD module 6 is used to receive the address identification information sent by the mainboard, And control the corresponding hard disk port working status light action according to the address identification information.

The CPLD module 6 is also used to obtain the encoding information of each hard disk port; and match the encoding information of the hard disk port with the address identification information.

Based on the above content, SATA hard disks have two types of 6-way SATA ports and 8-way SATA ports, so whether it is 6-way or 8-way, set coding information for each hard disk port. ; Match the encoding information of the hard disk port with the address identification information. The encoding information of the hard disk port is in one-to-one correspondence with the address identification information.

It can be understood that the backplane can be used as a module in the server and can be configured based on the needs of the server.

Based on the above-mentioned mainboard and backplane, the present invention also provides an automatic identification hard disk signal system, as shown in FIG. 3 and FIG. 4 , including: a mainboard 1 and a backplane 2;

The backplane connector 5 of the backplane 2 is connected with a mainboard connector 4 in the mainboard 1 through a cable; the PCH chip 3 is used to configure the address identification information corresponding to each mainboard connector 4; and is used to obtain and identify the hard disk port. Coding information, the hard disk port coding information is configured into address identification information, sent to the CPLD module 6 by the mainboard connector 4 and the backplane connector 5 corresponding to the address identification information; The CPLD module 6 is used to receive the address identification sent by the mainboard information, and control the action of the corresponding hard disk port working status light according to the address identification information. The mainboard connector 4 and the backplane connector 5 are connected through the SGPIO bus.

Since the mainboard and the backplane are respectively a module that constitutes a server, when assembling or using, select the corresponding mainboard and backplane according to the corresponding parameters and configurations, and connect them.

The main board and the backplane are connected by cables. According to the port used by the hard disk on the backplane, the current port in use is judged by the action of the working status light.

In order to determine which connection ports in the SATA hard disk are used, the CPLD chip on the backplane can accurately perform lighting operations for the connection ports in the SATA hard disk. By one-to-one correspondence between the encoded information and the address identification information.

Configure the hard disk port coding information on the PCH chip 3 as required. Since the encoding information is in one-to-one correspondence with the address identification information, the hard disk port encoding information is thus determined. After the mainboard and the backplane are connected, the PCH chip 3 is sent to the CPLD module 6 through the mainboard connector 4 and the backplane connector 5 corresponding to the address identification information; the CPLD module 6 controls the corresponding hard disk port working status light action according to the address identification information. In this way, the connection ports in the SATA hard disk are determined to be used, and the CPLD chip on the backplane can accurately perform the lighting operation for the connection ports in the SATA hard disk.

Moreover, the user can learn the working status of the current hard disk port through the work indicator, which avoids the failure of the work indicator to display normally after an error occurs through the DIP switch, thereby misleading the user's judgment on the current system hard disk work.

Based on the above system, the present invention also provides a method for automatically identifying hard disk signals, as shown in FIG. 5 , the method includes:

S11, the PCH chip obtains and identifies the hard disk port coding information;

S12, the PCH chip configures the hard disk port coding information as address identification information;

S13, the PCH chip is sent to the CPLD module through the mainboard connector and the backplane connector corresponding to the address identification information;

S14, the CPLD module controls the action of the corresponding hard disk port working status light according to the address identification information.

Before using, that is, before the PCH chip obtains and identifies the hard disk port address information, the steps further include: the PCH chip obtains the address identification information; and configures the obtained address identification information to the corresponding motherboard connector.

In order to further illustrate the embodiments involved in the present invention, a SATA hard disk interface backplane is used as an example for description, and a mainboard of a two-way Whitley platform is used as an example for description. Preferably, the PCH chip of the Intel platform is used in the main board, and the PCH chip can output 6-channel SATA port or 8-channel SATA port data.

Among them, the SATA hard disk has 6 SATA ports or 8 SATA ports. If the PCH chip outputs 6 SATA ports or 8 SATA ports at the same time, it can correspondingly light up the working lights of all hard disk ports in the hard disk.

If the PCH chip only outputs a certain SATA port signal, or several SATA port signals, only the corresponding SATA port will be displayed.

The 6 SATA ports or 8 SATA ports of the SATA hard disk use the SGPIO bus to communicate. The mainboard and backplane communication connections communicate via the SGPIO bus.

Further, four mainboard connectors are provided, the PCH chip is respectively connected with the four mainboard connectors, and address identification information of each mainboard connector is configured.

There are four hard disks on the backplane, including 2 hard disks with 6-way SATA ports and 2 hard disks with 8-way SATA ports.

The 6-way SATA ports can be divided into two groups, 1-way and 2-way are one group, and the two ports correspond to the first connector among the four motherboard connectors. The 3-way, 4-way, 5-way, and 6-way four ports correspond to the second connector among the four motherboard connectors.

The 8-way SATA is divided into two groups, the 1-way, 2-way, 3-way, and 4-way four ports correspond to the third connector among the four motherboard connectors. The 5-way, 6-way, 7-way, and 8-way four ports correspond to the fourth connector among the four motherboard connectors.

In this embodiment, address identification information is configured in the four motherboard connectors, and the encoding information of the hard disk port corresponds to the address identification information one-to-one. That is, the 6-channel SATA ports have 6-channel encoded information, which can correspond to the address identification information in the first connector and the address identification information in the second connector.

The output of the PCH chip to the address identification information of the motherboard connector can realize different addresses through the up-down and down-down of the signal.

For example, the address of the first connector is 00, the address of the second connector is 01, the address of the third connector is 10, and the address of the fourth connector is 11.

Users can connect the mainboard and backplane as needed. Mainly, the backplane connector of the backplane is connected to a mainboard connector in the mainboard through a cable as required.

When the cable is connected to the first connector on the main board and the backplane end connector, the address identification information is transmitted to the CPLD module through the backplane routing design. Through the address identification information in the CPLD module, it is automatically determined that the backplane hard disk is connected to the 1-way and 2-way SATA ports on the motherboard, and the corresponding work lights are lit.

The other three addresses can also be automatically recognized by the backplane CPLD module when the cables are connected. According to the identified address information, the specific port of SATA is determined, and then corresponding to the hard disk lighting information contained in the SGPIO bus, it is parsed to realize the backplane hard disk lighting.

Table 1. Correspondence between addresses and PCH SATA/SATA ports.

In this way, the automatic identification of the hard disk signal system in the present invention improves the development of CPLD, the address correspondence table information is added in the CPLD code, each address corresponds to each port grouping, when the fixed address information is identified, the CPLD automatically identifies the specific port corresponding to SATA, Then, according to the received SGPIO bus information, the corresponding hard disk lighting information is parsed to realize accurate hard disk lighting.

Connections between systems include, but are not limited to, wireless, wireline, fiber optic cable, RF, etc., or any suitable combination of the foregoing.

The above description of the disclosed embodiments enables any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (10)

1. A motherboard, comprising: a PCH chip and a plurality of board connectors;

the main board connectors are respectively connected with the PCH chips, and the PCH chips are connected with the back board through the main board connectors;

the PCH chip is in communication connection with each board connector;

the PCH chip is used for configuring address identification information corresponding to each main board connector;

and the system is used for acquiring and identifying the hard disk port coding information, configuring the hard disk port coding information into address identification information, and sending the address identification information to the backboard through the mainboard connector corresponding to the address identification information.

2. A backboard is characterized by comprising a CP L D module, a backboard connector and at least two hard disks;

each port of the hard disk is provided with a working state lamp respectively;

the first end of the CP L D module is connected with the backplane connector, and the CP L D module is connected with the mainboard through the backplane connector;

the second end of the CP L D module is respectively connected with the port of each hard disk;

the CP L D module is used for receiving the address identification information sent by the mainboard and controlling the action of the corresponding hard disk port working state lamp according to the address identification information.

3. The backing sheet of claim 2,

the CP L D module is also used for acquiring the coding information of each hard disk port;

and matching the coding information of the hard disk port with the address identification information.

4. An automatic hard disk signal identification system, comprising: a main board and a back board;

the backplane connector of the backplane is connected with one of the mainboard connectors through a cable;

the PCH chip is used for configuring address identification information corresponding to each main board connector;

the system comprises a CP L D module, a hard disk port coding module, a back panel connector and a control module, wherein the CP L D module is used for acquiring and identifying hard disk port coding information, configuring the hard disk port coding information into address identification information and sending the address identification information to the CP L D module through the mainboard connector and the back panel connector corresponding to the address identification information;

the CP L D module is used for receiving the address identification information sent by the mainboard and controlling the action of the corresponding hard disk port working state lamp according to the address identification information.

5. The system for automatically identifying hard disk signals according to claim 4,

the motherboard connector and the backplane connector are connected through an SGPIO bus.

6. A method for automatically identifying hard disk signals is characterized by comprising the following steps:

the PCH chip acquires and identifies hard disk port coding information;

the PCH chip configures the hard disk port coding information into address identification information;

the PCH chip is sent to the CP L D module through a mainboard connector and a backplane connector corresponding to the address identification information;

and the CP L D module controls the action of the corresponding hard disk port working state lamp according to the address identification information.

7. The method of automatically recognizing hard disk signals according to claim 6,

before the step of acquiring and identifying the address information of the hard disk port by the PCH chip, the method also comprises the following steps:

the PCH chip acquires address identification information;

and configuring the acquired address identification information to the corresponding mainboard connector.

8. The method of automatically recognizing hard disk signals according to claim 7,

each motherboard connector is configured with a plurality of address identification information.

9. The method of automatically recognizing hard disk signals according to claim 7,

and multiple types of hard disks are arranged on the back plate.

10. The method of automatically recognizing hard disk signals according to claim 7,

each hard disk is provided with a plurality of hard disk ports;

setting coding information for each hard disk port;

the coding information and the address identification information correspond to each other one by one.

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