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CN111357118A - 一种电子传递门电路及其制造、操作和使用方法 - Google Patents

一种电子传递门电路及其制造、操作和使用方法 Download PDF

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Publication number
CN111357118A
CN111357118A CN201880070919.4A CN201880070919A CN111357118A CN 111357118 A CN111357118 A CN 111357118A CN 201880070919 A CN201880070919 A CN 201880070919A CN 111357118 A CN111357118 A CN 111357118A
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CN
China
Prior art keywords
circuit
coupled
electrode
devices
electron transfer
Prior art date
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Pending
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CN201880070919.4A
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English (en)
Chinese (zh)
Inventor
鲁克·克里斯托弗·J
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Individual
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Individual
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Publication of CN111357118A publication Critical patent/CN111357118A/zh
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D48/00—Individual devices not covered by groups H10D1/00 - H10D44/00
    • H10D48/30—Devices controlled by electric currents or voltages
    • H10D48/32—Devices controlled by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D48/00—Individual devices not covered by groups H10D1/00 - H10D44/00
    • H10D48/383—Quantum effect devices, e.g. of devices using quantum reflection, diffraction or interference effects
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/81—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials of structures exhibiting quantum-confinement effects, e.g. single quantum wells; of structures having periodic or quasi-periodic potential variation
    • H10D62/812—Single quantum well structures
    • H10D62/814—Quantum box structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/20—Organic diodes
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/04—Architecture, e.g. interconnection topology
    • G06N3/045—Combinations of networks
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • G06N3/065—Analogue means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00—Diodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/201—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits
    • H10D84/204—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors
    • H10D84/221—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors of only diodes

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Semiconductor Memories (AREA)
  • Junction Field-Effect Transistors (AREA)
CN201880070919.4A 2017-10-29 2018-10-29 一种电子传递门电路及其制造、操作和使用方法 Pending CN111357118A (zh)

Applications Claiming Priority (13)

Application Number Priority Date Filing Date Title
US201762578483P 2017-10-29 2017-10-29
US62/578,483 2017-10-29
US201762581766P 2017-11-05 2017-11-05
US62/581,766 2017-11-05
US201762584898P 2017-11-12 2017-11-12
US62/584,898 2017-11-12
US201762590632P 2017-11-26 2017-11-26
US62/590,632 2017-11-26
US201862614412P 2018-01-06 2018-01-06
US62/614,412 2018-01-06
US201862641382P 2018-03-11 2018-03-11
US62/641,382 2018-03-11
PCT/US2018/057959 WO2019084537A1 (fr) 2017-10-29 2018-10-29 Circuits de porte de transport d'électrons et procédés de fabrication, de fonctionnement et d'utilisation

Publications (1)

Publication Number Publication Date
CN111357118A true CN111357118A (zh) 2020-06-30

Family

ID=66247050

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201880070919.4A Pending CN111357118A (zh) 2017-10-29 2018-10-29 一种电子传递门电路及其制造、操作和使用方法

Country Status (3)

Country Link
EP (1) EP3701568A4 (fr)
CN (1) CN111357118A (fr)
WO (1) WO2019084537A1 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2021082130A (ja) * 2019-11-21 2021-05-27 株式会社日立製作所 電子回路、ニューラルネットワーク及びニューラルネットワークの学習方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
RU62609U1 (ru) * 2006-11-21 2007-04-27 Московский государственный институт электроники и математики (технический университет) Искусственная нейронная сеть
WO2011070212A2 (fr) * 2009-12-11 2011-06-16 Universidad De Granada Nanostructures mutlifonctionnelles utilisées comme agents de diagnostic trimodal irm-oi-spect

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SE9403950D0 (sv) * 1994-11-16 1994-11-16 Siemens Elema Ab Analysapparat
US7671398B2 (en) * 2005-02-23 2010-03-02 Tran Bao Q Nano memory, light, energy, antenna and strand-based systems and methods
US9065253B2 (en) * 2009-05-13 2015-06-23 University Of Washington Through Its Center For Commercialization Strain modulated nanostructures for optoelectronic devices and associated systems and methods
WO2014023097A1 (fr) * 2012-08-06 2014-02-13 中国科学院理化技术研究所 Procédé de préparation de point quantique de carbone multifonctionnel dopé par des hétéroatomes et son application
JP6389685B2 (ja) * 2014-07-30 2018-09-12 キヤノン株式会社 撮像装置、および、撮像システム
CA2957540A1 (fr) * 2014-08-08 2016-02-11 Quantum-Si Incorporated Dispositif integre de compartimentation temporelle de photons recus
JP2017538474A (ja) * 2014-11-18 2017-12-28 ナンヤン テクノロジカル ユニヴァーシティＮａｎｙａｎｇ Ｔｅｃｈｎｏｌｏｇｉｃａｌ Ｕｎｉｖｅｒｓｉｔｙ 血糖モニタリングのためのサーバ装置およびウェアラブル・デバイス、ならびに関連する方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
RU62609U1 (ru) * 2006-11-21 2007-04-27 Московский государственный институт электроники и математики (технический университет) Искусственная нейронная сеть
WO2011070212A2 (fr) * 2009-12-11 2011-06-16 Universidad De Granada Nanostructures mutlifonctionnelles utilisées comme agents de diagnostic trimodal irm-oi-spect

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
MORA-SERO.ET.AL: "Impedance characterization of Quantum Dot Sensitized Solar cells", FRONTIERS OF QUANTUM DOT SOLAR CELLS, 31 December 2012 (2012-12-31), pages 1 - 2, XP055595317 *

Also Published As

Publication number Publication date
WO2019084537A1 (fr) 2019-05-02
EP3701568A4 (fr) 2021-08-04
EP3701568A1 (fr) 2020-09-02

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Application publication date: 20200630