CN111179804A

CN111179804A - A timing controller, a display device, and a signal adjustment method

Info

Publication number: CN111179804A
Application number: CN202010032632.1A
Authority: CN
Inventors: 刘媛媛; 乔玄玄; 刘帅; 袁先锋; 陈泽君; 王建军; 邢振周
Original assignee: BOE Technology Group Co Ltd; Hefei Xinsheng Optoelectronics Technology Co Ltd
Current assignee: BOE Technology Group Co Ltd; Hefei Xinsheng Optoelectronics Technology Co Ltd
Priority date: 2020-01-13
Filing date: 2020-01-13
Publication date: 2020-05-19
Anticipated expiration: 2040-01-13
Also published as: WO2021143648A1; US20230162705A1; CN111179804B; US11769467B2

Abstract

The invention provides a timing controller, a display device and a signal adjustment method, and relates to the field of display technology. The timing controller can improve the quality of the input signal and reduce the EMC interference caused by the enhanced signal. A timing controller includes: a receiving circuit, a timing control chip, and a plurality of insertion loss circuits; the receiving circuit is configured to receive N frame signals; the timing control chip is configured to detect the Mth frame signal during the blanking phase of the Mth frame signal. The bit error rate of the 1-frame signal; determine the bit error rate of the M-1 frame signal, which belongs to the bit error rate interval in the pre-stored swing adjustment table; according to the bit error rate interval and the target swing value in the swing adjustment table According to the corresponding relationship of the M-1 frame signal, adjust the swing of the M-1 frame signal; select the corresponding insertion loss circuit according to the target swing value corresponding to the bit error rate of the M-1 frame signal; M and N are positive integers and 1 < M≤N. The present invention is applied to the signal adjustment of the timing controller.

Description

Time schedule controller, display device and signal adjusting method

Technical Field

The invention relates to the technical field of display, in particular to a time schedule controller, a display device and a signal adjusting method.

Background

The Display panel displays images by using a front-end system to provide input signals, such as RGB (red, green, blue) signals, LVDS (Low-Voltage Differential Signaling) signals, eDP (Embedded Display Port) signals, and the like. These input signals include RGB gray-scale data signals, control signals, clock signals, etc., so the quality of the input signals determines the quality of the display panel.

The input signal provided by the head-end system is affected by three factors: the first is influenced by the quality of the signal itself when it is generated; the second is influenced by the resistance and capacitance of the input signal transmission line; the third is the influence of external electromagnetic field. The quality of the input signal is affected by many factors, and once the quality of the input signal is deteriorated, the problems of picture color cast, screen flicker and the like are directly caused, so that it is very important to improve the quality of the input signal of the display panel.

The commonly used method for improving the quality of the input signal in the industry is: after receiving the input signal transmitted by the front-end system, the TCON chip of the display panel adjusts the Swing of the signal (i.e., the signal Swing), so that the fluctuation of the signal is obvious, and effective signal output is more easily obtained. Referring to fig. 1, the eye height of the original input signal is about 182 mV. After the swing of the input signal shown in fig. 1 is increased, the eye diagram of the signal is as shown in fig. 2, the eye height is about 426mV, the amplification is about 240mV, the signal quality is improved, and the display panel is easier to obtain effective signals from the signal shown in fig. 2.

However, after the swing of the signal is increased, because the signal is enhanced, the EMC (electromagnetic compatibility) of the display panel is also increased, which not only generates electromagnetic interference to peripheral electronic products, but also is more susceptible to interference from other electronic products. Therefore, it is an urgent problem to improve the quality of the input signal and reduce the EMC interference caused by the enhanced signal.

Disclosure of Invention

Embodiments of the present invention provide a timing controller, a display device, and a signal adjusting method, where the timing controller can improve the quality of an input signal and reduce EMC interference caused by an enhanced signal.

In order to achieve the above purpose, the embodiment of the invention adopts the following technical scheme:

in one aspect, there is provided a timing controller including: the circuit comprises a receiving circuit, a time sequence control chip and a plurality of insertion loss circuits; the receiving circuit and the insertion loss circuit are respectively connected with the time sequence control chip;

the receive circuit is configured to: receiving N frame signals;

the timing control chip is configured to:

detecting the error rate of the M-1 frame signal in the blanking stage of the M frame signal;

determining the error rate of the M-1 frame signal, wherein the error rate belongs to an error rate interval in a prestored swing amplitude adjusting table;

adjusting the swing amplitude of the M-1 frame signal according to the corresponding relation between the bit error rate interval and the target swing amplitude value in the swing amplitude adjusting table;

selecting the corresponding insertion loss circuit according to the target swing amplitude value corresponding to the bit error rate of the M-1 frame signal so as to loss and adjust the energy generated by the swing amplitude of the M-1 frame signal;

wherein M, N are positive integers, and M is more than 1 and less than or equal to N.

Optionally, all the insertion loss circuit is divided into a plurality of groups of insertion loss units, each group of insertion loss units comprises a first insertion loss circuit and a second insertion loss circuit, the first insertion loss circuit is used for losing signals of a first frequency, the second insertion loss circuit is used for losing signals of a second frequency, and the first frequency is smaller than the second frequency.

Optionally, the target swing amplitude values in the swing amplitude adjustment table correspond to the insertion loss units one to one.

Optionally, in each group of the insertion loss units, the first insertion loss circuit includes: the circuit comprises a capacitor, a first switch, a first grounding end and a second grounding end; two ends of the capacitor are respectively connected with a first grounding end and a first end of a first switch, and a second end of the first switch is connected with the second grounding end;

the second insertion loss circuit includes: the magnetic bead, the second switch, the third grounding end and the fourth grounding end; and two ends of the magnetic bead are respectively connected with a third grounding end and a first end of a second switch, and a second end of the second switch is connected with a fourth grounding end.

Optionally, the first ground terminal of all the first insertion loss circuits and the third ground terminal of all the second insertion loss circuits are the same ground terminal, and the second ground terminal of all the first insertion loss circuits and the fourth ground terminal of all the second insertion loss circuits are the same ground terminal.

Optionally, the timing control chip is configured to: adjusting the swing amplitude of the M-1 frame signal according to the corresponding relationship between the bit error rate interval and the target swing amplitude value in the swing amplitude adjustment table comprises:

the timing control chip is configured to:

determining the target pendulum amplitude corresponding to the bit error rate of the M-1 frame signal according to the corresponding relation between the bit error rate interval and the target pendulum amplitude in the swing amplitude adjusting table;

and adjusting the swing amplitude value of the M-1 frame signal to be the target swing amplitude value corresponding to the bit error rate of the M-1 frame signal.

Optionally, the timing control chip is further configured to:

before the blanking stage of the 1 st frame signal, storing the swing amplitude adjusting table, wherein the swing amplitude adjusting table comprises a plurality of error rate intervals, a plurality of target swing amplitude values, and a corresponding relation between the error rate intervals and the target swing amplitude values.

An embodiment of the present invention provides a timing controller, including: the circuit comprises a receiving circuit, a time sequence control chip and a plurality of insertion loss circuits; the receiving circuit and the insertion loss circuit are respectively connected with the time sequence control chip; the receive circuit is configured to: receiving N frame signals; the timing control chip is configured to: detecting the error rate of the M-1 frame signal in the blanking stage of the M frame signal; determining the error rate of the M-1 frame signal, wherein the error rate belongs to an error rate interval in a prestored swing amplitude adjusting table; adjusting the swing amplitude of the M-1 frame signal according to the corresponding relation between the bit error rate interval and the target swing amplitude value in the swing amplitude adjusting table; selecting the corresponding insertion loss circuit according to the target swing amplitude value corresponding to the bit error rate of the M-1 frame signal so as to loss and adjust the energy generated by the swing amplitude of the M-1 frame signal; wherein M, N are positive integers, and M is more than 1 and less than or equal to N.

Therefore, the time schedule controller adjusts the signal swing and simultaneously adopts the insertion loss circuit to lose the energy generated by adjusting the signal swing, thereby improving the quality of the input signal and reducing the EMC interference caused by the enhanced signal.

In another aspect, there is provided a display device including: the time schedule controller is provided.

The embodiment of the invention provides a display device which is good in display picture, strong in anti-electromagnetic interference performance and good in user experience.

In another aspect, a signal adjusting method is applied to the above timing controller, where the timing controller includes a receiving circuit and a plurality of insertion loss circuits, the receiving circuit is configured to receive N frames of signals, and the method includes:

wherein M, N are positive integers, and M is more than 1 and less than N.

Optionally, the adjusting the swing of the M-1 frame signal according to the correspondence between the bit error rate interval and the target swing amplitude value in the swing adjustment table includes:

Optionally, before the blanking period of the 1 st frame signal, the method further includes:

and storing the swing amplitude adjusting table, wherein the swing amplitude adjusting table comprises a plurality of error rate intervals, a plurality of target swing amplitude values and the corresponding relation between the error rate intervals and the swing amplitude values.

Optionally, the blanking phase of the mth frame signal includes a start phase, an intermediate phase and an end phase;

the detecting the bit error rate of the M-1 frame signal in the blanking period of the M frame signal comprises:

and detecting the error rate of the M-1 frame signal in the middle of the blanking period of the M frame signal.

The embodiment of the invention provides a signal adjusting method, which can adjust the signal swing and simultaneously adjust the energy generated by the signal swing by using the loss of an insertion loss circuit, thereby improving the quality of input signals and reducing the EMC interference caused by enhanced signals.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

FIG. 1 is an eye diagram of an input signal provided by the prior art;

FIG. 2 is an eye diagram of another input signal provided by the prior art;

fig. 3 is a schematic structural diagram of a timing controller according to an embodiment of the present invention;

FIG. 4 is a signal diagram according to an embodiment of the present invention;

FIG. 5 is another signal diagram provided in accordance with an embodiment of the present invention;

fig. 6 is a schematic diagram of a first insertion loss circuit according to an embodiment of the present invention;

fig. 7 is a schematic diagram of a second insertion loss circuit according to an embodiment of the present invention;

fig. 8 is a design layout of an insertion loss circuit according to an embodiment of the present invention;

fig. 9 is a schematic flowchart of a signal adjustment method according to an embodiment of the present invention;

fig. 10 is a flowchart illustrating another signal adjustment method according to an embodiment of the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

In the embodiments of the present invention, the terms "first", "second", "third", "fourth", and the like are used for distinguishing identical items or similar items having substantially the same functions and actions, and are used only for clearly describing technical solutions of the embodiments of the present invention, and are not understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features.

In the embodiments of the present invention, "a plurality" means two or more unless specifically defined otherwise.

Example one

An embodiment of the present invention provides a timing controller, as shown in fig. 3, the timing controller including: the circuit comprises a receiving circuit 1, a time sequence control chip 2 and a plurality of insertion loss circuits 3; the receiving circuit 1 and the insertion loss circuit 3 are respectively connected with the time sequence control chip 2.

The receive circuit is configured to: an N-frame signal is received.

The timing control chip is configured to:

and detecting the error rate of the M-1 frame signal in the blanking period of the M frame signal.

And determining the error rate of the M-1 frame signal, and determining the error rate interval in the prestored swing amplitude adjusting table.

And adjusting the swing amplitude of the M-1 frame signal according to the corresponding relation between the bit error rate interval and the target swing amplitude value in the swing amplitude adjusting table.

Selecting a corresponding insertion loss circuit according to a target swing amplitude value corresponding to the bit error rate of the M-1 frame signal to loss-adjust energy generated by the swing amplitude of the M-1 frame signal; wherein M, N are positive integers, and M is more than 1 and less than or equal to N.

The receiving circuit may include an interface, and the type of the interface is not limited, and may be determined according to the type of the signal output by the front-end system.

The type of the timing control chip is not limited, and the timing control chip may be a single chip microcomputer, an ARM (Advanced riscmaids, Advanced reduced instruction set computing machine), an FPGA (Field Programmable Gate Array), or the like, and may be specifically determined according to actual design requirements.

The specific structure and the number of the insertion loss circuits are not limited, so long as the function of signal energy loss can be met. Fig. 3 illustrates an example in which the timing controller includes 3 insertion loss circuits.

Referring to fig. 4, with the frame frequency as a time-sharing point, a frame signal includes an effective area 10 and a blanking area 11; the Active area is also called Active area and corresponds to the Active time of the signal, and the Blanking area is also called Blanking area and corresponds to the preparation time of the signal. The time schedule controller is applied to a display device, an Active area corresponds to a display picture stage, and a Blanking area corresponds to a non-display picture stage (the Blanking area corresponds to very short time and is difficult for human eyes to feel). The blanking period of the mth frame signal corresponds to the blanking region of the mth frame signal. Referring to fig. 5, in the present invention, a Bit Error Rate (BER) detection area 112 is added in the blanking area 11, that is, the detection of the BER of the M-1 th frame signal is performed in the blanking period of the M-th frame signal.

The swing amplitude adjusting table can be prestored in the time sequence control chip, and the specific contents of the bit error rate interval and the target swing amplitude value in the table can be determined according to the actual situation.

Embodiments of the present invention provide a Timing Controller (TCON), which adjusts signal swing and simultaneously reduces EMC interference caused by enhanced signals by using an insertion loss circuit to loss and adjust energy generated by the signal swing.

Optionally, all the insertion loss circuits are divided into a plurality of groups of insertion loss units, each group of insertion loss units includes a first insertion loss circuit and a second insertion loss circuit, the first insertion loss circuit is used for losing signals of a first frequency, the second insertion loss circuit is used for losing signals of a second frequency, and the first frequency is smaller than the second frequency.

The signal has the branch of high frequency signal and low frequency signal, adopts the first insertion loss circuit can consume the low frequency signal energy, adopts the second insertion loss circuit to consume the high frequency signal energy, so can furthest loss signal, further reduces EMC energy interference.

Optionally, the target swing amplitude value in the swing amplitude adjusting table corresponds to the insertion loss unit one to one, that is, the target swing amplitude value in the swing amplitude adjusting table, the first insertion loss circuit and the second insertion loss circuit in the same insertion loss unit correspond to each other one to one, so that the design difficulty can be reduced.

Optionally, in each group of insertion loss units, referring to fig. 6, the first insertion loss circuit includes: the capacitor C1, the first switch S5, the first Ground terminal GND and the second Ground terminal group; two ends of the capacitor C1 are respectively connected to the first Ground GND and a first end (not labeled in fig. 6) of the first switch S5, and a second end (not labeled in fig. 6) of the first switch S5 is connected to the second Ground.

Referring to fig. 7, the second insertion loss circuit includes: a bead B1, a second switch S1, a third Ground terminal GND and a fourth Ground terminal group; both ends of the magnetic bead B1 are connected to the third Ground GND and a first end (not shown in fig. 7) of the second switch S1, respectively, and a second end (not shown in fig. 7) of the second switch 7 is connected to the fourth Ground group.

It should be noted that fig. 6 and fig. 7 are respectively illustrated by taking four first insertion loss circuits and four second insertion loss circuits as examples, and the corresponding swing adjustment table may be as shown in table one.

Watch 1

Bit error rate interval	Target pendulum amplitude
		≤BER1	Swing1
BER1-BER2	Swing2
		BER2-BER3	Swing3
≥BER3	Swing4

For convenience of description, in fig. 6, the capacitors in the four first insertion loss circuits are respectively labeled as C1, C2, C3 and C4, and the first switches corresponding to C1, C2, C3 and C4 are respectively labeled as S5, S6, S7 and S8; in fig. 7, the magnetic beads in the four second insertion loss circuits are respectively labeled as B1, B2, B3, and B4, and the second switches corresponding to B1, B2, B3, and B4 are respectively labeled as S1, S2, S3, and S4. Here, the switches S1-S8 are controlled by a timing control chip, and when the target Swing value is at gear 1(Swing1), S1 and S5 are closed to form a gear 1 insertion loss unit; when the target Swing value is at gear 2(Swing2), S2 and S6 are closed, constituting a gear 2 insertion loss unit, and so on. The values of the magnetic beads (beads) and the capacitance in the insertion loss unit of each gear are determined by simulation debugging in advance.

As shown in fig. 6 and 7, the first Ground terminals of all the first insertion loss circuits and the third Ground terminals of all the second insertion loss circuits are the same Ground terminal GND, and the second Ground terminals of all the first insertion loss circuits and the fourth Ground terminals of all the second insertion loss circuits are the same Ground terminal Ground.

The Layout (Layout) of fig. 6 and fig. 7 can be referred to fig. 8, where the ground terminal GND Pad area is labeled as 21, and GND is the logic ground of the driving circuit in the timing controller; the Ground Pad area is marked as 20, adopting planar shape arrangement, and applying the above-mentioned time schedule controller to the liquid crystal display, the Ground can be the Ground area in the back panel of the liquid crystal display; B1-B4 and C1-C4 are connected with a Ground Pad20 through a Pin Pin at one end by using Plane Shape, and are connected with a GND Pad21 after light is turned on through analog control (not shown in FIG. 8). To improve heat dissipation, the group Pad area 20 may be uniformly perforated (not shown in fig. 8). In fig. 8, the Ground Pad area 20 may be made of copper sheet and may be fixed by screw holes 22. Thus, when there is EMC energy, energy can be lost through this circuit.

Optionally, in order to reduce the difficulty of adjusting the signal swing, the timing control chip is configured to: according to the corresponding relation between the bit error rate interval and the target swing amplitude value in the swing amplitude adjusting table, adjusting the swing amplitude of the M-1 frame signal comprises the following steps:

the timing control chip is configured to:

and determining a target pendulum amplitude value corresponding to the bit error rate of the M-1 frame signal according to the corresponding relation between the bit error rate interval and the target pendulum amplitude value in the swing amplitude adjusting table.

And adjusting the swing amplitude value of the M-1 frame signal to be a target swing amplitude value corresponding to the bit error rate of the M-1 frame signal.

Optionally, the timing control chip is further configured to:

before the blanking stage of the 1 st frame signal, storing a swing amplitude adjusting table, wherein the swing amplitude adjusting table comprises a plurality of error rate intervals, a plurality of target swing amplitude values and the corresponding relation between the error rate intervals and the target swing amplitude values. The swing amplitude adjustment table can refer to table 1, and table 1 is drawn by taking the example that the swing amplitude adjustment table includes 4 error rate intervals and 4 target swing amplitude values.

Example two

An embodiment of the present invention provides a display device, including: the first embodiment provides a timing controller.

The display device may be a rigid display device or a flexible display device (i.e., bendable, foldable); the type of the liquid crystal display device may be a liquid crystal display device such as a TN (Twisted Nematic) type, a VA (Vertical Alignment) type, an IPS (In-Plane Switching) type, or an ADS (Advanced Super dimension Switching) type, or may be an OLED (Organic Light-emitting diode) display device, and any product or component having a display function such as a television, a digital camera, a mobile phone, and a tablet computer including the display device.

The embodiment of the invention provides a display device which is good in display picture, strong in anti-electromagnetic interference performance, weak in interference performance and good in user experience.

EXAMPLE III

An embodiment of the present invention provides a signal adjusting method applied to a timing controller provided in the first embodiment, where the timing controller includes a receiving circuit and a plurality of insertion loss circuits, the receiving circuit is configured to receive N frame signals, and referring to fig. 9, the method includes:

s01, detecting the error rate of the M-1 frame signal in the blanking period of the M frame signal.

And S02, determining the error rate of the M-1 frame signal, and determining the error rate interval in the prestored swing adjusting table.

And S03, adjusting the swing amplitude of the M-1 frame signal according to the corresponding relation between the bit error rate interval and the target swing amplitude value in the swing amplitude adjusting table.

S04, selecting a corresponding insertion loss circuit according to a target swing amplitude value corresponding to the bit error rate of the M-1 frame signal to loss-adjust the energy generated by the swing amplitude of the M-1 frame signal; wherein M, N are positive integers, and M is more than 1 and less than N.

It should be noted that all of the above-mentioned S01-S04 are completed in the blanking period of the mth frame signal, so that the normal display is not affected.

Optionally, S03, adjusting the swing amplitude of the M-1 frame signal according to the correspondence between the bit error rate interval and the target swing amplitude in the swing amplitude adjustment table includes:

Optionally, before the blanking period of the 1 st frame signal, the method further includes: and storing a swing amplitude adjusting table, wherein the swing amplitude adjusting table comprises a plurality of error rate intervals, a plurality of target swing amplitude values and a corresponding relation between the error rate intervals and the swing amplitude values.

Optionally, the blanking phase of the mth frame signal includes a start phase, an intermediate phase and an end phase.

In the blanking period of the M-th frame signal, detecting the bit error rate of the M-1-th frame signal comprises the following steps:

As in the beginning and end of the blanking phase, other signal processing is typically performed. The detection is carried out in the middle stage of the blanking stage of the Mth frame signal, so that mutual influence can be avoided, and the detection accuracy is improved.

The following describes how to adjust the swing of the 1 st frame signal. Referring to fig. 10, the method includes:

s101, setting an initial bit error rate interval and an initial swing value corresponding to the 1 st frame signal in a blanking stage of the 1 st frame signal.

S102, detecting the error rate of the 1 st frame signal in the blanking stage of the 2 nd frame signal.

S103, determining the error rate of the 1 st frame signal, and determining the error rate interval in the prestored swing amplitude adjusting table.

And S104, judging whether the error rate of the 1 st frame signal is the same as the initial error rate interval in the oscillation amplitude adjusting table.

And S105, if so, adjusting the swing amplitude of the 1 st frame signal to an initial swing amplitude value, and selecting an insertion loss circuit corresponding to the initial swing amplitude value to loss-adjust the energy generated by the swing amplitude of the 1 st frame signal.

S106, if not, determining a target swing amplitude value corresponding to the bit error rate of the 1 st frame signal, adjusting the swing amplitude of the 1 st frame signal to the target swing amplitude value, and selecting an insertion loss circuit corresponding to the target swing amplitude value to loss and adjust energy generated by the swing amplitude of the 1 st frame signal.

After S105 or S106, the next frame signal (i.e., the 2 nd frame signal) is adjusted, and the specific method includes:

s201, detecting the error rate of the 2 nd frame signal in the blanking stage of the 3 rd frame signal.

S202, determining the bit error rate of the 2 nd frame signal, and determining the bit error rate interval in the prestored swing amplitude adjusting table.

S203, determining a target pendulum amplitude value corresponding to the bit error rate of the 2 nd frame signal according to the corresponding relation between the bit error rate interval and the target pendulum amplitude value in the swing amplitude adjusting table; and adjusting the swing amplitude value of the 2 nd frame signal to be a target swing amplitude value corresponding to the bit error rate of the 2 nd frame signal.

S204, selecting a corresponding insertion loss circuit according to the target swing amplitude value corresponding to the bit error rate of the 2 nd frame signal so as to loss and adjust the energy generated by the swing amplitude of the 2 nd frame signal.

And so on until all frame signals are adjusted. The method for adjusting the signals of the 3 rd to the last frames is similar to the method for adjusting the signals of the 2 nd frame, and will not be described in detail here. The signal adjusting method belongs to a self-adaptive signal adjusting method, and can adjust the signal quality in real time and improve the picture quality; meanwhile, according to the target swing amplitude of the signal, the loss energy of the insertion loss circuit is synchronously adopted, the EMC risk is reduced, the panel interference capacity is reduced, and the anti-interference capacity is improved.

It should be noted that, in this embodiment, reference may be made to the first embodiment for relevant contents of the timing controller, and details are not described here.

The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.

Claims

1. A timing controller, comprising: a receiving circuit, a timing control chip, and a plurality of insertion loss circuits; the receiving circuit and the insertion loss circuit are respectively connected with the timing control chip;

The receiving circuit is configured to: receive N frame signals;

The timing control chip is configured to:

In the blanking phase of the Mth frame signal, detect the bit error rate of the M-1th frame signal;

Determine the bit error rate of the M-1th frame signal, which belongs to the bit error rate interval in the pre-stored swing adjustment table;

Adjust the swing of the M-1th frame signal according to the corresponding relationship between the bit error rate interval and the target swing value in the swing adjustment table;

According to the target swing value corresponding to the bit error rate of the M-1th frame signal, the corresponding insertion loss circuit is selected to adjust the energy generated by the loss of the swing of the M-1th frame signal;

Wherein, M and N are both positive integers, and 1<M≤N.

2. The timing controller according to claim 1, wherein all the insertion loss circuits are divided into multiple groups of insertion loss units, and each group of the insertion loss units comprises a first insertion loss circuit and a second insertion loss circuit , the first insertion loss circuit is used to lose a signal of a first frequency, and the second insertion loss circuit is used to lose a signal of a second frequency, where the first frequency is smaller than the second frequency.

3 . The timing controller according to claim 2 , wherein the target swing value in the swing adjustment table is in one-to-one correspondence with the insertion loss unit. 4 .

4. The timing controller according to claim 3, wherein, in each group of the insertion loss units, the first insertion loss circuit comprises: a capacitor, a first switch, a first ground terminal and a second ground terminal ; two ends of the capacitor are respectively connected to the first ground terminal and the first terminal of the first switch, and the second terminal of the first switch is connected to the second ground terminal;

The second insertion loss circuit includes: a magnetic bead, a second switch, a third ground terminal and a fourth ground terminal; two ends of the magnetic bead are respectively connected to the third ground terminal and the first terminal of the second switch, and the The second terminal of the second switch is connected to the fourth ground terminal.

5 . The timing controller according to claim 4 , wherein the first ground terminals of all the first insertion loss circuits and the third ground terminals of all the second insertion loss circuits are the same. 6 . A ground terminal, the second ground terminals of all the first insertion loss circuits and the fourth ground terminals of all the second insertion loss circuits are the same ground terminal.

6 . The timing controller according to claim 1 , wherein the timing control chip is configured to: according to the correspondence between the bit error rate interval and the target swing value in the swing adjustment table. 7 . relationship, adjusting the swing of the M-1 frame signal includes:

The timing control chip is configured to:

According to the corresponding relationship between the bit error rate interval and the target swing value in the swing adjustment table, determine the target swing value corresponding to the bit error rate of the M-1th frame signal;

Adjust the swing value of the M-1 th frame signal to the target swing value corresponding to the bit error rate of the M-1 th frame signal.

7. The timing controller according to claim 6, wherein the timing control chip is further configured as:

Before the blanking phase of the first frame signal, the swing adjustment table is stored, wherein the swing adjustment table includes a plurality of the bit error rate intervals, a plurality of the target swing values, the bit error rate The corresponding relationship between the rate interval and the target swing value.

8. A display device, comprising: the timing controller according to any one of claims 1-7.

9. A signal adjustment method, applied to the timing controller according to any one of claims 1-7, wherein the timing controller comprises a receiving circuit and a plurality of insertion loss circuits, and the receiving circuit is configured to receive N frames signal, characterized in that the method includes:

Wherein, M and N are both positive integers, and 1<M<N.

10 . The signal adjustment method according to claim 9 , wherein, according to the corresponding relationship between the bit error rate interval and the target swing value in the swing adjustment table, the signal adjustment of the M-1th frame signal is adjusted. 11 . Swing includes:

11. The signal adjustment method according to claim 9, wherein before the blanking phase of the first frame signal, the method further comprises:

Store the swing adjustment table, wherein the swing adjustment table includes a plurality of the bit error rate intervals, a plurality of the target swing amplitude values, and the corresponding relationship between the bit error rate intervals and the swing amplitude values .

12. The signal adjustment method according to any one of claims 9-11, wherein the blanking phase of the Mth frame signal comprises an initial phase, an intermediate phase and an end phase;

In the blanking phase of the Mth frame signal, detecting the bit error rate of the M-1th frame signal includes:

In the middle stage of the blanking stage of the M-th frame signal, the bit error rate of the M-1-th frame signal is detected.