CN111159071A - Device and method for realizing OTP (one time programmable) by eFlash memory and OTP memory - Google Patents
Device and method for realizing OTP (one time programmable) by eFlash memory and OTP memory Download PDFInfo
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- CN111159071A CN111159071A CN201911423355.0A CN201911423355A CN111159071A CN 111159071 A CN111159071 A CN 111159071A CN 201911423355 A CN201911423355 A CN 201911423355A CN 111159071 A CN111159071 A CN 111159071A
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Abstract
The invention discloses a device and a method for realizing OTP (one time programmable) by an eFlash memory of a system on a chip and the OTP memory, wherein the device comprises a direct memory access module which is used for reading, writing and erasing an information storage area in the eFlash memory; a register for temporarily storing the written OTP data; the bus interface module is connected with a system bus; when the system bus has an OTP reading request, the bus interface module returns OTP data stored in the register; when the system bus has a write OTP request, the bus interface module writes write data on the system bus and OTP data in the register into the register after performing OR operation, and informs the direct access module of an eFlash update request; and after the direct memory access module receives the updating request, erasing the data in the information storage area, and writing the updated OTP data into the information storage area. Compared with the OTP realized by using a special physical device, the invention saves the cost, is closer to the OTP realized by the physical device, and simultaneously has simpler use, safer use and memory space saving.
Description
Technical Field
The invention relates to the technical field of IC (integrated circuit) design, in particular to a device and a method for realizing OTP (one time programmable) by using an eFlash memory on a system-on-chip and an OTP memory.
Background
An eflash (embedded flash) memory, i.e., an embedded flash memory, is one of power-down nonvolatile memories. It features that it can be erased and written many times, and after power failure, the data can be stored.
OTP (one Time program) memory, i.e. one-Time programmable memory, refers to a memory in which each bit (bit) in the memory can be written only once and cannot be rewritten and erased afterwards.
With the wide use of the internet of things equipment, the safety of the equipment is more and more important. Many chip designers will add OTP to the system chip to store key information such as device numbers and keys. By utilizing the characteristics of the OTP, the requirements of numbering the chip, one code for one machine and the like can be met, the anti-rollback protection can be realized, and the information can be prevented from being tampered, so that the aim of improving the safety of equipment is fulfilled.
OTP memory implementations are generally based on Floating-Gate technology (Floating-Gate technology), electrical-Fuse technology (Electric-Fuse technology), and AntiFuse technology (AntiFuse technology). Currently, there are OTP memories implemented using special physical devices, which can achieve the effect that each word (word), although written several times, a bit that has been written to 1 cannot be written back to 0 again, for example: a word (word) can be written with 0x5 (0101 binary), at which time if 0x0 (0000 binary) is written to the same address, the value of the word is still 0x5, but if 0xA (1010 binary) is written to the same address, the value of the word becomes 0xF (1111 binary), as illustrated in fig. 1.
The conventional OTP memory is implemented using a special circuit unit, which brings about an increase in authorization and production costs.
The information can be stored in the flash after the system is powered off, but the data can be erased and rewritten, and the requirement that each bit can only be set once cannot be realized.
In the prior art, methods and devices for realizing OTP by using eFlash also exist, but the method and the device cannot be consistent with an OTP memory using a special physical device.
Chinese patent publication No. CN108563590A is based on address protection method, and is characterized in that some addresses are predefined in eFlash as OTP, and after the address of the system bus write request is sent, the address is compared with the predefined address, and if the addresses are the same, the write request is masked. The disadvantages are that:
1. since the storage space corresponding to the address of the eFlash is one word (word), once the address is masked, all bits (bit) in the whole word (word) can not be changed whether being 0 or 1. This is not in accordance with the characteristics of the OTP memory itself.
2. The protected address and the status bit corresponding to the protected address need to be saved separately, and once the protection of the OTP space fails, the protection of the OTP space also fails.
The Chinese patent with special publication number CN102129486A is an extension on the basis of the patent with publication number CN108563590A, and the method is to store the shielding address and the status bit in the eFlash, and when the system is started, the contents of the shielding address and the status bit are read out through software and are configured in the eFlash controller. In addition to the aforementioned drawbacks, the implementation of software and hardware cooperation slows down the system start-up speed and increases the security risk.
Disclosure of Invention
The invention aims to solve the technical problem of providing a device and a method for realizing OTP by an eFLASH memory of a system on chip and the OTP memory, wherein the eFLASH is used for achieving the effect of the OTP memory, the cost is saved compared with the OTP realized by using a special physical device, the method is closer to the OTP realized by the physical device compared with other methods for realizing the OTP by using the eFLASH, and meanwhile, the method is simpler to use, safer and more saves the storage space of the eFLASH.
In order to solve the above technical problem, the present invention provides a device for implementing OTP in an on-chip system eFlash memory, in which an information storage region is arranged, the device comprising,
the direct memory access module is configured to perform writing operation, reading operation and erasing operation on the information storage area;
a register for temporarily storing the written OTP data;
a bus interface module which is connected with a system bus of the system on chip; when the system bus has an OTP reading request, the bus interface module returns OTP data stored in the register; when the system bus has an OTP (one time programmable) write request, the bus interface module writes write data on the system bus and OTP data in the register into the register after performing OR operation, and informs the direct access module of an eFlash update request;
and after receiving the eFlash updating request, the direct memory access module erases the data of the information storage area, reads the updated OTP data in the register and writes the updated OTP data into the information storage area.
In a preferred embodiment of the present invention, the apparatus further includes a write arbitration module, where the write arbitration module is used to switch between the write operation of the direct access module to the register or the write operation of the bus interface module to the register; when the system on chip is reset, the direct access module is switched to write the register, and the register is initialized; and after the initialization of the register is finished, the switching bus interface module writes the register.
In a preferred embodiment of the present invention, the direct access module writes the data in the information storage area into the register to complete the initialization of the register.
In a preferred embodiment of the present invention, the apparatus further comprises a register bank comprising a plurality of registers, each of the plurality of registers having a respective address; when the system bus has a write OTP request, the bus interface module performs OR operation on write data on the system and a register value in a corresponding address register.
In order to solve the above technical problem, the present invention provides a system-on-chip OTP memory, including,
an eFlash information storage area;
the direct memory access module is configured to perform write operation, read operation and erase operation on the eFlash information storage area;
a register for temporarily storing the written OTP data;
a bus interface module which is connected with a system bus of the system on chip; when the system bus has an OTP reading request, the bus interface module returns OTP data stored in the register; when the system bus has an OTP (one time programmable) write request, the bus interface module writes write data on the system bus and OTP data in the register into the register after performing OR operation, and informs the direct access module of an eFlash update request;
and after receiving the eFlash updating request, the direct memory access module erases the data of the eFlash information storage area, reads the updated OTP data in the register and writes the updated OTP data into the eFlash information storage area.
In a preferred embodiment of the present invention, the write arbitration module is further included, and the write arbitration module is configured to switch between a write operation of the direct access module to the register and a write operation of the bus interface module to the register; when the system on chip is reset, the direct access module is switched to write the register, and the register is initialized; and after the initialization of the register is finished, the switching bus interface module writes the register.
In a preferred embodiment of the present invention, the direct memory access module writes the data in the eFlash information storage area into the register to complete the initialization of the register.
In a preferred embodiment of the present invention, the method further comprises the steps of providing a plurality of registers, each of the plurality of registers having a respective address; when the system bus has a write OTP request, the bus interface module performs OR operation on write data on the system and a register value in a corresponding address register.
In order to solve the above technical problem, the present invention provides a method for implementing OTP in an on-chip system eFlash memory, in which an information storage region is disposed, the method comprising,
writing data in the information storage area into a register through a direct memory access module, and initializing the register;
the system on chip is connected through a bus interface module; when the system bus has an OTP reading request, the bus interface module returns OTP data stored in the register; when the system bus has an OTP (one time programmable) write request, the bus interface module writes write data on the system bus and OTP data in the register into the register after performing OR operation, and informs the direct access module of an eFlash update request;
and erasing the data of the information storage area through a direct memory access module, reading the updated OTP data in the register and writing the updated OTP data into the information storage area.
In a preferred embodiment of the present invention, further comprising,
the write arbitration module switches the direct access module to write the register or the bus interface module to write the register; when the system on chip is reset, the write arbitration module switches the direct access module to write the register, and initializes the register; and after the initialization of the register is finished, the write arbitration module switches the bus interface module to write the register.
The invention has the beneficial effects that:
compared with the OTP realized by using a special physical device, the device and the method for realizing the OTP by using the system-on-chip eFLASH memory and the OTP memory have the advantages that the cost is saved, the cost is closer to the OTP realized by the physical device, the use is simpler and safer, and the storage space of the eFLASH is saved.
Drawings
FIG. 1 is a schematic diagram of an OTP memory array value change using a dedicated physical device to implement an OTP memory;
FIG. 2 is a block diagram of an apparatus for implementing OTP using an eFlash memory of a system on a chip according to a preferred embodiment of the present invention;
FIG. 3 is a flowchart of a method for implementing OTP by the eFlash memory of the system on chip in the preferred embodiment of the invention.
The reference numbers in the figures illustrate:
10-information storage area, 20-direct access module, 30-register group, 40-bus interface module and 50-write arbitration module.
Detailed Description
The present invention is further described below in conjunction with the following figures and specific examples so that those skilled in the art may better understand the present invention and practice it, but the examples are not intended to limit the present invention.
Example one
The embodiment discloses a device for realizing OTP (one time programmable) by using an eFlash memory on a system-on-chip, wherein the eFlash memory generally comprises a main memory area and an information memory area, the main memory area is directly hung on a system-on-chip bus and used for storing common codes and data, and the information memory area is generally used for storing equipment information.
The device realizes OTP storage by using an information storage area 10 of an eFlash memory and matching with a peripheral circuit, and divides an area specially used for OTP in the information storage area of the eFlash memory, which is shown in figure 2 and comprises a direct access module 20, a register group 30, a bus interface module 40 and a write arbitration module 50. The direct access module 20 is configured to perform a write operation, a read operation, and an erase operation on the information storage area 10. The register group 30 may be one register or a register group including a plurality of registers, and each of the plurality of registers constituting the register group has an address with an identification function. The register set 30 is used for storing data written by the direct access module 20 and data written by the bus interface module 40. Wherein, the register set 30 only supports one data writing in the current cycle, and the data written into the register set 30 is switched by the write arbitration module 50: (1) when the system on chip is reset, the direct memory access module 20 writes to the register group 30, and initializes the register group 30; (2) after the initialization of the register group 30 is finished, the direct access module 20 controls the write arbitration module 50 to access the system bus, and the write arbitration module 50 switches the bus interface module 40 to write to the register group 30.
When the system on chip is reset, the direct access module 20 writes the data in the information storage area 10 into the register set 30 to complete initialization of the register set 30, and at this time, the register set 30 stores the OTP data written by the direct access module 20.
The bus interface module 40 is connected to a system bus of the system on chip, and when the system bus has an OTP read request, the bus interface module 40 returns OTP data stored in the register; when there is a write OTP request on the system bus, the bus interface module 40 writes the write data on the system bus and the OTP data in the register into the register after performing an or operation; or, the bus interface module 40 writes the write data in the system into the register after performing or operation on the register value in the corresponding address register; and informs the direct memory access module 20 that there is an eFlash update request; after receiving the eFlash update request, the direct memory access module 20 erases the data in the information storage area 10, reads the updated OTP data in the register, and writes the updated OTP data into the information storage area 10.
Example two
The embodiment discloses a system-on-chip OTP memory, which realizes OTP storage by using an information storage area (abbreviated as 'eFlash information storage area') of an eFlash memory and matching a peripheral circuit, divides an area specially used for OTP in the information storage area of the eFlash memory, and comprises a direct memory access module 20, a register group 30, a bus interface module 40 and a write arbitration module 50. The direct access module 20 is configured to perform a write operation, a read operation, and an erase operation on the information storage area 10. The register group 30 may be one register or a register group including a plurality of registers, and each of the plurality of registers constituting the register group has an address with an identification function. The register set 30 is used for storing data written by the direct access module 20 and data written by the bus interface module 40. Wherein, the register set 30 only supports one data writing in the current cycle, and the data written into the register set 30 is switched by the write arbitration module 50: (1) when the system on chip is reset, the direct memory access module 20 writes to the register group 30, and initializes the register group 30; (2) after the initialization of the register group 30 is finished, the direct access module 20 controls the write arbitration module 50 to access the system bus, and the write arbitration module 50 switches the bus interface module 40 to write to the register group 30.
When the system on chip is reset, the direct access module 20 writes the data in the information storage area 10 into the register set 30 to complete initialization of the register set 30, and at this time, the register set 30 stores the OTP data written by the direct access module 20.
The bus interface module 40 is connected to a system bus of the system on chip, and when the system bus has an OTP read request, the bus interface module 40 returns OTP data stored in the register; when there is a write OTP request on the system bus, the bus interface module 40 writes the write data on the system bus and the OTP data in the register into the register after performing an or operation; or, the bus interface module 40 writes the write data in the system into the register after performing or operation on the register value in the corresponding address register; and informs the direct memory access module 20 that there is an eFlash update request; after receiving the eFlash update request, the direct memory access module 20 erases the data in the information storage area 10, reads the updated OTP data in the register, and writes the updated OTP data into the information storage area 10.
EXAMPLE III
This embodiment discloses a method for implementing OTP using an eFlash memory on a soc chip, in which an information storage area is disposed in the eFlash memory, and an area dedicated for OTP is partitioned in the information storage area of the eFlash memory, as shown in fig. 3, the method includes,
s01: the system on chip is powered on and reset;
s02: the direct memory access module writes data in the information memory area into a register to be used as OTP data, and initializes the register;
s03: the direct memory access module controls the write arbitration module to access the system bus;
s04: the write arbitration module switches the bus interface module to write the register;
s05: when the system bus has an OTP reading request, the bus interface module returns OTP data stored in the register; when the system bus has a write OTP request, the bus interface module writes write data on the system bus and OTP data in the register into the register after performing OR operation, and informs the direct access module of an eFlash update request;
s06: and the direct memory access module erases the data of the information storage area, reads the updated OTP data in the register and writes the updated OTP data into the information storage area.
The device, the method and the OTP memory designed above have the following technical advantages:
(1) the direct memory access module 20 can automatically complete reading, erasing and writing of the eFlash information storage area 10 without software participation, the internal process of eFlash updating is transparent to the outside, only a bus interface is reserved for external reading and writing, and the use is consistent with that of the traditional OTP.
(2) The write arbitration module 50 is controlled by the direct access module 20, when the system is reset, the direct access module 20 can write in the register set, and after the direct access module 20 initializes the register set, the write arbitration module 50 is switched to be writable by the system bus interface module 40.
(3) When the system is reset, the initial value of the register group is moved in from the information storage area 10 by the direct access module 20; after the bus interface module 40 writes in the register group 30, the value thereof is the value of itself and the system bus write value to perform specific operation or operation, so as to ensure that the bit which is already written as 1 can not be written as 0 any more, thereby satisfying the OTP function required by the physical device.
(4) After the system bus interface module 40 finishes writing in the register group 30, it will send out the eFlash update enable to inform the direct access module 20 to move the data in the updated register group back to the information storage area 10 of the eFlash, so as to ensure that the data is not lost after the system is powered down.
(5) The eflash information storage area 10 for realizing the OTP function is only accessible by the direct access module 20, so as to ensure that the inside of the OTP cannot be tampered by other methods.
The above-mentioned embodiments are merely preferred embodiments for fully illustrating the present invention, and the scope of the present invention is not limited thereto. The equivalent substitution or change made by the technical personnel in the technical field on the basis of the invention is all within the protection scope of the invention. The protection scope of the invention is subject to the claims.
Claims (10)
1. The utility model provides a device of system on chip eFlash memory realization OTP, be equipped with the information memory area in the eFlash memory, its characterized in that: the device comprises a plurality of devices which are connected with each other,
the direct memory access module is configured to perform writing operation, reading operation and erasing operation on the information storage area;
a register for temporarily storing the written OTP data;
a bus interface module which is connected with a system bus of the system on chip; when the system bus has an OTP reading request, the bus interface module returns OTP data stored in the register; when the system bus has an OTP (one time programmable) write request, the bus interface module writes write data on the system bus and OTP data in the register into the register after performing OR operation, and informs the direct access module of an eFlash update request;
and after receiving the eFlash updating request, the direct memory access module erases the data of the information storage area, reads the updated OTP data in the register and writes the updated OTP data into the information storage area.
2. The apparatus for implementing OTP for system-on-chip eFlash memory as recited in claim 1, wherein: the device also comprises a write arbitration module, wherein the write arbitration module is used for switching write operation of the direct memory access module to the register or write operation of the bus interface module to the register; when the system on chip is reset, the direct access module is switched to write the register, and the register is initialized; and after the initialization of the register is finished, the switching bus interface module writes the register.
3. The apparatus for implementing OTP for system-on-chip eFlash memory as recited in claim 2, wherein: and the direct memory access module writes the data in the information storage area into the register to finish the initialization of the register.
4. The apparatus for implementing OTP for system-on-chip eFlash memory as recited in claim 1, 2 or 3, wherein: the apparatus has a register group composed of a plurality of registers each having a respective address; when the system bus has a write OTP request, the bus interface module performs OR operation on write data on the system and a register value in a corresponding address register.
5. A system-on-chip OTP memory, comprising: comprises the steps of (a) preparing a mixture of a plurality of raw materials,
an eFlash information storage area;
the direct memory access module is configured to perform write operation, read operation and erase operation on the eFlash information storage area;
a register for temporarily storing the written OTP data;
a bus interface module which is connected with a system bus of the system on chip; when the system bus has an OTP reading request, the bus interface module returns OTP data stored in the register; when the system bus has an OTP (one time programmable) write request, the bus interface module writes write data on the system bus and OTP data in the register into the register after performing OR operation, and informs the direct access module of an eFlash update request;
and after receiving the eFlash updating request, the direct memory access module erases the data of the eFlash information storage area, reads the updated OTP data in the register and writes the updated OTP data into the eFlash information storage area.
6. The system-on-chip OTP memory of claim 5, wherein: the write arbitration module is used for switching the write operation of the direct memory access module to the register or the write operation of the bus interface module to the register; when the system on chip is reset, the direct access module is switched to write the register, and the register is initialized; and after the initialization of the register is finished, the switching bus interface module writes the register.
7. The system-on-chip OTP memory of claim 6, wherein: and the direct memory access module writes the data in the eFlash information storage area into the register to complete the initialization of the register.
8. The system-on-chip OTP memory of claims 5, 6 or 7, wherein: the register is provided with a plurality of registers, and each register is provided with a respective address; when the system bus has a write OTP request, the bus interface module performs OR operation on write data on the system and a register value in a corresponding address register.
9. A method for realizing OTP (one time programmable) by an eFlash memory of a system on a chip is characterized in that an information storage area is arranged in the eFlash memory and comprises the following steps: the method comprises the following steps of,
writing data in the information storage area into a register through a direct memory access module, and initializing the register;
the system on chip is connected through a bus interface module; when the system bus has an OTP reading request, the bus interface module returns OTP data stored in the register; when the system bus has an OTP (one time programmable) write request, the bus interface module writes write data on the system bus and OTP data in the register into the register after performing OR operation, and informs the direct access module of an eFlash update request;
and erasing the data of the information storage area through a direct memory access module, reading the updated OTP data in the register and writing the updated OTP data into the information storage area.
10. The method for implementing OTP for system-on-chip eFlash memory as recited in claim 9, wherein: which also comprises that the device comprises a plurality of the devices,
the write arbitration module switches the direct access module to write the register or the bus interface module to write the register; when the system on chip is reset, the write arbitration module switches the direct access module to write the register, and initializes the register; and after the initialization of the register is finished, the write arbitration module switches the bus interface module to write the register.
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