CN111130332A - Peak voltage suppression circuit and switching power supply - Google Patents
Peak voltage suppression circuit and switching power supply Download PDFInfo
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- CN111130332A CN111130332A CN202010052104.2A CN202010052104A CN111130332A CN 111130332 A CN111130332 A CN 111130332A CN 202010052104 A CN202010052104 A CN 202010052104A CN 111130332 A CN111130332 A CN 111130332A
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- 230000001629 suppression Effects 0.000 title claims abstract description 53
- 238000001514 detection method Methods 0.000 claims abstract description 139
- 238000010521 absorption reaction Methods 0.000 claims abstract description 34
- 230000009467 reduction Effects 0.000 claims abstract description 32
- 238000006243 chemical reaction Methods 0.000 claims abstract description 30
- 238000002955 isolation Methods 0.000 claims abstract description 14
- 238000005070 sampling Methods 0.000 claims description 45
- 239000003990 capacitor Substances 0.000 claims description 20
- 238000004146 energy storage Methods 0.000 claims description 18
- 238000004804 winding Methods 0.000 claims description 8
- 238000010586 diagram Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 230000002441 reversible effect Effects 0.000 description 2
- 230000001052 transient effect Effects 0.000 description 2
- 238000005265 energy consumption Methods 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/44—Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
- H02M1/0038—Circuits or arrangements for suppressing, e.g. by masking incorrect turn-on or turn-off signals, e.g. due to current spikes in current mode control
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0048—Circuits or arrangements for reducing losses
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The invention provides a peak voltage suppression circuit and a switching power supply, wherein the circuit is used for being connected to a power conversion device comprising a primary side driving circuit and a secondary side rectifying circuit which are positioned at two sides of an isolation transformer, and comprises a high-voltage input detection unit, a peak voltage state detection unit, a peak voltage absorption unit and a voltage reduction release control unit, wherein the input end of the high-voltage input detection unit is connected with the input end of the primary side driving circuit, the peak voltage state detection unit is connected with the primary side driving circuit and/or the secondary side rectifying circuit, and the output ends of the high-voltage input detection unit and the peak voltage state detection unit are both connected with the voltage reduction release control unit; the voltage reduction release control unit is connected with the secondary side rectifying circuit and the peak voltage absorption unit, and the peak voltage absorption unit is connected between the isolation transformer and the secondary side rectifying circuit. The technical scheme of the invention can completely absorb the peak voltage, and compared with the existing resistance-capacitance absorption circuit, the invention can reduce the loss, improve the efficiency of the whole machine, and simultaneously improve the EMI problem and the like.
Description
Technical Field
The invention relates to the technical field of switching power supplies, in particular to a peak voltage suppression circuit and a switching power supply.
Background
In some existing switching power supplies, such as a phase-shifted full-bridge or half-bridge switching power supply, reverse peak voltages of primary and secondary synchronous rectification switching tubes and the like are sometimes very high, and in order to ensure safe and reliable operation of the switching power supply, a switching tube with a higher withstand voltage value is often selected to deal with the situation. However, the higher the on-resistance of the switching tube with higher voltage resistance, the lower the overall efficiency and the more serious the heat generation. In order to further reduce the peak voltage, the absorption effect of the conventional resistance-capacitance absorption circuit is very limited, the peak voltage after absorption is still very high, and energy consumed on the absorption resistor is wasted, so that the problems of low overall efficiency, high temperature and the like are caused.
Disclosure of Invention
In view of the above, an object of the present invention is to provide a peak voltage suppression circuit and a switching power supply, which overcome the disadvantages of the prior art.
One embodiment of the present invention provides a peak voltage suppression circuit, configured to be connected to a power conversion device, where the power conversion device includes a primary side driving circuit and a secondary side rectifying circuit located on two sides of an isolation transformer, and the peak voltage suppression circuit includes a high-voltage input detection unit, a peak voltage state detection unit, a peak voltage absorption unit, and a step-down release control unit;
the input end of the high-voltage input detection unit is used for being connected with the input end of the primary side driving circuit, the input end of the peak voltage state detection unit is used for being connected with the primary side driving circuit and/or the secondary side rectifying circuit, and the output ends of the high-voltage input detection unit and the peak voltage state detection unit are connected with the voltage reduction release control unit;
the voltage reduction release control unit is used for connecting the output end of the secondary rectifying circuit and the peak voltage absorption unit, and the peak voltage absorption unit is used for connecting the isolation transformer and the secondary rectifying circuit;
and the voltage reduction release control unit is used for reducing the voltage absorbed by the peak voltage absorption unit and outputting the voltage to a load connected with the output end of the secondary rectification circuit when the high-voltage input detection unit detects high-voltage input and the peak voltage state detection unit detects a preset peak voltage state.
Further, in the above spike voltage suppression circuit, the spike voltage state detection unit includes any one or a combination of a power-on detection unit, an output short circuit detection unit, and a light load detection unit.
Further, in the above spike voltage suppression circuit, the spike voltage absorbing unit includes an energy storage capacitor and two absorbing diodes;
the positive pole of each absorption diode is respectively connected with one end of the secondary winding of the isolation transformer, the negative poles of the two absorption diodes are respectively connected with the positive pole of the energy storage capacitor, and the negative pole of the energy storage capacitor is connected with the negative pole output end of the secondary rectifying circuit.
Further, in the above-mentioned spike voltage suppression circuit, the step-down release control unit includes a step-down switching tube, a step-down inductor, a freewheeling diode, and a controller;
the positive electrode of the energy storage capacitor is connected with the input end of the voltage reduction switch tube, the output end of the voltage reduction switch tube is connected with the input end of the voltage reduction inductor, and the output end of the voltage reduction inductor is connected with the positive electrode output end of the secondary side rectifying circuit;
the control end of the voltage reduction switch tube is connected with the controller, the anode of the fly-wheel diode is connected with the cathode of the energy storage capacitor, and the cathode of the fly-wheel diode is connected between the voltage reduction inductor and the voltage reduction switch tube.
Further, in the peak voltage suppression circuit, the step-down release control unit further includes an output voltage sampling subunit located between the positive output end and the negative output end of the secondary rectification circuit, and the controller is connected to the output voltage sampling subunit.
Further, in the above-mentioned spike voltage suppression circuit, the output voltage sampling sub-unit includes two voltage sampling resistors connected in series, and the controller is connected between the two voltage sampling resistors.
Further, in the above peak voltage suppression circuit, any one of the power-on detection unit, the output short circuit detection unit and the light load detection unit is connected to a first input terminal of an and gate, the high voltage input detection unit is connected to a second input terminal of the and gate, and an output terminal of the and gate is connected to the step-down release control unit;
or at least two of the starting detection unit, the output short circuit detection unit and the light load detection unit are connected with different input ends of an OR gate, the output ends of the high-voltage input detection unit and the OR gate are connected with different input ends of the AND gate, and the output end of the AND gate is connected with the voltage reduction release control unit.
Further, in the above peak voltage suppression circuit, the high-voltage input detection unit includes a first voltage-dividing subunit and a first comparing subunit that are connected in sequence, an input end of the primary side driving circuit is connected to an input end of the first voltage-dividing subunit, and an output end of the first comparing subunit is connected to an input end of the and gate;
the starting detection unit comprises a current-limiting resistor, an RC parallel subunit and a second comparison subunit, wherein the input end of the primary side driving circuit is connected with the signal input end of the current-limiting resistor, and the signal output end of the current-limiting resistor is respectively connected with the RC parallel subunit and the second comparison subunit;
the light load detection unit comprises a sampling operational amplifier subunit and a third comparison subunit which are sequentially connected, wherein the input end of the sampling operational amplifier subunit is connected with the negative electrode output end of the secondary side rectification circuit;
the output short circuit detection unit comprises an output voltage sampling subunit and a fourth comparison subunit connected with the output voltage sampling subunit, and the output voltage sampling subunit is connected between the positive output end and the negative output end of the secondary side rectifying circuit;
if the peak voltage state detection unit comprises any one of the startup detection unit, the output short circuit detection unit and the light load detection unit, the output end of the second comparison subunit, the output end of the third comparison subunit or the output end of the fourth comparison subunit are connected with the input end of the and gate;
if the peak voltage state detection unit comprises at least two of the start-up detection unit, the output short circuit detection unit and the light load detection unit, at least two of the output end of the second comparison subunit, the output end of the third comparison subunit and the output end of the fourth comparison subunit are connected with different input ends of the or gate.
Further, in the above spike voltage suppression circuit, if the spike voltage state detection unit includes at least two of the power-on detection unit, the output short circuit detection unit, and the light load detection unit, the and gate, the first comparison subunit, and the or gate, and at least two of the second comparison subunit, the third comparison subunit, and the fourth comparison subunit are replaced with the same MCU unit.
Another embodiment of the present invention provides a switching power supply including: the power conversion device is connected with the peak voltage suppression circuit.
The embodiment of the invention has the following advantages:
according to the technical scheme, whether the high-voltage input is detected or not and the peak voltage state is detected, when the high-voltage input is detected and the peak voltage state occurs, the peak voltage absorption unit is used for absorbing and storing energy, and the voltage is further reduced through a switch voltage reduction technology to be released to an output load. The scheme can not only realize the complete absorption of the peak voltage, but also recover the energy of the peak voltage, and compared with the existing absorption circuit, the scheme can reduce the loss, improve the efficiency of the whole machine, and simultaneously improve the EMI problem and the like.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained according to the drawings without inventive efforts.
FIG. 1 shows a first schematic diagram of a spike voltage suppression circuit according to an embodiment of the invention;
FIG. 2 is a second schematic diagram of a spike suppression circuit according to an embodiment of the invention;
FIG. 3 is a schematic diagram of a third structure of the spike voltage suppression circuit according to the embodiment of the invention;
FIG. 4 is a fourth schematic diagram of a spike suppression circuit according to an embodiment of the invention;
fig. 5 is a schematic diagram illustrating a fifth configuration of the spike voltage suppression circuit according to the embodiment of the present invention.
Description of the main element symbols:
1. 1' -spike voltage suppression circuit; 2-a power conversion device; 10-high voltage input detection unit; 20-peak voltage state detection unit; 30-a reduced pressure release control unit; 40-a peak voltage absorbing unit; 210-a power-on detection unit; 220-output short circuit detection unit; 230-light load detection unit; 50-MCU unit.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention.
It will be understood that when an element is referred to as being "secured to" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. In contrast, when an element is referred to as being "directly on" another element, there are no intervening elements present. The terms "vertical," "horizontal," "left," "right," and the like as used herein are for illustrative purposes only.
In the present invention, unless otherwise expressly stated or limited, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can, for example, be fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description of the templates herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
Example 1
Referring to fig. 1, the present embodiment provides a peak voltage suppression circuit 1, which can be applied to different types of switching power supplies, such as a phase-shifted full-bridge switching power supply, a phase-shifted half-bridge switching power supply, an LCC resonant switching power supply, a forward switching power supply, or a flyback switching power supply. The switch power supplies comprise corresponding power conversion devices 2, and the peak voltage suppression circuit 1 is used for being connected to the power conversion circuit so as to realize complete absorption and energy recovery of peak voltage appearing in the switch power supplies, improve the efficiency of the whole machine and the like.
In this embodiment, the power conversion device 2 may include, but is not limited to, an isolation transformer, and a primary side driving circuit and a secondary side rectifying circuit located on two sides of the isolation transformer. The primary side driving circuit can be designed according to actual requirements, such as a full-bridge driving circuit and a half-bridge driving circuit which are composed of a plurality of high-frequency switching tubes, and the like, so as to perform voltage conversion on the accessed high voltage. The secondary rectifying circuit can also be a rectifying circuit consisting of a rectifying diode or a switching tube, a filter circuit and the like, and the output end of the secondary rectifying circuit is used for connecting a load. It will be appreciated that the power conversion device 2 is primarily intended to effect conversion between different powers. However, since these switching tubes are often turned off at a high frequency, a very high reverse spike voltage is likely to occur, which affects the safety and reliability of the whole device. For this reason, the present embodiment proposes a spike voltage suppression circuit 1 to solve the above-described problem.
As shown in fig. 1, the spike voltage suppression circuit 1 will be described in detail below.
The spike voltage suppression circuit 1 includes a high voltage input detection unit 10, a spike voltage state detection unit 20, a step-down release control unit 30, and a spike voltage absorbing unit 40. The high voltage input detection unit 10 is mainly used for detecting whether the connected power conversion device 2 is in a high voltage connection state. Illustratively, the input terminal of the high voltage input detection unit 10 is connected to the input terminal of the primary side driving circuit, and the output terminal thereof is connected to the step-down releasing control unit 30, so that the step-down releasing control unit 30 can further process the signals.
The peak voltage state detection unit 20 is configured to detect whether the power conversion apparatus 2 enters or is in a preset peak voltage state. It is understood that the predetermined peak voltage state refers to some specific states that are prone to high peak voltages, such as a power supply transient state or an output short circuit.
Exemplarily, the input end of the peak voltage state detection unit 20 is used for connecting the primary side driving circuit and/or the secondary side rectifying circuit, and may be determined according to the number and type of the actual detection units, and the output end thereof is connected to the step-down release control unit 30, so that the step-down release control unit 30 performs further processing such as peak voltage step-down after receiving the corresponding detection signal.
For example, if the peak voltage state detection unit 20 is used for detecting a start-up transient state, the input terminal of the peak voltage state detection unit 20 may be used to be connected to the input terminal of the primary side driving circuit; alternatively, if the peak voltage state detection unit 20 is used to detect an output short-circuit state, its input terminal may be connected to the output terminal of the secondary rectifier circuit. Of course, the peak voltage state detection unit 20 may also detect other states, such as a light load state.
It is understood that the peak voltage condition detection unit 20 may include, but is not limited to, any one or more combinations of the above-listed power-on detection, output short detection, light load detection, and the like. Alternatively, as shown in fig. 2, the high voltage input detection unit 10 and the peak voltage state detection unit 20 may be connected to the step-down release control unit 30 after performing and operation through an and gate, so as to reduce the port occupation of the controller in the step-down release control unit 30.
The peak voltage absorption unit 40 is mainly used for absorbing the peak voltage occurring in the switching tube or the rectifying tube of the power conversion device 2 and storing energy. Exemplarily, the peak voltage absorbing unit 40 is connected between the secondary winding of the isolation transformer and the input terminal of the secondary rectifying circuit.
In one embodiment, as shown in fig. 2, the secondary rectifier circuit includes a rectifier switch tube for rectifying the output, and the input end of the rectifier switch tube is connected to the secondary winding output of the isolation transformer, although the rectifier switch tube may be replaced by a diode. Exemplarily, the peak voltage absorbing unit 40 includes an energy storage capacitor C1 and two absorbing diodes D1 and D2, an anode of each absorbing diode is connected to one end of the secondary winding of the isolation transformer, cathodes of the two absorbing diodes D1 and D2 are connected to an anode of the energy storage capacitor C1, and a cathode of the energy storage capacitor C1 is connected to a cathode output terminal of the secondary rectifying circuit.
Because the secondary winding and the secondary rectifying circuit are designed differently according to different types of switching power supplies, the peak voltage absorbing unit can be adjusted according to the actual switching power supply circuit. For example, for a switching power supply such as a phase-shifted full bridge or half bridge, as shown in fig. 2, the switching power supply usually includes two or more secondary windings, and in this case, the peak voltage absorption unit may include two or more absorption diodes; for a forward or flyback switching power supply, there is usually only one secondary winding, and the peak voltage absorption unit may only include one absorption diode.
The step-down release control unit 30 is mainly used to step down the voltage absorbed by the peak voltage absorbing unit 40 and output the voltage to a connected load when receiving the high voltage input signal output by the high voltage input detecting unit 10 and the preset peak voltage state output by the peak voltage state detecting unit 20 at the same time. Exemplarily, the step-down releasing control unit 30 is connected to the high voltage input detection unit 10, the peak voltage state detection unit 20 and the peak voltage absorbing unit 40, and is further configured to be connected to the output terminal of the secondary rectification circuit.
In one embodiment, the buck release control unit 30 includes a buck switching transistor Q1, a buck inductor L1, a freewheeling diode D3, and a controller S1. As shown in fig. 2, the positive electrode of the energy storage capacitor C1 is connected to the input terminal of the buck switching transistor Q1, the output terminal of the buck switching transistor Q1 is connected to the input terminal of the buck inductor L1, and the output terminal of the buck inductor L1 is connected to the positive electrode output terminal of the secondary side rectifying circuit. The control end of the voltage reduction switch tube Q1 is connected with the controller S1; the anode of the freewheeling diode D3 is connected to the cathode of the energy storage capacitor C1, and the cathode thereof is connected between the output terminal of the buck switching transistor Q1 and the input terminal of the buck inductor L1. For example, the controller S1 may be a conventional PWM signal driving chip, and the specific type thereof may be selected according to actual requirements, and is not limited herein.
It can be understood that based on the switch voltage reduction technology, the controller S1 controls the turn-on or turn-off of the voltage reduction switch Q1 to achieve the purpose of voltage reduction; the step-down inductor L1 is used as an energy storage element for storing the stepped-down energy and outputting the energy to a connected load; the freewheeling diode D3 is used to freewheel when the buck transistor Q1 is turned off, thereby preventing the induced voltage from being too high to break down the buck transistor Q1.
As a preferable scheme, as shown in fig. 2, the buck release control unit 30 further includes a current sampling resistor R0, and exemplarily, a signal input terminal of the positive current sampling resistor R0 of the energy storage capacitor C1, a signal output terminal of the current sampling resistor R0 is connected to an input terminal of the buck switching tube Q1, and meanwhile, two terminals of the current sampling resistor R0 are further connected to different pins of the controller S1, so that the controller S1 obtains the magnitude of the sampled current. It can be understood that the current sampling resistor R0 will also be used as a constant current output sampling resistor to perform the overcurrent protection function, so that the controller S1 can control the buck switch tube accordingly according to the sampled value to adjust the output.
As another preferable scheme, the buck release control unit 30 further includes an output voltage sampling subunit, configured to sample a voltage output to the load, so that the controller S1 controls a duty ratio of the buck switching tube Q1 when determining that the output voltage is too high, thereby achieving a purpose of stabilizing output. Exemplarily, the output voltage sampling sub-unit is located between the positive output terminal and the negative output terminal of the secondary side rectifying circuit, and the output thereof is connected to the controller S1.
In one embodiment, as shown in fig. 2, the output voltage sampling sub-unit is composed of two voltage sampling resistors R1, R2 connected in series, and an output terminal is connected to the controller S1 between the two voltage sampling resistors R1, R2. It is understood that the output voltage sampling sub-unit may include, but is not limited to, the above-mentioned resistance voltage division sampling method, and may also use devices such as a voltage transformer, a hall sensor, and the like to perform sampling.
The peak voltage suppression circuit of the embodiment detects whether a preset peak voltage state occurs or not when a high voltage is input, and outputs a step-down signal to the step-down release control unit when the preset peak voltage state occurs, so that the step-down release control unit performs low-voltage conversion on the absorbed peak voltage and outputs the converted peak voltage to a load. If the peak voltage suppression circuit is adopted in the switching power supply, the following advantages can be achieved:
(1) compared with the existing resistance-capacitance absorption circuit, the problem of limited absorption effect caused by the capacity limitation of the energy storage capacitor can be solved, the full absorption of peak voltage is realized, and the electromagnetic interference EMI problem is improved;
(2) compared with a mode of using a resistor for energy consumption, the switching power supply using the peak voltage suppression circuit greatly reduces the temperature of the whole machine, thereby improving the reliability of equipment and the like;
(3) the peak voltage is absorbed and reduced, so that a rectifier tube with lower voltage resistance value is conveniently selected, the on-resistance of the rectifier tube with lower voltage resistance value is smaller, the rectification loss is smaller, and the overall efficiency is obviously improved;
(4) compared with the existing active clamping circuit, although the active clamping circuit has an absorption effect, because the working frequency of the active clamping circuit needs to be controlled at the same frequency with a main switching tube in a primary side driving circuit, the control is more complex and the use is not flexible enough, the peak voltage suppression circuit does not need to be controlled at the same frequency with the main switching tube at all, and the voltage reduction switching tube in the peak voltage suppression circuit can work at a very low frequency and a very high frequency independently and can be determined according to the actual situation.
Example 2
Referring to fig. 3, the present embodiment provides a peak voltage suppressing circuit 1 ', and the difference between the peak voltage suppressing circuit 1' and the above embodiment 1 is that the peak voltage state detecting unit 20 of the present embodiment includes any one or at least two of the power-on detecting unit 210, the output short detecting unit 220, and the light load detecting unit 230.
In an embodiment, if the peak voltage suppression circuit 1' includes any one of the power-on detection unit 210, the output short detection unit 220 and the light load detection unit 230, taking the power-on detection unit 210 as an example, the high voltage input detection unit 10 and the power-on detection unit 210 may be input to different input terminals of an and gate, and then the output terminal of the and gate is connected to the buck release control unit 30, so that the controller S1 in the buck release control unit 30 controls the buck switch to perform the buck processing and output to the load when the high voltage input is satisfied and the power-on moment is performed at the same time. It will be appreciated that the other two detection units are connected in a similar manner and will not be described in detail here.
In one embodiment, if the peak voltage state detection unit 20 includes at least two of the power-on detection unit 210, the output short detection unit 220 and the light load detection unit 230, at least two of the three detection units may be respectively connected to different input terminals of an or gate, an output terminal of the or gate and the above-mentioned high voltage input detection unit 10 are respectively input to different input terminals of an and gate, and an output terminal of the and gate is connected to the step-down release control unit 30, so that the controller S1 in the step-down release control unit 30 performs step-down output when any one of the three detection units is detected.
For example, fig. 3 shows a spike voltage suppression circuit including the three detection units at the same time. The input terminals of the power-on detection unit 210, the output short-circuit detection unit 220 and the light load detection unit 230 are connected to an or gate having three input terminals, the output terminal of the or gate and the high voltage input detection unit 10 are connected to an and gate having two input terminals, and the output terminal of the and gate is connected to the step-down release control unit 30. It can be understood that the circuit structure can simultaneously detect the occurrence of the three states, and perform spike voltage absorption, timely release and the like at corresponding time.
In an alternative, the high voltage input detecting unit 10 exemplarily includes a first voltage dividing subunit and a first comparing subunit connected in sequence, wherein an input terminal of the primary side driving circuit is connected to an input terminal of the first voltage dividing subunit, and an output terminal of the first comparing subunit is connected to an input terminal of the and gate. For example, as shown in fig. 4, the first voltage dividing subunit and the first comparison subunit may be formed by two voltage dividing resistors R3 and R4 connected in series and a comparator K1. The voltage is divided by the voltage dividing resistors R3 and R4 and then compared with a predetermined first reference voltage, when a high voltage is inputted, the comparator K1 outputs a high voltage, and it is determined that the high voltage is inputted.
In an alternative scheme, the power-on detection unit 210 exemplarily includes a current-limiting resistor, an RC parallel subunit and a second comparison subunit, wherein an input terminal of the primary side driving circuit is connected to a signal input terminal of the current-limiting resistor, and a signal output terminal of the current-limiting resistor is respectively connected to the RC parallel subunit and the second comparison subunit. For example, as shown in fig. 4, the RC parallel subunit is composed of a resistor R6 and a capacitor C2, and the current limiting resistor R5 is used for current limiting. When the electronic device is turned on, the capacitor C2 in the RC parallel subunit is charged, and before the charging voltage of the capacitor C2 is lower than a preset second reference voltage, the comparator K2 outputs a high level, and when a high voltage is input, it is determined that the electronic device is in the instant state of turning on.
In an optional scheme, exemplarily, the light load detection unit 230 includes a sampling operational amplifier subunit and a third comparison subunit, which are connected in sequence, wherein an input end of the sampling operational amplifier subunit is connected to a negative output end of the secondary side rectification circuit, so as to perform current sampling from the negative output end and further determine whether the light load state is present.
For example, as shown in fig. 4, the sampling OP-amp subunit is mainly composed of a sampling resistor RS, an inverting input resistor R7, a forward input resistor R8, a feedback resistor Rf, an operational amplifier OP1 and a comparator K3, and the output terminal of the operational amplifier OP1 is connected to the input terminal of the comparator K3. When the sampling resistor RS detects the output current, the output current is amplified by the operational amplifier OP1, and then is compared with a preset third reference voltage, and when the output current is lower than the third reference voltage, the comparator K3 outputs a high voltage, and the light-load working state is judged.
In an alternative scheme, the output short circuit detection unit 220 exemplarily includes an output voltage sampling subunit and a fourth comparison subunit connected to the output voltage sampling subunit, where the output voltage sampling subunit is connected between the positive output end and the negative output end of the secondary side rectification circuit, so as to perform voltage sampling between the two output ends and further determine whether a short circuit occurs. For example, as shown in fig. 4, the output voltage sampling subunit and the fourth comparison subunit are mainly composed of two voltage dividing resistors R9 and R10 connected in series and a comparator K4. When the divided voltage is detected to be lower than a preset fourth reference voltage, the comparator K4 outputs a high level, and it is determined that the output short-circuit state is present.
Further alternatively, if the peak voltage suppression circuit 1' includes any one of the power-on detection unit 210, the output short detection unit 220 and the light load detection unit 230, the output terminal of the second comparison subunit, the output terminal of the third comparison subunit or the output terminal of the fourth comparison subunit is connected to the input terminal of the and gate.
Of course, if the peak voltage suppression circuit 1' includes at least two of the power-on detection unit 210, the output short detection unit 220 and the light load detection unit 230, at least two of the output terminal of the second comparison subunit, the output terminal of the third comparison subunit and the output terminal of the fourth comparison subunit will be connected to different input terminals of the or gate.
As an alternative, as shown in fig. 5, if the spike voltage suppression circuit 1' includes at least two of the power-on detection unit 210, the output short-circuit detection unit 220, and the light-load detection unit 230, the and gate, the first comparison subunit, or gate, and the corresponding second comparison subunit, third comparison subunit, and fourth comparison subunit may be replaced by the same MCU unit 50, so as to reduce the space occupation of the hardware circuit board, and facilitate debugging, flexibility, and the like. Of course, if the light load detection unit 230 includes only one of the power-on detection unit 210, the output short circuit detection unit 220, and the output short circuit detection unit 220, the MCU unit 50 may be used instead of the above-mentioned light load detection unit. For example, the MCU unit 50 is mainly implemented by a common single chip, and the type thereof is not limited herein, as long as the simple logic operation and judgment functions can be implemented.
Example 3
Referring to fig. 1 to 5, the present embodiment provides a switching power supply, which includes the power conversion device and the peak voltage suppression circuit described in the above embodiments, wherein the power conversion device is connected to the peak voltage suppression circuit.
The power conversion device exemplarily includes a primary side driving circuit and a secondary side rectifying circuit located at two sides of the isolation transformer, for example, the power conversion device may include, but is not limited to, a phase-shifted full-bridge conversion circuit, and may also be a phase-shifted half-bridge conversion circuit, an LLC resonant conversion circuit, a forward conversion circuit, a flyback conversion circuit, or the like.
It is understood that the power conversion device and the spike voltage suppression circuit of the present embodiment correspond to the power conversion device and the spike voltage suppression circuit of the above embodiments, and the alternatives described in the above embodiments are also applicable to the present embodiment, and therefore, detailed description thereof is omitted.
In all of the above-described embodiments shown and described herein, any particular value should be construed as merely illustrative, and not restrictive, and thus other examples of exemplary embodiments may have different values.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.
The above examples are merely illustrative of several embodiments of the present invention, and the description thereof is more specific and detailed, but not to be construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention.
Claims (10)
1. A peak voltage suppression circuit is characterized by being connected to a power conversion device, wherein the power conversion device comprises a primary side driving circuit and a secondary side rectifying circuit which are positioned at two sides of an isolation transformer, and the peak voltage suppression circuit comprises a high-voltage input detection unit, a peak voltage state detection unit, a peak voltage absorption unit and a voltage reduction release control unit;
the input end of the high-voltage input detection unit is used for being connected with the input end of the primary side driving circuit, the input end of the peak voltage state detection unit is used for being connected with the primary side driving circuit and/or the secondary side rectifying circuit, and the output ends of the high-voltage input detection unit and the peak voltage state detection unit are connected with the voltage reduction release control unit;
the voltage reduction release control unit is used for connecting the output end of the secondary rectifying circuit and the peak voltage absorption unit, and the peak voltage absorption unit is used for connecting the isolation transformer and the secondary rectifying circuit;
and the voltage reduction release control unit is used for reducing the voltage absorbed by the peak voltage absorption unit and outputting the voltage to a load connected with the output end of the secondary rectification circuit when the high-voltage input detection unit detects high-voltage input and the peak voltage state detection unit detects a preset peak voltage state.
2. The spike voltage suppression circuit of claim 1, wherein the spike voltage state detection unit comprises any one or more of a power-on detection unit, an output short detection unit, and a light load detection unit.
3. The spike voltage suppression circuit according to claim 1 or 2, wherein the spike voltage absorbing unit comprises an energy storage capacitor and two absorbing diodes;
the positive pole of each absorption diode is respectively connected with one end of the secondary winding of the isolation transformer, the negative poles of the two absorption diodes are respectively connected with the positive pole of the energy storage capacitor, and the negative pole of the energy storage capacitor is connected with the negative pole output end of the secondary rectifying circuit.
4. The spike voltage suppression circuit of claim 3, wherein the buck release control unit comprises a buck switching transistor, a buck inductor, a freewheeling diode, and a controller;
the positive electrode of the energy storage capacitor is connected with the input end of the voltage reduction switch tube, the output end of the voltage reduction switch tube is connected with the input end of the voltage reduction inductor, and the output end of the voltage reduction inductor is connected with the positive electrode output end of the secondary side rectifying circuit;
the control end of the voltage reduction switch tube is connected with the controller, the anode of the fly-wheel diode is connected with the cathode of the energy storage capacitor, and the cathode of the fly-wheel diode is connected between the voltage reduction inductor and the voltage reduction switch tube.
5. The spike voltage suppression circuit according to claim 4, wherein the buck release control unit further comprises an output voltage sampling subunit located between the positive output terminal and the negative output terminal of the secondary rectification circuit, and the controller is connected to the output voltage sampling subunit.
6. The spike voltage suppression circuit of claim 5 wherein the output voltage sampling sub-unit comprises two voltage sampling resistors connected in series, the controller being connected between the two voltage sampling resistors.
7. The spike voltage suppression circuit according to claim 2, wherein any one of the power-on detection unit, the output short detection unit and the light load detection unit is connected to a first input terminal of an and gate, the high voltage input detection unit is connected to a second input terminal of the and gate, and an output terminal of the and gate is connected to the step-down release control unit;
or at least two of the starting detection unit, the output short circuit detection unit and the light load detection unit are connected with different input ends of an OR gate, the output ends of the high-voltage input detection unit and the OR gate are connected with different input ends of the AND gate, and the output end of the AND gate is connected with the voltage reduction release control unit.
8. The spike voltage suppression circuit according to claim 7, wherein the high voltage input detection unit comprises a first voltage division subunit and a first comparison subunit connected in sequence, an input terminal of the primary side driving circuit is connected to an input terminal of the first voltage division subunit, and an output terminal of the first comparison subunit is connected to an input terminal of the and gate;
the starting detection unit comprises a current-limiting resistor, an RC parallel subunit and a second comparison subunit, wherein the input end of the primary side driving circuit is connected with the signal input end of the current-limiting resistor, and the signal output end of the current-limiting resistor is respectively connected with the RC parallel subunit and the second comparison subunit;
the light load detection unit comprises a sampling operational amplifier subunit and a third comparison subunit which are sequentially connected, wherein the input end of the sampling operational amplifier subunit is connected with the negative electrode output end of the secondary side rectification circuit;
the output short circuit detection unit comprises an output voltage sampling subunit and a fourth comparison subunit connected with the output voltage sampling subunit, and the output voltage sampling subunit is connected between the positive output end and the negative output end of the secondary side rectifying circuit;
if the peak voltage state detection unit comprises any one of the startup detection unit, the output short circuit detection unit and the light load detection unit, the output end of the second comparison subunit, the output end of the third comparison subunit or the output end of the fourth comparison subunit are connected with the input end of the and gate;
if the peak voltage state detection unit comprises at least two of the start-up detection unit, the output short circuit detection unit and the light load detection unit, at least two of the output end of the second comparison subunit, the output end of the third comparison subunit and the output end of the fourth comparison subunit are connected with different input ends of the or gate.
9. The spike voltage suppression circuit of claim 8, wherein if the spike voltage state detection unit comprises at least two of the power-on detection unit, the output short detection unit, and the light load detection unit, the and gate, the first comparison subunit, and the or gate, and at least two of the second comparison subunit, the third comparison subunit, and the fourth comparison subunit are replaced with a same MCU unit.
10. A switching power supply, comprising: a power conversion device and a spike voltage suppression circuit according to any one of claims 1 to 9, the power conversion device being connected to the spike voltage suppression circuit.
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