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CN111129946A - VCSEL biasing circuit and related equipment - Google Patents

VCSEL biasing circuit and related equipment Download PDF

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Publication number
CN111129946A
CN111129946A CN201911387316.XA CN201911387316A CN111129946A CN 111129946 A CN111129946 A CN 111129946A CN 201911387316 A CN201911387316 A CN 201911387316A CN 111129946 A CN111129946 A CN 111129946A
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port
resistor
voltage
transistor
differential circuit
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CN111129946B (en
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曹正军
刘飞
陈涛
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Shenzhen Sibrood Microelectronic Co ltd
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Shenzhen Sibrood Microelectronic Co ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/04Processes or apparatus for excitation, e.g. pumping, e.g. by electron beams
    • H01S5/042Electrical excitation ; Circuits therefor
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03Shaping networks in transmitter or receiver, e.g. adaptive shaping networks

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  • Semiconductor Lasers (AREA)

Abstract

本申请公开了一种VCSEL偏置电路及相关设备,当该电路中运算放大器、晶体管M0、电阻Rt、参考电压源Vref、滤波电阻Rf和滤波电容Cf构成的反馈回路稳定时,运算放大器的同相输入端的电压和反相输入端的电压相等;当差分电路的第一输入端口和第二输入端口之间的电压为第一电压时,激光二极管上的电流与电阻Rt上的电流相同,当差分电路的第一输入端口和第二输入端口之间的电压为第二电压时,激光二极管上的电流为电阻Rt上的电流与调制电流源输出电流之差;其中,第一电压大于第二电压。采用申请实施例不影响输出级带宽,同时避免出现因阻抗不连续导致光眼图失真的问题。

Figure 201911387316

The present application discloses a VCSEL bias circuit and related equipment. When the feedback loop formed by an operational amplifier, a transistor M0, a resistor Rt, a reference voltage source Vref, a filter resistor Rf and a filter capacitor Cf in the circuit is stable, the in-phase of the operational amplifier is stable. The voltage of the input terminal is equal to the voltage of the inverting input terminal; when the voltage between the first input port and the second input port of the differential circuit is the first voltage, the current on the laser diode is the same as the current on the resistor Rt, when the differential circuit When the voltage between the first input port and the second input port is the second voltage, the current on the laser diode is the difference between the current on the resistor Rt and the output current of the modulation current source; wherein the first voltage is greater than the second voltage. Adopting the embodiment of the application does not affect the bandwidth of the output stage, and at the same time avoids the problem of optical eye diagram distortion caused by impedance discontinuity.

Figure 201911387316

Description

VCSEL biasing circuit and related equipment
Technical Field
The present application relates to the field of circuit design, and in particular, to a VCSEL bias circuit and related devices.
Background
With the development of society, new technologies such as 5G, Virtual Reality (VR), Artificial Intelligence (AI) and the like are evolving, the demand of mass data for bandwidth is increasing, and optical fiber communication has the advantages of high bandwidth, no electric wave interference, high transmission quality and the like compared with traditional copper wire communication, and has become a first choice for wired communication network wiring. An optical communication system generally includes an optical fiber, an optical transceiver module and a passive optical device, wherein the optical transceiver module performs an electrical-to-optical conversion function. A vertical-cavity surface-emitting laser (VCSEL) is widely applied to the fields of data centers, fiber channel storage, and the like as a laser diode technology mainly applied to short-distance laser communication, and has the advantages of low cost, easiness in integration, and the like.
The traditional VCSEL driving circuit comprises alternating current coupling and direct current coupling, and the alternating current coupling needs external components such as capacitors and inductors to be matched for use, so that the cost is high, and the optimization of PCB design is not facilitated; the direct current coupling can be divided into two driving modes of a common cathode and a common anode, and due to the limitation of a physical structure, the common cathode VCSEL laser diode in the market occupies a mainstream position.
A traditional common cathode VCSEL laser diode biasing circuit mainly adopts a resistance biasing or PMOS current source as a biasing current source. However, the resistor is adopted to provide bias current for the laser diode, and the bias current can be effectively controlled only by introducing a second power supply into the system, so that inconvenience is brought to system application; the PMOS current source is used as bias current, the parasitic capacitance of a device introduced by the PMOS current source is large, the bandwidth of an output stage is influenced, the high-speed communication application is limited, the output impedance of the PMOS current source is high, when the distance between a VCSEL laser diode and a chip is long, the impedance of a signal path is discontinuously introduced to reflect, and an optical eye pattern is obviously distorted.
Disclosure of Invention
The embodiment of the application provides a VCSEL bias circuit and related equipment, and the VCSEL bias circuit and the related equipment do not affect the bandwidth of an output stage, and simultaneously avoid the problem of optical eye pattern distortion caused by impedance discontinuity.
In a first aspect, an embodiment of the present application provides a VCSEL biasing circuit, including: the circuit comprises a differential circuit, a resistor Rd, a resistor Rt, a PMOS transistor M0, a reference voltage source Vref, a modulation current source, an operational amplifier, a filter resistor Rf, a filter capacitor Cf and a laser diode;
the source of the PMOS transistor M0 is connected to a dc voltage source VCC, the drain of the PMOS transistor M0 is connected to the first port of the resistor Rd, the first port of the resistor Rt and the anode of the reference voltage source Vref, the cathode of the reference voltage source Vref is connected to the non-inverting input terminal of the operational amplifier, the output port of the operational amplifier is connected to the gate of the PMOS transistor M0, the second port of the resistor Rd is connected to the first port of the differential circuit, the second port of the resistor Rt is connected to the output port of the differential circuit, the output port of the differential circuit is connected to the anode of the laser diode and the first port of the filter resistor Rf, the second port of the filter resistor Rf is connected to the inverting input terminal of the operational amplifier and the first port of the filter capacitor Cf, the second port of the differential circuit is connected to the anode of the modulation current source, the cathode of the modulation current source, the cathode of the laser diode and the second port of the filter capacitor Cf are all grounded;
when a feedback loop formed by the operational amplifier, the PMOS transistor M0, the resistor Rt, the reference voltage source Vref, the filter resistor Rf and the filter capacitor Cf is stable, the voltage of the non-inverting input end and the voltage of the inverting input end of the operational amplifier are equal;
when the voltage between the first input port and the second input port of the differential circuit is a first voltage, the current Ivcsel on the laser diode is Ibias,
when the voltage between the first input port and the second input port of the differential circuit is a second voltage, the current Ivcsel on the laser diode is Ibias-Imod;
the first voltage is greater than the second voltage, Ibias is equal to Vref/Rt, Imod is the output current of the modulation current source, and the reference voltage source Vref is a voltage source with adjustable output voltage.
In an alternative embodiment, the differential circuit includes: triode Q0, triode Q1, resistor R0 and resistor R1
A collector and a base of the triode Q0 are respectively a first port and a first input port of the differential circuit, a collector and a base of the triode Q1 are respectively an output port and a second input port of the differential circuit, an emitter of the triode Q0 is connected with a first port of the resistor R0, an emitter of the triode Q1 is connected with a second port of the resistor R1, and a second port of the resistor R0 and a first port of the resistor R1 are both connected to a positive electrode of the modulation current source;
when the voltage between the first input port and the second input port of the differential circuit is the first voltage, the transistor Q0 is in a conducting state, and the transistor Q1 is in a closing state;
when the voltage between the first input port and the second input port of the differential circuit is the second voltage, the transistor Q0 is in an off state, and the transistor Q1 is in an on state.
In an optional embodiment, a time constant formed by the resistor Rf and the capacitor Cf is greater than a preset time period, where the preset time period is an input time period of the first voltage or the second voltage.
In an alternative embodiment, the resistance value of the reference resistor Rf is much greater than the resistance value of the resistor Rt.
In a second aspect, an embodiment of the present application provides another VCSEL biasing circuit, including: the circuit comprises a differential circuit, a resistor Rd, a resistor Rt, a PMOS transistor M0, a resistor Rdac, a regulating current source Idac, a modulation current source, an operational amplifier, a filter resistor Rf, a filter capacitor Cf and a laser diode;
a source of the PMOS transistor M0 is connected to a dc voltage source VCC, a drain of the PMOS transistor M0 is connected to a first port of the resistor Rd, a first port of the resistor Rt and a first port of the resistor Rdac, a second port of the resistor Rdac is connected to a non-inverting input terminal of the operational amplifier and an anode of the regulated current source Idac, an output port of the operational amplifier is connected to a gate of the PMOS transistor M0, a second port of the resistor Rd is connected to a first port of the differential circuit, a second port of the resistor Rt is connected to an output port of the differential circuit, an output port of the differential circuit is connected to an anode of the laser diode and a first port of the filter resistor Rf, a second port of the filter resistor Rf is connected to an inverting input terminal of the operational amplifier and a first port of the filter capacitor Cf, a second port of the differential circuit is connected to the anode of the modulation current source, and the cathode of the regulation current source Idac, the cathode of the modulation current source, the cathode of the laser diode and a second port of the filter capacitor Cf are all grounded;
when a feedback loop formed by the operational amplifier, the PMOS transistor M0, the resistor Rt, the reference voltage source Vref, the filter resistor Rf and the filter capacitor Cf is stable, the voltage of the non-inverting input end and the voltage of the inverting input end of the operational amplifier are equal;
when the voltage between the first input port and the second input port of the differential circuit is a first voltage, the current Ivcsel on the laser diode is Ibias,
when the voltage between the first input port and the second input port of the differential circuit is a second voltage, the current Ivcsel on the laser diode is Ibias-Imod;
wherein the first voltage is greater than the second voltage, Ibias is Vref/Rt, Imod is the output current of the modulation current source, the adjusting current source Idac is a current source whose output current can be adjusted, and/or the resistor Rdac is an adjustable resistor.
In an alternative embodiment, the differential circuit includes: triode Q0, triode Q1, resistor R0 and resistor R1
A collector and a base of the triode Q0 are respectively a first port and a first input port of the differential circuit, a collector and a base of the triode Q1 are respectively an output port and a second input port of the differential circuit, an emitter of the triode Q0 is connected with a first port of the resistor R0, an emitter of the triode Q1 is connected with a second port of the resistor R1, and a second port of the resistor R0 and a first port of the resistor R1 are both connected to a positive electrode of the modulation current source;
when the voltage between the first input port and the second input port of the differential circuit is the first voltage, the transistor Q0 is in a conducting state, and the transistor Q1 is in a closing state;
when the voltage between the first input port and the second input port of the differential circuit is the second voltage, the transistor Q0 is in an off state, and the transistor Q1 is in an on state.
In an optional embodiment, a time constant formed by the resistor Rf and the capacitor Cf is greater than a preset time period, where the preset time period is an input time period of the first voltage or the second voltage.
In an alternative embodiment, the resistance value of the reference resistor Rf is much larger than the resistance value of the resistor Rt.
In a third aspect, embodiments of the present application further provide an optical transmitter including the VCSEL biasing circuit according to the first aspect or the second aspect.
In a fourth aspect, embodiments of the present application further provide an optical fiber transceiver, including the VCSEL biasing circuit according to the first aspect or the second aspect, or the optical transmitter according to the third aspect.
It can be seen that, according to the laser diode driving circuit, the voltage at two ends of the output matching resistor of the laser diode driving circuit is detected, and after the voltage is compared with the voltage output by the reference voltage source, the output stage voltage source of the driving circuit is controlled in a feedback mode, at the moment, the output impedance is low, the bandwidth of the output stage circuit cannot be affected, and meanwhile, the output impedance is matched with the characteristic impedance of the transmission line and the VCSEL alternating current impedance, so that the phenomenon of optical eye pattern distortion is avoided.
These and other aspects of the present application will be more readily apparent from the following description of the embodiments.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic diagram of a VCSEL biasing circuit in the prior art;
FIG. 2 is a schematic diagram of another prior art VCSEL biasing circuit;
fig. 3 is a schematic structural diagram of a VCSEL bias circuit according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a VCSEL bias circuit according to an embodiment of the present invention.
Detailed Description
The following are detailed below.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a VCSEL bias circuit in the prior art. As shown in fig. 1, the VCSEL bias circuit includes a resistor Rd, a resistor R, a transistor Q1, a transistor Q2, a resistor R0, a resistor R1, a modulation current source Imod, and a laser diode.
The first port of the resistor Rd and the first port of the resistor R are connected to a direct-current voltage source VCC, the second port of the resistor Rd is connected to a collector of a triode Q1, the second port of the resistor R is connected to a collector of a triode Q2, an emitter of the triode Q1 is connected with the first port of a resistor R0, an emitter of the triode Q2 is connected with the second port of a resistor R1, the second port of the resistor R0 and the first port of the resistor R1 are both connected to the anode of a modulation current source Imod, a base of the triode Q2 is connected with the anode of a laser diode, and the modulation current source Imod and the cathode of the laser diode are both grounded.
For the bias circuit shown in fig. 1, a resistor R is used to provide a bias current for the laser diode, and this method needs a second power supply introduced by the system to effectively control the bias current, which brings inconvenience to the application of the system.
Referring to fig. 2, fig. 2 is a schematic diagram of another VCSEL bias circuit in the prior art. The bias circuit shown in fig. 2 uses a PMOS current source as a bias current, the parasitic capacitance Cpar introduced by the PMOS current source is usually between several hundred fF and several pF, which affects the output stage bandwidth and limits the application of high-speed communication, and the output impedance of the PMOS current source is high, when the distance between the laser diode and the chip is long, the impedance discontinuity of the signal path introduces reflection, and the optical eye diagram is obviously distorted.
Based on the above-mentioned drawbacks of the prior art, the present application proposes a new bias circuit. Referring to fig. 3, fig. 3 is a schematic structural diagram of a VCSEL bias circuit according to an embodiment of the present disclosure. As shown in fig. 3, the bias circuit includes: the circuit comprises a differential circuit, a resistor Rd, a resistor Rt, a PMOS transistor M0, a reference voltage source Vref, a modulation current source, an operational amplifier, a filter resistor Rf, a filter capacitor Cf and a laser diode;
the source of the PMOS transistor M0 is connected to a dc voltage source VCC, the drain of the PMOS transistor M0 is connected to a first port of a resistor Rd, a first port of a resistor Rt and the anode of a reference voltage source Vref, the cathode of the reference voltage source Vref is connected to the non-inverting input terminal of an operational amplifier, the output port of the operational amplifier is connected to the gate of a PMOS transistor M0, the second port of the resistor Rd is connected to the first port of a differential circuit, the second port of the resistor Rt is connected to the output port of the differential circuit, the output port of the differential circuit is connected to the anode of a laser diode and the first port of a filter resistor Rf, the second port of the filter resistor Rf is connected to the inverting input terminal of the operational amplifier and the first port of a filter capacitor Cf, the second port of the differential circuit is connected to the anode of a modulation current source, the cathode of the laser diode and the second port of the filter capacitor Cf are both grounded;
when a feedback loop formed by the operational amplifier, the PMOS transistor M0, the resistor Rt, the reference voltage source Vref, the filter resistor Rf and the filter capacitor Cf is stable, the voltage of the non-inverting input end and the voltage of the inverting input end of the operational amplifier are equal;
when the voltage between the first input port and the second input port of the differential circuit is a first voltage, the current Ivcsel on the laser diode is Ibias,
when the voltage between the first input port and the second input port of the differential circuit is a second voltage, the current Ivcsel on the laser diode is Ibias-Imod;
the first voltage is greater than the second voltage, Ibias is equal to Vref/Rt, Imod is the output current of the modulation current source, and the reference voltage source Vref is a voltage source with adjustable output voltage.
In an alternative embodiment, the differential circuit includes: triode Q0, triode Q1, resistor R0 and resistor R1
A collector and a base of the triode Q0 are respectively a first port and a first input port of the differential circuit, a collector and a base of the triode Q1 are respectively an output port and a second input port of the differential circuit, an emitter of the triode Q0 is connected with a first port of the resistor R0, an emitter of the triode Q1 is connected with a second port of the resistor R1, and a second port of the resistor R0 and a first port of the resistor R1 are both connected to the positive electrode of the modulation current source;
when the voltage between the first input port and the second input port of the differential circuit is a first voltage, the transistor Q0 is in a conducting state, and the transistor Q1 is in a closing state;
when the voltage between the first input port and the second input port of the differential circuit is the second voltage, the transistor Q0 is in an off state, and the transistor Q1 is in an on state.
Specifically, the resistor Rt is an output matching resistor for matching the ac impedance of the VCSEL to avoid optical eye distortion caused by impedance discontinuity, and is typically 50 ohms. By detecting the voltage across Rt and comparing it with the preset reference voltage source Vref, when the feedback loop formed by the operational amplifier and the PMOS transistor M0 is stable, the voltage at the non-inverting input terminal and the voltage at the inverting input terminal of the operational amplifier are equal, and Vref is Ibias Rt, so that it can be seen that the laser diode bias current can be changed by changing the magnitude of the output voltage of the reference voltage source Vref. The anode of the laser diode is a high-frequency signal, so that in order to avoid the influence of parasitic capacitance on high-frequency performance and to ensure stable operation of a loop, a low-pass filter consisting of a filter resistor Rf and a filter capacitor Cf is introduced to solve the two problems.
In an alternative embodiment, the time constant formed by the resistor Rf and the capacitor Cf is greater than a preset time period, where the preset time period is an input time period of the first voltage or the second voltage.
Further, the resistance of Rf is much larger than that of Rt, so that the time constant formed by the resistor Rf and the capacitor Cf is longer than the predetermined time.
It should be noted here that, when the voltage between the first input port and the second input port of the differential circuit is the first voltage, it can be regarded as a signal of "1" input to the differential circuit; when the voltage between the first input port and the second input port of the differential circuit is a first voltage, the differential circuit can be regarded as a signal of '0' input; therefore, when the differential circuit inputs "1" or "0" it can be regarded as inputting the first voltage or the second voltage between the first input port and the second input port of the differential circuit for a period of time, i.e. the length of "1" or "0". For example, a "0" signal or a "1" signal corresponds to a time duration of 0.1ns, and when N1 "1" signals are continuously input to the differential circuit, it indicates that the first voltage is input between the first input port and the second input port of the differential circuit and lasts for N1 × 0.1 ns; when the differential circuit inputs N2 '0' signals continuously, the second voltage is input between the first input port and the second input port of the differential circuit and lasts for N2 x 0.1ns, wherein a plurality of '1' signals or a plurality of '0' signals input by the differential circuit are related to the input high-speed data pattern protocol.
The first voltage is at a high level, and the second voltage is at a low level. For example, the first voltage is 0.4V and the second voltage is-0.4V.
When no signal is input into the differential circuit, assuming that the output stage differential pair symmetrically works, the current IQ0 between the collector and the emitter of the transistor Q0 and the current IQ1 between the collector and the emitter of the transistor Q1 are both 0.5 × Imod, and at this time, the current Ivcsel on the laser diode is Ibias-0.5 × Imod; when the input signal is "1", IQ1 is 0, and transistor Q1 is in an off state, and the current Ivcsel on the laser diode is Ibias; when the input signal is "0", IQ1 is 1, transistor Q1 is in a conducting state, and the current Ivcsel on the laser diode is Ibias-Imod.
As can be seen from the above, the current Ivcsel on the laser diode can be related to the bias current Ibias, so that the magnitude of Ibias can be changed by adjusting the magnitude of the reference voltage source Vref, and thus the current Ivcsel on the laser diode can be adjusted to meet the current requirements of different laser diodes.
It can be seen that, according to the laser diode driving circuit, the voltage at two ends of the output matching resistor of the laser diode driving circuit is detected, and after the voltage is compared with the voltage output by the reference voltage source, the output stage voltage source of the driving circuit is controlled in a feedback mode, at the moment, the output impedance is low, the bandwidth of the output stage circuit cannot be affected, and meanwhile, the output impedance is matched with the characteristic impedance of the transmission line and the VCSEL alternating current impedance, so that the phenomenon of optical eye pattern distortion is avoided.
Referring to fig. 4, fig. 4 is a schematic structural diagram of a VCSEL bias circuit according to an embodiment of the present disclosure. As shown in fig. 4, the bias circuit includes: the circuit comprises a differential circuit, a resistor Rd, a resistor Rt, a PMOS transistor M0, a resistor Rdac, a regulating current source Idac, a modulation current source, an operational amplifier, a filter resistor Rf, a filter capacitor Cf and a laser diode;
the source of the PMOS transistor M0 is connected to the dc voltage source VCC, the drain of the PMOS transistor M0 is connected to the first port of the resistor Rd, the first port of the resistor Rt and the first port of the resistor Rdac, the second port of the resistor Rdac is connected to the non-inverting input of the operational amplifier and the anode of the regulating current source Idac, the output port of the operational amplifier is connected to the gate of the PMOS transistor M0, the second port of the resistor Rd is connected to the first port of the differential circuit, the second port of the resistor Rt is connected to the output port of the differential circuit, the output port of the differential circuit is connected to the anode of the laser diode and the first port of the filter resistor Rf, the second port of the filter resistor Rf is connected to the inverting input of the operational amplifier and the first port of the filter capacitor Cf, the second port of the differential circuit is connected to the anode of the modulating current source, the cathode of the regulating current source Idac, the, The cathode of the laser diode and the second port of the filter capacitor Cf are both grounded;
when a feedback loop formed by the operational amplifier, the PMOS transistor M0, the resistor Rt, the reference voltage source Vref, the filter resistor Rf and the filter capacitor Cf is stable, the voltage of the non-inverting input end and the voltage of the inverting input end of the operational amplifier are equal;
when the voltage between the first input port and the second input port of the differential circuit is a first voltage, the current Ivcsel on the laser diode is Ibias,
when the voltage between the first input port and the second input port of the differential circuit is a second voltage, the current Ivcsel on the laser diode is Ibias-Imod;
the first voltage is greater than the second voltage, Ibias is equal to Vref/Rt, Imod is the output current of the modulation current source, the regulation current source Idac is a current source with adjustable output current and/or the resistor Rdac is a resistor with adjustable resistance. In other words, the magnitude of the current Ibias is controlled by adjusting the current source Idac, or by adjusting the resistance Rdac, or by adjusting the current source Idac and the resistance Rdac.
In the embodiment shown in fig. 3, the current Ivcsel of the laser diode can be adjusted by adjusting the output voltage of the reference voltage source Vref. In fig. 4, the function of the reference voltage source Vref is realized by the resistor Rdac and the regulated current source Idac. Vref, Idac, Ibias Rt, and therefore Ibias, Idac, Rdac/Rt. Generally, the adjusting current source Idac can be digitally adjustable through a digital DAC current source, can also be digitally adjustable through a digital DAC resistor, and can also be digitally adjustable through the digital DAC current source and the digital DAC resistor.
In an alternative embodiment, the differential circuit includes: triode Q0, triode Q1, resistor R0 and resistor R1
A collector and a base of the triode Q0 are respectively a first port and a first input port of the differential circuit, a collector and a base of the triode Q1 are respectively an output port and a second input port of the differential circuit, an emitter of the triode Q0 is connected with a first port of the resistor R0, an emitter of the triode Q1 is connected with a second port of the resistor R1, and a second port of the resistor R0 and a first port of the resistor R1 are both connected to the positive electrode of the modulation current source;
when the voltage between the first input port and the second input port of the differential circuit is a first voltage, the transistor Q0 is in a conducting state, and the transistor Q1 is in a closing state;
when the voltage between the first input port and the second input port of the differential circuit is the second voltage, the transistor Q0 is in an off state, and the transistor Q1 is in an on state.
In an alternative embodiment, the time constant formed by the resistor Rf and the capacitor Cf is greater than a preset time period, where the preset time period is an input time period of the first voltage or the second voltage.
Further, the resistance of the reference resistor Rf is much larger than that of the resistor Rt, so that a time constant formed by the resistor Rf and the capacitor Cf is longer than a preset time.
It should be noted that, the detailed description of the embodiment may refer to the related description of the embodiment shown in fig. 3, and will not be described here.
Embodiments of the present application also provide an optical transmitter including a VCSEL biasing circuit as shown in fig. 3 or fig. 4.
Embodiments of the present application also provide an optical fiber transceiver, where the optical line terminal includes the VCSEL biasing circuit shown in fig. 3 or fig. 4, or the optical transmitter described above.
The bias circuit disclosed by the application can be applied to various laser driving circuits, in particular to a high-speed driving circuit with the speed of 25G or above.
The foregoing detailed description of the embodiments of the present application has been presented to illustrate the principles and implementations of the present application, and the above description of the embodiments is only provided to help understand the method and the core concept of the present application; meanwhile, for a person skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.

Claims (10)

1.一种垂直腔面激光发射器VCSEL偏置电路,其特征在于,包括:差分电路、电阻Rd、电阻Rt、PMOS晶体管M0、参考电压源Vref、调制电流源、运算放大器、滤波电阻Rf、滤波电容Cf和激光二极管;1. a vertical cavity surface laser emitter VCSEL bias circuit, is characterized in that, comprises: differential circuit, resistance Rd, resistance Rt, PMOS transistor M0, reference voltage source Vref, modulation current source, operational amplifier, filter resistance Rf, Filter capacitor Cf and laser diode; 所述PMOS晶体管M0的源极连接至直流电压源VCC,所述PMOS晶体管M0的漏极连接至所述电阻Rd的第一端口、所述电阻Rt的第一端口和所述参考电压源Vref的正极,所述参考电压源Vref的负极连接至所述运算放大器的同相输入端,所述运算放大器的输出端口连接至所述PMOS晶体管M0的栅极,所述电阻Rd的第二端口连接至所述差分电路的第一端口,所述电阻Rt的第二端口连接至所述差分电路的输出端口,所述差分电路的输出端口连接至所述激光二极管的阳极和所述滤波电阻Rf的第一端口,所述滤波电阻Rf的第二端口连接至所述运算放大器的反相输入端和所述滤波电容Cf的第一端口,所述差分电路的第二端口连接至所述调制电流源的正极,所述调制电流源的负极、所述激光二极管的阴极和所述滤波电容Cf的第二端口均接地;The source of the PMOS transistor M0 is connected to the DC voltage source VCC, and the drain of the PMOS transistor M0 is connected to the first port of the resistor Rd, the first port of the resistor Rt and the reference voltage source Vref. positive pole, the negative pole of the reference voltage source Vref is connected to the non-inverting input terminal of the operational amplifier, the output port of the operational amplifier is connected to the gate of the PMOS transistor M0, and the second terminal of the resistor Rd is connected to the The first port of the differential circuit, the second port of the resistor Rt is connected to the output port of the differential circuit, and the output port of the differential circuit is connected to the anode of the laser diode and the first port of the filter resistor Rf port, the second port of the filter resistor Rf is connected to the inverting input terminal of the operational amplifier and the first port of the filter capacitor Cf, the second port of the differential circuit is connected to the positive pole of the modulation current source , the cathode of the modulation current source, the cathode of the laser diode and the second port of the filter capacitor Cf are all grounded; 当所述运算放大器、所述PMOS晶体管M0、所述电阻Rt、所述参考电压源Vref、所述滤波电阻Rf和所述滤波电容Cf构成的反馈回路稳定时,所述运算放大器的同相输入端的电压和反相输入端的电压相等;When the feedback loop formed by the operational amplifier, the PMOS transistor M0, the resistor Rt, the reference voltage source Vref, the filter resistor Rf and the filter capacitor Cf is stable, the non-inverting input terminal of the operational amplifier has a stable feedback loop. The voltage is equal to the voltage at the inverting input; 当所述差分电路的第一输入端口和第二输入端口之间的电压为第一电压时,所述激光二极管上的电流Ivcsel=Ibias,When the voltage between the first input port and the second input port of the differential circuit is the first voltage, the current on the laser diode Ivcsel=Ibias, 当所述差分电路的第一输入端口和第二输入端口之间的电压为第二电压时,所述激光二极管上的电流Ivcsel=Ibias-Imod;When the voltage between the first input port and the second input port of the differential circuit is the second voltage, the current on the laser diode Ivcsel=Ibias-Imod; 其中,所述第一电压大于第二电压,所述Ibias=Vref/Rt,所述Imod为所述调制电流源的输出电流,所述参考电压源Vref为输出电压可调节的电压源。The first voltage is greater than the second voltage, the Ibias=Vref/Rt, the Imod is the output current of the modulation current source, and the reference voltage source Vref is a voltage source with an adjustable output voltage. 2.根据权利要求1所述的偏置电路,其特征在于,差分电路包括:三极管Q0、三极管Q1、电阻R0和电阻R12. The bias circuit according to claim 1, wherein the differential circuit comprises: a transistor Q0, a transistor Q1, a resistor R0 and a resistor R1 其中,所述三极管Q0的集电极和基极分别为所述差分电路的第一端口和第一输入端口,所述三极管Q1的集电极和基极分别为所述差分电路的输出端口和第二输入端口,所述三极管Q0的发射极与所述电阻R0的第一端口相连接,所述三极管Q1的发射极与所述电阻R1的第二端口相连接,所述电阻R0的第二端口和所述电阻R1的第一端口均连接至所述调制电流源的正极;The collector and base of the transistor Q0 are the first port and the first input port of the differential circuit, respectively, and the collector and base of the transistor Q1 are the output port and the second input port of the differential circuit, respectively. Input port, the emitter of the transistor Q0 is connected to the first port of the resistor R0, the emitter of the transistor Q1 is connected to the second port of the resistor R1, the second port of the resistor R0 and The first ports of the resistor R1 are all connected to the positive electrode of the modulation current source; 当所述差分电路的第一输入端口和第二输入端口之间的电压为所述第一电压时,所述三极管Q0处于导通状态,所述三极管Q1处于关闭状态;When the voltage between the first input port and the second input port of the differential circuit is the first voltage, the transistor Q0 is in an on state, and the transistor Q1 is in an off state; 当所述差分电路的第一输入端口和第二输入端口之间的电压为所述第二电压时,所述三极管Q0处于关闭状态,所述三极管Q1处于导通状态。When the voltage between the first input port and the second input port of the differential circuit is the second voltage, the transistor Q0 is in an off state, and the transistor Q1 is in an on state. 3.根据权利要求1或2所述的偏置电路,其特征在于,所述电阻Rf和电容Cf构成的时间常数大于预设时长,所述预设时长为所述第一电压或者第二电压的输入时长。3. The bias circuit according to claim 1 or 2, wherein the time constant formed by the resistor Rf and the capacitor Cf is greater than a preset duration, and the preset duration is the first voltage or the second voltage input duration. 4.根据权利要求1-3任一项所述的偏置电路,其特征在于,所述参考电阻Rf的阻值远远大于所述电阻Rt的阻值。4 . The bias circuit according to claim 1 , wherein the resistance value of the reference resistor Rf is much larger than the resistance value of the resistor Rt. 5 . 5.一种垂直腔面激光发射器VCSEL偏置电路,其特征在于,包括:差分电路、电阻Rd、电阻Rt、PMOS晶体管M0、电阻Rdac、调节电流源Idac、调制电流源、运算放大器、滤波电阻Rf、滤波电容Cf和激光二极管;5. A vertical cavity surface laser emitter VCSEL bias circuit, characterized in that it comprises: a differential circuit, a resistor Rd, a resistor Rt, a PMOS transistor M0, a resistor Rdac, an adjustment current source Idac, a modulation current source, an operational amplifier, a filter Resistor Rf, filter capacitor Cf and laser diode; 所述PMOS晶体管M0的源极连接至直流电压源VCC,所述PMOS晶体管M0的漏极连接至所述电阻Rd的第一端口、所述电阻Rt的第一端口和所述电阻Rdac的第一端口,所述电阻Rdac的第二端口连接至所述运算放大器的同相输入端和所述调节电流源Idac的正极,所述运算放大器的输出端口连接至所述PMOS晶体管M0的栅极,所述电阻Rd的第二端口连接至所述差分电路的第一端口,所述电阻Rt的第二端口连接至所述差分电路的输出端口,所述差分电路的输出端口连接至所述激光二极管的阳极和所述滤波电阻Rf的第一端口,所述滤波电阻Rf的第二端口连接至所述运算放大器的反相输入端和所述滤波电容Cf的第一端口,所述差分电路的第二端口连接至所述调制电流源的正极,所述调节电流源Idac的负极、所述调制电流源的负极、所述激光二极管的阴极和所述滤波电容Cf的第二端口均接地;The source of the PMOS transistor M0 is connected to the DC voltage source VCC, and the drain of the PMOS transistor M0 is connected to the first port of the resistor Rd, the first port of the resistor Rt and the first port of the resistor Rdac port, the second port of the resistor Rdac is connected to the non-inverting input terminal of the operational amplifier and the positive electrode of the regulating current source Idac, the output port of the operational amplifier is connected to the gate of the PMOS transistor M0, the The second port of the resistor Rd is connected to the first port of the differential circuit, the second port of the resistor Rt is connected to the output port of the differential circuit, and the output port of the differential circuit is connected to the anode of the laser diode and the first port of the filter resistor Rf, the second port of the filter resistor Rf is connected to the inverting input terminal of the operational amplifier and the first port of the filter capacitor Cf, the second port of the differential circuit connected to the anode of the modulation current source, the cathode of the modulation current source Idac, the cathode of the modulation current source, the cathode of the laser diode and the second port of the filter capacitor Cf are all grounded; 当所述运算放大器、所述PMOS晶体管M0、所述电阻Rt、所述参考电压源Vref、所述滤波电阻Rf和所述滤波电容Cf构成形的反馈回路稳定时,所述运算放大器的同相输入端的电压和反相输入端的电压相等;When the feedback loop formed by the operational amplifier, the PMOS transistor M0, the resistor Rt, the reference voltage source Vref, the filter resistor Rf and the filter capacitor Cf is stable, the non-inverting input of the operational amplifier The voltage at the terminal is equal to the voltage at the inverting input; 当所述差分电路的第一输入端口和第二输入端口之间的电压为第一电压时,所述激光二极管上的电流Ivcsel=Ibias,When the voltage between the first input port and the second input port of the differential circuit is the first voltage, the current on the laser diode Ivcsel=Ibias, 当所述差分电路的第一输入端口和第二输入端口之间的电压为第二电压时,所述激光二极管上的电流Ivcsel=Ibias-Imod;When the voltage between the first input port and the second input port of the differential circuit is the second voltage, the current on the laser diode Ivcsel=Ibias-Imod; 其中,所述第一电压大于第二电压,所述Ibias=Vref/Rt,所述Imod为所述调制电流源的输出电流,所述调节电流源Idac为输出电流可调节的电流源和/或所述电阻Rdac为阻值可调节电阻。The first voltage is greater than the second voltage, the Ibias=Vref/Rt, the Imod is the output current of the modulating current source, and the modulating current source Idac is a current source with adjustable output current and/or The resistor Rdac is an adjustable resistor. 6.根据权利要求1所述的偏置电路,其特征在于,差分电路包括:三极管Q0、三极管Q1、电阻R0和电阻R16. The bias circuit according to claim 1, wherein the differential circuit comprises: a transistor Q0, a transistor Q1, a resistor R0 and a resistor R1 其中,所述三极管Q0的集电极和基极分别为所述差分电路的第一端口和第一输入端口,所述三极管Q1的集电极和基极分别为所述差分电路的输出端口和第二输入端口,所述三极管Q0的发射极与所述电阻R0的第一端口相连接,所述三极管Q1的发射极与所述电阻R1的第二端口相连接,所述电阻R0的第二端口和所述电阻R1的第一端口均连接至所述调制电流源的正极;The collector and base of the transistor Q0 are the first port and the first input port of the differential circuit, respectively, and the collector and base of the transistor Q1 are the output port and the second input port of the differential circuit, respectively. Input port, the emitter of the transistor Q0 is connected to the first port of the resistor R0, the emitter of the transistor Q1 is connected to the second port of the resistor R1, the second port of the resistor R0 and The first ports of the resistor R1 are all connected to the positive electrode of the modulation current source; 当所述差分电路的第一输入端口和第二输入端口之间的电压为所述第一电压时,所述三极管Q0处于导通状态,所述三极管Q1处于关闭状态;When the voltage between the first input port and the second input port of the differential circuit is the first voltage, the transistor Q0 is in an on state, and the transistor Q1 is in an off state; 当所述差分电路的第一输入端口和第二输入端口之间的电压为所述第二电压时,所述三极管Q0处于关闭状态,所述三极管Q1处于导通状态。When the voltage between the first input port and the second input port of the differential circuit is the second voltage, the transistor Q0 is in an off state, and the transistor Q1 is in an on state. 7.根据权利要求1或2所述的偏置电路,其特征在于,所述电阻Rf和电容Cf构成的时间常数大于预设时长,所述预设时长为所述第一电压或者第二电压的输入时长。7. The bias circuit according to claim 1 or 2, wherein the time constant formed by the resistor Rf and the capacitor Cf is greater than a preset time period, and the preset time period is the first voltage or the second voltage input duration. 8.根据权利要求1-3任一项所述的偏置电路,其特征在于,所述参考电阻Rf的阻值远大于所述电阻Rt的阻值。8 . The bias circuit according to claim 1 , wherein the resistance value of the reference resistor Rf is much larger than the resistance value of the resistor Rt. 9 . 9.一种光发射器,其特征在于,所述光发射器包括如权利要求1-8任一项所述的偏置电路。9. An optical transmitter, characterized in that, the optical transmitter comprises the bias circuit according to any one of claims 1-8. 10.一种光纤收发器,其特征在于,所述光纤收发器包括如权利要求1-8任一项所述的偏置电路,或者如权利要求9所述的光发射器。10 . An optical fiber transceiver, characterized in that, the optical fiber transceiver comprises the bias circuit according to any one of claims 1 to 8 , or the optical transmitter according to claim 9 . 11 .
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