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CN111129117A - How to make a super junction - Google Patents

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CN111129117A
CN111129117A CN201911373592.0A CN201911373592A CN111129117A CN 111129117 A CN111129117 A CN 111129117A CN 201911373592 A CN201911373592 A CN 201911373592A CN 111129117 A CN111129117 A CN 111129117A
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groove
doping
manufacturing
conductivity type
trench
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杨继业
李�昊
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/109Reduced surface field [RESURF] PN junction structures
    • H10D62/111Multiple RESURF structures, e.g. double RESURF or 3D-RESURF structures
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]

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Abstract

本发明公开了一种超级结的制造方法,包括步骤:步骤一、在具有第一导电类型的半导体衬底上形成多个侧面倾斜的沟槽,在沟槽的深度范围内的半导体衬底的掺杂浓度均匀;步骤二、在沟槽中填充具有第二导电类型的第一外延层;沟槽填充工艺设置为:随着外延生长的时间增加,第二导电类型的在位掺杂的浓度逐渐减少,以补偿沟槽的宽度从底部到顶部逐渐增加对各纵向位置的第二导电类型掺杂总量的影响。本发明能采用侧面倾斜的沟槽且能通过沟槽填充工艺来补偿由于侧面倾斜的沟槽对电荷匹配的影响,从而能提高器件的击穿电压。

Figure 201911373592

The invention discloses a method for manufacturing a super junction. The doping concentration is uniform; in step 2, the first epitaxial layer with the second conductivity type is filled in the trench; the trench filling process is set to: as the time of epitaxial growth increases, the concentration of the in-situ doping of the second conductivity type is gradually decreased to compensate for the effect of increasing the width of the trench from bottom to top on the total amount of doping of the second conductivity type at each longitudinal position. The invention can adopt the trench with inclined side and can compensate the influence of the inclined trench on charge matching through the trench filling process, so that the breakdown voltage of the device can be improved.

Figure 201911373592

Description

Method for manufacturing super junction
Technical Field
The present invention relates to a method for manufacturing a semiconductor integrated circuit, and more particularly, to a method for manufacturing a super junction.
Background
The super junction is composed of alternately arranged P-type thin layers, also called P-type pillars (pilar), and N-type thin layers, also called N-type pillars, formed in a semiconductor substrate, and the device employing the super junction is a super junction device such as a super junction MOSFET. The technology of reducing the surface electric field (Resurf) in a body by utilizing the charge balance of the P-type thin layer and the N-type thin layer can improve the reverse breakdown voltage of the device and simultaneously keep smaller on-resistance.
The PN-spaced Pillar structure of the super junction is the biggest characteristic of the super junction. The conventional method for manufacturing the p-n spaced pilar structure mainly comprises two methods, one is obtained by multiple times of epitaxy and ion implantation, and the other is manufactured by deep trench etching and Epitaxy (EPI) filling. The latter method is to fabricate the super junction device by a trench process, in which a trench with a certain depth and width is first etched on an N-type doped epitaxial layer on the surface of a semiconductor substrate, such as a silicon substrate, and then a P-type doped silicon epitaxy is filled on the etched trench by an epitaxial Filling (EPI Filling) method.
For forming the super junction by adopting a trench filling method, the trench with the inclined side surface is usually adopted in the existing method, and the difficulty of trench etching and trench filling can be reduced by adopting the trench with the inclined side surface, so that the process cost can be reduced. However, compared with the trench with vertical side surfaces, the super junction formed by filling the trench with inclined side surfaces has asynchronous charge balance at different depths, thereby causing poor distribution curve of electric field intensity along the depth direction of the trench. As shown in fig. 1, it is a distribution curve 101 of electric field strength of a conventional super junction with vertical trench side along with trench depth; as shown in fig. 2, it is a distribution curve 102 of electric field intensity of the conventional super junction with inclined trench side surface along with trench depth; it can be seen that the electric field intensity distribution in the depth direction of the trench is uniform in the curve 101, whereas the electric field intensity distribution in the depth direction of the trench is non-uniform in the curve 102, so the withstand voltage capability of the curve 101 is stronger. Therefore, although the trench with the inclined side surface can bring about reduction of process difficulty and process cost, the withstand voltage capability of the device is reduced.
Disclosure of Invention
The invention aims to provide a manufacturing method of a super junction, which can adopt a groove with an inclined side surface and can compensate the influence of the groove with the inclined side surface on charge matching through a groove filling process, thereby improving the breakdown voltage of a device.
In order to solve the above technical problem, the method for manufacturing a super junction provided by the present invention comprises the following steps:
providing a semiconductor substrate with a first conductivity type, forming a plurality of grooves on the semiconductor substrate, and enabling the doping concentration of the semiconductor substrate within the depth range of the grooves to be uniform.
The side faces of the groove have an inclined inclination angle and the width of the groove gradually increases from the bottom to the top.
And step two, performing a trench filling process by adopting an epitaxial growth process, filling a first epitaxial layer with a second conductivity type in the trench, forming a second conductivity type column by the first epitaxial layer filled in the trench, forming a first conductivity type column by the semiconductor substrate between the trenches, and alternately arranging the first conductivity type column and the second conductivity type column to form a super junction.
The groove filling process comprises the following steps:
and performing in-situ doping of the second conductivity type in the epitaxial growth process, wherein the concentration of the in-situ doping of the second conductivity type is gradually reduced along with the increase of the time of the epitaxial growth so as to compensate the influence of the gradual increase of the width of the groove from the bottom to the top on the total amount of the second conductivity type doping of each longitudinal position, thereby improving the charge matching between the first conductivity type column and the corresponding second conductivity type column at each longitudinal position.
In a further improvement, the semiconductor substrate is a silicon substrate.
In a further improvement, the first epitaxial layer is a silicon epitaxial layer.
In a further improvement, a second epitaxial layer doped with the first conductivity type is further formed on the semiconductor substrate, and the trench is formed in the second epitaxial layer.
In a further improvement, the second epitaxial layer is a silicon epitaxial layer.
In a further improvement, in the second step, the concentration of the in-situ doping of the second conductivity type is gradually reduced by adjusting the flow rate of the doping gas.
In a further improvement, the flow rate of the dopant gas is linearly tapered during the entire trench filling process.
The further improvement is that the first conductive type is N type, and the second conductive type is P type; the doping gas is P-type doping gas; the P-type dopant gas comprises borane.
The further improvement is that the first conductive type is N type, and the second conductive type is P type; the doping gas is an N-type doping gas.
In a further improvement, in the first step, the sub-step of forming the trench includes:
a hard mask layer is formed on the second epitaxial layer.
And opening the forming area of the groove by adopting a photoetching process.
And sequentially etching the hard mask layer and the second epitaxial layer in the forming area of the groove to form the groove.
In a further improvement, in the second step, the hard mask layer is retained, and the first epitaxial layer selectively grows on the bottom surface and the side surface of the trench except the hard mask layer.
In a further improvement, the material of the hard mask layer comprises an oxide layer or a nitride layer.
In a further improvement, after step two is completed, a chemical mechanical polishing process is performed to remove the first epitaxial layer extending out of the trench.
In a further improvement, the depth of the groove is tens of microns, the width of the top of the groove is several microns, and the inclined angle of the side surface of the groove comprises 88.6 degrees.
In a further improvement, each longitudinal position of the first conductivity type pillar has a doping concentration of a plurality of e15cm-3The total doping amount at each longitudinal position of the first conductivity type pillar is the width of the first conductivity type pillar multiplied by the doping concentration.
The doping concentration of each longitudinal position of the second conductive type column is a plurality of e15cm-3And gradually decreases with decreasing depth, and the total doping amount at each longitudinal position of the second conductive type pillar is the width of the second conductive type pillar multiplied by the doping concentration.
The total doping amount of each longitudinal position of the second conductive type column of the first conductive type column is the same or different within a desired value range.
After the side-inclined groove is adopted, aiming at the adverse effect of the side-inclined groove on the charge matching of the super junction, the in-situ doping concentration in the groove filling process is set, so that the change of the in-situ doping concentration is gradually reduced, and the adverse effect of the side-inclined groove on the charge matching can be compensated, namely the gradual reduction of the in-situ doping can compensate the effect of the width of the groove on the total doping amount of the second conductive type at each longitudinal position, which is gradually increased from the bottom to the top, and finally the total doping amount of the first conductive type at each longitudinal position is matched with the total doping amount of the second conductive type, so that the charge matching between the first conductive type column and the corresponding second conductive type column at each longitudinal position can be improved, and the breakdown voltage of the device can be improved; that is, the invention can adopt the groove with the inclined side surface and can set the change curve of the in-situ doping concentration in the groove filling process according to the influence of the groove with the inclined side surface on the charge matching, thereby compensating the influence of the groove with the inclined side surface on the charge matching and improving the breakdown voltage of the device.
In addition, the method can realize the change adjustment of the in-situ doping concentration by adjusting the flow of the doping gas, and has simple process and better controllability.
Drawings
The invention is described in further detail below with reference to the following figures and detailed description:
FIG. 1 is a graph of electric field strength versus trench depth for a conventional trench-sided vertical super junction;
FIG. 2 is a distribution curve of electric field strength of a conventional trench-side-sloped super junction with trench depth;
FIG. 3 is a flow chart of a method of fabricating a super junction according to an embodiment of the present invention;
FIGS. 4A-4B are schematic diagrams of device structures at various steps of a method for fabricating a super junction according to an embodiment of the present invention;
FIG. 5 is a distribution curve of the widths of two conductive type pillars according to the depth of the voltage-withstanding layer in the method for manufacturing a super junction according to the embodiment of the present invention;
FIG. 6 is a graph of electric field strength versus trench depth for a super junction formed by a method in accordance with an embodiment of the present invention.
Detailed Description
FIG. 3 is a flow chart of a method for fabricating a super junction according to an embodiment of the present invention; fig. 4A to 4B are schematic diagrams of device structures in steps of a method for manufacturing a super junction according to an embodiment of the present invention; the manufacturing method of the super junction comprises the following steps:
step one, as shown in fig. 4A, a semiconductor substrate 1 having a first conductivity type is provided, a plurality of trenches 3 are formed on the semiconductor substrate 1, and the doping concentration of the semiconductor substrate 1 within the depth range of the trenches 3 is uniform.
The side faces of the groove 3 have an inclined inclination and the width of the groove 3 is gradually increased from the bottom to the top.
In the method according to the embodiment of the present invention, a second epitaxial layer 2 doped with a first conductivity type is further formed on the semiconductor substrate 1, and the trench 3 is formed in the second epitaxial layer 2.
The semiconductor substrate 1 is a silicon substrate.
The second epitaxial layer 2 is a silicon epitaxial layer. The subsequently formed first epitaxial layer 4 is also a silicon epitaxial layer.
The sub-steps of forming the trench 3 include:
a hard mask layer is formed on the second epitaxial layer 2. The hard mask layer is made of an oxide layer or a nitride layer.
The formation region of the trench 3 is opened by a photolithography process.
And sequentially etching the hard mask layer and the second epitaxial layer 2 in the forming area of the trench 3 to form the trench 3.
And step two, performing a trench 3 filling process by adopting an epitaxial growth process so as to fill the trench 3 with a first epitaxial layer 4 with a second conductivity type, forming a second conductivity type column 4 by the first epitaxial layer 4 filled in the trench 3, forming a first conductivity type column 2 by the semiconductor substrate 1 between the trenches 3, and forming a super junction by alternately arranging the first conductivity type column 2 and the second conductivity type column 4.
The filling process of the groove 3 is as follows:
in-situ doping of the second conductivity type is carried out in the epitaxial growth process, and the concentration of the in-situ doping of the second conductivity type is gradually reduced along with the increase of the time of the epitaxial growth so as to compensate the influence of the gradual increase of the width of the groove 3 from the bottom to the top on the total amount of the second conductivity type doping of each longitudinal position, thereby improving the charge matching between the first conductivity type column 2 and the corresponding second conductivity type column 4 at each longitudinal position.
In the second step, the concentration of the in-situ doping of the second conductive type is gradually reduced by adjusting the flow rate of the doping gas. Preferably, the flow rate of the dopant gas is linearly decreased gradually during the whole process of filling the trench 3.
In the method of the embodiment of the invention, the first conductive type is N type, and the second conductive type is P type; the doping gas is P-type doping gas; the P-type dopant gas comprises borane (BH 3). For example, when the total fill time is 1800s, the borane is turned off for a linear change from 765sccm to 1275s for the borane flow.
In other embodiments the method can also be: the first conductive type is N type, and the second conductive type is P type; the doping gas is an N-type doping gas.
In the second step, the hard mask layer is reserved, and the first epitaxial layer 4 selectively grows on the bottom surface and the side surface of the trench 3 except the hard mask layer.
After step two is completed, a chemical mechanical polishing process is further performed to remove the first epitaxial layer 4 extending out of the trench 3.
In the method according to the embodiment of the present invention, the depth of the trench 3 is several tens of micrometers, the width of the top of the trench 3 is several micrometers, and the inclination angle of the side surface of the trench 3 is 88.6 °.
The doping concentration of each longitudinal position of the first conductive type column 2 is several e15cm-3The total doping amount at each longitudinal position of the first conductive type column 2 is the width of the first conductive type column 2 multiplied by the doping concentration.
The doping concentration of each longitudinal position of the second conductive type column 4 is several e15cm-3And gradually decreases as the depth decreases, the total doping amount at each longitudinal position of the second conductive type column 4 is the width of the second conductive type column 4 multiplied by the doping concentration.
The total doping amount of each longitudinal position of the second conductive type column 4 of the first conductive type column 2 is the same or different within a desired value range.
After the trench 3 with the inclined side face is adopted, the in-situ doping concentration in the filling process of the trench 3 is set aiming at the adverse effect of the trench 3 with the inclined side face on the charge matching of the super junction, so that the change of the in-situ doping concentration is gradually reduced and the adverse effect of the side face inclination of the trench 3 on the charge matching can be compensated, namely, the gradual reduction of the in-situ doping can compensate the effect of the width of the trench 3 on the total doping amount of the second conductive type at each longitudinal position by gradually increasing from the bottom to the top, and finally, the total doping amount of the first conductive type at each longitudinal position is matched with the total doping amount of the second conductive type, namely, the charge matching between the first conductive type column 2 at each longitudinal position and the corresponding second conductive type column 4 can be improved, and the breakdown voltage of the device can be improved; that is, the invention can adopt the side-inclined trench 3 and can set the change curve of the in-situ doping concentration in the filling process of the trench 3 according to the influence of the side-inclined trench 3 on the charge matching, thereby compensating the influence of the side-inclined trench 3 on the charge matching and improving the breakdown voltage of the device.
In addition, the embodiment of the invention can realize the change adjustment of the in-situ doping concentration by adjusting the flow of the doping gas, and has simple process and better controllability.
For a more clear description of the method of the embodiments of the present invention, reference will now be made to an example of a specific parameter:
the super junction step (Pitch) was 9 μm, the width of the top of the second conductivity type pillar, P-type pillar 4, was 4 μm, the width of the top of the N-type pillar 2 was 5 μm, the depth of the trench 3 was 42 μm, and the side slope angle of the trench 3 was 88.6 degrees. FIG. 5 shows the distribution curve of the widths of two conductive type pillars with the depth of the voltage-withstanding layer in the method for manufacturing a super junction according to the embodiment of the present invention; the abscissa in fig. 5 is the depth of the pressure-resistant layer, the depth of the pressure-resistant layer gradually increases from the surface of the super junction to the inside, and the column width is the width of the N-type column 2 and the P-type column 4; the curve 201 is a curve of the width of the N-type column 2 along with the depth of the pressure-resistant layer, and it can be seen that the deeper the depth of the N-type column 2, the larger the width; the curve 202 is a variation curve of the width of the P-type column 4 with the depth of the dielectric layer, and it can be seen that the deeper the depth of the P-type column 4, the smaller the width. As can be seen from fig. 5, the ratio of the widths of the P-type pillars 4 and the N-type pillars 2 at each longitudinal position of the super junction is as shown in table one:
watch 1
Longitudinal position Depth of field Width ratio of P and N type column
Top part 0μm 4:5
Intermediate (II) 21μm 3:6
Bottom part 42μm 2:7
According to the trench size setting of table one, the super junction formed by filling the trench by the existing method has the charge matching relationship shown in table two as follows:
watch two
Figure BDA0002340330550000061
Figure BDA0002340330550000071
As can be seen from table two, the doping concentration of the P-type column 4 at each longitudinal position is fixed, which causes the total doping amount of each longitudinal position of the P-type column 4 to vary with the width of the P-type column 4, and under the condition that the charge matching at the middle position, i.e., the charge mismatch is 0, there are large charge mismatches at the top and the bottom of the trench, respectively, which are + 60% and-42%, respectively, and the poor charge mismatch finally has an adverse effect on the breakdown voltage of the device.
Similarly, according to the size of the trench 3 in table one, the super junction formed by filling the trench by the method of the embodiment of the present invention has the following charge matching relationship shown in table three:
watch III
Figure BDA0002340330550000072
As can be seen from table three, the doping concentration of the P-type columns 4 at the longitudinal positions changes with the depth, and the change with the depth is set according to how to reduce the charge mismatch, and it can be seen that after the doping concentration of the P-type columns 4 is changed, the total doping amount of the P-type columns 4 at the longitudinal positions and the total doping amount of the N-type columns 2 are equal or have a difference reduced, and finally, it can be seen that the charge mismatch at the top and the middle of the trench 3 is 0, that is, the optimum charge match is achieved, and the total doping amount of the P-type column 4 at the bottommost is improved, so that the charge mismatch is reduced. As can be seen from comparison with Table II, the method of the embodiment of the present invention can obtain better charge matching.
As shown in fig. 6, which is a distribution curve of the electric field strength of the super junction formed by the method according to the embodiment of the present invention with the depth of the trench, a curve 103 in fig. 6 is a distribution curve of the electric field strength of the super junction formed by the method according to the embodiment of the present invention with the depth of the trench, and in order to compare with the conventional filling method for the inclined side surface of the trench, a curve 102 is also shown in fig. 6, it can be seen that the distribution of the electric field strength of the curve 103 in the longitudinal direction of the trench is more uniform, and the area surrounded by the electric field strength is larger, so that the.
The present invention has been described in detail with reference to the specific embodiments, but these should not be construed as limitations of the present invention. Many variations and modifications may be made by one of ordinary skill in the art without departing from the principles of the present invention, which should also be considered as within the scope of the present invention.

Claims (15)

1. A method for manufacturing a super junction is characterized by comprising the following steps:
providing a semiconductor substrate with a first conductivity type, forming a plurality of grooves on the semiconductor substrate, wherein the doping concentration of the semiconductor substrate in the depth range of the grooves is uniform;
the side surface of the groove has an inclined inclination angle and the width of the groove is gradually increased from the bottom to the top;
step two, an epitaxial growth process is adopted to carry out a groove filling process, so that a first epitaxial layer with a second conductivity type is filled in the groove, the first epitaxial layer filled in the groove forms a second conductivity type column, the semiconductor substrate between the grooves forms a first conductivity type column, and the first conductivity type column and the second conductivity type column are alternately arranged to form a super junction;
the groove filling process comprises the following steps:
and performing in-situ doping of the second conductivity type in the epitaxial growth process, wherein the concentration of the in-situ doping of the second conductivity type is gradually reduced along with the increase of the time of the epitaxial growth so as to compensate the influence of the gradual increase of the width of the groove from the bottom to the top on the total amount of the second conductivity type doping of each longitudinal position, thereby improving the charge matching between the first conductivity type column and the corresponding second conductivity type column at each longitudinal position.
2. The method of manufacturing a superjunction according to claim 1, wherein: the semiconductor substrate is a silicon substrate.
3. The method of manufacturing a superjunction according to claim 2, wherein: the first epitaxial layer is a silicon epitaxial layer.
4. The method of manufacturing a superjunction according to claim 2, wherein: a second epitaxial layer doped with the first conductivity type is further formed on the semiconductor substrate, and the trench is formed in the second epitaxial layer.
5. The method of manufacturing a superjunction according to claim 4, wherein: the second epitaxial layer is a silicon epitaxial layer.
6. The method of manufacturing a super junction according to claim 5, wherein: in the second step, the concentration of the in-situ doping of the second conductive type is gradually reduced by adjusting the flow rate of the doping gas.
7. The method of manufacturing a super junction according to claim 6, wherein: and the flow of the doping gas is linearly and gradually reduced in the whole process of the groove filling process.
8. The method of manufacturing a superjunction according to claim 7, wherein: the first conductive type is N type, and the second conductive type is P type; the doping gas is P-type doping gas; the P-type dopant gas comprises borane.
9. The method of manufacturing a superjunction according to claim 7, wherein: the first conductive type is N type, and the second conductive type is P type; the doping gas is an N-type doping gas.
10. The method of manufacturing a superjunction according to claim 1, wherein: in the first step, the sub-step of forming the trench includes:
forming a hard mask layer on the second epitaxial layer;
opening a forming area of the groove by adopting a photoetching process;
and sequentially etching the hard mask layer and the second epitaxial layer in the forming area of the groove to form the groove.
11. The method of manufacturing a superjunction according to claim 10, wherein: in the second step, the hard mask layer is reserved, and the first epitaxial layer selectively grows on the bottom surface and the side face of the groove outside the hard mask layer.
12. The method of manufacturing a superjunction according to claim 10, wherein: the hard mask layer is made of an oxide layer or a nitride layer.
13. The method of manufacturing a superjunction according to claim 10, wherein: after the second step is completed, a chemical mechanical polishing process is further performed to remove the first epitaxial layer extending out of the trench.
14. The method of manufacturing a superjunction according to claim 1, wherein: the depth of the groove is tens of micrometers, the width of the top of the groove is several micrometers, and the inclined angle of the side surface of the groove comprises 88.6 degrees.
15. The method of manufacturing a superjunction according to claim 1, wherein:
the doping concentration of each longitudinal position of the first conductive type column is a plurality of e15cm-3The total doping amount of each longitudinal position of the first conductive type column is the first conductive typeThe width of the pillar multiplied by the doping concentration;
the doping concentration of each longitudinal position of the second conductive type column is a plurality of e15cm-3And gradually decreases with decreasing depth, the total doping amount at each longitudinal position of the second conductivity type pillar being the width of the second conductivity type pillar multiplied by the doping concentration;
the total doping amount of each longitudinal position of the second conductive type column of the first conductive type column is the same or different within a desired value range.
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CN114023666A (en) * 2021-10-18 2022-02-08 上海华虹宏力半导体制造有限公司 Method for judging in-plane charge balance state distribution of super junction device
CN116092917A (en) * 2022-12-07 2023-05-09 浙江大学杭州国际科创中心 Inclined super junction structure, manufacturing method thereof and semiconductor device

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CN112002750A (en) * 2020-08-26 2020-11-27 上海华虹宏力半导体制造有限公司 Super junction and method of making the same
CN112002750B (en) * 2020-08-26 2024-01-23 上海华虹宏力半导体制造有限公司 Super knot and its manufacturing method
CN114023666A (en) * 2021-10-18 2022-02-08 上海华虹宏力半导体制造有限公司 Method for judging in-plane charge balance state distribution of super junction device
CN116092917A (en) * 2022-12-07 2023-05-09 浙江大学杭州国际科创中心 Inclined super junction structure, manufacturing method thereof and semiconductor device

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