CN111008509B - Method and device for optimizing signal integrity simulation - Google Patents
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- CN111008509B CN111008509B CN201910957813.2A CN201910957813A CN111008509B CN 111008509 B CN111008509 B CN 111008509B CN 201910957813 A CN201910957813 A CN 201910957813A CN 111008509 B CN111008509 B CN 111008509B
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Abstract
The invention provides a method for optimizing signal integrity simulation, which comprises the following steps: segmenting discontinuous positions of the measurement signals in the transmission design; respectively analyzing the influence value of the factors of each section on the eye height and/or the eye width according to the influence analysis method of the corresponding factors influencing the signal integrity; and sorting all the influence values to obtain the influence value of each factor influencing the integrity of the signal on the eye height and/or eye width simulated by the measurement signal. The invention separates the loss, crosstalk, reflection and the like which influence the integrity of signals in the signal transmission link, can optimize the design in a targeted manner, improves the optimization efficiency and can save the cost.
Description
Technical Field
The present invention relates to the field of electronic design, and more particularly, to a method and apparatus for optimizing signal integrity simulation.
Background
In the field of electronic design, a circuit board is a physical carrier of all electronic design contents, so that the electronic design is intended to be realized through the circuit board, and the circuit board design is an indispensable link in any electronic equipment. The circuit board design is mainly divided into two parts, signal design and power supply design. The power supply is designed as the design basis of the whole circuit board, and all chips can normally work only by a stable power supply. The signal design is a soul designed for the circuit board, the realization of various functions is controlled by the signal, and the quality of the signal design is related to the realization and the stability of each function of the circuit board.
The traditional signal integrity design method carries out time domain simulation on a high-speed signal, and judges the quality of a high-speed link design by evaluating whether the eye height, the eye width and the like meet the requirements of an eye pattern template. Fig. 1 shows a schematic diagram of a simulation design of the integrity of a conventional signal, in which a signal 2 is a signal to be studied, a signal 1 is an interference signal, and a simulation method at the present stage is to place an interference source on the left side of the signal 1, terminate the right side of the signal 1 with a resistor, connect a simulation model of a transmitting-end chip on the left side of the signal 2, and connect a simulation model of a receiving-end chip on the right side of the signal 2. And after the connection is finished, performing simulation, and judging whether the signal is good or not according to the simulated eye height, eye width and the like. When the eye height and eye width do not meet the design requirements, the design is improved by shortening the link, using better PCB materials, etc. to reduce losses.
The prior art has certain design limitation, and factors influencing a signal eye diagram comprise loss, crosstalk, reflection and other aspects. Simply by shortening the link, the design cost is increased by using better PCB materials and other methods to reduce loss, and when crosstalk, reflection and the like in the link play a decisive role, the improvement effect is smaller if only the loss is simply reduced.
Disclosure of Invention
In view of this, an object of the embodiments of the present invention is to provide a method for optimizing a signal integrity design, by which loss, crosstalk, reflection, and the like affecting signal integrity in a signal transmission link are separated, so that design can be optimized in a targeted manner, optimization efficiency is improved, and cost can be saved.
Based on the above object, an aspect of the embodiments of the present invention provides a method for optimizing signal integrity simulation, including the following steps:
segmenting discontinuous positions of the measurement signals in the transmission design;
respectively analyzing the influence value of the factors of each section on the eye height and/or the eye width according to the influence analysis method of the corresponding factors influencing the signal integrity;
and sorting all the influence values to obtain the influence value of each factor influencing the integrity of the signal on the eye height and/or eye width simulated by the measurement signal.
In some embodiments, the factors that affect signal integrity include crosstalk, loss, and reflection.
In some embodiments, the analyzing the influence of the factors on the eye height and/or eye width of each segment respectively according to the influence analysis method of the corresponding factors influencing the signal integrity comprises:
analyzing the influence of crosstalk, decomposing an interference signal and a test signal into the same sections, simulating the test signal to obtain a first eye height and/or eye width, and simulating a second eye height and/or eye width after filtering the crosstalk of the interference signal to the test signal;
subtracting the second eye height and/or eye width by the first eye height and/or eye width results in the effect of crosstalk on the crosstalk-filtered segment.
In some embodiments, the analyzing the influence of the factors on the eye height and/or eye width of each segment further comprises:
for the influence analysis of loss, the test signals are designed to have the same impedance at each section, the test signals with the same impedance are simulated to obtain a third eye height and/or eye width, and the test signals with the same impedance are removed for one section to simulate a fourth eye height and/or eye width;
subtracting the fourth eye height and/or width by the third eye height and/or width results in the effect of losses on the removed segments.
In some embodiments, the analyzing the influence of the factors on the eye height and/or eye width of each segment further comprises:
for the influence analysis of reflection, simulating the test signal to obtain a fifth eye height and/or eye width, and simulating a sixth eye height and/or eye width after removing a section of the test signal;
subtracting the sixth eye height and/or width by the fifth eye height and/or width results in losses and the effect of reflections on the removed segments.
In some embodiments, the analyzing of the effect on the reflection further comprises:
subtracting the effect of the loss on the removed segment from the effect of the loss and reflection on the removed segment to obtain the effect of reflection on the removed segment.
In some embodiments, the interference signal is terminated with a resistor on one side to place the interference source.
In some embodiments, sorting all the influence values to obtain the influence value of each of the factors affecting the signal integrity on the eye height and/or eye width of the measurement signal simulation comprises:
and sorting all the influence values to obtain the influence value of each factor influencing the signal integrity on the eye height and/or eye width simulated by each section of the measurement signal.
In some embodiments, sorting all the influence values to obtain the influence value of each of the factors affecting the signal integrity on the eye height and/or eye width of the measurement signal simulation further comprises:
and sorting all the influence values to obtain the influence value of each factor influencing the signal integrity on the total eye height and/or eye width of all the sections of the measured signal simulation.
Another aspect of the embodiments of the present invention provides an apparatus for optimizing signal integrity simulation, including:
at least one processor; and
a memory storing program code executable by the processor, the program code implementing the method of any of the above when executed by the processor.
The invention has the following beneficial technical effects: the method and the device for optimizing the signal integrity simulation separate loss, crosstalk, reflection and the like which affect the signal integrity in a signal transmission link, and decompose the influence of the crosstalk, the loss and the reflection of each segment on the eye height and the eye width, so that the influence data of each segment on the design can be visually obtained.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other embodiments can be obtained by using the drawings without creative efforts.
FIG. 1 is a schematic diagram of a prior art signal integrity simulation design;
FIG. 2 is a flow chart of a method of optimizing signal integrity simulations in accordance with the present invention;
FIG. 3 is a schematic diagram of an improved signal integrity simulation design according to the present invention;
FIG. 4 is a schematic diagram of an equivalent simulation link for signals 1 and 2 according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of an equivalent simulation link after removing the crosstalk effect of segment 6 on segment 2 according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of a loss impact analysis according to an embodiment of the invention;
FIG. 7 is a schematic diagram of loss and reflection impact analysis according to an embodiment of the present invention;
FIG. 8 is a schematic diagram of the overall impact factor of eye height according to an embodiment of the invention;
FIG. 9 is a graphical illustration of an eye width overall effect factor according to an embodiment of the invention;
FIG. 10 is a schematic diagram of the effect of loss of segments 1, 2, 3, 4 on eye height according to an embodiment of the present invention;
FIG. 11 is a schematic illustration of the effect of loss of segments 1, 2, 3, 4 on eye width according to an embodiment of the present invention;
fig. 12 is a schematic diagram of a hardware structure of an apparatus for optimizing signal integrity simulation according to the present invention.
Detailed Description
Embodiments of the present invention are described below. However, it is to be understood that the disclosed embodiments are merely examples and that other embodiments may take various and alternative forms. The figures are not necessarily to scale; certain features may be exaggerated or minimized to show details of particular components. Therefore, specific structural and functional details disclosed herein are not to be interpreted as limiting, but merely as a representative basis for teaching one skilled in the art to variously employ the present invention. As one of ordinary skill in the art will appreciate, various features illustrated and described with reference to any one of the figures may be combined with features illustrated in one or more other figures to produce embodiments that are not explicitly illustrated or described. The combination of features shown provides a representative embodiment for a typical application. However, various combinations and modifications of the features consistent with the teachings of the present invention may be desired for certain specific applications or implementations.
In order to make the objects, technical solutions and advantages of the present invention more apparent, the following embodiments of the present invention are described in further detail with reference to the accompanying drawings.
In view of the above object, an aspect of the embodiments of the present invention provides a method for optimizing signal integrity simulation, as shown in fig. 2, including the following steps:
step S201: segmenting discontinuous positions of the measurement signals in the transmission design;
step S202: respectively analyzing the influence value of the factors of each section on the eye height and/or the eye width according to the influence analysis method of the corresponding factors influencing the signal integrity;
step S202: and sorting all the influence values to obtain the influence value of each factor influencing the integrity of the signal on the eye height and/or eye width simulated by the measurement signal.
In some embodiments, the factors that affect signal integrity include crosstalk, loss, and reflection.
In some embodiments, the analyzing the influence of the factors on the eye height and/or eye width of each segment respectively according to the influence analysis method of the factors affecting the signal integrity comprises: analyzing the influence of crosstalk, decomposing an interference signal and a test signal into the same sections, simulating the test signal to obtain a first eye height and/or eye width, and simulating a second eye height and/or eye width after filtering the crosstalk of the interference signal to the test signal; subtracting the second eye height and/or eye width by the first eye height and/or eye width results in the effect of crosstalk on the crosstalk-filtered segment.
In some embodiments, the analyzing the influence of the factors on the eye height and/or eye width of each segment further comprises: for the influence analysis of loss, the test signal (the original test signal) is designed to have the same impedance in each section, the test signal with the same impedance is simulated to obtain a third eye height and/or eye width, and the test signal with the same impedance is removed from each section to simulate a fourth eye height and/or eye width; subtracting the fourth eye height and/or width by the third eye height and/or width results in the effect of losses on the removed segments.
In some embodiments, the analyzing the influence of the factors on the eye height and/or eye width of each segment further comprises: for the influence analysis of reflection, simulating the test signal (the original test signal) to obtain a fifth eye height and/or eye width, and simulating a sixth eye height and/or eye width after removing a section of the test signal; subtracting the sixth eye height and/or width by the fifth eye height and/or width results in losses and the effect of reflections on the removed segments.
In some embodiments, the analysis of the effect on the reflection further comprises: subtracting the effect of the loss on the removed segment from the effect of the loss and reflection on the removed segment to obtain the effect of reflection on the removed segment.
In some embodiments, the interference signal is terminated with a resistor on one side to place the interference source.
In some embodiments, sorting all the influence values to obtain the influence value of each of the factors affecting the signal integrity on the eye height and/or eye width of the measurement signal simulation comprises: and sorting all the influence values to obtain the influence value of each factor influencing the signal integrity on the eye height and/or eye width simulated by each section of the measurement signal.
In some embodiments, sorting all the influence values to obtain the influence value of each of the factors affecting the signal integrity on the eye height and/or eye width of the measurement signal simulation further comprises: and sorting all the influence values to obtain the influence value of each factor influencing the signal integrity on the total eye height and/or eye width of all the sections of the measured signal simulation.
In an embodiment according to the present invention, as shown in fig. 3, a schematic diagram of an improved signal integrity simulation design is shown. First, crosstalk influence analysis is performed: the signal 1 (interference signal) is also decomposed into the same segments as the signal 2 (signal to be tested), and the influence of 5, 6, 7 and 8 on 1, 2, 3 and 4 is simulated and analyzed respectively. The effect of 6 on 2 is now analyzed as follows: the equivalent simulation chain of signal 1 and signal 2 is shown in fig. 4: the eye height EH1 and eye width EW1 for this case were simulated. A simulation diagram after 6-to-2 crosstalk is filtered out and loss and reflection is retained is shown in fig. 5, and the eye height EH2 and the eye width EW2 are simulated at this time. Then EH2-EH1 are both 6 for 2-eye high crosstalk and EW2-EW1 are both 6 for 2-eye wide crosstalk. The same can be concluded that 1, 3, 4 are affected by crosstalk.
Next, the influence of the loss was analyzed: as shown in fig. 6, scheme 1 designs the impedances of 1, 2, 3, 4 to be identical, but with losses that are identical to the respective portions of signal 2 in fig. 2, respectively. Scheme 2 removes transmission line 2 from scheme 1. Carrying out simulation analysis on the scheme 1 to obtain the eye height EH3 and the eye width EW 3; simulation analysis is performed on the scheme 2, and the eye height EH4 and the eye height EW4 are obtained, so that the influence caused by the loss of the transmission line 2 is the eye height: EH3-EH4, eye width: EW3-EW 4.
And finally analyzing the influence of the reflection: as shown in fig. 7, simulation analysis is performed on scheme 3 to obtain eye height EH5 and eye width EW5, and then simulation analysis is performed on scheme 4 after the influence of the transmission line 2 is removed to obtain eye height EH6 and eye width EW 6. The effect of the loss plus reflection from the transmission line 2 can be calculated as: eye height EH5-EH6, eye width EW5-EW 6. The influence due to the loss has been found to be that the reflection by the transmission line 2 has an effect on the eye height equal to EH5-EH6- (EH3-EH4) and on the eye width equal to EW5-EW6- (EW3-EW 4).
The same analysis applies to 1, 3, and 4, and the effects of crosstalk, loss, and reflection on 1, 3, and 4 can be obtained in the same manner.
Through the above analysis, the crosstalk, loss and reflection analysis data received by the eye height and eye width of the signal 2 are integrated to obtain the following total influence factor schematic diagrams of the eye height and eye width as shown in fig. 8 and 9, and the influence of the loss, crosstalk and reflection on the eye height and eye width can be seen from the diagrams respectively, so that the design can be improved according to the design requirement and the influence of each parameter.
Meanwhile, the influence of loss, crosstalk and reflection of 1, 2, 3 and 4 on the eye height and the eye width can be separated to make a chart, the influence of each section of design on the eye height and the eye width can be quickly seen, and the design improvement can be carried out on places with larger influence and improvement. Fig. 10 and 11 show the effect of losses 1, 2, 3, 4 on eye height and eye width, and similarly, the effect of crosstalk and reflection on eye height and eye width can be shown.
Where technically feasible, the technical features listed above for the different embodiments may be combined with each other or changed, added, omitted, etc. to form further embodiments within the scope of the invention.
It can be seen from the above embodiments that the method for optimizing signal integrity simulation provided by the embodiments of the present invention can obtain their influence data intuitively by decomposing the influence of crosstalk, loss, and reflection of signals on eye height and eye width, so as to improve the influence data in a targeted manner, and greatly save the cost compared with the conventional method for directly improving loss; the influence of crosstalk, loss and reflection of each subsection on the eye height and the eye width is decomposed, so that the influence data of each subsection on the design can be visually obtained, the part with larger influence can be improved according to the influence data size of different subsections, and the design improvement efficiency is greatly improved.
In view of the above objects, in another aspect of the embodiments of the present invention, an embodiment of an apparatus for optimizing signal integrity simulation is provided.
The apparatus for optimizing signal integrity simulation comprises a memory and at least one processor, the memory stores a computer program capable of running on the processor, and the processor executes the computer program to execute any one of the above methods.
Fig. 12 is a schematic diagram of a hardware structure of an embodiment of the apparatus for optimizing signal integrity simulation according to the present invention.
Taking the computer device shown in fig. 12 as an example, the computer device includes a processor 1201 and a memory 1202, and may further include: an input device 1203 and an output device 1204.
The processor 1201, the memory 1202, the input device 1203, and the output device 1204 may be connected by a bus or other means, and the bus connection is exemplified in fig. 12.
The memory 1202 may include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function; the storage data area may store data created according to a method of optimizing signal integrity simulation, and the like. Further, the memory 1202 may include high speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid state storage device. In some embodiments, the memory 1202 may optionally include memory located remotely from the processor 1201, which may be connected to the local module via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The input device 1203 may receive input numeric or character information and generate key signal inputs related to user settings and function controls of the computer apparatus that optimize the method of signal integrity simulation. The output device 1204 may include a display device such as a display screen.
Program instructions/modules corresponding to the one or more methods of optimizing signal integrity simulation are stored in the memory 1202 and, when executed by the processor 1201, perform the method of optimizing signal integrity simulation in any of the above-described method embodiments.
Any embodiment of the computer device for performing the method for optimizing signal integrity simulation may achieve the same or similar effects as any corresponding method embodiment described above.
Finally, it should be noted that, as will be understood by those skilled in the art, all or part of the processes in the methods of the above embodiments may be implemented by a computer program, which may be stored in a computer-readable storage medium, and when executed, may include the processes of the embodiments of the methods described above. The storage medium may be a magnetic disk, an optical disk, a read-only memory (ROM), a Random Access Memory (RAM), or the like.
In addition, the apparatuses, devices and the like disclosed in the embodiments of the present invention may be various electronic terminal devices, such as a mobile phone, a Personal Digital Assistant (PDA), a tablet computer (PAD), a smart television and the like, or may be a large terminal device, such as a server and the like, and therefore the scope of protection disclosed in the embodiments of the present invention should not be limited to a specific type of apparatus, device. The client disclosed in the embodiment of the present invention may be applied to any one of the above electronic terminal devices in the form of electronic hardware, computer software, or a combination of both.
Furthermore, the method disclosed according to an embodiment of the present invention may also be implemented as a computer program executed by a CPU, which may be stored in a computer-readable storage medium. The computer program, when executed by the CPU, performs the above-described functions defined in the method disclosed in the embodiments of the present invention.
Further, the above method steps and system elements may also be implemented using a controller and a computer readable storage medium for storing a computer program for causing the controller to implement the functions of the above steps or elements.
Further, it should be appreciated that the computer-readable storage media (e.g., memory) described herein can be either volatile memory or nonvolatile memory, or can include both volatile and nonvolatile memory. By way of example, and not limitation, nonvolatile memory can include Read Only Memory (ROM), Programmable ROM (PROM), Electrically Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM), which can act as external cache memory. By way of example and not limitation, RAM is available in a variety of forms such as synchronous RAM (DRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), Enhanced SDRAM (ESDRAM), Synchronous Link DRAM (SLDRAM), and Direct Rambus RAM (DRRAM). The storage devices of the disclosed aspects are intended to comprise, without being limited to, these and other suitable types of memory.
Those of skill would further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the disclosure herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as software or hardware depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the disclosed embodiments of the present invention.
The various illustrative logical blocks, modules, and circuits described in connection with the disclosure herein may be implemented or performed with the following components designed to perform the functions described herein: a general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination of these components. A general purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP, and/or any other such configuration.
The steps of a method or algorithm described in connection with the disclosure herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC. The ASIC may reside in a user terminal. In the alternative, the processor and the storage medium may reside as discrete components in a user terminal.
In one or more exemplary designs, the functions may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media may be any available media that can be accessed by a general purpose or special purpose computer. By way of example, and not limitation, such computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a general-purpose or special-purpose computer, or a general-purpose or special-purpose processor. Also, any connection is properly termed a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, Digital Subscriber Line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of medium. Disk and disc, as used herein, includes Compact Disc (CD), laser disc, optical disc, Digital Versatile Disc (DVD), floppy disk, blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.
It should be understood that, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly supports the exception. It should also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items.
The numbers of the embodiments disclosed in the embodiments of the present invention are merely for description, and do not represent the merits of the embodiments.
It will be understood by those skilled in the art that all or part of the steps for implementing the above embodiments may be implemented by hardware, or may be implemented by a program instructing relevant hardware, where the program may be stored in a computer-readable storage medium, and the storage medium may be a read-only memory, a magnetic disk, an optical disk, or the like.
The above-described embodiments are possible examples of implementations and are presented merely for a clear understanding of the principles of the invention. Those of ordinary skill in the art will understand that: the discussion of any embodiment above is meant to be exemplary only, and is not intended to intimate that the scope of the disclosure, including the claims, of embodiments of the invention is limited to these examples; within the idea of an embodiment of the invention, also technical features in the above embodiment or in different embodiments may be combined and there are many other variations of the different aspects of an embodiment of the invention as described above, which are not provided in detail for the sake of brevity. Therefore, any omissions, modifications, substitutions, improvements, and the like that may be made without departing from the spirit and principles of the embodiments of the present invention are intended to be included within the scope of the embodiments of the present invention.
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