CN110943034A - Method of forming a semiconductor structure - Google Patents
Method of forming a semiconductor structure Download PDFInfo
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- CN110943034A CN110943034A CN201811107074.XA CN201811107074A CN110943034A CN 110943034 A CN110943034 A CN 110943034A CN 201811107074 A CN201811107074 A CN 201811107074A CN 110943034 A CN110943034 A CN 110943034A
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/032—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers
- H10W20/042—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers
- H10W20/045—Manufacture or treatment of conductive parts of the interconnections of conductive barrier, adhesion or liner layers the barrier, adhesion or liner layers being seed or nucleation layers for deposition from the gaseous phase, e.g. for chemical vapour deposition [CVD]
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/031—Manufacture or treatment of conductive parts of the interconnections
- H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
- H10W20/059—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches by reflowing or applying pressure
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Abstract
本发明提供一种半导体结构的形成方法，包括：提供一基底；形成介电层于所述基底上，所述介电层中具有沟槽；在所述介电层及所述沟槽的表面形成阻挡层；以及在所述阻挡层上形成金属层；其中，所述形成金属层的步骤包括：通入第一气体和第二气体进行预处理，在所述阻挡层上形成浸润层；通入第一气体和第二气体，在所述浸润层上沉积形成金属种子层；以及持续通入氢气，并以脉冲的方式通入第三气体，在所述金属种子层上循环沉积形成块状金属薄膜。本发明的形成方法可有效提高金属沉积工艺的填洞能力，减少空隙出现的机率并降低金属薄膜的接触电阻，进而提高产品的良率。
The present invention provides a method for forming a semiconductor structure, comprising: providing a substrate; forming a dielectric layer on the substrate, wherein the dielectric layer has a groove; and forming a surface of the dielectric layer and the groove forming a barrier layer; and forming a metal layer on the barrier layer; wherein, the step of forming the metal layer includes: passing a first gas and a second gas for pretreatment, and forming a wetting layer on the barrier layer; The first gas and the second gas are introduced, and a metal seed layer is deposited on the wetting layer; and hydrogen is continuously introduced, and the third gas is introduced in a pulsed manner, and the metal seed layer is cyclically deposited to form a block. metal film. The formation method of the present invention can effectively improve the hole filling capability of the metal deposition process, reduce the probability of the occurrence of voids and reduce the contact resistance of the metal film, thereby improving the yield of the product.
Description
Technical Field
The present invention relates to the field of semiconductor manufacturing, and more particularly, to a method for forming a semiconductor structure.
Background
With the continuous development of semiconductor technology, chemical vapor deposition (CVD W) and/or atomic vapor deposition (ALD W) are used to deposit tungsten metal, which is widely used in semiconductor device fabrication for metal interconnection filling layer. As device dimensions continue to shrink, the aspect ratios of contact and via holes continue to grow, which presents challenges to the tungsten deposition process.
At present, the bulk tungsten film is formedIn general, H is2And WF6Meanwhile, when the metal material is introduced into a reaction cavity, an overhang (overhang) is formed in the deposition mode, so that gaps (Void) exist in the contact holes and the through holes, on one hand, contact resistance is overlarge, and on the other hand, the gaps originally sealed can be opened after a subsequent Chemical Mechanical Polishing (CMP) process, so that defects appear, and the yield of products is influenced.
Therefore, a need exists for a new semiconductor structure and method of forming the same that overcomes the above-mentioned problems.
It is noted that the information disclosed in the foregoing background section is only for enhancement of background understanding of the invention and therefore it may contain information that does not constitute prior art that is already known to a person of ordinary skill in the art.
Disclosure of Invention
The invention mainly aims to provide an improved method for forming a semiconductor structure aiming at the defects of the prior art, and the probability of generating gaps in a through hole and a contact hole is reduced.
In order to achieve the purpose, the invention adopts the following technical scheme:
a method of forming a semiconductor structure, comprising:
providing a substrate;
forming a dielectric layer on the substrate, wherein the dielectric layer is provided with a groove;
forming a barrier layer on the surfaces of the dielectric layer and the groove; and
forming a metal layer on the barrier layer;
wherein the step of forming the metal layer comprises:
introducing a first gas and a second gas for pretreatment, and forming a wetting layer on the barrier layer;
introducing a first gas and a second gas, and depositing on the wetting layer to form a metal seed layer; and
and continuously introducing hydrogen, introducing a third gas in a pulse mode, and circularly depositing on the metal seed layer to form a bulk metal film.
According to one embodiment of the invention, the time of the pretreatment is 5-20 s.
According to one embodiment of the invention, the thickness of the wetting layer is 0.1-5 nm.
According to one embodiment of the present invention, the first gas and the second gas are pulsed for 2 to 16 cycles when the metal seed layer is formed.
According to an embodiment of the invention, when the metal seed layer is formed, the time of each time of the first gas is 1-5 s, the time interval between the first gas and the second gas is 1-10 s, the time of each time of the second gas is 0.2-5 s, and the time interval between the second gas and the second gas is 1-10 s.
According to one embodiment of the present invention, the flow rate of the first gas is 100 to 600sccm, and the flow rate of the second gas is 100 to 500 sccm.
According to one embodiment of the present invention, the metal seed layer is deposited under a pressure of 20 to 60torr and at a temperature of 200 to 500 ℃.
According to one embodiment of the present invention, the thickness of the metal seed layer is 2 to 10 nm.
According to an embodiment of the invention, each time of the third gas is introduced for 0.2 to 20 seconds, and the time interval between the third gas and the third gas is 1 to 10 seconds.
According to an embodiment of the present invention, the flow rate of the hydrogen gas is 1000 to 6000sccm, and the flow rate of the third gas is 100 to 500 sccm.
According to one embodiment of the invention, the pressure of the cyclic deposition is 20-60 torr, and the temperature is 200-500 ℃.
According to one embodiment of the present invention, the thickness of the bulk metal thin film is 20 to 100 nm.
According to one embodiment of the invention, the metal layer is a tungsten layer.
According to one embodiment of the present invention, the first gas is a silane gas or a borane gas, and the second gas and the third gas are both tungsten hexafluoride gases.
The forming method of the semiconductor structure of the invention is to introduce the raw material gas containing the metal element in a pulse mode at the deposition stage of the massive metal film, which can effectively improve the hole filling capability of the metal deposition process, reduce the probability of the occurrence of gaps, reduce the contact resistance of the metal film and further improve the yield of products.
Drawings
FIGS. 1 a-1 d are schematic cross-sectional views of a tungsten deposition process at various stages of the prior art;
FIG. 2 is a schematic view illustrating a gas introduction state during formation of a bulk tungsten film in a tungsten deposition process according to the prior art;
FIGS. 3 a-3 d are schematic cross-sectional views of various stages of a metal deposition process according to one embodiment of the present invention;
FIG. 4 is a schematic view illustrating a gas introduction state during formation of a bulk metal film in a metal deposition process according to an embodiment of the present invention;
wherein the reference numerals are as follows:
100. 200: substrate
110. 210: dielectric layer
120. 220, and (2) a step of: barrier layer
131. 231: a wetting layer:
132. 232: tungsten seed layer
133. 233: bulk tungsten film
140: voids
F: fluoride ion
Detailed Description
The present invention is described in further detail below by way of specific embodiments in conjunction with the attached drawings, it being understood that the specific embodiments described herein are merely illustrative and explanatory of the invention and do not limit the invention in any way.
In the present invention, anything or matters not mentioned is directly applicable to those known in the art without any change except those explicitly described. Moreover, any embodiment described herein may be freely combined with one or more other embodiments described herein, and the technical solutions or ideas thus formed are considered part of the original disclosure or original description of the present invention, and should not be considered as new matters not disclosed or contemplated herein, unless a person skilled in the art would consider such combination to be clearly unreasonable.
All features disclosed in this invention may be combined in any combination and such combinations are understood to be disclosed or described herein unless a person skilled in the art would consider such combinations to be clearly unreasonable. The numerical points disclosed in the present specification include not only the numerical points specifically disclosed in the examples but also the endpoints of each numerical range in the specification, and ranges in which any combination of the numerical points is disclosed or recited should be considered as ranges of the present invention.
FIGS. 1 a-1 d are schematic cross-sectional views of various stages of a tungsten deposition process in the prior art, and as shown in FIG. 1a, a semiconductor structure includes a substrate 100, a dielectric layer 110 on the substrate, wherein the dielectric layer 110 has a trench therein, a barrier layer 120 is formed on the surface of the dielectric layer 110 and the trench, and the material of the substrate 100 includes, but is not limited to CoSixW, Cu, etc., the material of dielectric layer 110 includes, but is not limited to, silicon dioxide (SiO)2) And the like, the material of barrier layer 120 includes, but is not limited to, titanium nitride (TiN), titanium nitride, and combinations of titanium (Ti)&TiN), and the like.
The reducing precursor used in the CVD W or ALD W process is primarily Silane (SiH)4) Borane (B)2H6) And hydrogen (H)2) SiH is typically used in the initial nucleation stage4Or B2H6Reduction of tungsten hexafluoride (WF)6) Gas to form a thin tungsten seed layer, followed by H2Reduction of WF6To form a bulk tungsten film (wbull) to complete the deposition of tungsten.
FIGS. 1 b-1 d are sectional views of the semiconductor structure showing the steps of forming a tungsten metal layer, first introducing Silane (SiH) as shown in FIG. 1b4) Gas or borane (B)2H6) The gas, which wets the barrier layer for a longer period of time, forms a wetting layer 131, which promotes subsequent tungsten nucleation, after which Silane (SiH) is introduced, as shown in fig. 1c4) Gas or borane (B)2H6) Gas reduction sixTungsten fluoride (WF)6) Gas to deposit a tungsten seed layer 132 on the wetting layer, followed by H as shown in FIG. 1d2Reduction of WF6A bulk tungsten thin film (W bulk)133 is formed on the tungsten seed layer, thereby completing the deposition of the metal tungsten layer. The bulk tungsten film 133 formed by this method has a high fluorine ion content, which increases contact resistance.
The semiconductor structure is subsequently processed by a chemical mechanical mask (CMP) process to remove the excess bulk tungsten film.
FIG. 2 is a schematic view showing a gas introduction state during the formation of a bulk tungsten film in a tungsten deposition process of the prior art, as shown in FIG. 2, H is introduced during the formation of the bulk tungsten film2And WF6Continuously introducing the metal into the reaction chamber, such a deposition manner may form an overhang (overhang), which causes a Void (Void)140 shown in fig. 1d to exist in the contact hole and the via hole, and the Void 140 causes an excessive contact resistance, and at the same time, the Void 140 originally sealed may become an opening after CMP, thereby causing a defect, that is, a trench originally filled with the metal has only a small amount of metal or no metal, which may cause an open circuit, and further affect the yield of the product.
Therefore, the invention provides a method for forming a semiconductor structure, which comprises the following steps:
providing a substrate;
forming a dielectric layer on a substrate, wherein the dielectric layer is provided with a groove;
forming a barrier layer on the surfaces of the dielectric layer and the groove; and
forming a metal layer on the barrier layer;
wherein the step of forming the metal layer comprises:
introducing a first gas and a second gas for pretreatment, and forming a wetting layer on the barrier layer;
introducing a first gas and a second gas, and depositing on the wetting layer to form a metal seed layer; and
and continuously introducing hydrogen, introducing a third gas in a pulse mode, and circularly depositing on the metal seed layer to form a bulk metal film.
Fig. 3 a-3 d are schematic cross-sectional views of various stages of a metal deposition process according to an embodiment of the invention, wherein, as shown in fig. 3a, a semiconductor structure comprises a substrate 200, a dielectric layer 210 disposed on the substrate 200, wherein the dielectric layer 210 has a trench therein, and a barrier layer 220 is disposed on the surfaces of the dielectric layer 210 and the trench.
Materials of substrate 200 include, but are not limited to, CoSixW, Cu, etc., the material of dielectric layer 210 includes, but is not limited to, silicon dioxide (SiO)2) And the like, the material of barrier layer 220 includes, but is not limited to, titanium nitride (TiN), titanium nitride, and combinations of titanium (Ti)&TiN), etc., with a thickness of 2-20nm, a trench width of 20-200nm, and a depth of 40-400 nm.
When the material of the substrate is CoSixWhen in use, the metal layer in the semiconductor structure can be used as a P-well contact; when the material of the substrate is W, the metal layer in the semiconductor structure can be used as a contact of the middle end; when the material of the substrate is Cu, the metal layer in the semiconductor structure may serve as a via. Different substrate materials may be used in conjunction with the metal layer in different configurations.
As shown in fig. 3b, silane gas or borane gas and tungsten hexafluoride gas are sequentially introduced to pre-treat, i.e., wet, the barrier layer 220 to form a wetting layer 231 to promote subsequent tungsten nucleation, wherein the thickness of the wetting layer 231 is 0.1-5 nm, and the wetting layer is a discontinuous film layer, which may also be referred to as a small crystal nucleus. The silane gas or the borane gas is introduced for 5-20 s and then purged for 1-5 s, the tungsten hexafluoride gas is introduced for 0.2-5 s and then purged for 1-10 s, and the used carrier gas is argon (Ar).
Wetting allows the surface to be deposited to be as gas-adsorbing as possible so as to saturate. The wetting layer 231 is formed to prevent subsequent reaction of the tungsten hexafluoride gas with Ti in the barrier layer 220 (to reduce contact resistance, some layers in the device may use Ti/TiN as the barrier layer at the same time), and in addition, the wetting layer 231 may fill up the defect of the barrier layer TiN to further prevent the tungsten hexafluoride from penetrating the TiN and reacting with Ti. On the other hand, tungsten is not easy to nucleate on titanium nitride, and a Si or B film is generated in the infiltration process, so that a nucleation layer can be attached more easily, the incubation time is reduced, and nucleation is accelerated.
Next, as shown in fig. 3c, silane gas or borane gas and tungsten hexafluoride gas are introduced, and tungsten hexafluoride is reduced by silane or borane, and a tungsten seed layer 232 is deposited on the wetting layer 231.
When the tungsten seed layer 232 is formed, silane gas or borane gas and tungsten hexafluoride gas can be sequentially and circularly introduced in a pulse mode, silane gas or borane gas is firstly introduced into each cycle, then tungsten hexafluoride gas is introduced, the introduction time of the silane gas or the borane gas is 1-5 s, the introduction interval time is 1-10 s, the introduction time of the tungsten hexafluoride gas is 0.2-5 s, the introduction interval time is 1-10 s, 2-16 cycles are continuously carried out, and the tungsten seed layer 232 with the thickness of 2-10 nm is obtained through deposition. The tungsten seed layer 232 may serve as a growth point for subsequent bulk tungsten films.
In the pulse deposition, the flow rate of the silane gas is 100-600 sccm, the flow rate of the borane gas is 100-500 sccm, and the flow rate of the tungsten hexafluoride gas is 100-500 sccm.
In the process of pulse deposition, the pressure in the reaction chamber is 20-60 torr, the temperature is 200-500 ℃, and the used carrier gas is argon (Ar).
Then, as shown in fig. 3d, hydrogen and tungsten hexafluoride gas are introduced, a bulk tungsten film 233 is deposited on the tungsten seed layer 232, the trench is filled with the bulk tungsten film 233, and covers the upper portions of the dielectric layer 210, the barrier layer 220, the wetting layer 231 and the tungsten seed layer 232, and the thickness of the bulk tungsten film 233 outside the trench is 20-100 nm. The content of fluorine ions in the bulk tungsten film 233 formed by the method is obviously lower than that in the bulk tungsten film 133 formed in fig. 1d, and the contact resistance is obviously reduced.
FIG. 4 is a schematic view showing a gas introduction state during formation of a bulk tungsten thin film in a tungsten deposition process according to an embodiment of the present invention, in which hydrogen gas is continuously introduced at a flow rate of 1000 to 6000sccm during the deposition process, tungsten hexafluoride gas is introduced in a pulsed cyclic manner, the introduction time of tungsten hexafluoride gas in each cycle is 0.2 to 20s, the pulse interval time is 1 to 10s, and the flow rate is 100 to 500 sccm.
In the process of circulating deposition, the pressure in the reaction cavity is 20-60 torr, and the temperature is 200-500 ℃.
The semiconductor structure forming method has wide application range, can be suitable for different structures such as embedded word lines (buried word lines), gate structures (gate), semiconductor layer interconnection contact structures (contact), through holes (via) and the like by selecting different substrates, and has good application prospect in the field of semiconductor memory components.
In summary, the forming method of the semiconductor structure of the invention introduces the gas containing tungsten in a pulse manner at the deposition stage of the bulk tungsten film, which can effectively improve the hole filling capability of the tungsten deposition process, reduce the probability of tungsten voids and reduce the contact resistance of the tungsten film, thereby improving the yield of products.
It should be noted by those skilled in the art that the described embodiments of the present invention are merely exemplary and that various other substitutions, alterations, and modifications may be made within the scope of the present invention. Accordingly, the present invention is not limited to the above-described embodiments, but is only limited by the claims.
Claims (14)
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114121821A (en) * | 2022-01-05 | 2022-03-01 | 芯盟科技有限公司 | Method for forming dynamic random access memory |
| CN114171452A (en) * | 2020-09-10 | 2022-03-11 | 中芯国际集成电路制造(上海)有限公司 | Method for forming semiconductor structure |
| CN114334628A (en) * | 2021-12-14 | 2022-04-12 | 中国科学院微电子研究所 | Preparation method of novel semiconductor structure |
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| CN114121821A (en) * | 2022-01-05 | 2022-03-01 | 芯盟科技有限公司 | Method for forming dynamic random access memory |
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