CN110176406A - The defect inspection method of metal silicide and the forming method of semiconductor structure - Google Patents

Abstract

The invention provides a metal silicide defect detection method and a method for forming a semiconductor structure, comprising providing a substrate and a metal silicide layer covering part of the substrate, and then forming a dielectric layer on the substrate, the dielectric layer covering the substrate and The metal silicide layer and expose the surface of the metal silicide layer, so that the area outside the metal silicide layer is insulated, and then use electron beams to bombard the metal silicide layer, and according to the concentration distribution of the secondary electrons escaped from the metal silicide layer The defects of the metal silicide layer are obtained, so that the defects of the metal silicide layer can be quantitatively detected, and the accuracy of defect detection is improved, and the defect detection method of the metal silicide is carried out during the formation of the semiconductor structure, which can Real-time, on-line reflection of the defect status of the metal silicide will not disrupt the normal manufacturing process of semiconductor devices, will not add additional processes, and can reduce the cost and time of detection.

Description

Defect detection method of metal silicide and method of forming semiconductor structure

technical field

The invention relates to the technical field of semiconductor preparation, in particular to a method for detecting defects of a metal silicide and a method for forming a semiconductor structure.

Background technique

A metal silicide is a thermally stable metal compound formed by reacting a transition metal with silicon. Since the metal silicide exhibits the advantages of low resistivity and high thermal stability, and is especially suitable for the current silicon process, the metal silicide has been widely used in the semiconductor device process. Specifically, the metal silicide layer formed on the surface of the gate electrode and the source/drain region can effectively reduce the specific resistance of the gate electrode and the contact resistance of the source/drain.

However, due to factors such as the grain size of the transition metal or oxide residues on the substrate surface, defects will occur in the growth of metal silicides, and this defect is not a physical defect (due to process conditions, machine parameters, etc.) defects), the defects of metal silicide cannot be effectively detected by existing defect detection equipment. The existing metal silicide defect detection method usually selects some detection points on the metal silicide, and then takes pictures at fixed points on the machine, and then observes whether there is a defect in the metal silicide from the photos, but this defect detection method can only Qualitatively determine whether metal silicides have defects, but cannot quantitatively analyze the number and location distribution of defects, and, because only limited detection points are selected on metal silicides, the existing defect detection methods cannot effectively respond Defects on the entire surface of the metal silicide can be detected, resulting in inaccurate detection of metal silicide defects.

Contents of the invention

The object of the present invention is to provide a metal silicide defect detection method and a method for forming a semiconductor structure, so as to solve the problem of low defect detection accuracy of the existing metal silicide.

In order to achieve the above object, the present invention provides a method for detecting defects of metal silicides, comprising:

providing a substrate and a metal silicide layer covering a portion of the substrate;

forming a dielectric layer on the substrate, the dielectric layer covering the substrate and the metal silicide layer and exposing the surface of the metal silicide layer;

The metal silicide layer is bombarded with an electron beam, and the defect status of the metal silicide layer is obtained according to the concentration distribution of secondary electrons released from the metal silicide layer.

Optionally, forming the dielectric layer on the substrate, the step of exposing the surface of the metal silicide layer of the dielectric layer includes:

forming a dielectric material layer on the substrate, the dielectric material layer covering the substrate and the metal silicide layer;

The dielectric material layer is thinned until the surface of the metal silicide layer is exposed, and the remaining dielectric material layer constitutes the dielectric layer.

Optionally, several source regions and several drain regions are formed in the substrate, the source regions and the drain regions are arranged at intervals, and gates are formed on the substrate between the source regions and the drain regions. electrode structure, the metal silicide layer covers the surface of the gate structure, the source region and the drain region.

Optionally, the material of the metal silicide layer includes one or more of titanium silicide, cobalt silicide, nickel silicide or molybdenum silicide.

The present invention also provides a method for forming a semiconductor structure, comprising:

providing a substrate on which a metal silicide layer and a plurality of gate structures are formed, and the metal silicide layer covers the top of the gate structures;

forming a dielectric layer on the substrate, the dielectric layer covers the substrate and the gate structure and exposes the surface of the metal silicide layer;

The metal silicide layer is bombarded with an electron beam, and the defect status of the metal silicide layer is obtained according to the concentration distribution of secondary electrons released from the metal silicide layer.

Optionally, before forming the dielectric layer on the substrate, the method for forming the semiconductor structure further includes:

sequentially forming an anti-reflection material layer and a protective material layer on the substrate, the anti-reflection material layer and the protective material layer covering the substrate and the top and side surfaces of the gate structure;

forming a dielectric material layer on the substrate, the dielectric material layer covering the protective material layer;

Thinning the dielectric material layer, protective material layer and anti-reflective material layer until the surface of the metal silicide layer is exposed, the remaining dielectric material layer constitutes the dielectric layer, and the remaining protective material layer and the remaining The anti-reflection material layer constitutes a protective layer and an anti-reflection layer respectively.

Optionally, the material of the anti-reflection layer includes silicon oxynitride, the material of the protective layer includes silicon nitride, and the material of the dielectric layer includes silicon oxide.

Optionally, the dielectric material layer is formed by high density plasma chemical vapor deposition.

Optionally, a source region and a drain region arranged at intervals are further formed in the substrate on both sides of the gate structure, and the metal silicide layer also covers the source region and the drain region.

Optionally, before bombarding the metal silicide layer with electron beams, the method for forming the semiconductor structure further includes:

Etching the dielectric layer to form several openings, the bottoms of the openings expose the metal silicide layer on the source region and the drain region.

The main component of metal silicide defects is oxide, and the conductivity of oxide is not good, while metal silicide has good electrical conductivity, that is to say, the electrical conductivity of metal silicide without defects is stronger than that of defects Conductivity, if the electron beam is used to bombard the metal silicide, due to the difference in conductivity, more secondary electrons can be generated at the metal silicide without defects, so the concentration distribution of the secondary electrons escaped from the metal silicide can be Qualitatively reflect whether the metal silicide has defects and the position distribution of the defects.

Based on this, in the metal silicide defect detection method and the formation method of the semiconductor structure provided by the present invention, a substrate and a metal silicide layer covering a part of the substrate are provided, and then a dielectric layer is formed on the substrate, and then a The electron beam bombards the metal silicide layer, and the defect condition of the metal silicide layer is obtained according to the concentration distribution of the secondary electrons released from the metal silicide layer, since the dielectric layer covers the substrate and the The metal silicide layer and expose the surface of the metal silicide layer, so that the regions other than the metal silicide layer are all insulated, and the secondary electrons escaped when electron beam bombardment is used are very few, which can be the metal silicide layer The defect detection signal provides a "dark" background, so that the concentration distribution of the secondary electrons escaped from the metal silicide layer can be observed intuitively, so as to accurately obtain the position and number of defects, and improve the accuracy of defect detection, and , the metal silicide defect detection method can be carried out during the formation of the semiconductor structure, which can reflect the defect status of the metal silicide in real time and online, and will not disrupt the normal manufacturing process of the semiconductor device, and will not add additional The process can reduce the cost and time of testing, and can avoid the production of large quantities of defective products.

Description of drawings

FIG. 1 is a flowchart of a method for detecting defects in metal silicides according to an embodiment of the present invention;

2 is a flowchart of a method for forming a semiconductor structure provided by an embodiment of the present invention;

3 is a schematic structural view of forming a metal silicide layer and several gate structures on a substrate provided by an embodiment of the present invention;

FIG. 4 is a schematic structural view of sequentially forming an anti-reflective material layer, a protective material layer, and a dielectric material layer on a substrate provided by an embodiment of the present invention;

5 is a schematic structural view of grinding to thin the anti-reflective material layer, protective material layer, and dielectric material layer to form a reflective layer, protective layer, and dielectric layer according to an embodiment of the present invention;

FIG. 6 is a schematic structural view of forming an opening on a dielectric layer according to an embodiment of the present invention;

Wherein, reference sign is:

10-substrate; S-source region; D-drain region;

20-gate structure; 21-gate oxide layer; 22-floating gate polysilicon layer; 23-gate dielectric layer; 24-control gate polysilicon layer; 25-sidewall;

30 - metal silicide layer;

40-anti-reflection material layer; 41-anti-reflection layer;

50-protective material layer; 51-protective layer;

60-dielectric material layer; 61-dielectric layer;

70 - opening.

Detailed ways

The specific implementation manner of the present invention will be described in more detail below with reference to schematic diagrams. The advantages and features of the present invention will be more apparent from the following description. It should be noted that all the drawings are in a very simplified form and use imprecise scales, and are only used to facilitate and clearly assist the purpose of illustrating the embodiments of the present invention.

As shown in Figure 1, this embodiment provides a method for detecting defects in metal silicides, including:

S11: providing a substrate and a metal silicide layer covering part of the substrate;

S21: forming a dielectric layer on the substrate, the dielectric layer covering the substrate and the metal silicide layer and exposing the surface of the metal silicide layer;

S31: Bombarding the metal silicide layer with an electron beam, and obtaining defect conditions of the metal silicide layer according to the concentration distribution of secondary electrons released from the metal silicide layer.

Specifically, the metal silicide defect detection method provided in this embodiment can be applied to a method for forming a semiconductor structure, such as a semiconductor structure generated during the process of forming a storage device, as shown in FIG. 2 , The method for forming the semiconductor structure includes:

S21: providing a substrate, on which a metal silicide layer and a plurality of gate structures are formed, and the metal silicide layer covers the top of the gate structures;

S22: forming a dielectric layer on the substrate, the dielectric layer covering the substrate and the gate structure and exposing the surface of the metal silicide layer;

S23: Bombarding the metal silicide layer with an electron beam, and obtaining defect conditions of the metal silicide layer according to the concentration distribution of secondary electrons released from the metal silicide layer.

Specifically, please refer to FIGS. 3-6 , which are schematic cross-sectional views of the device structure formed by the method for forming the semiconductor structure. Next, the defect detection of the metal silicide provided in this embodiment will be performed in conjunction with FIGS. 3-6 . The method and the method for forming the semiconductor structure are described in detail.

First, referring to FIG. 3 , a substrate 10 is provided, and the substrate 10 may be a silicon substrate, a germanium substrate, a silicon-germanium substrate, a gallium arsenide substrate, or a silicon-on-insulator substrate, etc., the substrate 10 Several source regions S and several drain regions D are formed in the substrate 10, the source regions S and the drain regions D are arranged at intervals, and a trench isolation structure (not shown) for isolating active regions is also formed in the substrate 10 ), etc., the present invention is not limited. Several discrete gate structures 20 are formed on the substrate 10, and each gate structure 20 is located on the substrate 10 between the source region S and the drain region D. In this embodiment, The gate structure 20 includes a gate oxide layer 21, a floating gate polysilicon layer 22, a gate dielectric layer 23, a control gate polysilicon layer 24 and sidewalls 25, the gate oxide layer 21, a floating gate polysilicon layer 22, a gate dielectric layer 23 and the control gate polysilicon layer 24 are stacked in sequence to form a laminated body, the sidewall 25 is located on the sidewall of the laminated body, and optionally, the gate dielectric layer 23 is located on the floating gate polysilicon layer 22 and the floating gate polysilicon layer 22 Between the control gate polysilicon layer 24, optionally, the material of the gate dielectric layer 23 can be silicon oxide, its thickness is small (less than 100nm), and it is usually an ONO structure (silicon oxide-silicon nitride-oxide stack of silicon), play the role of isolating the floating gate polysilicon layer 22 and the control gate polysilicon layer 24, the sidewall 25 is used to protect the floating gate polysilicon layer 22 and the control gate polysilicon layer 24 , to prevent external dark current intrusion or other intrusions.

A metal silicide layer 30 is formed on the top of the gate structure 20 (on the surface of the control gate polysilicon layer 24 ) and on the source region S and the drain region D, that is, the metal silicide layer 30 Covering the top of the gate structure 20 and the surfaces of the source region S and the drain region D, in this embodiment, the material of the metal silicide layer 30 is cobalt silicide (CoSi ₂ ), in other embodiments Among them, the material of the metal silicide layer 30 can also be titanium silicide (TiSi ₂ ), nickel silicide (NiSi ₂ ), molybdenum silicide (MoSi ₂ ), platinum silicide (PtSi ₂ ), tantalum silicide ( One or more of TaSi ₂ ), tungsten silicide (WSi ₂ ), etc. In the present embodiment, the step of forming the metal silicide layer 30 is: first deposit a metal cobalt layer and a titanium nitride (TiN) layer covering the metal cobalt layer on the entire substrate 10, and then perform high temperature annealing ( 550 degrees Celsius-700 degrees Celsius), make the metal cobalt layer react with the silicon in the substrate 10 to generate Co ₂ Si at the contact surface between the metal cobalt layer and the substrate 10, and then remove the nitrogen The titanium oxide layer and the metal cobalt layer that did not participate in the reaction are finally subjected to high-temperature annealing treatment again to convert Co ₂ Si into CoSi ₂ to form the metal silicide layer 30 . Since other areas on the surface of the substrate 10 except the source region S and the drain region D are covered by silicon oxide, and the sidewall 25 does not react with the metal cobalt layer, the formed metal silicide layer 30 only covers the source region S, the drain region D and the control gate polysilicon layer 24 .

Further, as shown in FIG. 4 , an antireflective material layer 40 and a protective material layer 50 are sequentially deposited on the substrate 10, and the antireflective material layer 40 and the protective material layer 50 cover the substrate 1 and the protective material layer. The top and side surfaces of the gate structure 20, that is to say, the antireflection material layer 40 and the protective material layer 50 cover the entire substrate 10 and the gate structure 20 (naturally also cover all The metal silicide layer 30 ), and then a dielectric material layer 60 is formed on the substrate 10 , and the dielectric material layer 60 covers the protective material layer 50 . In this embodiment, the material of the anti-reflection material layer 40 is silicon oxynitride, the material of the protective material layer 50 is silicon nitride, and the material of the dielectric material layer 60 is silicon oxide. Forming the anti-reflective material layer 40 and the protective material layer 50 can adopt conventional chemical vapor deposition, physical vapor deposition or atomic layer deposition methods, but the formation of the dielectric material layer 60 is to use high-density plasma chemical vapor deposition process, so that the formed dielectric material layer 60 is denser and has better stability.

5, by grinding to thin the dielectric material layer 60, protective material layer 50 and anti-reflective material layer 51 until the surface of the metal silicide layer 30 is exposed, the remaining dielectric material layer 60 constitutes the The dielectric layer 61, the remaining protective material layer 50 and the remaining anti-reflective material layer 40 constitute the protective layer 51 and the anti-reflection layer 41 respectively, and the protection layer 51 and the anti-reflection layer 41 are used for subsequent processing The gate structure 20 is protected, and the dielectric layer 61 is used for dielectric isolation. In this way, the metal silicide layer 30 on the gate structure 20 is exposed.

Then, as shown in FIG. 6, the dielectric layer 61, the protective layer 51 and the anti-reflection layer 41 are etched to form a plurality of openings 70, and one of the openings 70 corresponds to one of the source regions S or the drain regions D, so that all The bottom of the opening 70 exposes the metal silicide layer 30 on the source region S and the drain region D, so that the metal silicide layer 30 on the source region S and the drain region D exposed. It can be understood that, at this time, all the regions other than the metal silicide layer 30 are covered by the dielectric layer 61, that is, all the regions other than the metal silicide layer 30 are in an insulating state. When bombarding the metal silicide layer 30 and regions other than the metal silicide layer 30, the secondary electron concentration excited by the region other than the metal silicide layer 30 will be far less than that of the metal silicide layer 30 The excited secondary electron concentration, the signal scanned by the electron beam scanning process shows the difference between "bright" and "dark", that is, the higher the secondary electron concentration, the brighter the signal; conversely, the secondary electron concentration The lower, the "darker" the signal. In this way, the regions other than the metal silicide layer 30 are all in an insulating state. Ideally, the signal corresponding to the region other than the metal silicide layer 30 is “dark”, while the metal silicide layer 30 The corresponding signal is "bright", but if there is a defect in the metal silicide layer 30, the area where the "bright" signal should appear will appear as "dark", so that by observing the "dark" signal in the "bright" signal The location distribution and number of defects in the metal silicide layer 30 can be obtained. In this embodiment, the dielectric layer 61 provides a "dark" background for the defect detection of the metal silicide layer 30, which is beneficial to enhance the contrast of defect detection.

Further, referring to FIG. 6 , after the metal silicide layer 30 is exposed, defect detection can be performed on the metal silicide layer 30 . Specifically, electron beams are used to bombard the metal silicide layer 30. Since the conductivity of the metal silicide layer 30 without defects is stronger than that of the defects, if electron beams are used to bombard the metal silicide layer 30 layer 30, due to the difference in conductivity, more secondary electrons can be generated in the metal silicide layer 30 without defects. In this embodiment, the metal silicide layer 30 is scanned by electron beam scanning technology to obtain The concentration distribution of the secondary electrons released from the metal silicide layer 30 can determine the defect status of the metal silicide layer 30 according to the concentration distribution of the secondary electrons released from the metal silicide layer 30 . For example, after scanning the metal silicide layer 30 on the source region S with an electron beam, if the concentration of secondary electrons escaping from the entire metal silicide layer 30 is uniform, it indicates that the metal silicide layer 30 on the source region S is uniform. The growth of the material layer 30 is better, and no defects are generated; if the concentration of secondary electrons at several positions on the entire metal silicide layer 30 has a sudden change (concentration suddenly becomes smaller), it indicates that the metal silicide layer 30 at this position Defects are generated, so that the defect condition of the metal silicide layer 30 can be accurately and quantitatively detected.

It can be understood that the metal silicide defect detection method provided in this embodiment is performed during the formation process of the semiconductor structure. During the normal formation process of the semiconductor structure, in order to form the conductive plug in the subsequent process, the The gate structure 20, the source region S and the drain region D are drawn out, and the protection layer 51, the anti-reflection layer 41 and the dielectric layer 61 also need to be formed. This embodiment only uses the existing dielectric layer 61 and does not disrupt In the normal preparation process of the semiconductor structure, no additional process is added.

In this embodiment, the formation method of the semiconductor structure may be used to form the semiconductor structure before the normal mass production of semiconductor devices, for example: the semiconductor structure is a semiconductor structure produced during the process of forming a storage device, then the Before the storage device is mass-produced, the semiconductor structure may be formed by using the method for forming the semiconductor structure, and then the metal silicide layer of the semiconductor structure is inspected for defects, and the metal silicide layer is inspected. After the defect detection, if the defect on the metal silicide layer is within the control requirements, it indicates that the process and parameters for forming the metal silicide layer have been qualified during the production of the storage device, and the storage device can be processed at this time. Mass production; on the contrary, if the defect on the metal silicide layer is not within the control requirements, it indicates that the process and parameters for forming the metal silicide layer are unqualified during the production of the storage device, and it is necessary to re-adjust the machine or parameters, after the machine or parameters are re-adjusted, the method for forming the semiconductor structure is executed again until the defects on the metal silicide layer are within the control requirements, then the storage device can be mass-produced, so that Can avoid the production of large quantities of defective products.

Further, the semiconductor structure provided in this embodiment is a semiconductor structure that will be produced during the production process of a storage device, but it should be understood that the metal silicide defect detection method provided in this embodiment can also be applied to other semiconductor devices, as long as This semiconductor device forms a metal silicide layer and needs metal silicide defect detection, and the metal silicide defect detection method provided in this embodiment can be used to perform defect detection, which will not be described one by one here.

Moreover, since the method for forming the semiconductor structure provided by this embodiment reflects the defects of the metal silicide in real time and on-line, it does not disturb the normal manufacturing process of the original semiconductor device. If necessary, the formed The semiconductor structures are collected, and the next process flow (for example, the process of continuing to perform the conductive plug) is continued, and the semiconductor structures are prepared into a complete semiconductor device. Alternatively, in order to avoid increasing the process cost, the formed semiconductor structure may be directly discarded, which means that the semiconductor structure is only used for testing and not subsequently used to form a complete semiconductor device.

To sum up, in the metal silicide defect detection method and the semiconductor structure forming method provided in the embodiment of the present invention, a substrate and a metal silicide layer covering part of the substrate are provided, and then a dielectric layer is formed on the substrate, Then use an electron beam to bombard the metal silicide layer, and obtain the defect condition of the metal silicide layer according to the concentration distribution of the secondary electrons released from the metal silicide layer, because the dielectric layer covers the substrate and the metal silicide layer and expose the surface of the metal silicide layer, so that the regions other than the metal silicide layer are insulated, and the secondary electrons escaped during electron beam bombardment are few, which can be metal silicide The defect detection signal of the material layer provides a "dark" background, so that the concentration distribution of the secondary electrons escaped from the metal silicide layer can be observed intuitively, so as to accurately obtain the position and number of defects, and improve the accuracy of defect detection , and the metal silicide defect detection method can be carried out during the formation of the semiconductor structure, which can reflect the defect status of the metal silicide in real time and online, and will not disrupt the normal manufacturing process of the semiconductor device, and will not increase The additional process can reduce the cost and time of inspection, and can avoid the generation of large quantities of defective products.

The foregoing are only preferred embodiments of the present invention, and do not limit the present invention in any way. Any person skilled in the technical field, within the scope of the technical solution of the present invention, makes any form of equivalent replacement or modification to the technical solution and technical content disclosed in the present invention, which does not depart from the technical solution of the present invention. The content still belongs to the protection scope of the present invention.

Claims (10)

1. A defect detection method of metal silicide, characterized in that, comprising: providing a substrate and a metal silicide layer covering a portion of the substrate; forming a dielectric layer on the substrate, the dielectric layer covering the substrate and the metal silicide layer and exposing the surface of the metal silicide layer; The metal silicide layer is bombarded with an electron beam, and the defect status of the metal silicide layer is obtained according to the concentration distribution of secondary electrons released from the metal silicide layer. 2. The defect detection method of metal silicide as claimed in claim 1, characterized in that, forming the dielectric layer on the substrate, and the step of the dielectric layer exposing the surface of the metal silicide layer comprises: forming a dielectric material layer on the substrate, the dielectric material layer covering the substrate and the metal silicide layer; The dielectric material layer is thinned until the surface of the metal silicide layer is exposed, and the remaining dielectric material layer constitutes the dielectric layer. 3. The defect detection method of metal silicide as claimed in claim 1, wherein a plurality of source regions and a plurality of drain regions are formed in the substrate, the source regions and the drain regions are arranged at intervals, and the A gate structure is also formed on the substrate between the source region and the drain region, and the metal silicide layer covers surfaces of the gate structure, the source region and the drain region. 4. The defect detection method of metal silicide as claimed in any one of claims 1-3, wherein the material of the metal silicide layer comprises titanium silicide, cobalt silicide, nickel silicide or molybdenum silicide one or more of them. 5. A method for forming a semiconductor structure, comprising: providing a substrate on which a metal silicide layer and a plurality of gate structures are formed, and the metal silicide layer covers the top of the gate structures; forming a dielectric layer on the substrate, the dielectric layer covers the substrate and the gate structure and exposes the surface of the metal silicide layer; The metal silicide layer is bombarded with an electron beam, and the defect status of the metal silicide layer is obtained according to the concentration distribution of secondary electrons released from the metal silicide layer. 6. The method for forming a semiconductor structure according to claim 5, wherein, before forming the dielectric layer on the substrate, the method for forming the semiconductor structure further comprises: sequentially forming an anti-reflection material layer and a protective material layer on the substrate, the anti-reflection material layer and the protective material layer covering the substrate and the top and side surfaces of the gate structure; forming a dielectric material layer on the substrate, the dielectric material layer covering the protective material layer; Thinning the dielectric material layer, protective material layer and anti-reflective material layer until the surface of the metal silicide layer is exposed, the remaining dielectric material layer constitutes the dielectric layer, and the remaining protective material layer and the remaining The anti-reflection material layer constitutes a protective layer and an anti-reflection layer respectively. 7. The method for forming a semiconductor structure according to claim 6, wherein the material of the anti-reflection layer comprises silicon oxynitride, the material of the protective layer comprises silicon nitride, and the material of the dielectric layer comprises silicon oxide . 8. The method for forming the semiconductor structure according to claim 6, wherein the dielectric material layer is formed by high density plasma chemical vapor deposition. 9. The method for forming a semiconductor structure according to claim 5 or 6, wherein a source region and a drain region arranged at intervals are also formed in the substrate on both sides of the gate structure, and the metal silicide layer is further covering the source region and the drain region. 10. The method for forming a semiconductor structure according to claim 9, wherein before bombarding the metal silicide layer with electron beams, the method for forming the semiconductor structure further comprises: Etching the dielectric layer to form several openings, the bottoms of the openings expose the metal silicide layer on the source region and the drain region.