CN119816754A

CN119816754A - Photon counting circuit system and photon counting method

Info

Publication number: CN119816754A
Application number: CN202380066460.1A
Authority: CN
Inventors: 丁庆
Original assignee: Sony Semiconductor Solutions Corp
Current assignee: Sony Semiconductor Solutions Corp
Priority date: 2022-09-22
Filing date: 2023-09-19
Publication date: 2025-04-11
Also published as: JP2025531190A; WO2024061925A1

Abstract

The present disclosure generally relates to a photon counting circuit system (11) configured to: determine whether there is a signal coincidence of at least two pixel signals (CLK1, CLK2) of at least two pixels (SPAD1, SPAD2) of a photon counting time-of-flight sensor (10) based on the degree of temporal overlap of at least two pixel signals (CLK1, CLK2) in time, so as to set a counting operation mode to a coincidence counting operation mode in the presence of a signal coincidence, wherein the counts of at least two pixel signals are counted together in the coincidence counting operation mode; and generate a coincidence count signal (YES) for setting the counting operation mode to the coincidence counting operation mode. Preferably, the coincidence count signal corresponds to the later pixel signal in time of the at least two pixel signals (CLK1, CLK2). For example, when there is no coincidence detection, only one count will be recorded. However, the number of counts of the common counter can be multiplied by two to reproduce the real number of events. Therefore, more counts can be accumulated, which can optimize the signal-to-noise ratio. In addition, by considering the correlation between adjacent/neighboring pixels in the sensor, silicon area can be saved. This correlation is exploited to save the total counter bit length for two or more pixels in a pixel group. Thus, this temporal correlation can be determined and the coincidence counts can be dynamically stored into a common (shared) counter.

Description

Photon counting circuitry and photon counting method

Technical Field

The present disclosure relates generally to photon counting circuitry and photon counting methods.

Background

In general, it is known to determine a distance based on a round trip delay of emitted light. For example, pulsed or modulated light may be emitted and the time it returns to the image sensor may be measured. This technique may be referred to as direct time-of-flight (dToF).

In dToF, photons can be "counted" by time-to-digital conversion and stored in a histogram. Photon detection may be achieved by detecting a photo avalanche (e.g. based on SPAD (single photon avalanche diode) technology, APD (avalanche photodiode), etc.). The photoelectric signal may be indicative of the number of photons or a single photon, and the number of photons may be stored in a corresponding counter, which may require a sufficiently high bit length to store a sufficiently large number of photons.

Furthermore, photon counting techniques may be known, e.g. based on photodiodes, wherein a determined voltage or the like may indicate the number of photons.

While techniques exist for counting photons, it is generally desirable to provide photon counting circuitry and photon counting methods.

Disclosure of Invention

According to a first aspect, the present disclosure provides photon counting circuitry configured to:

Determining whether there is a signal coincidence of at least two pixel signals based on a degree of overlap in time of at least two pixel signals of at least two pixels of the photon counting time-of-flight sensor for setting a counting operation mode to a coincidence counting operation mode in which counts of the at least two pixel signals are counted together if there is a signal coincidence, and

A coincidence count signal is generated for setting the count mode of operation to a coincidence count mode of operation.

According to a second aspect, the present disclosure provides a photon counting method comprising:

Further aspects are set out in the dependent claims, the following description and the accompanying drawings.

Drawings

Embodiments are explained by way of example with reference to the accompanying drawings, in which:

FIG. 1 shows a schematic diagram of a SPAD-based photon counting pixel according to the present disclosure;

FIG. 2 illustrates in block diagram form an embodiment of photonic circuitry including photonic counting circuitry in accordance with the present disclosure;

FIG. 3 illustrates a further embodiment of a photonic circuitry including a photonic counting circuitry according to the present disclosure;

FIG. 4 shows a timing diagram of the photon counting circuitry of FIG. 3;

fig. 5 illustrates photon counting ToF circuitry and photon counting circuitry according to the present disclosure operating in a non-coincidence counting mode;

fig. 6 illustrates photon counting ToF circuitry and photon counting circuitry according to the present disclosure operating in a coincidence counting mode;

FIG. 7 illustrates an embodiment of a photon counting method according to the present disclosure, wherein it is determined whether there is a coincidence or a non-coincidence;

FIG. 8 illustrates a further embodiment of a photon counting method according to the present disclosure, wherein non-compliance is determined;

FIG. 9 illustrates a further embodiment of a photon counting method according to the present disclosure, wherein the presence of coincidence is determined;

FIG. 10 shows a further embodiment of a photon counting method according to the present disclosure, wherein the respective counter is set to a common counter or to an individual counter, depending on whether coincidence is present, and

Fig. 11 illustrates a high-level diagram of a photon counting ToF camera including photon counting circuitry according to the present disclosure.

Detailed Description

Before the detailed description of the embodiments starts with fig. 1, a general explanation is made.

As mentioned at the outset, methods for counting photons to determine distance or depth are generally known. However, as many counter bits as possible may be required to increase DR (dynamic range). It has been recognized that it may be desirable to increase the effective bit length of the counter and at the same time reduce the silicon area required, thereby providing a smaller pixel design pitch.

It is further recognized that there may be temporal (in the time domain) coherence/coincidence between pixels (adjacent/neighboring, not limiting the present disclosure in this respect) of the photon counting ToF sensor, which can be used to reduce the counter length. It should be noted that the present disclosure is not limited to active light sensing, as known by ToF, but may also count photons from passive light (e.g., ambient light, sunlight, etc.) based on other sensor types as well.

Furthermore, it has been recognized that it may be desirable to provide a SPAD/APD based photon counting sensor that can be used in a combination mode. In the most advanced sensors, it has been recognized that merging is difficult to achieve without identifying the events that are generated simultaneously. If the recognition mechanism is not implemented, in known sensors, all events generated simultaneously will be considered as one event. However, this may lead to a decrease in the total effective count and thus a decrease in SNR (signal to noise ratio), power efficiency, etc.

Accordingly, some embodiments relate to photon counting circuitry configured to determine whether there is signal coincidence of at least two pixel signals of at least two pixels of a photon counting time-of-flight sensor based on a degree of overlap in time of the at least two pixel signals for setting a counting mode of operation to a coincidence counting mode of operation in the presence of signal coincidence, wherein counts of the at least two pixel signals are counted together in the coincidence counting mode of operation, and to generate a coincidence counting signal for setting the counting mode of operation to the coincidence counting mode of operation.

Circuitry may relate to any entity or entities that may be capable of being used in the context of photon counting (time of flight) measurements, such as one or more processors (e.g., CPU (central processing unit), GPU (graphics processing unit)), one or more FPGAs (field programmable gate arrays), etc. Circuitry may include or be applicable to a camera (system), computer (system), server, etc.

Photon counting circuitry may be used to count photons based on an optoelectronic signal, which may be generated by one or more SPADs (single photon avalanche diodes), APDs (avalanche photodiodes), or any other circuitry that may generate a signal indicative of one or more photons, such that the number of incident photons may be deduced.

In general, the present disclosure is not limited to photon counting ToF techniques, as 2D (two-dimensional) active or passive imaging may also apply the principles of the present disclosure. For example, the present disclosure may be generally applied based on photon counting, i.e., any type of technique other than ToF that can count photons. Thus, in some embodiments, the present disclosure may generally relate to photon counting circuitry, photo detection circuitry, 2D imaging circuitry, 3D imaging circuitry, and the like.

In addition, SPAD and the like may also be used in pixels of photon counting time-of-flight sensors according to the present disclosure for photodetection or photoelectric counting. If a photon is incident on a pixel, the pixel may generate a pixel signal that overlaps in time with another pixel signal of another pixel of the photon counting ToF sensor. The sensor may be any type of sensor, such as a single layer sensor, a stacked sensor, a BSI (back side illumination) sensor, an FSI (front side illumination) sensor, and the like.

A temporal overlap may refer to a situation in which at least two pixel signals are generated substantially simultaneously. If they are indicated at the same time (and, in some embodiments, if they also end at the same time), their degree of overlap may be determined to be one hundred percent (or any other way of expressing that they are generated in parallel at all). The respective internal times for determining the degree of temporal overlap may vary from pixel to pixel and may be calibrated separately, such that it may be determined that at least two pixel signals overlap to some extent within a global scope.

The extent may be less than one hundred percent (or "complete") if they are not generated at the same time, i.e., when at least two pixel signals are offset in time relative to each other.

For example, they may not overlap at all or overlap to some degree (e.g., fifty percent). For example, assuming that the pixel signals have the same length, if a first pixel signal is generated at a first point in time and a second pixel signal may be generated at a second point in time that is intermediate the first point in time, the overlap may be fifty percent.

If the degree of overlap in time is sufficiently high (i.e., greater than or equal to a predetermined threshold), it may be determined that the signals are coincident, or in other words, that there is a signal coincidence of at least two pixel signals. Of course, it may be determined in a similar or identical manner whether more than two pixel signals have coincidence.

If there is signal coincidence, a coincidence counting mode of operation may be applied in accordance with the present disclosure. In the coincidence counting mode of operation, the counts indicated by each of the at least two pixel signals are counted together (e.g., counted as one). For example, in the case where there is coincidence, the corresponding count may be counted as one in a common counter common to at least two pixels.

In addition to the coincidence counting mode of operation, in the event that there is no signal coincidence of at least two pixel signals, a non-coincidence counting mode of operation may be determined as a counting mode of operation. In this case, the respective counts may be stored in separate counters for at least two pixels.

To indicate or set that the count mode of operation is a coincidence count mode of operation, a coincidence count signal may be generated. The coincidence count signal may correspond to one of at least two pixel signals that may be reused or forwarded to corresponding circuitry to "activate" a common counter (or any other circuitry for storing counts, such as a histogram).

In order to indicate or set the non-coincidence counting operation mode as a counting operation mode, it may not be necessary to generate a corresponding signal, as the non-coincidence counting operation mode may be determined based on the absence of a signal, as the present disclosure is not limited in this respect, as the non-coincidence counting operation mode may be explicitly set with a signal for the coincidence counting operation mode.

In some implementations, non-coincidence counting modes of operation may be indicated with respective signals, and coincidence counting modes of operation may be determined based on the absence of signals.

According to the present disclosure, silicon area may be saved. In photon counting sensors according to the prior art, a counter with a sufficiently high bit length may be required to store all generated events. However, implementing a small pixel pitch design can be challenging because counters in the prior art can occupy too much silicon area.

However, in accordance with the present disclosure, it has been recognized that correlation between adjacent/neighboring pixels in a sensor may need to be considered.

This correlation is utilized to save the total counter bit length of two or more pixels in a pixel group (e.g., 1 x 2,2 x 1,2 x 2, etc.). Thus, according to the present disclosure, such time correlation (i.e., coincidence) may be detected/determined, and the coincidence count may be stored into a common (shared) counter. By doing so, unlike counting each pixel by an individual counter, it may not be necessary to store the coincidence count multiple times in each of the individual counters, but only once in a common counter. Thus, the total counter bit length of the pixel group can be reduced, and thus silicon area can be saved.

In some implementations, the photon counting circuitry is further configured to determine the counting mode of operation as non-conforming to the counting mode of operation if the degree of overlap in time of the at least two pixel signals is below a predetermined threshold, as discussed herein.

In some implementations, the photon counting circuitry is further configured to store photon counts indicated by the at least two pixel signals in a common counter that is common to the at least two pixels in a coincidence counting mode of operation, as discussed herein.

In some embodiments, the photon counting circuitry is further configured to store one coincidence photon count of the at least two pixel signals as one count in a common counter in a coincidence counting mode of operation, as discussed herein.

In some implementations, the photon counting circuitry is further configured to store photon counts indicated by the at least two pixel signals in separate counters for each of the at least two pixel signals in a non-coincidence counting mode of operation, as discussed herein.

In some embodiments, the coincidence count signal is a clock signal. However, as discussed above, the coincidence count signal may be one of at least two pixel signals that may be reused, etc. (also as a clock signal). Further, the clock signal may be generated in response to receiving one of the at least two pixel signals.

In some embodiments, the coincidence count signal corresponds to a later in time pixel signal of the at least two pixel signals. Thus, before controlling the respective counter, it may first be ensured that there is a coincidence, as it may take a certain time to determine whether there is a coincidence.

In some embodiments, photon counting further includes at least three counters, including at least one common counter for conforming to a counting mode of operation, and at least two separate counters for non-conforming to a counting mode of operation, as discussed below (e.g., with reference to fig. 2, 5, or 6).

In some embodiments, the photon counting circuitry further includes four counters, including a first counter to a fourth counter, and the circuitry may be further configured to set the first counter and the second counter to a common counter for a coincidence counting mode of operation based on the coincidence counting signal, as will be discussed below (e.g., with reference to fig. 5 and 6).

In some embodiments, the photon counting circuitry is further configured to set the first counter and the third counter to a first individual counter and the second counter and the fourth counter to a second individual counter based on the absence of the coincidence counting signal, as will be discussed below (e.g., with reference to fig. 5 and 6).

In general, by setting the respective counters described above, dynamically adaptable counting circuitry may be provided that can dynamically switch between common and individual counts depending on whether or not compliance is present. Thus, the amount of memory can be optimized, for example, because the required memory can be reduced (if two counts are stored together as one) and the possible memory increased, because, for example, two (smaller) counters are used as one large counter that can store coincidence counts. If there is a non-coincidence, the common counter can be dynamically set to be an individual counter, thereby optimizing the spatial resolution in the non-coincidence case.

Some embodiments relate to a photon counting method comprising determining, based on a degree of overlap in time of at least two pixel signals of at least two pixels of a photon counting time-of-flight sensor, whether there is a signal coincidence of the at least two pixel signals for setting a counting mode of operation to a coincidence counting mode of operation in the presence of a signal coincidence, wherein counts of the at least two pixel signals are counted together in the coincidence counting mode of operation, and generating a coincidence counting signal for setting the counting mode of operation to the coincidence counting mode of operation, as discussed herein.

The methods described herein may be performed by photon counting circuitry according to the present disclosure.

In some embodiments, the photon counting method further comprises determining the counting mode of operation as non-conforming to the counting mode of operation if the degree of overlap in time of the at least two pixel signals is below a predetermined threshold, as discussed herein. In some embodiments, the photon counting method further comprises storing photon counts indicated by the at least two pixel signals in a common counter common to the at least two pixels in a coincidence counting mode of operation, as discussed herein. In some embodiments, the photon counting method further comprises storing one coincidence photon count of at least two pixel signals as one count in a common counter in a coincidence counting mode of operation, as discussed herein. In some embodiments, the photon counting method further comprises storing photon counts indicated by the at least two pixel signals in separate counters for each of the at least two pixel signals in a non-coincidence counting mode of operation, as discussed herein. In some implementations, the coincidence count signal is a clock signal, as discussed herein. In some implementations, the coincidence count signal corresponds to a later in time pixel signal of the at least two pixel signals, as discussed herein. In some embodiments, the photon counting method applies at least three counters, including at least one common counter for coincidence counting modes of operation, and at least two separate counters for non-coincidence counting modes of operation, as discussed herein. In some embodiments, the photon counting method applies four counters, including a first counter to a fourth counter, the method further comprising setting the first counter and the second counter to a common counter for a coincidence counting mode of operation based on the coincidence counting signal, as discussed herein. In some embodiments, the photon counting method further comprises setting the first counter and the third counter to a first individual counter and the second counter and the fourth counter to a second individual counter based on the absence of the coincidence counting signal, as discussed herein.

The methods as described herein are also implemented in some embodiments as a computer program that, when executed on a computer and/or processor, causes the computer and/or processor to perform the methods. In some embodiments, there is also provided a non-transitory computer readable recording medium having stored therein a computer program product which, when executed by a processor (such as the processor described above), causes the method described herein to be performed.

Returning to fig. 1, a schematic diagram of a SPAD-based photon counting pixel 1 and PFE (pixel front end element (circuit)) is shown. In this embodiment, a SPAD 2 device biased in Geiger mode generates a pulse at its anode, a so-called "event" is generated. The pulse may be filtered by a comparator/inverter (or any other interface circuitry) and the events are then counted by the counter 3.

It should be noted that in fig. 1, two pixels are shown for illustration purposes, but in general, the present disclosure is also applicable to more pixels.

In this embodiment, SPAD 2 is depicted as a passive quenching structure for simplicity, but it may be an active quenching SPAD, an external clock quenching SPAD, or the like. Furthermore, the present disclosure is not limited to SPADs, but may also be applied based on one or more APDs or any other pixels having similar characteristics that generate digital events in response to incident photons. Counter 3 is reduced to a counter block but may be a ripple counter, an LFSR counter or any other circuitry capable of accumulating events generated by SPADs.

Fig. 2 shows in block diagram an embodiment of photon counting ToF circuitry 10 comprising photon counting circuitry 11, which is embodied as a "coincidence detection" block 11.

In this embodiment, two pixels are shown (as already shown in fig. 1) (without limiting the disclosure in this respect), each pixel being SPAD-based (i.e., SPAD1 and SPAD 2). The coincidence detection block 11 is configured to monitor the outputs of clocks CLK1 and CLK2 of SPAD1 and SPAD2, respectively.

If the clock signals (corresponding to the pixel signals, as described above), CLK1 and CLK2, generated by the two SPADs are coincidence signals or have a sufficiently high overlap in the time domain, then the coincidence detection block determines that they are coincidence events and outputs YES (which indicates that they are coincidence events; the present disclosure is not limited to output YES, as any other way of expressing coincidence is contemplated) to turn on switch SW2 so that the generated coincidence clock signal CLK passes through switch SW2 to the common counter 12. During this process, the other switch SW1 is turned off (i.e., remains in the off state).

If the clock signals CLK1 and CLK2 are not coincidence signals, the coincidence detection block determines that they are non-coincidence events and outputs NO (which indicates that they are not coincidence events), thereby turning on the switch SW1, letting the two clock signals pass through the switch SW1 to the individual counter 13 of SPAD1 and the individual counter 13' of SPAD 2.

In some embodiments, the coincidence circuit may take some time to complete the determination and cause the use of buffered clock signals CLK1D and CLK2D, which are respective buffered versions of CLK1 and CLK2 caused by the delay unit.

Fig. 3 and 4 show a further embodiment of photon counting ToF circuitry 20 (fig. 3) including photon counting circuitry 21 according to the present disclosure and a clock diagram 30 (in fig. 4) demonstrating how photon counting circuitry 21 may be controlled.

In the embodiment of fig. 3, the outputs of two SPADs (i.e., CLK1 and CLK 2) are monitored and an additional clock signal CLK3 is generated. In this embodiment, photon counting circuitry 21 is configured to detect an overlap between clock signals CLK1 and CLK2 and output CLK3 when an overlap between CLK1 and CLK2 is detected.

Schematic diagrams a) and b) of fig. 4 show embodiments of clock signals in case of overlap, whereas schematic diagrams c) and d) show embodiments of clock signals in case of non-overlap.

As can be seen from the diagrams a) and b), the clock signal CLK3 corresponds to a later in time clock signal of the clock signals CLK1 and CLK 2. However, CLK3 is output only when the degree of overlap of CLK1 and CLK2 is sufficient.

If there is no overlap, as shown in diagrams c) and d), where the two clock signals CLK1 and CLK2 are completely non-overlapping, no signal is generated for CLK 3.

Photon counting circuitry may be used in combining pixels in accordance with the present disclosure (e.g., two pixels of fig. 3, although the present disclosure is not limited in this respect). For example, if the two pixels of fig. 3 should be combined, and when they generate coincidence pixel signals as described herein (i.e., signals CLK1 and CLK2 overlap in time to some extent), only one count will be recorded when no coincidence is detected. However, when the same or similar circuitry as in fig. 3 is applied to such a merged pixel, the count number of the common counter may be multiplied by two to reproduce the real event number. Thus, more counts can be accumulated, which can optimize the signal-to-noise ratio (which typically corresponds to the square root of the number of counts).

Another embodiment of photon counting ToF circuitry 40 that includes photon counting circuitry is depicted in fig. 5 and 6, which depict the same circuitry, but in different operating states. Fig. 5 depicts the state where the "coincidence counting mode" itself is deactivated, and counters 41 and 42 always act together as separate counters for SPAD 1 and counters 43 and 44 always act together as separate counters for SPAD 2. Thus, the circuitry of fig. 5 operates as a differential mode counter.

In fig. 6, a state in which the "coincidence counting mode" is activated is shown, which means that coincidence can be generally detected. In this state, if coincidence is determined, the counters 41 and 43 together function as a common counter for SPAD1 and SPAD2, and if coincidence is not present, the counters 42 and 44 are individual counters. Thus, the circuitry of fig. 6 operates as a common mode counter.

In addition to the counters 41 to 44, photon counting circuitry 45 is also shown. As already discussed above, the delay lines 46 and 47 are used to generate a delayed clock signal when a non-coincidence is determined. In addition, a multiplexer with a control signal "ModSel" (mode select) is added to switch photon counting ToF circuitry 40 between normal mode (individual counters for each pixel, as shown in fig. 5) and shared counter mode (as shown in fig. 6). This may give the circuit flexibility to switch between these two modes.

When ModSel is zero (the case of fig. 5), there are two separate counters based on the counters 41 and 42 of SPAD1 and the counters 43 and 44 of SPAD 2. In this mode, each of the individual counters has a bit length of log ₂(2^M+2^N), where M is the bit length of the counters 42 and 44 and N is the bit length of the counters 41 and 43, where the present disclosure is not limited to any particular bit length, and the bit lengths of the counters 42 and 44 and 41 and 43 may be different from each other.

When ModSel is one (case of fig. 6), coincidence counting is used. When coincidence is detected, a signal is generated by photon counting circuitry 45 in the form of a clock signal (not depicted), but similar to that shown in fig. 4 a) or fig. 4 b).

The clock pulses are counted by a common counter formed by the counters 41 and 43, as explained above. The common counter is formed with a bit length of twice N. When no coincidence is detected, photon counting circuitry 45 generates no signal and the corresponding pixel signals are counted by counters 42 and 44, respectively, operating as separate counters.

For example, if the counter bit length N is seven and the counter bit length M is five, the common counter has fourteen bits and thus can store a fourteen-bit (i.e., log ₂(2¹⁴+2⁵) common value and a five-bit differential value, while in a mode where coincidence counting is not activated at all (fig. 5), the total bit length is twelve bits.

Fig. 7 illustrates in block diagram form an embodiment of a photon counting method 50 in accordance with the present disclosure.

At 51, it is determined whether there is compliance, as discussed herein.

At 52, if a coincidence is determined to exist, a coincidence count signal is generated, as discussed herein.

Fig. 8 shows in block diagram form an embodiment of a photon counting method 60 in accordance with the present disclosure.

At 61, it is determined that there is a non-compliance, as discussed herein.

At 62, photon counts are stored in a separate counter, as discussed herein.

Fig. 9 shows in block diagram form an embodiment of a photon counting method 70 in accordance with the present disclosure.

At 71, the presence of a coincidence is determined, as discussed herein.

At 72, a coincidence count signal is generated, as discussed herein.

At 73, the coincident photon counts are stored in a common counter, as discussed herein.

Fig. 10 shows in block diagram form an embodiment of a photon counting method 75 according to the present disclosure.

At 76, it is determined whether there is compliance, as discussed herein.

At 77, the corresponding counter is set to a common counter or an individual counter, depending on whether compliance is present, as discussed herein.

In fig. 11, an embodiment of a photon counting time-of-flight imaging system 80 is shown at a high level, which is embodied herein as a photon counting ToF camera and may be used for depth sensing or providing distance measurements, and has photon counting circuitry 87 configured to perform the methods as discussed herein and form control of the photon counting ToF device 80 (and which includes (not shown) corresponding processors, memory and storage devices (i.e. counters, as discussed herein).

Photon counting ToF imaging system 80 has a pulsed light source 81 and it includes a light emitting element (based on a laser diode), wherein in this embodiment the light emitting element is a narrow band laser element.

The light source 81 emits pulsed light towards a scene 82 (region or object of interest) which reflects the light. Scene 82 may be scanned by repeatedly emitting light to scene 82, as is well known to those skilled in the art. The reflected light is focused by the optical stack 83 to the light detector 84.

Photon counting time-of-flight light detection circuitry 87 also forms control of the light source such that it also includes corresponding control circuitry (not depicted).

The light detector 84 has an image sensor 85 implemented based on a plurality of SPADs (single photon avalanche diodes) formed in an array of pixels (imaging elements), and a microlens array 86 that focuses light reflected from the scene 82 to the image sensor 85 (to each pixel of the image sensor 85).

Light emission time information is fed from the light source 81 to photon counting circuitry 87 comprising a photon counting unit 88 which, when light reflected from the scene 82 is detected, also receives corresponding time information from the image sensor 85. In general, photon counting time-of-flight systems are also capable of performing time-of-flight measurements. Based on the emission time information received from the light source 81 and the arrival time information received from the image sensor 85, the photon counting unit 88 calculates a round trip time of the light emitted from the light source 81 and reflected by the scene 82, and based on this calculates a distance d (depth information) between the image sensor 85 and the scene 82 based on the determination of the light event, as discussed herein. Further, as discussed herein, photon counting unit 88 has information about the point in time when the common mode count and differential mode count are activated, such that counts may be separately assigned.

The depth information is fed from the photon counting unit 88 to a 3D image reconstruction unit 89 of the photon counting circuitry 87, which reconstructs (generates) a 3D image of the scene 82 based on the depth information received from the time-of-flight measurement unit 88.

It should be appreciated that the embodiments describe methods with exemplary ordered method steps. However, the specific ordering of method steps is given for illustrative purposes only and should not be construed as having a constraining force. Variations in the ordering of the method steps may be apparent to a skilled artisan.

Note that the division of control 87 into units 88-89 is for illustration purposes only, and the present disclosure is not limited to any particular division of functionality in a particular unit. For example, the control 87 may be implemented by a corresponding programmed processor, field Programmable Gate Array (FPGA), or the like.

The methods described herein may also be implemented as a computer program which, when executed on a computer and/or processor, causes the computer and/or processor to perform the methods. In some embodiments, there is also provided a non-transitory computer readable recording medium having stored therein a computer program product which, when executed by a processor (such as the processor described above), causes the described method to be performed. If not otherwise stated, all of the elements and entities described in this specification and claimed in the appended claims may be implemented as integrated circuit logic (e.g., on a chip), and the functions provided by such elements and entities may be implemented by software if not otherwise stated.

To the extent that the above-disclosed embodiments are implemented, at least in part, using software-controlled data processing apparatus, it will be appreciated that computer programs providing such software control, as well as transmission, storage or other media providing such computer programs, are contemplated as aspects of the present disclosure.

Note that the present technology can also be configured as follows.

(1) Photon counting circuitry configured to:

(2) The photon counting circuitry according to (1), further configured to:

If the degree of overlap in time of the at least two pixel signals is below a predetermined threshold, the counting mode of operation is determined to be a non-conforming counting mode of operation.

(3) The photon counting circuitry of (1) or (2), further configured to:

In a coincidence counting mode of operation, photon counts indicated by at least two pixel signals are stored in a common counter that is common to at least two pixels.

(4) The photon counting circuitry according to (3), further configured to:

in the coincidence counting mode of operation, one coincidence photon count of at least two pixel signals is stored as one count in a common counter.

(5) The photon counting circuitry of any one of (1) to (4), further configured to:

In the non-coincidence counting mode of operation, photon counts indicated by the at least two pixel signals are stored in separate counters for each of the at least two pixel signals.

(6) The photon counting circuitry according to any one of (1) to (5), wherein the coincidence counting signal is a clock signal.

(7) The photon counting circuitry of (6), wherein the coincidence count signal corresponds to a later in time pixel signal of the at least two pixel signals.

(8) The photon counting circuitry according to any one of (1) to (7), further comprising at least three counters including at least one common counter for conforming to a counting mode of operation and at least two separate counters for non-conforming to a counting mode of operation.

(9) The photon counting circuitry according to any one of (1) to (8), further comprising four counters including first to fourth counters, the circuitry being further configured to:

the first counter and the second counter are set to a common counter for the coincidence counting mode of operation based on the coincidence counting signal.

(10) The photon counting circuitry according to (9), further configured to:

the first counter and the third counter are set to the first individual counter and the second counter and the fourth counter are set to the second individual counter based on the absence of the coincidence count signal.

(11) A photon counting method, comprising:

(12) The photon counting method according to (11), further comprising:

(13) The photon counting method according to (11) or (12), further comprising:

(14) The photon counting method according to (13), further comprising:

(15) The photon counting method according to any one of (11) to (14), further comprising:

(16) The photon counting method according to any one of (11) to (15), wherein the coincidence counting signal is a clock signal.

(17) The photon counting method according to (16), wherein the coincidence count signal corresponds to a later-in-time pixel signal of the at least two pixel signals.

(18) The photon counting method according to any one of (11) to (17), applying at least three counters, including at least one common counter for conforming to a counting operation mode, and at least two separate counters for non-conforming to a counting operation mode.

(19) The photon counting method according to any one of (11) to (18), four counters are applied, including first to fourth counters, the method further comprising:

(20) The photon counting method according to (19), further comprising:

(21) A computer program comprising program code which, when executed on a computer, causes the computer to perform the method according to any one of (11) to (20).

(22) A non-transitory computer readable recording medium in which a computer program product is stored, which, when executed by a processor, causes the method according to any one of (11) to (20) to be performed.

Claims

1. Photon counting circuitry configured to:

Determining whether there is a signal coincidence of at least two pixel signals of at least two pixels of a photon counting time-of-flight sensor based on a degree of overlap in time of the at least two pixel signals for setting a counting operation mode to a coincidence counting operation mode in which counts of the at least two pixel signals are counted together if the signal coincidence is present, and

A coincidence count signal is generated for setting the count mode of operation to the coincidence count mode of operation.

2. The photon counting circuitry according to claim 1, further configured to:

The counting mode of operation is determined to be a non-coincidence counting mode of operation if the degree of overlap of the at least two pixel signals in time is below a predetermined threshold.

3. The photon counting circuitry according to claim 1, further configured to:

In the coincidence counting mode of operation, photon counts indicated by the at least two pixel signals are stored in a common counter that is common to the at least two pixels.

4. The photon counting circuitry according to claim 3, further configured to:

in the coincidence counting mode of operation, a coincidence photon count of the at least two pixel signals is stored as a count in the common counter.

5. The photon counting circuitry according to claim 1, further configured to:

in a non-coincidence counting mode of operation, photon counts indicated by the at least two pixel signals are stored in separate counters for each of the at least two pixel signals.

6. The photon counting circuitry of claim 1, wherein the coincidence count signal is a clock signal.

7. The photon counting circuitry of claim 6, wherein the coincidence count signal corresponds to a later in time pixel signal of the at least two pixel signals.

8. The photon counting circuitry of claim 1, further comprising at least three counters including at least one common counter for the coincidence counting mode of operation and at least two separate counters for non-coincidence counting modes of operation.

9. The photon counting circuitry of claim 1, further comprising four counters including a first counter to a fourth counter, the circuitry further configured to:

10. The photon counting circuitry according to claim 9, further configured to:

the first counter and third counter are set to a first individual counter and the second counter and fourth counter are set to a second individual counter based on the absence of the coincidence count signal.

11. A photon counting method, comprising:

12. The photon counting method according to claim 11, further comprising:

13. The photon counting method according to claim 11, further comprising:

14. The photon counting method according to claim 13, further comprising:

15. The photon counting method according to claim 11, further comprising:

16. The photon counting method according to claim 11, wherein the coincidence counting signal is a clock signal.

17. The photon counting method according to claim 16, wherein the coincidence count signal corresponds to a later in time pixel signal of the at least two pixel signals.

18. The photon counting method according to claim 11, applying at least three counters comprising at least one common counter for the coincidence counting mode of operation and at least two separate counters for non-coincidence counting modes of operation.

19. The photon counting method according to claim 11, four counters are applied, including a first counter to a fourth counter, the method further comprising:

20. The photon counting method according to claim 19, further comprising: