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CN119816190A - A method for preparing a magnetic memory and a magnetic memory - Google Patents

A method for preparing a magnetic memory and a magnetic memory Download PDF

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Publication number
CN119816190A
CN119816190A CN202311307640.2A CN202311307640A CN119816190A CN 119816190 A CN119816190 A CN 119816190A CN 202311307640 A CN202311307640 A CN 202311307640A CN 119816190 A CN119816190 A CN 119816190A
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China
Prior art keywords
layer
etching
etching stop
magnetic memory
stop layer
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Chinese (zh)
Inventor
吴云
杨保林
苏显鹏
王海笑
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Hikstor Technology Co Ltd
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Hikstor Technology Co Ltd
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Priority to CN202311307640.2A priority Critical patent/CN119816190A/en
Publication of CN119816190A publication Critical patent/CN119816190A/en
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00Galvanomagnetic devices
    • H10N50/01Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B61/00Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B61/00Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
    • H10B61/10Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices comprising components having two electrodes, e.g. diodes or MIM elements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00Galvanomagnetic devices
    • H10N50/10Magnetoresistive devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00Galvanomagnetic devices
    • H10N50/80Constructional details

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Hall/Mr Elements (AREA)

Abstract

The invention discloses a preparation method of a magnetic memory and the magnetic memory, which are applied to the technical field of memories and comprise the steps of preparing a bottom metal interconnection structure, arranging an etching stop layer on the surface of the bottom metal interconnection structure, sequentially preparing a through hole metal layer, a bottom electrode layer, an MTJ (magnetic junction transistor) and a top electrode layer based on the etching stop layer from bottom to top, etching the top electrode layer, detecting elements in an etching groove in the etching process, and performing certain excessive etching when detecting elements with different types of the etching stop layer and the protection layer exist in the etching groove, so that the wafer surface is completely etched, and finally the preparation of the magnetic memory is completed. By arranging the etching stop layer with different elements from the protection layer of the MTJ, the etching stop layer can play a role in limiting the etching stop position, and the copper exposure defect is eliminated.

Description

Preparation method of magnetic memory and magnetic memory
Technical Field
The present invention relates to the field of memory technologies, and in particular, to a method for manufacturing a magnetic memory and a magnetic memory.
Background
With the development of semiconductor devices, the chip size is gradually reduced, and the requirements for the manufacturing process are also increased, so that the multilayer interconnection technology has become an important component of the manufacturing process of large-scale integrated circuits and ultra-large-scale integrated circuits.
The protection layer of the MTJ (Magnetic Tunneling Junction, magnetic tunnel junction) needs to be opened in the etching of the top electrode, and the metal diffusion barrier layer on the bottom metal surface of the magnetic memory device and the protection layer of the MTJ are very thin and made of the same material at present, so that the etching barrier layer on the bottom metal surface and the protection layer of the MTJ are easily judged to be the same layer in the etching process, and the etching barrier layer on the bottom metal surface is over-etched to cause copper exposure defects, thereby seriously affecting the yield.
How to avoid the copper exposure defect caused by over etching of the etch stop layer when performing the top electrode etch is an urgent problem to be solved by those skilled in the art.
Disclosure of Invention
The invention aims to provide a preparation method of a magnetic memory, which can avoid over etching of an etching barrier layer, and another aim of the invention is to provide a magnetic memory, which can avoid over etching of the etching barrier layer.
In order to solve the above technical problems, the present invention provides a method for manufacturing a magnetic memory, including:
preparing a bottom metal interconnection structure;
Setting an etching stop layer on the surface of the bottom metal interconnection structure;
Sequentially preparing a through hole metal layer, a bottom electrode metal layer, an MTJ (magnetic tunnel junction) and a top electrode layer from bottom to top based on the etching stop layer, wherein at least one element in the protection layer material of the MTJ is different from at least one element in the etching stop layer material;
And etching the top electrode layer, detecting elements in an etching groove in the etching process, and performing excessive etching when detecting that elements of different types exist in the etching stopping layer and the protecting layer in the etching groove, so as to finally form the magnetic memory.
Optionally, the size of the via metal layer is smaller than the size of the bottom metal interconnection structure, and the etching stop layer covers the surface, which is not contacted with the via metal layer, of the bottom metal interconnection structure towards the side of the via metal layer.
Optionally, the elements of the material of the etching stop layer include at least one element different from the elements of the material of each film layer in the core structure layer.
Optionally, disposing an etch stop layer on the surface of the bottom metal interconnection structure includes:
A diffusion barrier sub-layer is arranged on the surface of the bottom metal interconnection structure;
And arranging an etching stop sub-layer on the surface of the diffusion barrier sub-layer, wherein at least one element in the etching stop sub-layer material is different from at least one element in the protection layer material.
Optionally, the thickness of the etching stop layer ranges from 10nm to 30nm, including the end point value.
Optionally, the thickness of the etching stop layer ranges from 20nm to 100nm, including the end point value.
Optionally, the amount of the over etching is 0% to 50%.
Optionally, the etching stop layer is a SiN film layer, and the protection layer is an AlO film layer.
Optionally, the etching stop layer is an AlO film layer, and the protective layer is a SiN film layer.
The invention also provides a magnetic memory prepared by the preparation method of the magnetic memory.
The preparation method of the magnetic memory comprises the steps of preparing a bottom metal interconnection structure, arranging an etching stop layer on the surface of the bottom metal interconnection structure, sequentially preparing a through hole metal layer, a bottom electrode metal layer, an MTJ (magnetic tunnel junction) and a top electrode layer based on the etching stop layer, etching the top electrode layer, detecting elements in an etching groove in the etching process, and performing excessive etching when detecting elements with different types from the etching stop layer and the protection layer exist in the etching groove, so that the magnetic memory is finally formed.
By arranging the film layer with different elements from the protection layer of the MTJ as the etching stop layer, the element types in the etching groove are detected during etching, and when the element which is exclusive to the etching stop layer is detected, a certain amount of excessive etching is performed, so that the wafer surface is ensured to be etched, the etching stop layer can play a role in limiting the etching stop position, the etching stop layer is prevented from being over-etched, the copper exposure defect is eliminated, and the product yield is improved.
The invention also provides a magnetic memory which has the same beneficial effects and is not described herein.
Drawings
For a clearer description of embodiments of the invention or of the prior art, the drawings that are used in the description of the embodiments or of the prior art will be briefly described, it being apparent that the drawings in the description below are only some embodiments of the invention, and that other drawings can be obtained from them without inventive effort for a person skilled in the art.
FIG. 1 is a flow chart of a method for manufacturing a magnetic memory according to an embodiment of the present invention;
FIGS. 2-9 are process flow diagrams illustrating a method for fabricating a magnetic memory according to embodiments of the present invention;
FIGS. 10-14 are process flow diagrams illustrating another exemplary method for fabricating a magnetic memory according to embodiments of the present invention;
Fig. 15 to 19 are process flow diagrams of a method for manufacturing a magnetic memory according to another embodiment of the present invention.
In the figure, a bottom metal interconnection structure, an etching stop layer, a diffusion barrier sub-layer, an etching stop sub-layer, a first dielectric layer, a through hole metal layer, a bottom electrode metal layer, a 5.MTJ (magnetic tunnel junction), a 6.protection layer, a 7.second dielectric layer and a 8.top electrode layer are shown as the components.
Detailed Description
The core of the invention is to provide a preparation method of a magnetic memory. In the prior art, the protection layer of the MTJ needs to be opened in the top electrode etching, and the metal diffusion barrier layer on the bottom metal surface of the magnetic memory device and the protection layer of the MTJ are thin and made of the same material at present, so that the etching barrier layer on the bottom metal surface and the protection layer of the MTJ are easily judged to be the same layer in the etching process, the etching barrier layer on the bottom metal surface is over-etched to cause copper exposure defects, and the yield is seriously affected.
The preparation method of the magnetic memory comprises the steps of preparing a bottom metal interconnection structure, arranging an etching stop layer on the surface of the bottom metal interconnection structure, sequentially preparing a through hole metal layer, a bottom electrode metal layer, an MTJ (magnetic tunnel junction) and a top electrode layer based on the etching stop layer from bottom to top, etching the top electrode layer, detecting elements in an etching groove in the etching process, and performing a certain amount of excessive etching when detecting elements of different types of the etching stop layer and the protection layer exist in the etching groove, so that the surface of a wafer is completely etched, and finally etching is stopped to complete the preparation of the magnetic memory.
By arranging the film layer with different elements as the etching stop layer, the element type in the etching groove is detected during etching, and etching is stopped when the element which is independent of the etching stop layer is detected, so that the etching stop layer can play a role in limiting the etching stop position, the etching stop layer is prevented from being over-etched, the copper exposure defect is eliminated, and the product yield is improved.
In order to better understand the aspects of the present invention, the present invention will be described in further detail with reference to the accompanying drawings and detailed description. It will be apparent that the described embodiments are only some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Referring to fig. 1, fig. 1 is a flowchart of a method for manufacturing a magnetic memory according to an embodiment of the invention.
Referring to fig. 1, in an embodiment of the present invention, a method for manufacturing a magnetic memory includes:
And S101, preparing a bottom metal interconnection structure.
In this embodiment, it is necessary to sequentially prepare each film layer from bottom to top, and then etch down from the top electrode layer 8 to form an independent MTJ structure, so as to manufacture the final magnetic memory. In this step, the bottom metal interconnection structure 1 may be formed by photolithography, development, etching, deposition, and other processes in sequence, and the specific structure of the bottom metal interconnection structure may refer to the prior art, and will not be described herein.
The bottom metal interconnection structure 1 may be specifically disposed in a substrate, where the substrate may specifically be formed of a composite structure such as a bottom dielectric layer, a bottom barrier layer, etc., and the specific structure of the substrate is not specifically limited in this embodiment.
And S102, arranging an etching stop layer on the surface of the bottom metal interconnection structure.
In this step, an etch stop layer 2 is typically provided on the surface of the bottom metal interconnect structure 1, for example, by using a deposition process, and the present application specifically requires that the element species of the etch stop layer 2 be specific, which requires that the element unique to the etch stop layer 2 be detectable from within the etch tank in a subsequent etching process. Generally, in this embodiment, parameters such as the strength of the etching stop layer 2 are not specifically limited, and specific contents of the etching stop layer 2 will be described in detail in the following embodiments of the present application, which are not described herein.
And S103, sequentially preparing a through hole metal layer, a bottom electrode metal layer, an MTJ (magnetic tunnel junction) and a top electrode layer based on the etching stop layer from bottom to top.
In this embodiment, at least one element in the material of the protection layer 6 of the MTJ5 is different from at least one element in the material of the etch stop layer 2. The magnetic memory is mainly used for realizing a memory function, and comprises a through hole metal layer 4, a bottom electrode metal layer 41, an MTJ5 and a top electrode layer 8 from bottom to top, wherein the MTJ5 is mainly used for realizing the memory function, a protective layer 6 is usually arranged on the outer layer of the MTJ5, the detailed structure of the MTJ5 can refer to the prior art, and details of the structure are not repeated, the bottom electrode metal layer 41 is the bottom electrode of the MTJ5, the through hole metal layer 4 and the bottom electrode metal layer 41 are mainly used for realizing the connection of the MTJ5 and the bottom metal interconnection structure 1, the top electrode layer 8 is required to be connected with the MTJ5, and a separate electrode is formed to be electrically connected with other external components after the subsequent etching is finished. Between the above structures, a dielectric layer is typically filled, and patterning of the formed film layer is typically required to form a specific structure when preparing the via metal layer 4, bottom electrode metal layer 41, and MTJ 5.
Specifically, in the preparation of the via metal layer 4, it is generally necessary to form a metal hole by photolithography, etching, chemical mechanical polishing, and the like, then fill metal into the metal hole to form the via metal layer 4, and form the bottom electrode metal layer 41 by photolithography, etching, chemical mechanical polishing, and the like. The thickness of the via metal layer 4 is usually 10nm to 50nm. Of course, the thickness of the via metal layer 4 is not particularly limited in this embodiment, and the specific value thereof depends on the specific situation. It should be noted that, in this embodiment, the size of the via metal layer 4 is generally smaller than the size of the bottom metal interconnect structure 1 that it contacts, so the etching stop layer 2 needs to cover the surface of the bottom metal interconnect structure 1 that is not contacted with the via metal layer 4 on the side of the via metal layer 4. I.e. the surface of the bottom metal interconnection structure 1 except the surface contacting the via metal layer 4 needs to be covered by the etching stop layer 2, so as to ensure that the etching stop layer 2 can be detected in time when the subsequent etching reaches a preset depth. Of course, if the accuracy of the subsequent etching process is high enough, the etching stop layer 2 may be only disposed on the surface of the bottom metal interconnection structure 1 corresponding to the etching groove, so as to reduce the usage of the etching stop layer 2.
After the bottom electrode metal layer 41 is formed, the MTJ5 may be formed by steps such as photolithography, etching, chemical mechanical polishing, etc., and the specific manufacturing process may refer to the prior art, and the thickness of the protective layer 6 of the MTJ5 is typically 10nm to 50nm. Of course, the thickness of the protective layer 6 in this embodiment is not particularly limited, and the specific value thereof depends on the specific situation. The first dielectric layer 3 is formed by filling a dielectric between the etching stop layer 2 and the protective layer 6, and the second dielectric layer 7 is formed by filling a dielectric on the upper layer of the protective layer 6.
Still later, a top electrode layer 8 may be provided on top of the MTJ5 based on a deposition process or other process to form a top electrode after subsequent dicing. The thickness of the top electrode layer 8 is typically between 10nm and 50nm. Of course, the thickness of the top electrode layer 8 is not particularly limited in this embodiment, and the specific value thereof depends on the specific situation.
In this embodiment, in order to ensure that the etching stop layer 2 can be detected in time during etching, in this step, at least one element of the material of the etching stop layer 2 may be set to include at least one element different from each element of the material of the film layers in the core structural layer. That is, at least one element of the etching stop layer 2 is not only not provided in the protective layer 6, but is not provided in the whole core structure layer, so that the detection is not interfered by other etched film layer composition elements, and the accuracy of the detection result is ensured.
And S104, etching the top electrode layer, detecting elements in the etching groove in the etching process, and performing excessive etching when detecting elements of different types in the etching stopping layer and the protective layer in the etching groove, so as to finally form the magnetic memory.
The embodiment is specifically directed to an etching process of the top electrode, and in this step, elements in the etching groove are detected when the top electrode layer 8 is etched, and at least the types of the elements in the etching groove are detected. Since at least one of the elements forming the etch stop layer 2 is not present in the protective layer 6 in this embodiment. Therefore, when the etching of the top electrode layer 8 detects that the elements in the etching stop layer 2 exist in the etching groove but the elements in the protection layer 6 are not exist, and when the elements in the different types of the etching stop layer 2 and the protection layer 6 are detected, it is determined that the etching stop layer 2 has been etched, and in this embodiment, a certain excessive etching is specifically required, so that the etching of the wafer surface is completed, and the structure of the magnetic memory is formed.
After it is determined that the etching stop layer 2 has been etched, since the etching stop layer 2 has a certain thickness in this embodiment, in order to ensure that the etching is completed on the wafer surface, a certain excessive etching may be added, and the amount of the excessive etching is usually 0% to 50%, that is, an excessive etching of usually 0% to 50% is added, so as to ensure that the etching is completed on the wafer surface.
According to the preparation method of the magnetic memory, provided by the embodiment of the invention, the film layer with different elements from the protection layer 6 of the MTJ5 is arranged as the etching stop layer 2, the etching is stopped by detecting the element types in the etching groove during etching, and when the element which is independent of the etching stop layer 2 is detected, the etching stop layer 2 can play a role in limiting the etching stop position, the over etching of the etching stop layer is avoided, the copper exposure defect is eliminated, and the product yield is improved.
The specific details of the method for manufacturing a magnetic memory according to the present invention will be described in the following embodiments of the present invention.
Referring to fig. 2 to 9, fig. 2 to 9 are process flow diagrams of a method for manufacturing a magnetic memory according to an embodiment of the invention.
Referring to fig. 2, in an embodiment of the present invention, a method for manufacturing a magnetic memory includes:
and S201, preparing a bottom metal interconnection structure.
Referring to fig. 3, this step is substantially identical to S101 in the above embodiment of the present invention, and the detailed description is omitted herein for reference.
And S202, arranging a diffusion barrier sub-layer on the surface of the bottom metal interconnection structure.
Referring to fig. 4, a bilayer structure is provided as the etching stop layer 2 in this step, and specifically, in this step, a diffusion barrier sub-layer 21 is provided on the surface of the bottom metal interconnection structure 1 through a deposition process or the like, where the diffusion barrier sub-layer 21 mainly plays a role of diffusion barrier, and limits penetration of atoms in the bottom metal interconnection structure 1 into other structures. The material of the diffusion barrier layer 21 may be referred to as a material of a diffusion barrier layer in the prior art, and is not specifically limited herein.
And S203, arranging an etching stop sub-layer on the surface of the diffusion barrier sub-layer.
Referring to fig. 5, in this embodiment, at least one element of the material of the etching stop layer 22 is different from at least one element of the material of the protection layer 6. In this step, the etching stop sub-layer 22 may be disposed on the surface of the diffusion barrier sub-layer 21 by deposition or other processes, where the function of the etching stop sub-layer 22 is mainly used to implement the function of positioning the etching stop position, and at least one element of the material of the etching stop sub-layer 22 is different from that of the material of the protective layer 6, so that the etching stop process is implemented at the position where the etching stop sub-layer 22 is located based on the element detection process in the etching process, thereby implementing the function of positioning the etching stop position by the etching stop sub-layer 22. In the application, the diffusion blocking function is realized through the diffusion blocking sub-layer 21, and the function of positioning the etching termination position is realized through the etching termination sub-layer 22. In this embodiment, the implementation of the diffusion blocking function and the implementation of the function of positioning the etching stop position are implemented through two sub-layers separately provided, namely, a diffusion blocking sub-layer 21 is provided on the surface of the bottom metal interconnection structure 1, then an etching stop sub-layer 22 is provided on the surface of the diffusion blocking sub-layer 21, and the etching stop layer 2 with the above functions is formed through the laminated structure of the diffusion blocking sub-layer 21 and the etching stop sub-layer 22. The thickness of the diffusion barrier sublayer 21 in this embodiment is generally in the range of 20nm to 70nm, inclusive. The thickness of the etching stopper layer 22 is generally in the range of 10nm to 30nm inclusive.
Specifically, in this embodiment, in order to ensure the accuracy of the subsequent measurement, the elements of the material of the etching stop layer 22 include at least one element different from the elements of the material of each film layer in the core structural layer. In general, the material of the diffusion barrier sublayer 21 may be SiN, alO, or the like, in this embodiment, siN may be specifically selected, and the material of the etching stop sublayer 22 may be SiN, alO, or the like, in this embodiment, alO may be specifically selected. In this step, it is also generally necessary to provide the first dielectric layer 3 on the surface of the etching stopper layer 22, so as to facilitate the preparation of the subsequent core structure layer.
And S204, sequentially preparing a through hole metal layer, a bottom electrode metal layer, an MTJ (magnetic tunnel junction) and a top electrode layer from bottom to top based on the etching stop layer.
Referring to fig. 6 to 8, in this step, the via metal layer 4, the bottom electrode metal layer 41, the MTJ5 and the top electrode layer 8 are prepared based on the etching stop layer 2 of the laminated structure of the diffusion barrier sublayer 21 and the etching stop sublayer 22, and the detailed description of the structure will be omitted herein. The side wall of the MTJ5 is covered with a protective layer 6, a second dielectric layer 7 is filled between the top metal layer and the top side of the protective layer 6, a bottom electrode metal layer 41 is disposed below the MTJ5, and the via metal layer 4 is connected with the bottom metal interconnection structure 1. The material of the protective layer 6 in the core structure layer may be SiN, alO, or the like, and SiN may be specifically selected in this embodiment.
And S205, etching the top electrode layer, detecting elements in the etching groove in the etching process, and performing excessive etching when detecting elements with different types in the etching stop layer and the protective layer in the etching groove, so as to finally form the magnetic memory.
Referring to fig. 9, the details of this step are substantially the same as S104 in the above embodiment of the present invention, and in this step, the etching stop process is completed when it is detected that the elements of different types from the etching stop sub-layer 22 and the protective layer 6 exist in the etching groove. When an over etch is performed, the etching process will eventually typically end up in the diffusion barrier sub-layer 21.
According to the preparation method of the magnetic memory, provided by the embodiment of the invention, the film layer with different elements from the protection layer 6 of the MTJ5 is arranged as the etching stop layer 2, the etching is stopped by detecting the element types in the etching groove during etching, and when the element which is independent of the etching stop layer 2 is detected, the etching stop layer 2 can play a role in limiting the etching stop position, the over etching of the etching stop layer is avoided, the copper exposure defect is eliminated, and the product yield is improved.
The specific details of the method for manufacturing a magnetic memory according to the present invention will be described in the following embodiments of the present invention.
Referring to fig. 10 to 14, fig. 10 to 14 are process flow diagrams of another specific method for manufacturing a magnetic memory according to an embodiment of the invention.
In an embodiment of the invention, a method for manufacturing a magnetic memory includes:
and S301, preparing a bottom metal interconnection structure.
The step is basically identical to S101 in the above embodiment of the present invention, and the detailed description will be omitted herein with reference to the above embodiment of the present invention.
And S302, arranging an etching stop layer on the surface of the bottom metal interconnection structure.
Referring to fig. 10, the step is substantially identical to S102 in the above embodiment of the present invention, and in detail, please refer to the above embodiment of the present invention, in this step, an AlO material may be specifically selected, an etching stop layer 2 is fabricated by a deposition process, etc., a first dielectric layer 3 is disposed on the surface of the etching stop layer 2, and in a subsequent step, a protective layer 6 in a core structural layer may be fabricated by a SiN material, that is, in this embodiment, the etching stop layer 2 is an AlO film layer, and the protective layer 6 is a SiN film layer.
In this step, the thickness of the etching stop layer 2 is thicker, which can simultaneously realize the effect of blocking diffusion and the effect of positioning the etching stop position. I.e. the above-mentioned etch stop layer 2 may limit penetration of atoms in the bottom metal interconnect structure 1 into other structures, in addition to the location of the etch stop. In this step, the thickness of the etching stop layer 2 is generally in the range of 20nm to 100nm inclusive.
And S303, sequentially preparing a through hole metal layer, a bottom electrode metal layer, an MTJ (magnetic tunnel junction) and a top electrode layer from bottom to top based on the etching stop layer.
Referring to fig. 11 to 13, this step is substantially identical to S103 in the above embodiment of the present invention, and the detailed description will be omitted herein for reference. The protective layer 6 in the core structure layer may be made of SiN material in this step.
And S304, etching the top electrode layer, detecting elements in the etching groove in the etching process, and performing excessive etching when detecting elements with different types in the etching stopping layer and the protective layer in the etching groove, so as to finally form the magnetic memory.
Referring to fig. 14, the step is substantially identical to S104 in the above embodiment of the present invention, and the detailed description is omitted herein for reference. When the element Al or O is detected in this step, this means that the etching stop layer 2 is etched, and the etching stop process needs to be completed. In case of an over-etch, the etching process will eventually typically end up in the etch stop layer 2.
According to the preparation method of the magnetic memory, provided by the embodiment of the invention, the film layer with different elements from the protection layer 6 of the MTJ5 is arranged as the etching stop layer 2, the etching is stopped by detecting the element types in the etching groove during etching, and when the element which is independent of the etching stop layer 2 is detected, the etching stop layer 2 can play a role in limiting the etching stop position, the over etching of the etching stop layer is avoided, the copper exposure defect is eliminated, and the product yield is improved.
The specific details of the method for manufacturing a magnetic memory according to the present invention will be described in the following embodiments of the present invention.
Referring to fig. 15 to 19, fig. 15 to 19 are process flow diagrams of a method for manufacturing a magnetic memory according to another embodiment of the invention.
In an embodiment of the invention, a method for manufacturing a magnetic memory includes:
And S401, preparing a bottom metal interconnection structure.
The step is basically identical to S101 in the above embodiment of the present invention, and the detailed description will be omitted herein with reference to the above embodiment of the present invention.
And S402, arranging an etching stop layer on the surface of the bottom metal interconnection structure.
Referring to fig. 15, the step is substantially identical to S102 in the above embodiment of the present invention, and for details, please refer to the above embodiment of the present invention, in this step, a SiN material may be specifically selected, an etching stop layer 2 may be fabricated by a deposition process, etc., and in the subsequent step, a protective layer 6 in a core structure layer may be fabricated by an AlO material, that is, in this embodiment, the etching stop layer 2 is a SiN film layer, and the protective layer 6 is an AlO film layer.
In this step, the thickness of the etching stop layer 2 is thicker, which can simultaneously realize the effect of blocking diffusion and the effect of positioning the etching stop position. I.e. the above-mentioned etch stop layer 2 may limit penetration of atoms in the bottom metal interconnect structure 1 into other structures, in addition to the location of the etch stop. In this step, the thickness of the etching stop layer 2 is generally in the range of 20nm to 100nm inclusive.
And S403, sequentially preparing a through hole metal layer, a bottom electrode metal layer, an MTJ (magnetic tunnel junction) and a top electrode layer from bottom to top based on the etching stop layer.
Referring to fig. 16 to 18, this step is substantially identical to S103 in the above embodiment of the present invention, and the detailed description will be omitted herein for reference. The protective layer 6 in the core structural layer may be made of AlO material in this step.
And S404, etching the top electrode layer, detecting elements in the etching groove in the etching process, and performing excessive etching when detecting elements of different types in the etching stopping layer and the protective layer in the etching groove, so as to finally form the magnetic memory.
Referring to fig. 19, the step is substantially identical to S104 in the above embodiment of the present invention, and the detailed description is omitted herein for reference. In this step, when the element N or the element Si is detected, this means that the etching stop layer 2 is etched, and the etching stop process needs to be completed. In case of an over-etch, the etching process will eventually typically end up in the etch stop layer 2.
According to the preparation method of the magnetic memory, provided by the embodiment of the invention, the film layer with different elements from the protection layer 6 of the MTJ5 is arranged as the etching stop layer 2, the etching is stopped by detecting the element types in the etching groove during etching, and when the element which is independent of the etching stop layer 2 is detected, the etching stop layer 2 can play a role in limiting the etching stop position, the over etching of the etching stop layer is avoided, the copper exposure defect is eliminated, and the product yield is improved.
The embodiment of the invention also provides a magnetic memory, which is prepared by the preparation method of the magnetic memory provided by any one of the embodiments of the invention. For the specific structure of the magnetic memory, such as MTJ5, reference may be made to the prior art, and no further description is given here.
The magnetic memory provided by the embodiment of the invention is prepared by the preparation method of the magnetic memory, so that the magnetic memory has no copper exposure risk and has higher yield.
In this specification, each embodiment is described in a progressive manner, and each embodiment is mainly described in a different point from other embodiments, so that the same or similar parts between the embodiments are referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant points refer to the description of the method section.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative elements and steps are described above generally in terms of functionality in order to clearly illustrate the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. The software modules may be disposed in Random Access Memory (RAM), memory, read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.
Finally, it is further noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises an element.
The preparation method of the magnetic memory and the magnetic memory provided by the invention are described in detail. The principles and embodiments of the present invention have been described herein with reference to specific examples, the description of which is intended only to facilitate an understanding of the method of the present invention and its core ideas. It should be noted that it will be apparent to those skilled in the art that various modifications and adaptations of the invention can be made without departing from the principles of the invention and these modifications and adaptations are intended to be within the scope of the invention as defined in the following claims.

Claims (10)

1.一种磁性存储器的制备方法,其特征在于,包括:1. A method for preparing a magnetic memory, comprising: 制备底部金属互连结构;preparing a bottom metal interconnect structure; 在所述底部金属互连结构的表面设置刻蚀终止层;Disposing an etch stop layer on the surface of the bottom metal interconnect structure; 基于所述刻蚀终止层从下到上依次制备通孔金属层、底部电极金属层、MTJ和顶部电极层;所述MTJ的保护层材质中的元素与所述刻蚀终止层材质中的元素至少有一种元素不同;Based on the etching stop layer, a through-hole metal layer, a bottom electrode metal layer, an MTJ and a top electrode layer are sequentially prepared from bottom to top; the elements in the protective layer material of the MTJ are different from the elements in the etching stop layer material in at least one element; 对所述顶部电极层进行刻蚀,并对刻蚀过程中刻蚀槽内的元素进行探测,当探测到所述刻蚀槽内存在所述刻蚀终止层与所述保护层不同种类的元素时,再进行过量刻蚀,最终形成所述磁性存储器。The top electrode layer is etched, and the elements in the etching groove are detected during the etching process. When it is detected that different types of elements of the etching stop layer and the protective layer exist in the etching groove, over-etching is performed to finally form the magnetic memory. 2.根据权利要求1所述的制备方法,其特征在于,所述通孔金属层的尺寸小于所述底部金属互连结构的尺寸,所述刻蚀终止层覆盖所述底部金属互连结构朝向所述通孔金属层一侧未与所述通孔金属层相接触的表面。2. The preparation method according to claim 1 is characterized in that the size of the through-hole metal layer is smaller than the size of the bottom metal interconnection structure, and the etching stop layer covers the surface of the bottom metal interconnection structure that is not in contact with the through-hole metal layer and faces the through-hole metal layer. 3.根据权利要求2所述的制备方法,其特征在于,所述刻蚀终止层材质的元素中包括至少一种与所述核心结构层中各个膜层材质的元素均不相同的元素。3 . The preparation method according to claim 2 , wherein the elements of the material of the etching stop layer include at least one element that is different from the elements of the materials of each film layer in the core structure layer. 4.根据权利要求1所述的制备方法,其特征在于,所述在所述底部金属互连结构的表面设置刻蚀终止层包括:4. The preparation method according to claim 1, characterized in that the step of providing an etching stop layer on the surface of the bottom metal interconnect structure comprises: 在所述底部金属互连结构表面设置扩散阻挡子层;Disposing a diffusion barrier sublayer on the surface of the bottom metal interconnect structure; 在所述扩散阻挡子层表面设置刻蚀终止子层;所述刻蚀终止子层材质中的元素与所述保护层材质中的元素至少有一种元素不同。An etch stop sublayer is disposed on the surface of the diffusion barrier sublayer; the elements in the material of the etch stop sublayer are different from the elements in the material of the protection layer in at least one element. 5.根据权利要求4所述的制备方法,其特征在于,所述刻蚀终止子层的厚度的取值范围为10nm至30nm,包括端点值。5 . The preparation method according to claim 4 , wherein the thickness of the etching stop sublayer ranges from 10 nm to 30 nm, including the end points. 6.根据权利要求1所述的制备方法,其特征在于,所述刻蚀终止层的厚度的取值范围为20nm至100nm,包括端点值。6 . The preparation method according to claim 1 , wherein the thickness of the etching stop layer ranges from 20 nm to 100 nm, including end points. 7.根据权利要求1所述的制备方法,其特征在于,所述过量刻蚀的量为0%至50%。7 . The preparation method according to claim 1 , wherein the amount of over-etching is 0% to 50%. 8.根据权利要求1所述的制备方法,其特征在于,所述刻蚀终止层为SiN膜层,所述保护层为AlO膜层。8 . The preparation method according to claim 1 , wherein the etching stop layer is a SiN film layer, and the protective layer is an AlO film layer. 9.根据权利要求1所述的制备方法,其特征在于,所述刻蚀终止层为AlO膜层,所述保护层为SiN膜层。9 . The preparation method according to claim 1 , wherein the etching stop layer is an AlO film layer, and the protective layer is a SiN film layer. 10.一种磁性存储器,其特征在于,为由权利要求1至9任一项权利要求所述的一种磁性存储器的制备方法所制备而成的磁性存储器。10. A magnetic memory, characterized in that it is a magnetic memory prepared by the method for preparing a magnetic memory according to any one of claims 1 to 9.
CN202311307640.2A 2023-10-10 2023-10-10 A method for preparing a magnetic memory and a magnetic memory Pending CN119816190A (en)

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100178714A1 (en) * 2009-01-09 2010-07-15 Samsung Electronics Co., Ltd. Method of forming magnetic memory device
CN105637666A (en) * 2013-10-15 2016-06-01 艾沃思宾技术公司 Isolation of magnetic layers during etch in a magnetoresistive device
CN106505007A (en) * 2016-12-26 2017-03-15 成都海威华芯科技有限公司 A kind of endpoint monitoring suitable of HEMT dorsal pore etching
CN109560102A (en) * 2017-09-26 2019-04-02 中电海康集团有限公司 MRAM and its production method
CN113314562A (en) * 2020-02-27 2021-08-27 台湾积体电路制造股份有限公司 Integrated circuit and method of forming an integrated circuit
US20220131070A1 (en) * 2020-10-27 2022-04-28 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor structure and method for forming the same

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100178714A1 (en) * 2009-01-09 2010-07-15 Samsung Electronics Co., Ltd. Method of forming magnetic memory device
CN105637666A (en) * 2013-10-15 2016-06-01 艾沃思宾技术公司 Isolation of magnetic layers during etch in a magnetoresistive device
CN106505007A (en) * 2016-12-26 2017-03-15 成都海威华芯科技有限公司 A kind of endpoint monitoring suitable of HEMT dorsal pore etching
CN109560102A (en) * 2017-09-26 2019-04-02 中电海康集团有限公司 MRAM and its production method
CN113314562A (en) * 2020-02-27 2021-08-27 台湾积体电路制造股份有限公司 Integrated circuit and method of forming an integrated circuit
US20220131070A1 (en) * 2020-10-27 2022-04-28 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor structure and method for forming the same

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