CN119728018A - Communication method, device, equipment and computer-readable medium based on RT_Bus - Google Patents
Communication method, device, equipment and computer-readable medium based on RT_Bus Download PDFInfo
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Abstract
The application relates to a communication method, device and equipment based on RT_Bus and a computer readable medium. The method comprises the steps that after receiving handshake signals sent by host equipment through an RT_Bus Bus, the host equipment sends communication confirmation signals to the host equipment, after receiving the communication confirmation signals, the host equipment sends data frames containing GPIO state information and a first CRC check code to the slave equipment, after receiving the data frames, the slave equipment extracts the corresponding GPIO state information and check codes, CRC check is conducted on the GPIO state information through the first CRC check code, if check fails, error prompt information is sent to the host equipment, and after receiving the error prompt information, the host equipment resends the data frames to the slave equipment through the RT_Bus Bus until the CRC check passes. The application solves the problems that the common GPIO can only send and can not confirm correct reception, data transmission is easy to be interfered and communication protocol is complex.
Description
Technical Field
The present application relates to the field of communications technologies, and in particular, to a method, an apparatus, a device, and a computer readable medium for rt_bus based communications.
Background
In the field of industrial equipment communication, signal transmission between equipment is of paramount importance. Traditionally, when GPIO (general purpose input output) signal communication between two devices is required, complex cable connections are often relied upon. These cables are numerous and present a number of problems in practical applications. For example, when some GPIOs involve a large current, such as GPIO cables used to control solenoid valves, the cables themselves may be relatively massive. When many cables are close to each other, the problem of mutual interference is easy to generate, and signal transmission errors can be caused, so that the normal operation of equipment is affected. To mitigate this interference, it is often necessary to add shielding measures to the GPIO cable where the current is large, which undoubtedly increases the cost and complexity of installation.
The existing real-time communication technology adopts an IP core mode to analyze real-time signals, the external GPIO signals are overlapped on the RT_BusIP core, signals are sent to a slave node through a master node by an RT_Bus Bus, GPIO communication between two devices can be realized only by +/-two lines of the RT_Bus, and wiring harnesses are greatly reduced. However, this technique has certain limitations. RTBus (serial real-time bus) is different from the common MODBUSRTU industrial communication protocol. MODBUSRTU have well-defined address fields, data fields, function codes, etc., each bit having a well-defined meaning. And RTBus only requires that the transceiving ends self-agree on the definition of each bit, which increases the complexity of configuration and the potential risk of errors to some extent. Although RTBus can ensure the accuracy of mutual monitoring and transmission of devices at two ends to a certain extent by means of heartbeat bit which is hopped once per frame and the mode of overlapping all GPIO signals on RT_BusIP (transmitting) core, transmitting to RT_BusIP (receiving) core through bus and analyzing into normal GPIO signals, the scheme proposed by the patent still has the defects. The common GPIO can only transmit data which cannot confirm correct reception, is easy to interfere with data transmission, has complex communication protocols, lacks a data accuracy guarantee mechanism and the like.
In view of the above problems, no effective solution has been proposed at present.
Disclosure of Invention
The application provides a communication method based on RT_Bus, which aims to solve the technical problems that the common GPIO can only send data which cannot be confirmed to be received correctly, data transmission is easy to be interfered, a communication protocol is complex and a data accuracy guarantee mechanism is lacked.
According to one aspect of the embodiment of the application, the communication method based on the RT_Bus comprises the steps that after receiving a handshake signal sent by host equipment through an RT_Bus Bus, the host equipment sends a communication confirmation signal to the host equipment, after receiving the communication confirmation signal, the host equipment sends a data frame containing GPIO state information and a first CRC check code to the slave equipment, after receiving the data frame, the slave equipment extracts the corresponding GPIO state information and the check code, CRC check is conducted on the GPIO state information through the first CRC check code, if check fails, error prompt information is sent to the host equipment, and after receiving the error prompt information, the host equipment resends the data frame to the slave equipment through the RT_Bus Bus until CRC check passes.
Optionally, before the slave device receives the handshake signal sent by the host device through the rt_bus, the method further comprises determining a communication connection mode between the host device and the slave device according to an rt_bus specification, configuring an rt_bus interface between the host device and the slave device according to the communication connection mode, writing a driver and a communication protocol stack between the host device and the slave device in the rt_bus interface, initializing a host signal processing module of the host device and a slave signal processing module of the slave device, loading an rt_bus ip core in the host signal processing module and the slave signal processing module, and generating the handshake signal by the host signal processing module and sending the handshake signal to the slave signal processing module of the slave device through the rt_bus.
Optionally, after receiving the handshake signal sent by the host device through the rt_bus, the slave device sends a communication acknowledgement signal to the host device, which includes that after receiving the handshake signal sent by the host device, the slave device obtains a host identity based on the handshake signal, compares the host identity with a preset identity, if the host identity is invalid, sends identity invalidation information to the host device, and if the communication protocol of the handshake signal is invalid, sends a communication failure signal to the host device, and if the communication protocol is valid, sends a communication acknowledgement signal to the host device.
Optionally, the host device receives the communication confirmation signal and then sends a data frame containing GPIO state information and a first CRC check code to the slave device, wherein the host device collects the GPIO state information of a GPIO pin through a host signal processing module, generates the first CRC check code of the GPIO state information through a CRC algorithm, generates the data frame based on the GPIO state information and the corresponding first CRC check code, and sends the data frame to the slave signal processing module of the slave device through an RT_Bus Bus.
Optionally, before the host signal processing module of the host device sends the data frame to the slave signal processing module of the slave device through the rt_bus, the method further comprises the steps that the host device generates a state synchronization signal for detecting whether the communication between the host device and the slave device is normal, the state synchronization signal is added at a preset position of the data frame, and the state synchronization signal is provided with signal transmission clocks of the host device and the slave device.
Optionally, the slave device receives the data frame and extracts the corresponding GPIO state information and the check code, performs CRC check on the GPIO state information through the first CRC check code, if the check fails, sends error prompt information to the host device, and comprises the slave device receives the data frame and analyzes the data frame to extract the GPIO state information, the first CRC check code and a state synchronization signal, the slave device generates a second CRC check code corresponding to the GPIO state information through a CRC algorithm, compares the second CRC check code with the first CRC check code, if the second CRC check code is identical with the first CRC check code, the CRC check passes, if the second CRC check code is different from the first CRC check code, the CRC check fails, the slave device generates error prompt information and sends the error prompt information to the host device through an RT_Bus Bus, the cluster device judges whether communication with the host device is normal or not according to the state synchronization signal, if the communication signal is not normal, the communication signal is sent to the host device, and the host device receives the communication signal is adjusted after the communication signal is abnormal.
The host equipment re-transmits a data frame to the slave equipment through the RT_Bus Bus after receiving the error prompt information until CRC check passes, and comprises the steps that the host equipment analyzes according to the error prompt information transmitted by the slave equipment to obtain an error type and an error reason, the host equipment re-acquires GPIO state information through a host signal processing module and generates a CRC check code corresponding to the GPIO state information based on a CRC algorithm, updates the data frame based on the GPIO state information and the CRC check code and transmits the updated data frame to a slave signal processing module of the slave equipment through the RT_Bus Bus, the slave signal processing module of the slave equipment extracts the GPIO state information and the CRC check code based on the data frame and performs CRC check on the GPIO state information based on the CRC check code, and the steps are iteratively executed until the CRC check passes.
According to another aspect of the embodiment of the application, the communication device based on the RT_Bus comprises a communication establishment module, a data transmission module and a data retransmission module, wherein the communication establishment module is used for receiving a handshake signal sent by host equipment through the RT_Bus Bus by the slave equipment, sending a communication acknowledgement signal to the host equipment, the data transmission module is used for sending a data frame containing GPIO state information and a first CRC check code to the slave equipment after receiving the communication acknowledgement signal, the data check module is used for extracting the corresponding GPIO state information and the check code after receiving the data frame by the slave equipment, carrying out CRC check on the GPIO state information through the first CRC check code, and sending error prompt information to the host equipment if the check fails, and the data retransmission module is used for retransmitting the data frame to the slave equipment through the RT_Bus Bus after receiving the error prompt information until the CRC check passes.
According to another aspect of the embodiments of the present application, there is provided an electronic device, including a memory, a processor, a communication interface, and a communication Bus, where the memory stores a computer program capable of running on the processor, the memory, the processor, and the processor communicate through the communication Bus and the communication interface, and the processor implements the steps of the rt_bus-based communication method when executing the computer program.
According to another aspect of the embodiments of the present application, there is provided a computer readable medium having a processor executable nonvolatile program code for causing a processor to perform the above-mentioned rt_bus-based communication method.
Compared with the related art, the technical scheme provided by the embodiment of the application has the following advantages:
According to the application, after the slave device receives the handshake signal of the host device, the communication acknowledgement signal is sent to the host device, so that reliable connection between the host device and the slave device can be ensured to be successfully established before data transmission is started, data loss or transmission errors caused by unstable connection are effectively avoided, and a solid foundation is laid for subsequent information interaction. The data frame contains the first CRC check code, and the slave device uses the check code to carry out CRC check on the GPIO state information, so that whether errors occur in the data transmission process can be detected with high precision. The CRC algorithm has strong error detection capability, can detect common error types such as multi-bit errors, burst errors and the like in the data frame, and ensures the accuracy of GPIO state information received by the slave equipment. When the check fails, the slave device sends error prompt information to the host device, and the host device resends the data frame until the CRC check passes, and the feedback and retransmission mechanism forms a closed loop error correction system. It ensures that data can be received in the correct form by the slave device, thereby ensuring the reliability of the data transmission of the whole communication system.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the application and together with the description, serve to explain the principles of the application.
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the related art, the drawings that are required to be used in the embodiments or the related technical descriptions will be briefly described, and it will be apparent to those skilled in the art that other drawings can be obtained according to these drawings without inventive effort.
FIG. 1 is a schematic diagram of a hardware environment of a communication method based on RT_Bus according to an embodiment of the present application;
fig. 2 is a flow chart of a communication method based on rt_bus according to an embodiment of the present application;
FIG. 3 is a communication schematic diagram of a communication method based on RT_Bus according to an embodiment of the present application;
fig. 4 is a block diagram of a communication device based on rt_bus according to an embodiment of the present application;
fig. 5 is a schematic structural diagram of an alternative electronic device according to an embodiment of the present application.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present application more apparent, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application, and it is apparent that the described embodiments are some embodiments of the present application, but not all embodiments of the present application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
In the following description, suffixes such as "module", "component", or "unit" for representing elements are used only for facilitating the description of the present application, and are not of specific significance per se. Thus, "module" and "component" may be used in combination.
In the related art, the general GPIO can only transmit data which cannot be confirmed to be received correctly, data transmission is easy to be interfered, a communication protocol is complex, a data accuracy guarantee mechanism is lacked, and the like.
In order to solve the problems mentioned in the background art, according to an aspect of the embodiments of the present application, an embodiment of a communication method based on rt_bus is provided.
Alternatively, in the embodiment of the present application, the above method may be applied to a hardware environment composed of the terminal 101 and the server 103 as shown in fig. 1. As shown in fig. 1, the server 103 is connected to the terminal 101 through a network, which may be used to provide services to the terminal or a client installed on the terminal, and a database 105 may be provided on the server or independent of the server, for providing data storage services to the server 103, where the network includes, but is not limited to, a wide area network, a metropolitan area network, or a local area network, and the terminal 101 includes, but is not limited to, a PC, a mobile phone, a tablet, and the like.
In the embodiment of the present application, a communication method based on rt_bus may be executed by the server 103, or may be executed by the server 103 and the terminal 101 together, as shown in fig. 2, the method may include the following steps:
Step S202, after receiving a handshake signal sent by a host device through an RT_Bus Bus, a slave device sends a communication confirmation signal to the host device;
optionally, before the slave device receives the handshake signal sent by the host device through the rt_bus, the method further includes:
determining a communication connection mode between the host equipment and the slave equipment according to the RT_Bus Bus specification;
Configuring RT_Bus Bus interfaces of the host equipment and the slave equipment according to a communication connection mode;
Writing a driver and a communication protocol stack between a host device and a slave device in an RT_Bus Bus interface;
initializing a host signal processing module of host equipment and a slave signal processing module of slave equipment, and loading RT_BusIP cores in the host signal processing module and the slave signal processing module;
The host device generates a handshake signal through the host signal processing module and sends the handshake signal to the slave signal processing module of the slave device through the rt_bus.
It can be understood that in this embodiment, communication between a Master device (Master) and a Slave device (Slave) is mainly implemented through an rt_bus, and first, according to an rt_bus specification, a communication connection manner between the Master device and the Slave device is determined, where the Master device is responsible for initiating scheduling of communication and data transmission, and the Slave device mainly performs data receiving and responding. For the rt_bus interface of the host device, the electrical parameters thereof, such as a voltage range of 3.3V, a data transmission rate of 10Mbps, etc., are set according to the rt_bus specification. Meanwhile, a proper transceiver chip is configured in the interface circuit so as to realize level conversion and driving capability enhancement of signals. For interfaces of the slave devices, corresponding electric parameter matching and transceiver configuration are also carried out, so that normal connection and communication of the slave devices on a physical layer are ensured. And writing a driver in the RT_Bus Bus interface of the host equipment, wherein the driver is responsible for controlling the functions of initializing the Bus interface, transmitting and receiving data, interrupt processing and the like. For example, when the host device has data to send, the driver packages the data in a predetermined format and controls the sending pins of the Bus interface to send the data onto the rt_bus. Meanwhile, a communication protocol stack is written, and a data frame structure is defined, wherein a frame head is a specific byte sequence (such as 0 xAB) to represent the beginning of the data frame, and a frame tail is 0xCD to be used for identifying the end of the data frame. Specific fields are reserved in the data frame for placing contents such as GPIO (general purpose input output) state information, device addresses, command codes, and the like. And the data checking mode is specified, such as data checking by using CRC-16 algorithm, and the calculated CRC check code is placed in the check field of the data frame. And writing a corresponding driver and a communication protocol stack in an RT_Bus Bus interface of the slave equipment. The driver of the slave device is mainly responsible for monitoring the RT_Bus Bus, and when detecting that a data frame arrives, the slave device triggers an interrupt and receives data. The communication protocol stack is responsible for analyzing the received data frame, extracting the GPIO status information therein, judging the correctness of the data (through CRC check), and the like. The host signal processing module of the host device is initialized, and the buffer size in the host signal processing module is set to 1024 bytes for temporarily storing data to be transmitted. Meanwhile, an RT_BusIP core is loaded in a host signal processing module, and the IP core realizes high-efficiency processing functions of RT_Bus Bus data through programming configuration, such as data packing, unpacking, CRC calculation and the like. A similar initialization operation is carried out on a slave signal processing module of the slave device, and the buffer size is set to 512 bytes so as to meet the data receiving and processing requirements. And the RT_BusIP core is loaded in the slave signal processing module and is configured into a data receiving and analyzing mode, so that GPIO state information can be accurately extracted from a received data frame and corresponding processing can be performed. the host signal processing module of the host device generates handshake signals according to the communication protocol. The data frame structure of the handshake signal includes information such as an identity of the host device (e.g., device number 0x 01), and a handshake command code (e.g., 0x 0A). And then, sending the handshake signals to a slave signal processing module of the slave device through the RT_Bus Bus. After receiving the handshake signal, the slave device analyzes the host identity and the command code in the handshake signal according to the communication protocol, and judges whether the host identity and the command code are legal or not. If not, the identity invalid information is sent to the host equipment to inform the host equipment to check the identity setting or the communication link.
Referring to fig. 3, the host signal processing module and the slave signal processing module of the present embodiment adopt FPGAs, where the host signal processing module corresponds to FPGA1 and the slave signal processing module corresponds to FPGA2. The system comprises a first emergency button, a valve opening signal and a clutch opening signal at the FPGA1/Master end, and a second emergency button, a reset button and a workbench moving signal at the FPGA2/lave end. The FPGA1/Master and the FPGA2/Slave are connected through an RT-Bus, and specifically comprise a signal line RTL+ and a signal line RTL-, and are used for transmitting data and control signals. In a specific implementation process, a hardware circuit and cable connection is built according to the architecture in fig. 3, and then an IP core is created for processing communications on the RT-Bus. And then the GPIO state is sampled into the FPGA1, wherein the GPIO state comprises states of a first emergency button, a valve opening signal, a clutch opening signal and the like. The FPGA1 superimposes the states on the RT-Bus through the IP core, the host equipment firstly sends out handshake signals, and the slave equipment receives the handshake signals, so that communication synchronization between the master equipment and the slave equipment is ensured. And finally, respectively reading the RT-Bus by a Master/SlaveIP core, analyzing each bit, and performing CRC (cyclic redundancy check).
In the above embodiment, the accuracy and the high efficiency of the connection between the devices are ensured by determining the communication connection mode according to the rt_bus specification and pertinently configuring the rt_bus interface of the master device and the slave device. The method and the system have the advantages that the host and the slave equipment with different types and different functional requirements can smoothly establish a stable communication link on the RT_Bus Bus, the problems of connection failure or unstable communication and the like caused by improper connection configuration are reduced, and the compatibility and the expandability of the system are improved. For example, in a complex operating room environment including multiple medical devices, devices manufactured by different manufacturers can perform rt_bus connection configuration according to the standardized procedure, so as to implement interconnection and interworking between the devices. By writing a driver and a communication protocol stack between the host and the slave, communication compatibility and functional integrity between devices are enhanced. The communication protocol stack defines rules and formats of data transmission, ensures that the host and the slave devices can accurately understand and process the data sent by each other, and is beneficial to reducing data transmission errors and improving the reliability of communication. The signal processing modules of the host and the slave are initialized and the RT_BusIP core is loaded, and the RT_BusIP core can realize the rapid processing of RT_Bus Bus data, such as the operations of data superposition, analysis, CRC check and the like, at the hardware level, so that the data processing speed is improved, the data processing delay is reduced, and the equipment can respond to the state change and control instructions of the other side in time. For example, in the communication between medical devices, the transmission and processing of key state information such as whether the device is Home bit or not and whether Clutch is released or not can be faster, and the operation efficiency and safety of the whole medical system are improved. The host generates a handshake signal through the host signal processing module and sends the handshake signal to the slave signal processing module of the slave device, and the handshake signal is used as a key starting link for establishing communication between devices, so that the success rate and the stability of establishing the communication between the devices are improved, and the reliable operation of the whole RT_Bus Bus communication system is ensured.
Optionally, after receiving the handshake signal sent by the host device through the rt_bus, the slave device sends a communication acknowledgement signal to the host device, including:
After the slave equipment receives the handshake signal sent by the host equipment, acquiring a host identity based on the handshake signal, comparing the host identity with a preset identity, and if the host identity is invalid, sending identity invalidation information to the host equipment;
The slave device compares the communication protocol of the handshake signal with a preset communication protocol, if the communication protocol is invalid, a communication failure signal is sent to the host device, and if the communication protocol is valid, a communication confirmation signal is sent to the host device.
In this embodiment, after the slave device receives the handshake signal sent by the host device through the rt_bus, the host identity is first extracted from the data frame of the handshake signal. For example, the identity of the host device is set to a specific 16-bit binary code:
"0101101011001110". And the intelligent terminal compares the extracted host identity with a preset identity list stored by the intelligent terminal. If no matched identifier is found in the preset identifier list, which indicates that the host identity identifier is invalid, the slave device immediately sends identity identifier invalidation information to the host device through the RT_Bus Bus, and the information format can be a specific error code data frame, for example, 0xFF01, which indicates that the identity identifier is wrong, so that the host device can conveniently conduct investigation and processing. If the host identity authentication is passed, the slave device then compares the communication protocol of the handshake signal with a preset communication protocol. The preset communication protocol prescribes the contents of data frame format, meaning of data bits, verification mode and the like of the handshake signals. For example, the frame header of the prescribed handshake signal is "0x55AA", the frame end is "0xAA55", the first 8 bits of the data field represent the host type, the last 8 bits represent the communication version number, and the like, the slave device checks the received handshake signal according to these specifications, and if the format of the frame header, the frame end, or the data field of the handshake signal is found to be not matched with the preset communication protocol, if the frame header becomes "0x55AB", the communication protocol is determined to be invalid, and the slave device sends a communication failure signal to the host device, such as sending the data frame "0xFF02" represents a communication protocol error. If the communication protocol of the handshake signal is exactly matched with the preset communication protocol, indicating that the communication protocol is valid, the slave device sends a communication acknowledgement signal to the host device, for example, a specific data frame "0x0001" is sent to indicate communication acknowledgement. After receiving the communication confirmation signal, the host device can know that the handshake process with the slave device is successfully completed, and can perform formal data transmission and interaction operation subsequently, for example, the host device sends a data acquisition instruction to the slave device, and the slave device acquires field data according to the instruction and transmits the data back to the main controller through the RT_Bus Bus, and CRC (cyclic redundancy check) and other operations can be performed in the data transmission process to ensure the accuracy of the data.
In the embodiment, the slave device can effectively prevent the illegal device from accessing the communication link through verification of the host identity. In a complex multi-device interconnect environment, such as an industrial automation line or intelligent medical system, there may be multiple devices from different sources attempting to connect to the RT-Bus. Further communication is allowed only if the identity of the host device matches a preset legal identity. The risk that malicious equipment is disguised as a legal host to steal, tamper or destroy the system operation is greatly reduced, and the safety and the integrity of the whole system data are ensured. Verification of the communication protocol ensures that both parties interact with data under the same rules. If the communication protocols are not matched, the problems of data transmission errors, information interpretation confusion and the like can be caused, and the whole system can be in a fault state when serious. The slave device strictly checks the consistency of the communication protocol of the handshake signals and a preset communication protocol, timely discovers and refuses the connection attempt of the unmatched protocols, avoids communication faults caused by the unmatched protocols, and improves the reliability and stability of communication. Accurate host identity recognition and effective communication protocol verification lay a solid foundation for subsequent data transmission. After the slave device confirms that the identity of the host is effective and the communication protocol is correct, the two parties can perform accurate data exchange according to the preset specification. For example, when key physiological data of a patient or equipment state information is transmitted between medical equipment, the accuracy of medical decision and the effectiveness of cooperative work of the equipment can be ensured only under the condition of ensuring that communication is accurate and free, and serious consequences such as misdiagnosis or equipment misoperation caused by wrong data are reduced. The slave device timely feeds back the identity invalid information or the communication failure signal to the host device, thereby being beneficial to the host device to quickly know the connection problem and take corresponding measures. The host device can perform self-checking according to the feedback information, such as checking whether the self-identity is set to be wrong or adjusting the communication protocol parameters, thereby improving the error correction capability and the self-adaptability of the whole communication system, ensuring that the communication link can recover to the normal working state as soon as possible, and reducing the system downtime caused by communication faults.
Step S204, after receiving the communication confirmation signal, the host device sends a data frame containing GPIO state information and a first CRC check code to the slave device;
Optionally, after receiving the communication acknowledgement signal, the host device sends a data frame including GPIO status information and the first CRC check code to the slave device, including:
the host equipment acquires GPIO state information of the GPIO pin through a host signal processing module;
generating a first CRC check code of GPIO state information through a CRC algorithm;
generating a data frame based on the GPIO state information and the corresponding first CRC check code;
The host signal processing module of the host device sends the data frame to the slave signal processing module of the slave device through the RT_Bus Bus.
In this embodiment, taking a composite surgery laboratory scenario as an example, a PET (positron emission tomography) device is used as a host device, and a CT (computed tomography) device is used as a slave device, which are connected through an rt_bus, so as to implement real-time interaction and collaborative work of key state information, and ensure accurate monitoring and coordination of the running state of the device in the surgery process. The host signal processing module (FPGA 1) of the PET equipment starts an information acquisition process. For detection of whether the Home bit, there is a dedicated GPIO pin connected to the corresponding position sensor. The GPIO pin is low (denoted as 0) when the device is in the Home bit after initial calibration is completed, and is high (denoted as 1) when the device is not in the Home bit. For example, at this time, it is detected that the PET device is in the Home bit, and the corresponding GPIO status information is recorded as 0. For whether Clutch is released, there is a corresponding GPIO line connected to the clutch state detection device, if the clutch is released, the GPIO is at a high level (denoted as 1), if not released, it is at a low level (denoted as 0), and this GPIO information is recorded as 1 assuming that the current clutch is in a released state. In addition, there is an Emergency button connected to the GPIO, which is normally high (indicated as 1) and low (indicated as 0) when the Emergency button is pressed, and the Emergency is not triggered at this time. there is also a GPIO check whether Reset, the device is high (denoted 1) when not in the Reset process, assuming the current PET device is not in Reset and its corresponding GPIO state is 1. The host signal processing module of the PET equipment collects and temporarily stores GPIO state information about whether the Home bit (0), whether Clutch releases (1), whether the Emergency (1) and whether the Reset (1) is carried out. The host signal processing module calculates the acquired GPIO state information (0111) of the PET equipment by using a CRC-8 algorithm to generate a first CRC check code. An 8-bit CRC check code is obtained by arithmetic operation, assuming 0x56. Based on the GPIO state information and the corresponding first CRC check code, the host signal processing module constructs a data frame. The data frame header is set to a specific identifier 0xAA55 indicating the start of a data frame. In the data field part, the state information of each GPIO of the PET equipment is written in sequence according to a preset sequence, namely, the Home bit state (0) is written first, and then the state (1) is released by Clutch, the state (1) is Reset, and the state (1) is Reset. The generated first CRC check code 0x56 is then placed in the check region of the data frame. Finally, a specific end mark 0x55AA is added at the end of the data frame. The host signal processing module of the PET equipment sends the complete data frame to the slave signal processing module of the CT equipment through the RT_Bus Bus. After the CT equipment receives the data frame, the state information of the PET equipment is extracted and CRC check is carried out to determine the accuracy and the integrity of the information, so that the operation modes of the CT equipment are adjusted according to the information or the state display and other operations are carried out, for example, if the PET equipment is in a Home position and no emergency exists, the CT equipment can correspondingly optimize the image acquisition parameters to match with the current state of the PET equipment or display the state information of the PET equipment on an operation interface for reference of an operator.
In the above embodiment, the first CRC check code of the GPIO status information is generated by using the CRC algorithm, and is packaged together with the GPIO status information in a data frame for transmission, so that a strong guarantee is provided for the integrity of the data in the transmission process. The CRC check code is redundant information generated according to a specific algorithm based on the data content, and after the slave device receives the data frame, the check code can be recalculated by the same CRC algorithm on the received GPIO state information and is compared with the received first CRC check code. If the two are consistent, the data is not wrong or tampered in the transmission process to a great extent, so that the GPIO state information acquired by the slave equipment is ensured to be complete and accurate, and serious consequences such as wrong control instructions or misdiagnosis caused by data errors can be effectively avoided. The CRC-based data integrity verification mechanism is capable of detecting various types of data transmission errors, including data bit flipping, data loss, or additional data insertion, among others. For example, in environments where electromagnetic interference is present, data may be affected when transmitted over the RT-Bus, resulting in changes in individual data bits. The CRC check can be used for capturing the change sharply, finding out data errors in time and informing related equipment to process, so that the adaptability of the whole communication system to complex environments and the reliability of data transmission are improved. The host device collects the state information of the GPIO pins and generates a data frame through the host signal processing module, the host signal processing module can efficiently coordinate the acquisition of GPIO data and the construction work of the data frame, and delay and resource waste in the data processing process are reduced. For example, in a high-speed data acquisition system, state information of a plurality of GPIO pins can be integrated into a data frame and sent out quickly, so that the requirement of the system on real-time performance is met. And generating a data frame based on the explicit GPIO state information and the corresponding CRC check code, so that the structure of the data frame is standard and easy to analyze. After receiving the data frame, the slave device can rapidly extract the GPIO state information and perform CRC according to a preset format and a rule, so that the data processing efficiency is improved.
Optionally, before the host signal processing module of the host device sends the data frame to the slave signal processing module of the slave device through the rt_bus, the method further includes:
The method comprises the steps that a host device generates a state synchronous signal for detecting whether the communication between the host device and a slave device is normal;
and adding a state synchronous signal at a preset position of the data frame, wherein the state synchronous signal is provided with signal transmission clocks of the host equipment and the slave equipment.
In this embodiment, the host signal processing module of the PET device is responsible for generating a state synchronization signal (heartbeat bit). First, the initial state of the heartbeat bit is determined, assuming that it is set to 0. The hop period of the heartbeat bit is then set, for example once every 5 milliseconds. In the process of generating the heartbeat bit, signal transmission clock information of the host equipment (PET) and the slave equipment (CT) is embedded at the same time. Assuming that the signal transmission clock frequency agreed by both parties is 2MHz, the host equipment integrates the clock frequency information into the generation logic of the heartbeat bit according to a specific coding rule. For example, the high level duration and the low level duration of the heartbeat bit are precisely set according to the clock frequency of 2MHz, thereby delivering clock information. The host signal processing module collects GPIO information about the state of its own device. For example, it is detected that the PET device is in the Home bit (corresponding to GPIO state 0), clutch has been released (corresponding to GPIO state 1), there is no Emergency condition (corresponding to GPIO state 1), and it is not in the Reset state (corresponding to GPIO state 1). CRC check codes for these GPIO status information are then generated by a CRC algorithm (e.g., CRC-8), assuming the resulting check code is 0x23. When constructing the data frame, according to the RT_Bus Bus communication protocol, a specific frame header identifier is set at the beginning of the data frame, such as 0x1234. And then writing the state information of each GPIO (general purpose input) in a preset data field position, namely a Home bit (0), clutch release state (1), an Emergency state (1) and a Reset state (1). And adding a heartbeat bit at the 8 th bit (preset position) of the data frame. If the heartbeat bit is 0 at this time, then 0 is written to the bit. Finally, the CRC check code 0x23 is placed in the check area of the data frame, and a specific frame tail mark, such as 0x4321, is added at the tail of the data frame. And the host signal processing module of the PET equipment sends the constructed data frame to the slave signal processing module of the CT equipment through the RT_Bus Bus. After receiving the data frame, the CT device firstly extracts the heartbeat bit, adjusts the receiving clock of the CT device according to the clock information in the heartbeat bit, and ensures the synchronization with the PET device. For example, the clock frequency information of 2MHz is resolved from the level change period of the heartbeat bit, and then the own receiving clock is adjusted to match with the clock frequency information. And then the slave device analyzes GPIO state information in the data frame and performs CRC check. If the CRC check is passed and the heartbeat bit continuously and normally jumps (jumping every 5 milliseconds), the CT equipment confirms that the data is normally received, and carries out corresponding operation according to the state information of the PET equipment, such as adjusting the image acquisition parameters of the CT equipment or displaying the state of the PET equipment on an operation interface. if the CT equipment detects that the heartbeat bit is abnormally hopped, if a plurality of continuous periods are unchanged or the hopping period is obviously deviated from 5 milliseconds, or the CRC check fails, the CT equipment judges that the communication with the PET equipment is problematic. At this time, the CT device sends a communication abnormal signal to the PET device, and after the PET device receives the signal, the PET device checks components such as a signal processing module, a clock circuit, an rt_bus interface and the like of the PET device according to a preset fault checking policy, and adjusts related parameters of the heartbeat bit at the same time, for example, slightly changes a jump period or signal strength of the heartbeat bit, so as to attempt to reestablish stable communication connection, so as to ensure reliability and stability of communication between devices in operation.
In the above embodiments, accurate synchronization between the master device and the slave device is ensured by using a uniform clock reference. In the data transmission process, the two sides of the equipment can accurately read various information in the data frame according to the clock information in the synchronous signal, and the phenomenon of data reading errors or dislocation caused by clock difference is effectively avoided. Meanwhile, the slave device is helped to clearly determine the starting and ending positions of the data frames and the effective intervals of the data according to the preset clock signals and formats, so that data analysis and processing work can be orderly carried out, and the stability and reliability of data transmission are greatly enhanced. The status synchronization signal can reflect the status of the communication connection between the master device and the slave device in real time and continuously. The slave device can timely and accurately judge whether the connection with the host device is normal or not through detecting the regularity and the integrity of the slave device. Upon occurrence of a condition such as an interruption, an abnormal jump, or a delay in the state synchronization signal, the slave device can promptly detect and determine that the communication link is problematic.
Step S206, the slave device extracts the corresponding GPIO state information and check code after receiving the data frame, performs CRC check on the GPIO state information through the first CRC check code, and sends error prompt information to the host device if the check fails;
Optionally, after receiving the data frame, the slave device extracts the corresponding GPIO status information and check code, performs CRC check on the GPIO status information by using the first CRC check code, and if the check fails, sends error prompt information to the host device, including:
After receiving the data frame, the slave device analyzes the data frame to extract GPIO state information, a first CRC check code and a state synchronization signal;
The slave equipment generates a second CRC check code corresponding to the GPIO state information through a CRC algorithm;
Comparing the second CRC check code with the first CRC check code, if the second CRC check code is the same as the first CRC check code, the CRC check is passed, if the second CRC check code is different from the first CRC check code, the CRC check is failed, and the slave equipment generates error prompt information and then sends the error prompt information to the host equipment through an RT_Bus Bus;
The cluster equipment judges whether the communication with the host equipment is normal or not according to the state synchronous signals, and if the communication is abnormal, the cluster equipment sends communication abnormal signals to the host equipment;
the host device adjusts the state synchronization signal after receiving the communication abnormality signal.
In this embodiment, the CT device (slave device) receives a data frame sent by the PET device (host device) through the RT-Bus. The data frame contains GPIO state information of the PET equipment, a first CRC check code and a state synchronization signal. The slave signal processing module of the CT equipment firstly analyzes the data according to a preset data frame format. For example, the first 8 bits of the data frame are specific identification bytes for confirming the validity of the data frame, and then GPIO status information indicating whether the PET apparatus is ready (assuming 1 indicates ready, 0 indicates not ready) is extracted from the 9 th bit to the 16 th bit, 17 th bit to 24 th bit are information on whether the scan calibration status is in, 25 th bit to 32 th bit are failure warning information, and the like. Meanwhile, a first CRC check code is extracted from a specific position of the data frame, which is assumed to be 0x3456, and a state synchronization signal (heartbeat bit) is acquired, the initial state of which is 0, and the hopping period is 5 ms. The slave signal processing module of the CT device recalculates the extracted GPIO state information by using the same CRC algorithm (such as CRC-16) to generate a second CRC check code. The second CRC check is calculated assuming 0x3457. The second CRC check code is then compared to the received first CRC check code. Since 0x3457 is not the same as 0x3456, the CRC check fails. Because the CRC check fails, the CT apparatus generates error-hint information, the information content includes an error type (CRC check error), a data frame-related identifier, etc., and then transmits the error-hint information to the PET apparatus through the RT-Bus. Meanwhile, the CT equipment judges whether the communication with the PET equipment is normal or not according to a state synchronous signal (heartbeat bit). The CT equipment is internally provided with a counter for recording the jump times and time intervals of the heartbeat bit. If the number of hops of the heartbeat bit does not match the expected number (20 hops are expected and only 15 hops are actually expected) within a preset time (such as 100 milliseconds), the abnormal communication is judged. In this case, the CT device sends a communication abnormal signal to the PET device, where the signal includes abnormal specific information, such as a time point of abnormal heartbeat and the actual number of hops. After the PET equipment receives the communication abnormal signal, the PET equipment firstly checks a state synchronous signal (heartbeat bit) generating module of the PET equipment. It will check if the internal clock source is stable, if the heartbeat bit generation logic is in error, etc. If a slight frequency drift of the clock source is found, the PET device adjusts the frequency of the clock source to make the jump period of the heartbeat bit be stabilized again at 5 milliseconds. Meanwhile, the PET equipment can record related information of communication abnormality, such as time of error occurrence, related GPIO state information transmission and the like, so that subsequent fault detection and analysis can be realized. And then, the PET equipment re-acquires GPIO state information, re-generates a data frame and sends the data frame to the CT equipment, and repeats the checksum communication monitoring process until the data can be accurately transmitted and the communication is stable, thereby ensuring the reliability of information interaction among the equipment in the operation process.
In the above embodiment, the slave device performs CRC check on the received data frame, so as to effectively detect whether an error occurs in the data during transmission. And comparing the regenerated second CRC check code with the received first CRC check code, and considering that the data is accurate only when the two codes are consistent, thereby improving the accuracy of the data and ensuring that the GPIO state information acquired by the slave equipment is reliable. When the CRC fails, the slave device sends error prompt information to the host device, so that the host device can know that the data transmission has a problem in time. The host device can accordingly take corresponding measures, such as retransmitting the data frame or checking the data transmission link, thereby improving the error correction capability of the whole communication system on data errors and guaranteeing the stability and reliability of data transmission. The slave device judges whether the communication with the host device is normal according to the state synchronous signals, and an effective means is provided for monitoring the communication link in real time. If the communication is abnormal, a communication abnormal signal is timely sent to the host equipment, so that the two parties can quickly locate and solve the communication fault. And after receiving the communication abnormal signal, the host equipment adjusts the state synchronization signal, thereby being beneficial to optimizing communication connection. The host device can adjust parameters of the state synchronization signal according to abnormal conditions, such as changing signal transmission clock frequency, adjusting signal strength or optimizing signal coding modes, so as to adapt to different communication environments and requirements, improve adaptability of the system in complex and changeable environments, ensure continuity and stability of communication, and promote efficient operation of the whole system.
Step S208, the host device re-transmits the data frame to the slave device through the RT_Bus Bus after receiving the error prompt information until the CRC check is passed.
Optionally, after receiving the error prompt information, the host device resends the data frame to the slave device through the rt_bus until the CRC check passes, including:
the host device analyzes according to the error prompt information sent by the slave device to obtain an error type and an error reason;
The host equipment re-collects the GPIO state information through the host signal processing module and generates a CRC check code corresponding to the GPIO state information based on a CRC algorithm;
Updating the data frame based on the GPIO state information and the CRC check code, and sending the updated data frame to a slave signal processing module of the slave device through an RT_Bus Bus;
The slave signal processing module of the slave equipment extracts GPIO state information and CRC check codes based on the data frames, and performs CRC check on the GPIO state information based on the CRC check codes;
and iteratively executing the steps until the CRC passes.
In this embodiment, the PET device receives the error prompt information sent by the CT device. This information indicates a CRC check error and a portion of the GPIO status information in the data frame is suspected to be lost. The host signal processing module of the PET equipment analyzes the error prompt information, determines that the error type is data integrity problem and CRC mismatch, and the error cause may be interference in the data transmission process or coding error in the data frame construction. The host signal processing module re-collects the GPIO state information. For example, the GPIO pin to which the detector temperature sensor is connected is read again, the current detector temperature value is obtained (assuming 37.5 ℃ C., converted to the corresponding GPIO state code of 0x 1234), and the GPIO information of the data acquisition module state (assuming the normal state code of 0x 5678) is obtained. The CRC check code corresponding to the GPIO state information is then regenerated based on a CRC algorithm (e.g., CRC-16), assuming 0xABCD. Based on the re-acquired GPIO status information (0 x1234 represents the detector temperature, 0x5678 represents the data acquisition module status) and the newly generated CRC check code 0xabcd, the host signal processing module of the pet device updates the data frame. The data frame header is set to a specific flag 0xEEEE indicating a retransmitted data frame. And sequentially writing GPIO state information and CRC check codes according to a preset format, and then sending the updated data frame to a slave signal processing module of the CT equipment through an RT_Bus Bus. After receiving the data frame, the slave signal processing module of the CT equipment extracts GPIO state information (0 x1234 and 0x 5678) and CRC check code (0 xABCD) and performs CRC check on the GPIO state information based on the CRC check code. If the verification still fails, the CT equipment sends error prompt information to the PET equipment again, and the steps are repeated. If the check is passed, the CT equipment confirms that the data is received correctly, and adjusts the scanning parameters of the CT equipment according to the GPIO state information. For example, if the temperature of the detector of the PET device is high, the CT device may reduce its own scan power appropriately to reduce the heat generation of the whole device, and at the same time, optimize the image fusion algorithm by using the state information of the data acquisition module of the PET device, so as to ensure the efficiency and accuracy of the cooperative work of the devices during the operation.
In the embodiment, after the host device receives the error prompt information, the error type and the cause can be analyzed, the GPIO state information is acquired again in a targeted manner, and the check code is generated to update the data frame for retransmission, so that the probability of final correct transmission of the data is effectively improved. In a communication environment with interference or instability factors, such as a scene that a large amount of electromagnetic interference exists in an industrial field or network fluctuation is large, data transmitted for the first time may have errors, but through the automatic retransmission error correction mechanism, continuous attempts can be made until the data is received by the slave equipment accurately, so that the complete and correct transmission of key GPIO state information is ensured, and the data transmission reliability of the whole system is enhanced. The process of iteratively executing the data retransmission until the CRC passes is performed, so that a closed loop error correction system is formed, the system cannot interrupt the whole communication flow or lose data due to single data transmission errors, the continuity and the integrity of data transmission are ensured, the basic functions of the system are not affected even under the severe communication condition, and the stable operation of the system is maintained. The ability of the host device to parse and take different countermeasures according to the error hint information enables the system to accommodate a variety of different types of error conditions. The system can attempt to self-repair and adjust whether due to transient anomalies in the data acquisition process, signal interference in the data transmission process, or errors from other potential causes. The system has stronger robustness when facing complex and changeable practical application environments, can flexibly cope with various emergency conditions, reduces the impact on the system operation caused by environmental changes or unexpected events, and improves the overall adaptability and flexibility of the system.
According to still another aspect of the embodiment of the present application, as shown in fig. 4, there is provided an rt_bus-based communication device, including:
The communication establishing module 401 is configured to send a communication acknowledgement signal to the host device after the slave device receives a handshake signal sent by the host device through the rt_bus;
A data sending module 403, configured to send a data frame including GPIO status information and a first CRC check code to the slave device after receiving the communication acknowledgement signal by the master device;
The data checking module 405 is configured to extract the corresponding GPIO status information and check code after receiving the data frame from the host device, perform CRC check on the GPIO status information by using the first CRC check code, and send error prompt information to the host device if the check fails;
And the data resending module 407 is configured to resend the data frame to the slave device through the rt_bus after receiving the error prompt message until the CRC check is passed.
It should be noted that the communication establishing module 4011 in this embodiment may be used to perform step S202 in the embodiment of the present application, the data transmitting module 403 in this embodiment may be used to perform step S204 in the embodiment of the present application, the data checking module 405 in this embodiment may be used to perform step S206 in the embodiment of the present application, and the data retransmitting module 407 in this embodiment may be used to perform step S208 in the embodiment of the present application.
It should be noted that the above modules are the same as examples and application scenarios implemented by the corresponding steps, but are not limited to what is disclosed in the above embodiments. It should be noted that the above modules may be implemented in software or hardware as a part of the apparatus in the hardware environment shown in fig. 1.
According to another aspect of the embodiments of the present application, as shown in fig. 5, the present application provides an electronic device, including a memory 502, a processor 504, a communication interface 506, and a communication bus 508, where the memory 502 stores a computer program that can be executed on the processor 504, and the memory 502 and the processor 504 communicate with the communication bus 508 through the communication interface 506, and the processor 504 implements the steps of the method when executing the computer program.
The memory and the processor in the electronic device communicate with the communication interface through a communication bus. The communication bus may be a peripheral component interconnect standard (PERIPHERAL COMPONENT INTERCONNECT, PCI) bus, or an extended industry standard architecture (Extended Industry Standard Architecture, EISA) bus, or the like. The communication bus may be classified as an address bus, a data bus, a control bus, or the like.
The memory may include random access memory (Random Access Memory, RAM) or may include non-volatile memory (non-volatile memory), such as at least one disk memory. Optionally, the memory may also be at least one memory device located remotely from the aforementioned processor.
The processor may be a general-purpose processor, including a central Processing unit (Central Processing Unit, CPU), a network processor (Network Processor, NP), a digital signal processor (DIGITAL SIGNAL Processing, DSP), an Application Specific Integrated Circuit (ASIC), a Field-Programmable gate array (FPGA) or other Programmable logic device, discrete gate or transistor logic device, or discrete hardware components.
There is also provided, in accordance with yet another aspect of embodiments of the present application, a computer program product or computer program comprising computer instructions stored in a computer readable storage medium. The processor of the computer device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions to cause the computer device to perform the steps of any of the embodiments described above.
Optionally, in an embodiment of the present application, the computer readable medium is arranged to store program code for the processor to:
Step S202, after receiving the handshake signal sent by the host device through the RT_Bus Bus, the slave device sends a communication acknowledgement signal to the host device.
In step S204, the host device receives the communication acknowledgement signal and then transmits a data frame including the GPIO status information and the first CRC check code to the slave device.
Step S206, the slave device extracts the corresponding GPIO state information and check code after receiving the data frame, performs CRC check on the GPIO state information through the first CRC check code, and sends error prompt information to the host device if the check fails.
Step S208, the host device re-transmits the data frame to the slave device through the RT_Bus Bus after receiving the error prompt information until the CRC check is passed.
Alternatively, specific examples in this embodiment may refer to examples described in the foregoing embodiments, and this embodiment is not described herein.
When the embodiment of the application is specifically implemented, the above embodiments can be referred to, and the application has corresponding technical effects.
It is to be understood that the embodiments described herein may be implemented in hardware, software, firmware, middleware, microcode, or a combination thereof. For a hardware implementation, the Processing units may be implemented within one or more Application SPECIFIC INTEGRATED Circuits (ASICs), digital signal processors (DIGITAL SIGNAL Processing, DSPs), digital signal Processing devices (DSP DEVICE, DSPD), programmable logic devices (Programmable Logic Device, PLDs), field-Programmable gate arrays (Field-Programmable GATE ARRAY, FPGA), general purpose processors, controllers, micro-controllers, microprocessors, other electronic units for performing the functions described herein, or a combination thereof.
For a software implementation, the techniques described herein may be implemented by means of units that perform the functions described herein. The software codes may be stored in a memory and executed by a processor. The memory may be implemented within the processor or external to the processor.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
It will be clear to those skilled in the art that, for convenience and brevity of description, specific working procedures of the above-described systems, apparatuses and units may refer to corresponding procedures in the foregoing method embodiments, and are not repeated herein.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, and for example, the division of the modules is merely a logical function division, and there may be additional divisions when actually implemented, for example, multiple modules or components may be combined or integrated into another system, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or units, which may be in electrical, mechanical or other form.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in the embodiments of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit.
The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer-readable storage medium. Based on such understanding, the technical solution of the embodiments of the present application may be embodied in essence or a part contributing to the prior art or a part of the technical solution, in the form of a software product stored in a storage medium, including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in the embodiments of the present application. The storage medium includes various media capable of storing program codes such as a U disk, a mobile hard disk, a ROM, a RAM, a magnetic disk or an optical disk. It should be noted that in this document, relational terms such as "first" and "second" and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises an element.
The foregoing is only a specific embodiment of the application to enable those skilled in the art to understand or practice the application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (10)
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