CN119718339B - Binary translation method, binary translator, electronic device and readable storage medium - Google Patents
Binary translation method, binary translator, electronic device and readable storage medium Download PDFInfo
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Abstract
本发明实施例提供了一种二进制翻译方法、二进制翻译器、电子设备及可读存储介质，所述方法包括：在确定检测到自修改代码的情况下，将第一虚拟页面以共享映射的方式映射到第二虚拟页面；第一虚拟页面为自修改代码的写地址所在的虚拟页面；第二虚拟页面与第一虚拟页面对应相同的物理页面；第一虚拟页面的权限为不可写，第二虚拟页面的权限为可写；根据自修改代码的写地址，查找已翻译的目标基本块，并将目标基本块的有效标志位修改为无效；基于自修改代码的写地址，在第二虚拟页面中的相应位置写入所述自修改代码。本发明实施例以更小的粒度、更低的代价完成自修改操作，可以减少多余的无效操作，减少冗余的重新翻译操作，提高翻译系统的性能。
The embodiment of the present invention provides a binary translation method, a binary translator, an electronic device and a readable storage medium, the method comprising: in the case of determining that a self-modifying code is detected, mapping a first virtual page to a second virtual page in a shared mapping manner; the first virtual page is a virtual page where the write address of the self-modifying code is located; the second virtual page corresponds to the same physical page as the first virtual page; the permission of the first virtual page is not writable, and the permission of the second virtual page is writable; according to the write address of the self-modifying code, searching for the translated target basic block, and modifying the valid flag bit of the target basic block to invalid; based on the write address of the self-modifying code, writing the self-modifying code in the corresponding position in the second virtual page. The embodiment of the present invention completes the self-modifying operation with a smaller granularity and a lower cost, which can reduce redundant invalid operations, reduce redundant re-translation operations, and improve the performance of the translation system.
Description
Technical Field
The present invention relates to the field of computer technologies, and in particular, to a binary translation method, a binary translator, an electronic device, and a readable storage medium.
Background
Binary translation may convert binary code of one ISA (Instruction Set Architecture ) to binary code of another instruction set architecture. Applications of one ISA (source architecture) may be run on another ISA (target architecture) through binary translation techniques.
The self-modifying code is one kind of dynamic code generating technology in computer field, and is used to allow program to modify original machine instruction or add new machine instruction directly via memory access instruction during running and to execute the program.
When the translator detects the self-modifying code, the previously translated host basic block in the code buffer area needs to be invalidated, because the original translated host basic block cannot correctly correspond to the current client basic block, and the translation needs to be carried out again to prevent the wrong execution.
However, since the authority management of the operating system is performed according to the page, when a certain client basic block generates the self-modifying code, the host basic blocks corresponding to all the client basic blocks on the page where the client basic block is located need to be invalidated, so that a large number of redundant invalidation operations are generated, a large number of redundant re-translation operations are added, and the performance of the translation system is affected.
Disclosure of Invention
In view of the foregoing, embodiments of the present invention are directed to providing a binary translation method that overcomes or at least partially solves the foregoing problems, and performs a self-modifying operation with less granularity and at lower cost, so as to reduce redundant invalidation operations, reduce redundant re-translation operations, and improve performance of a translation system.
Correspondingly, the embodiment of the invention also provides a binary translator, electronic equipment and a computer program product, which are used for ensuring the implementation and application of the method.
In a first aspect, an embodiment of the present invention discloses a binary translation method, applied to a binary translator, where the method includes:
Under the condition that the self-modifying code is detected, mapping a first virtual page to a second virtual page in a shared mapping mode, wherein the first virtual page is a virtual page where a writing address of the self-modifying code is located, the second virtual page corresponds to the same physical page as the first virtual page, the authority of the first virtual page is non-writable, and the authority of the second virtual page is writable;
Searching a translated target basic block according to the write address of the self-modifying code, and modifying the valid flag bit of the target basic block into invalid;
and writing the self-modifying code in a corresponding position in the second virtual page based on the writing address of the self-modifying code.
In a second aspect, embodiments of the present invention disclose a binary translator, the binary translator comprising:
The memory mapping module is used for mapping a first virtual page to a second virtual page in a shared mapping mode under the condition that the self-modifying code is determined to be detected, wherein the first virtual page is a virtual page where a writing address of the self-modifying code is located, the second virtual page corresponds to the same physical page as the first virtual page, the authority of the first virtual page is non-writable, and the authority of the second virtual page is writable;
The basic block invalidation module is used for searching the translated target basic block according to the write address of the self-modifying code and modifying the valid flag bit of the target basic block into invalidation;
and the self-modifying execution module is used for writing the self-modifying code in the corresponding position in the second virtual page based on the writing address of the self-modifying code.
In a third aspect, an embodiment of the present invention discloses an electronic device, including a processor, a memory, a communication interface, and a communication bus, where the processor, the memory, and the communication interface complete communication with each other through the communication bus, and the memory is configured to store at least one executable instruction, where the executable instruction causes the processor to execute the steps of the binary translation method as described in any one of the foregoing.
In a fourth aspect, embodiments of the present invention disclose a readable storage medium having stored thereon a program or instructions that, when executed by a processor, enable a binary translation method as described in any of the preceding.
In a fifth aspect, embodiments of the present invention disclose a computer program product comprising a computer program which, when executed by a processor, performs the steps of a binary translation method as described in any of the preceding claims.
The embodiment of the invention has the following advantages:
In the embodiment of the invention, the flow for processing the self-modifying code is optimized in the binary translation process, and under the condition that the self-modifying code is detected, the first virtual page is mapped to the second virtual page in a shared mapping mode, so that the second virtual page is mapped to the physical memory corresponding to the first virtual page. In addition, the embodiment of the invention maintains the authority of the first virtual page unchanged (still can not write), and sets the authority of the second virtual page to be writable, so that the writing operation on the second virtual page has the same effect as the writing operation on the first virtual page, and the writing operation of the self-modifying code can be executed by using the second virtual page. Further, since the embodiment of the invention does not need to restore the write permission of the first virtual page, the exception can still be triggered when the client program performs the write operation (e.g. executes the self-modifying code) on the first virtual page, so that the binary translator can detect the self-modifying action, therefore, the redundant invalidation operation can be reduced, the redundant re-translating operation can be reduced, and the performance of the translation system can be improved by setting the second virtual page with the shared mapping relation on the first virtual page and modifying the basic block based on the second virtual page, thereby realizing that the self-modifying operation is completed with smaller granularity and lower cost by invalidating only the target basic block corresponding to the write address of the self-modifying code with the basic block as granularity.
Drawings
FIG. 1 is a schematic diagram of a dynamic binary translation architecture in accordance with the present invention;
FIG. 2 is a flow chart of steps of an embodiment of a binary translation method of the present invention;
FIG. 3 is a schematic diagram of a binary translator modifying page permissions;
FIG. 4 is a schematic diagram of an embodiment of the present invention performing a write operation using a second virtual page;
FIG. 5 is a block diagram of a binary translator embodiment of the present invention;
fig. 6 is a schematic structural diagram of an electronic device according to an embodiment of the present invention.
Detailed Description
In order that the above-recited objects, features and advantages of the present invention will become more readily apparent, a more particular description of the invention will be rendered by reference to the appended drawings and appended detailed description.
The terms first, second and the like in the description and in the claims, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged, as appropriate, such that embodiments of the present invention may be implemented in sequences other than those illustrated or described herein, and that the objects identified by "first," "second," etc. are generally of a type, and are not limited to the number of objects, such as the first object may be one or more. Furthermore, the term "and/or" in the specification and claims is used to describe an association relationship of an association object, and means that there may be three relationships, for example, a and/or B, and that there may be three cases where a exists alone, while a and B exist together, and B exists alone. The character "/" generally indicates that the context-dependent object is an "or" relationship. The term "plurality" in embodiments of the present invention means two or more, and other adjectives are similar.
Referring to FIG. 1, an architectural diagram of dynamic binary translation is shown. As shown in fig. 1, the dynamic binary translation translates the client architecture instructions into host architecture instructions at runtime and runs on the host in a "translate while running" manner. After reading the binary file of the target program, the translator translates and executes at the granularity of the basic blocks (Translation Block, TB). A basic block typically ends with a control flow change instruction (e.g., indirect jump instruction, function call instruction, etc.). Before executing a basic block, searching in a code buffer area firstly, if the basic block which is already translated is found, executing the basic block, if the basic block which is already translated is not found in the code buffer area, executing translation on the basic block, placing the basic block which is already translated into the code buffer area, and then executing the basic block which is already translated. After executing one basic block, searching the next basic block in the code buffer area, and circulating until the program execution is finished.
In the embodiment of the invention, the untranslated basic block is called a customer basic block, and after the customer basic block is translated, a translated host code instruction stream (called a host basic block) is obtained, and the host basic block is stored in a code cache area.
The binary translator sets the authority of the page where each customer basic block is located as non-writable before translating each customer basic block, and records the original authority of the page in a page descriptor of the page. A page descriptor (e.g., pageDesc) is a data structure for memory management within a binary translator that describes various attributes and information of a page. The binary translator removes write permission from the page containing the guest basic block in order to trigger an exception when the guest program writes to the page (e.g., executes to the self-modifying code) so that the self-modifying behavior can be detected and the binary translator can then process the self-modifying code.
The page mentioned in the embodiment of the invention refers to a virtual page. Virtual pages are concepts in virtual memory management systems. Virtual memory is an abstraction provided by the operating system for each process so that each process considers itself to have a continuous, large address space that is divided into multiple virtual pages of equal size. Virtual pages of different processes may be mapped to the same or different physical memories, and such mappings may be managed by the page table mechanism of the operating system.
The first virtual PAGE refers to a virtual PAGE in a host environment that simulates a client environment, e.g., a certain first virtual PAGE is denoted as PAGE1, and PAGE1 may include one or more client basic blocks, e.g., client basic blocks TB1, TB2. The minimum unit of self-modifying code is typically in basic blocks, e.g., self-modifying code requires modification of a basic block or blocks. If self-modifying code is present in the client program, TB2 will be modified during program execution. But since the control of the read-write permission by the operating system is in units of pages. Although the self-modifying code only needs to modify the client basic block TB2, the host basic blocks corresponding to all the client basic blocks in the PAGE (e.g., PAGE 1) where the client basic block TB2 is located need to be invalidated. When executing again to TB1, TB 2..tbn, since all of TB1, TB 2..tbn is invalidated, all of TB1, TB 2..tbn needs to be translated again, resulting in redundant translation operation, affecting translation performance.
Referring to FIG. 2, there is shown a flow chart of steps of an embodiment of a binary translation method of the present invention, the method being applied to a binary translator, the method may include the steps of:
Step 101, under the condition that the self-modifying code is detected, mapping a first virtual page to a second virtual page in a shared mapping mode, wherein the first virtual page is a virtual page where a writing address of the self-modifying code is located, the second virtual page corresponds to the same physical page as the first virtual page, the authority of the first virtual page is non-writable, and the authority of the second virtual page is writable;
Step 102, searching a translated target basic block according to the write address of the self-modifying code, and modifying the valid flag bit of the target basic block into invalid;
And step 103, writing the self-modifying code in a corresponding position in the second virtual page based on the writing address of the self-modifying code.
The binary translation method provided by the embodiment of the invention can be applied to a binary translator, and the processing of the self-modifying code is optimized in the dynamic binary translation process, so that the self-modifying operation is completed with smaller granularity and lower cost.
Under the condition that the self-modifying code is detected, the embodiment of the invention realizes invalidation of the host basic block by taking the basic block as granularity through page authority remapping and combining with a software writing simulation technology.
Specifically, in the event that it is determined that self-modifying code is detected, the first virtual page is mapped to the second virtual page in a shared-mapped manner. The sharing map may enable data sharing, and modifications to the mapped region may be reflected to the mapped file or device. That is, the operation performed on the second virtual page corresponds to the operation performed on the first virtual page.
The first virtual PAGE is a virtual PAGE where the write address of the self-modifying code is located, for example, the first virtual PAGE is Page1, and the second virtual PAGE is a virtual PAGE of a new application, for example, the virtual PAGE is Parallel_Page1. Thus, two virtual PAGEs of Page1 and Parallel_Page1 are mapped to the same physical memory (physical PAGE), and both are mapped to the physical memory corresponding to Page1, but the rights of the two virtual PAGEs are different. The write permission of the first virtual PAGE (e.g., PAGE 1) is removed by the binary translator, so the permission of the first virtual PAGE (e.g., PAGE 1) is non-writable. The rights of the second virtual PAGE (e.g., parallel_Page 1) are writable. According to the embodiment of the invention, the first virtual page is mapped to the second virtual page with the write permission in a sharing mapping mode, so that the permission of the first virtual page is remapped, and the self-modifying code can be written in by operating the second virtual page.
It should be noted that, since the self-modifying code needs to modify the instruction in the first virtual page, a write operation needs to be performed on the first virtual page, and the first virtual page does not have write permission. Therefore, the embodiment of the invention sets that the second virtual page has write permission, and for other permissions, such as read (R) permission, execute (X) permission and the like, the second virtual page is consistent with the first virtual page.
The binary translator sets the authority of the page on which each customer basic block is located to be non-writable before translating the customer basic block. Referring to FIG. 3, a schematic diagram of a binary translator modifying page permissions is shown. As shown in fig. 3, the control of the read-write permission by the operating system is in units of pages. Assume that PAGE1 has its original right RWX, and originally has write rights. The binary translator removes write rights for PAGE1 before translating the customer base block in PAGE1, such that the rights for PAGE1 become RX and the rights for PAGE1 become unwritable. Assume PAGE1 contains customer base blocks GuestB, guestB2, and GuestB3. Suppose PAGE2 contains a self-modifying code for modifying the customer base block GuestB in PAGE 1. GuestB1, guestB2 and GuestB3, corresponding host basic blocks, namely HostB1, hostB2 and HostB3, are obtained after translation is completed and are stored in a code cache area. Note that, since the authority of PAGE1 is set to be unwritable at the time of translation GuestB, it is detected that the authority of PAGE1 is unwritable at the time of translation GuestB, and the setting is not repeated.
PageDesc1 is PAGE descriptor of PAGE1, which is used to describe various attributes and information of PAGE1, including original authority RWX of PAGE1, and related information of translated host basic block.
When the binary translator executes the self-modifying code in PAGE2, the write instruction of the self-modifying code is used for modifying the client basic block GuestB in PAGE1, and since the PAGE (PAGE 1) where the write address of the self-modifying code (the address to be operated by the write instruction, such as the address of GuestB) is located has no write authority at this time, the write address exception is triggered, and an exception handling function for handling the write address exception is registered in advance.
The exception handling function may determine whether the original authority of the current PAGE (PAGE triggering the write address exception, PAGE descriptor PageDesc of PAGE 1) is writable, and if the original authority is writable, it may determine that the write address exception is due to the self-modifying code, if the original authority is writable, it indicates that the write authority of the PAGE is removed by the translator at the time of translation, but not by the client program, and thus it may determine that the self-modifying code is detected.
If it is determined that the self-modifying code is detected, if an unoptimized scheme is adopted, the translated host basic blocks (such as HostB1, hostB2 and HostB 3) corresponding to all the client basic blocks (such as GuestB1, guestB2 and GuestB 3) in the current PAGE (such as PAGE 1) need to be invalidated, and the original authority recorded in the PAGE descriptor PageDesc corresponding to the PAGE is used to reset the authority of the PAGE, namely, the writing authority of the PAGE is restored. Program execution flow returns to the write instruction triggering the write address exception, at which point the PAGE (PAGE 1) has restored write rights, can write normally, and the client program can write the self-modifying code normally, at which point GuestB has been modified in this example. Since the host basic block (HostB 2) corresponding to the client basic block (GuestB 2) where the write address is located has been invalidated, when executing to the client basic block, the write permission to remove the page is re-performed and the client basic block is re-translated (modified HostB2 occurs). But when executing again to GuestB a1 or GuestB a 3, both HostB1 and HostB3 need to be translated again because both HostB1 and HostB3 are invalidated.
Although the minimum unit of self-modifying code is a basic block, if GuestB is to be modified, the non-optimized solution requires invalidating the translated host basic blocks corresponding to all customer basic blocks in the page where GuestB is located. The reason is that if there is a self-modifying behavior of other basic blocks in the PAGE where GuestB is located, for example, there is a self-modifying behavior of modifying GuestB at the same time, in this case, since the write authority of PAGE1 is released along with the self-modifying behavior occurring in GuestB, when GuestB3 is modified, the write address exception will not be triggered any more, resulting in the situation that GuestB3 is modified but the translator cannot perceive, and further, in this case, the HostB3 is inconsistent with GuestB3, and a translation error occurs. Therefore, in order to avoid the error, the translated host basic blocks corresponding to all the client basic blocks on PAGE1 need to be invalidated, and the self-modifying behavior of the basic blocks with granularity cannot be truly realized.
In the optimized scheme of the embodiment of the invention, under the condition that the self-modifying code is determined to be detected, the first virtual page is mapped to the second virtual page with the writing authority in a shared mapping mode, and the authority of the first virtual page still keeps unwritable, but the self-modifying code is written in through operating the second virtual page. The shared mapping is characterized in that a plurality of virtual pages can be mapped to the same physical page, the same data can be accessed through any one virtual page, and the plurality of virtual pages can have independent authority, so that the write authority of the first virtual page can not be restored, and the self-modifying action can be completed in an exception processing function through the second virtual page which is in the shared mapping. For example, to modify GuestB, since PAGE (PAGE 1) where the address of GuestB2 is located has no write permission, an exception to the write address is triggered and an exception handling function is entered. In this exception handling function, PAGE1 is mapped to the second virtual PAGE with write authority, parallelpage 1, guestB is modified by parallelpage 1, and only HostB2 is invalidated. Even if the self-modifying code of modification GuestB is present at the same time, modification GuestB triggers a write address exception, since PAGE1 still has no write rights, into an exception handling function in which the self-modifying operation to GuestB3 is performed. According to the scheme after optimization, for the concurrent self-modification behavior of a plurality of basic blocks in the same page, a translator can sense the self-modification operation of each basic block and trigger a corresponding exception handling function to process, so that the translation correctness can be ensured. Thus, the self-modifying behavior of the basic block with granularity can be truly realized.
In an optional embodiment of the present invention, the mapping the first virtual page to the second virtual page in a shared mapping manner may include:
Step S11, creating an anonymous file descriptor, describing Fu Bangding the first virtual page and the anonymous file, and setting a memory mapping attribute of the first virtual page as a sharing mapping;
and step S12, applying for a second virtual page, setting the authority of the second virtual page to be writable, and binding the second virtual page with the anonymous file descriptor.
In the event that the detection of the self-modifying code is determined, an anonymous file descriptor (e.g., denoted fd) is created. An anonymous file descriptor is a special file descriptor that is not associated with any file in the actual file system, but is directly associated with memory.
The anonymous file descriptor is presented as a non-negative integer that the operating system returns to the program when a system call is invoked to create the anonymous file descriptor. Where fd is an integer representing an anonymous file descriptor, which the program may then use as a parameter to invoke other system calls to operate on the resources associated therewith.
For example, a system call associated with the anonymous file descriptor and a memory map, such as a mmap system call in Linux, may be used to implement a shared memory, where multiple processes may access the same memory area through the same anonymous file descriptor, thereby implementing sharing of data.
The embodiment of the invention modifies the memory mapping attribute of the first virtual PAGE (such as PAGE 1) from PRIVATE mapping (MAP_PRIVATE) to SHARED mapping (MAP_SHARED), and establishes a binding relationship between the first virtual PAGE and the anonymous file descriptor fd, while maintaining the authority of the first virtual PAGE unchanged (i.e. not writable).
In addition, a new virtual PAGE (second virtual PAGE) can be applied for by using a corresponding system call, for example, the second virtual PAGE is denoted as a parallel_page1, the second virtual PAGE is a virtual PAGE in the host environment, a binding relationship is also established between the second virtual PAGE and the anonymous file descriptor fd, and the authority of the second virtual PAGE is set to be writable. Thus, the physical page mapped by the first virtual page is mapped to the second virtual page in a shared mapping manner, and the write operation to the second virtual page has the same effect as the write operation to the first virtual page.
Under different operating systems, the form of system calls for applying for virtual pages may be different, such as mmap system calls under Linux. Taking a Linux system as an example, the mmap system call mode is specifically as follows:
void *mmap(void *addr, size_t length, int prot, int flags, int fd, off_t offset);
Wherein the fd parameter is passed into the created anonymous file descriptor, and the flags parameter is passed into the SHARED mapping attribute (map_shared). The shared map is a pattern of memory mapping that allows multiple virtual addresses to share the contents of the same physical memory region.
It should be noted that, in order to avoid a situation that after the first virtual page and the second virtual page are set up to have a sharing mapping, data in the first virtual page is lost or an error occurs, before the first virtual page and the anonymous file descriptor are bound, the data in the first virtual page may be copied to a temporary area, and after the first virtual page and the anonymous file descriptor are bound, the data in the first virtual page is copied from the temporary area to the first virtual page, so as to ensure that the data in the first virtual page is consistent before and after the sharing mapping is set up with the second virtual page.
Next, the target basic block is looked up and invalidated at basic block granularity, and the self-modifying code is written in the second virtual page.
The embodiment of the invention additionally creates a second virtual PAGE (Parallel_PAGE 1) with write permission by utilizing the shared mapping, and when the detection of the self-modifying code is determined, the binary translator can utilize various fields maintained internally, and the write operation of the self-modifying code is realized by utilizing the second virtual PAGE (Parallel_PAGE 1) by combining a software write simulation technology.
Referring to FIG. 4, a schematic diagram of an embodiment of the present invention for performing a write operation using a second virtual page is shown. As shown in fig. 4, since the first virtual PAGE (PAGE 1) and the second virtual PAGE (parallel_page 1) are mapped to the same physical PAGE, the write operation performed on the mapped PAGE (second virtual PAGE) of the new application has the same effect as the write operation performed on the original PAGE (first virtual PAGE).
Taking the example in fig. 3 as an example, if the optimization method of steps 101 to 103 is adopted, only the target basic block HostB2 needs to be invalidated, and HostB1 and HostB3 remain valid. The next time execution proceeds to GuestB1, guestB2, and GuestB3, only the re-translation GuestB2 is needed, and the re-translations GuestB1 and GuestB3 are not needed, since HostB2 has been invalidated, while HostB1 and HostB3 remain valid. Therefore, redundant invalid operations can be reduced, redundant re-translation operations are reduced, and the performance of a translation system is improved.
In an alternative embodiment of the present invention, the method may further include:
Before translating a client basic block in the first virtual page, setting the authority of the first virtual page to be unwritable, and recording the original authority of the first virtual page in a page descriptor corresponding to the first virtual page.
The binary translator sets the permissions of the page (e.g., the first virtual page) containing the guest basic block to be non-writable and records the original permissions of the page in the page descriptor of the page, prior to translating the guest basic block. The binary translator removes the write permission of the page, so that an exception can be triggered when the client program performs a write operation (e.g., performs to the self-modifying code) on the page, so that the self-modifying behavior can be detected, and the binary translator can process the self-modifying code.
Further, the determining that the self-modifying code is detected may include:
step S21, when a write address exception signal triggered by executing a write instruction on the first virtual page is received, calling an exception handling function corresponding to the write address exception signal;
Step S22, in the exception handling function, the original authority of the first virtual page is obtained through the page descriptor corresponding to the first virtual page, and if the original authority of the first virtual page is writable, the detection of the self-modifying code is determined.
In the embodiment of the invention, the exception handling function is a signal handling function registered in advance for the write address exception signal. When the self-modifying code attempts to modify a non-writable PAGE (e.g., first virtual PAGE PAGE 1), the hardware detects the violation and triggers a write address exception. After the operating system captures the exception, a corresponding signal (e.g., SIGSEGV) is generated based on the type of exception, referred to as a write address exception signal. The operating system sends the generated write address exception signal to the process that raised the exception, i.e., the binary translator. After receiving the write address exception signal, the binary translator pauses the current execution flow, calls the previously registered exception handling function, and jumps to the exception handling function for execution.
And if the original authority of the first virtual page is writable, the writing authority of the first virtual page is removed by a binary translator during translation instead of the client program, the writing address abnormality is caused by the self-modifying code, and the self-modifying code can be confirmed to be detected.
In an optional embodiment of the present invention, the searching for the translated target basic block according to the write address of the self-modifying code may include:
According to the write address triggering the write address abnormality, calculating the page base address corresponding to the write address, searching the client basic block corresponding to the write address according to the page base address, and searching the translated target basic block according to the client basic block corresponding to the write address.
In the embodiment of the invention, when the self-modifying code triggers the write address exception, the PAGE base address (such as the base address of PAGE 1) corresponding to the write address can be calculated according to the write address triggering the write address exception, and the client basic block (such as GuestB 2) corresponding to the write address in the PAGE can be searched according to the PAGE base address, so that the translated target basic block (such as the host basic block HostB 2) corresponding to the client basic block is searched, and the valid flag bit of the target basic block (such as HostB 2) can be modified to be invalid.
When the self-modifying code triggers an abnormality of a write address, the write address is the position where the program tries to modify the code itself, and the method for acquiring the write address is not limited in the embodiment of the invention.
In a specific implementation, the write instruction of the self-modifying code contains information about the write operation, for example comprising what value (source register) to write to (destination register means address), taking the write instruction st.d as an example st.d reg1, reg2, imm, in this write instruction reg2 means the base address (base) of the write address, immediate imm means the offset of the write address based on the base address (base), so "reg2+imm" is the write address of this write instruction, reg1 means the specific value to be written to the write address "reg2+imm". Thus, a write address can be obtained from the write instruction of the self-modifying code. Illustratively, reg1 and reg2 may each represent a different register identification, with reg1 identifying a register containing a particular value to be written to the write address and reg2 identifying a register containing the base address of the write address.
In addition, when the self-modifying code triggers an exception to a write address, the operating system kernel detects that the program is attempting to write to an unwritable address, and the kernel saves the signal context of the process, including the write address of the instruction triggering the exception. After detecting the abnormality, the operating system kernel saves and transfers the signal context information to a signal processing function (i.e., an abnormality processing function) registered by the user program. The binary translator may obtain the write address triggering the exception from the signal context information returned by the operating system kernel.
According to the write address triggering the exception, the PAGE base address (such as the base address of PAGE 1) corresponding to the write address can be obtained.
Assuming PAGE SIZE Page_SIZE and write address write_addr, the PAGE base address may be calculated by first subtracting 1 from PAGE SIZE Page_SIZE and inverting to obtain PAGE-level mask, i.e., mask is: -Page_SIZE-1. Then, the write address write_addr and the mask are bitwise and operated to obtain a page base address. For example, PAGE SIZE page_size is 4k (4096), write address write_addr is 0x3004, first calculate PAGE level mask is 0xfffff000, then calculate PAGE base address is 0x3004&0 xffffff000=0x3000.
And searching the client basic block (such as GuestB) corresponding to the write address in the page according to the page base address, so as to find the translated target basic block (such as HostB 2) corresponding to the client basic block, and modifying the valid flag bit of the target basic block into invalid.
In implementations, a data structure (e.g., hash table, tree structure, array, etc.) may be maintained for storing information of basic blocks within a page. This data structure may contain information of the client basic block and location information of the client basic block within the page. For example, the base address of a page may be mapped to a list of basic blocks within the page by a mapping table. Each basic block contains information such as its start address, end address, etc. The list of basic blocks within the page is traversed, the address range of each basic block is examined, and the client basic block containing the write address can be found. For example, it may be checked whether the write address is between the start address and the end address of the client basic block, if so, a pointer to the client basic block is returned, otherwise NULL is returned.
Further, the binary translator may map the client basic block to the translated host basic block via a translation mapping table. This mapping table stores the correspondence between the client basic blocks and their corresponding translated host basic blocks. For example, a hash table may be used to store such mappings. According to the write address, the address of the basic block of the client can be searched, and then the corresponding host basic block (target basic block) can be searched in the hash table.
The target basic block (e.g., hostB 2) has a valid flag bit to indicate whether the basic block is still valid. The valid flag bit may be stored in the metadata of the target basic block or in a separate data structure associated with the address of the target basic block. Illustratively, the valid flag bit of the target basic block is set to false, indicating that the basic block has failed.
Next, the self-modifying code is written in the second virtual page, and since the second virtual page corresponds to the same physical page as the first virtual page, the same effect as the write operation on the first virtual page can be achieved by performing the write operation on the second virtual page.
In an optional embodiment of the present invention, the writing the self-modifying code in the corresponding location in the second virtual page based on the write address of the self-modifying code may include:
step S31, a write address of the self-modifying code and a base address of the first virtual page are obtained;
step S32, calculating the offset of the write address of the self-modifying code in the first virtual page based on the write address of the self-modifying code and the base address of the first virtual page;
Step S33, acquiring a base address of the second virtual page;
Step S34, calculating a target address corresponding to the write address of the self-modifying code in the second virtual page according to the base address of the second virtual page and the offset of the write address of the self-modifying code in the first virtual page;
and step S35, writing the self-modifying code in the second virtual page based on the target address.
In the embodiment of the invention, a preset field is newly added in the page descriptor corresponding to the first virtual page, and the preset field is used for recording the base address of the second virtual page.
Further, the obtaining the base address of the second virtual page may include:
And reading a value of a preset field in a page descriptor corresponding to the first virtual page, wherein the preset field is used for recording a base address of the second virtual page.
In the exception handling function, if it is determined that the write address exception is triggered by the self-modifying code, it is determined that the self-modifying code is detected, at this time, a physical page mapped by the first virtual page may be mapped to the second virtual page in a shared mapping manner, and a base address of the second virtual page may be recorded in a preset field (e.g., noted as parallel_mapping) of a page descriptor corresponding to the first virtual page.
Because the base address of the second virtual page with the writing authority is recorded in the preset field parallel_mapping, the target address of the writing address of the self-modifying code corresponding to the second virtual page can be calculated through the base address of the second virtual page and the offset of the writing address, so that the self-modifying code can be written in the target address of the second virtual page, and the same effect as the effect of writing the self-modifying code in the writing address of the first virtual page is realized.
In the embodiment of the invention, the first virtual PAGE1 is the original virtual PAGE of the client program, the binary translator removes the write permission of PAGE1 when translating the client basic block in PAGE1, and the client program tries to modify the self code when executing the self-modifying code, and because PAGE1 is not writable, write address abnormality is triggered. Thus, the binary translator can intercept each time the self-modifying behavior of the client program. The second virtual PAGE Parallel_page1 is a new virtual PAGE applied by the binary translator for optimizing the self-modifying code, and the second virtual PAGE corresponds to the same physical PAGE as the first virtual PAGE, so that the data written by the second virtual PAGE Parallel_page1 can be read from the first virtual PAGE 1.
In one example, assume that the write instruction of the current self-modifying code of the client program is used to write the value of val to address mem1 = 0x4008, i.e., the write address is 0x4008. The base address of the first virtual PAGE1 is 0x4000, and the offset of the write address in the first virtual PAGE refers to the intra-PAGE offset of the write address from the base address of the first virtual PAGE, and thus the offset of the write address 0x4008 in the first virtual PAGE is 0x8. Assuming that the base address of the second virtual PAGE parallel_page1 is 0x8000, after the self-modifying action is intercepted, according to the base address 0x8000 of the second virtual PAGE parallel_page1 and the offset 0x8 of the write address 0x4008 in the first virtual PAGE, the target address of the write address in the second virtual PAGE is calculated to be 0x8000+0x8=0x8008, so that the value of val is written into the target address 0x8008 in the second virtual PAGE, namely the write instruction of the self-modifying code is completed.
In an alternative embodiment of the present invention, the method may further include:
step S41, after the self-modifying code is determined to be detected, reading a value of a preset field in a page descriptor corresponding to the first virtual page;
and step S42, if the value of the preset field is null, mapping the physical page mapped by the first virtual page to the second virtual page in a shared mapping mode, and assigning the preset field as the base address of the second virtual page.
In the embodiment of the invention, a preset field parallel_mapping is added in a page descriptor of a first virtual page, and the preset field parallel_mapping is used for recording a base address of a second virtual page with write permission created by a translator when write operation is performed on the first virtual page by a self-modifying code for the first time to trigger write address abnormality. The embodiment of the invention does not limit the mode of newly adding the preset field, for example, a variable can be newly added in the structure body of the page descriptor to represent the preset field.
Further, when receiving a write address exception signal, the embodiment of the invention calls an exception handling function corresponding to the write address exception signal, which is registered in advance, and if the exception is identified to be triggered by the self-modifying code, whether the write address is triggered for the first time is further judged. If the trigger is the first trigger, continuing to perform the step of mapping the physical page mapped by the first virtual page to the second virtual page in a sharing mapping mode, and recording the base address of the second virtual page in a preset field of a page descriptor corresponding to the first virtual page.
The embodiment of the invention can judge whether the write address is the first trigger of the write address abnormality by inquiring whether the value of the preset field in the page descriptor corresponding to the first virtual page is empty, if yes, the write address is determined to be the first trigger of the write address abnormality, otherwise, the write address is determined not to be the first trigger of the write address abnormality.
If the value of the preset field in the page descriptor corresponding to the first virtual page is not null, the write address is not triggered for the first time, the first virtual page is subjected to shared mapping before, and the base address of the second virtual page with write permission of the shared mapping is recorded in the preset field parallel_mapping, so that the memory mapping is not required to be executed again, and the base address of the second virtual page recorded in the preset field is directly used to continue executing the subsequent steps.
In an alternative embodiment of the present invention, the method may further include:
after the self-modifying code is written in the corresponding position in the second virtual page, the program counter is pointed to the next instruction.
A Program Counter (PC) is a register that stores the address of the currently executing instruction and indicates the location in memory of the next instruction to be executed.
In the embodiment of the invention, a binary translator takes a program counter of a client platform as input, and firstly searches whether a translated host basic block corresponds to the current value of the program counter in a code cache area. If yes, the method jumps to the translated host basic block to be directly executed, and if no, the method enters a translation state to be translated. After the translation of the current customer basic block is completed, storing the translated host basic block into a code cache, entering an execution state, and executing the translated host basic block.
In the example of the page granularity invalidation basic block prior to optimization shown in fig. 3, the operations performed by the exception handling function include invalidating the translated hosting basic blocks corresponding to all client basic blocks in the first virtual page and restoring the write permission of the first virtual page. Thus, the Program Counter (PC) after the exception handling function exits should point to the location where the write address exception was triggered, i.e., the location of the write instruction of the self-modifying code, at which point the first virtual page has restored write permission, and the client program may perform the operation of the write instruction of the self-modifying code.
After the self-modifying code is optimized, the operation executed by the exception handling function comprises the steps of mapping a first virtual page to a second virtual page in a shared mapping mode, maintaining the authority of the first virtual page as unwritable, setting the authority of the second virtual page as writable, invalidating a host basic block corresponding to a client basic block at a write address triggering exception in the first virtual page by taking the basic block as granularity, and writing the self-modifying code in the second virtual page. That is, the operation of executing the write instruction of the self-modifying code has already been completed in the exception handling function, so the program counter after the exception handling function exits should point to the next instruction at the write address that originally triggered the exception to ensure proper execution of the program.
In summary, in the binary translation process, the embodiment of the invention optimizes the flow of processing the self-modifying code, and maps the first virtual page to the second virtual page in a shared mapping manner under the condition that the self-modifying code is detected, so that the second virtual page is mapped to the physical memory corresponding to the first virtual page. In addition, the embodiment of the invention maintains the authority of the first virtual page unchanged (still can not write), and sets the authority of the second virtual page to be writable, so that the writing operation on the second virtual page has the same effect as the writing operation on the first virtual page, and the writing operation of the self-modifying code can be executed by using the second virtual page. Further, since the embodiment of the invention does not need to restore the write permission of the first virtual page, the exception can still be triggered when the client program performs the write operation (e.g. executes the self-modifying code) on the first virtual page, so that the binary translator can detect the self-modifying action, therefore, the redundant invalidation operation can be reduced, the redundant re-translating operation can be reduced, and the performance of the translation system can be improved by setting the second virtual page with the shared mapping relation on the first virtual page and modifying the basic block based on the second virtual page, thereby realizing that the self-modifying operation is completed with smaller granularity and lower cost by invalidating only the target basic block corresponding to the write address of the self-modifying code with the basic block as granularity.
It should be noted that, for simplicity of description, the method embodiments are shown as a series of acts, but it should be understood by those skilled in the art that the embodiments are not limited by the order of acts, as some steps may occur in other orders or concurrently in accordance with the embodiments. Further, those skilled in the art will appreciate that the embodiments described in the specification are presently preferred embodiments, and that the acts are not necessarily required by the embodiments of the invention.
Referring to FIG. 5, there is shown a block diagram of an embodiment of a binary translator of the present invention, which may include:
the memory mapping module 201 is configured to map a first virtual page to a second virtual page in a shared mapping manner when it is determined that the self-modifying code is detected, where the first virtual page is a virtual page where a write address of the self-modifying code is located, the second virtual page corresponds to the same physical page as the first virtual page, and authority of the first virtual page is non-writable, and authority of the second virtual page is writable;
A basic block invalidation module 202, configured to find a translated target basic block according to the write address of the self-modifying code, and modify a valid flag bit of the target basic block to be invalid;
the self-modifying execution module 203 is configured to write the self-modifying code in a corresponding position in the second virtual page based on the write address of the self-modifying code.
Optionally, the self-modifying execution module includes:
the first acquisition sub-module is used for acquiring the write address of the self-modifying code and the base address of the first virtual page;
A first calculation sub-module, configured to calculate an offset of a write address of the self-modifying code in the first virtual page based on the write address of the self-modifying code and a base address of the first virtual page;
The second acquisition sub-module is used for acquiring the base address of the second virtual page;
the second computing sub-module is used for computing a target address corresponding to the write address of the self-modifying code in the second virtual page according to the base address of the second virtual page and the offset of the write address of the self-modifying code in the first virtual page;
and the code writing sub-module is used for writing the self-modifying code in the second virtual page based on the target address.
Optionally, the second obtaining sub-module is specifically configured to:
And reading a value of a preset field in a page descriptor corresponding to the first virtual page, wherein the preset field is used for recording a base address of the second virtual page.
Optionally, the binary translator further comprises:
The field reading module is used for reading a value of a preset field in a page descriptor corresponding to the first virtual page after the self-modifying code is determined to be detected;
And the field judging module is used for mapping the physical page mapped by the first virtual page to the second virtual page in a shared mapping mode if the value of the preset field is null, and assigning the preset field as the base address of the second virtual page.
Optionally, the binary translator further comprises:
the authority removing module is used for setting the authority of the first virtual page to be unwritable before translating the client basic block in the first virtual page, and recording the original authority of the first virtual page in a page descriptor corresponding to the first virtual page;
optionally, the memory mapping module includes:
The function calling sub-module is used for calling an exception handling function corresponding to a write address exception signal when receiving the write address exception signal triggered by executing a write instruction on the first virtual page;
And the function execution sub-module is used for acquiring the original authority of the first virtual page through the page descriptor corresponding to the first virtual page in the exception processing function, and determining that the self-modifying code is detected if the original authority of the first virtual page is writable.
Optionally, the memory mapping module includes:
A first binding submodule, configured to create an anonymous file descriptor, set the first virtual page and the anonymous file description Fu Bangding, and set a memory map attribute of the first virtual page to a shared map;
and the second binding submodule is used for applying for a second virtual page, setting the authority of the second virtual page to be writable, and binding the second virtual page with the anonymous file descriptor.
Optionally, the binary translator further comprises:
and the counter adjusting module is used for pointing the program counter to the next instruction after the self-modifying code is written in the corresponding position in the second virtual page.
The embodiment of the invention optimizes the binary translator, optimizes the flow for processing the self-modifying code in the binary translation process, and maps the first virtual page to the second virtual page in a shared mapping mode under the condition of detecting the self-modifying code so that the second virtual page is mapped to a physical memory corresponding to the first virtual page. In addition, the embodiment of the invention maintains the authority of the first virtual page unchanged (still can not write), and sets the authority of the second virtual page to be writable, so that the writing operation on the second virtual page has the same effect as the writing operation on the first virtual page, and the writing operation of the self-modifying code can be executed by using the second virtual page. Further, since the embodiment of the invention does not need to restore the write permission of the first virtual page, the exception can still be triggered when the client program performs the write operation (e.g. executes the self-modifying code) on the first virtual page, so that the binary translator can detect the self-modifying action, therefore, the redundant invalidation operation can be reduced, the redundant re-translating operation can be reduced, and the performance of the translation system can be improved by setting the second virtual page with the shared mapping relation on the first virtual page and modifying the basic block based on the second virtual page, thereby realizing that the self-modifying operation is completed with smaller granularity and lower cost by invalidating only the target basic block corresponding to the write address of the self-modifying code with the basic block as granularity.
For the device embodiments, since they are substantially similar to the method embodiments, the description is relatively simple, and reference is made to the description of the method embodiments for relevant points.
Referring to fig. 6, a schematic structural diagram of an electronic device according to an embodiment of the present invention is shown. As shown in fig. 6, the electronic device includes a processor, a memory, a communication interface, and a communication bus, where the processor, the memory, and the communication interface complete communication with each other through the communication bus, and the memory is configured to store at least one executable instruction, where the executable instruction causes the processor to execute the steps of the binary translation method of the foregoing embodiment.
An embodiment of the present invention provides a non-transitory computer-readable storage medium, which when executed by a program or a processor of a terminal, enables the terminal to perform the steps of the binary translation method of the foregoing embodiment.
In this specification, each embodiment is described in a progressive manner, and each embodiment is mainly described by differences from other embodiments, and identical and similar parts between the embodiments are all enough to be referred to each other.
It will be appreciated by those skilled in the art that embodiments of the present invention may be provided as a method, binary translator, or computer program product. Accordingly, embodiments of the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, embodiments of the invention may take the form of a computer program product on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) having computer-usable program code embodied therein.
Embodiments of the present invention are described with reference to flowchart illustrations and/or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing terminal device to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing terminal device, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
Finally, it is further noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or terminal that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or terminal. Without further limitation, an element defined by the phrase "comprising one does not exclude the presence of other like elements in a process, method, article or terminal device comprising the element.
While the principles and embodiments of the present invention have been described in detail in this application, the foregoing embodiments are provided to facilitate understanding of the principles and concepts of the invention and are further provided by one of ordinary skill in the art to which the invention pertains.
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