[go: up one dir, main page]

CN119024006B - Detection region forming method, grain surface detection method and grain surface hot spot judging method - Google Patents

Detection region forming method, grain surface detection method and grain surface hot spot judging method

Info

Publication number
CN119024006B
CN119024006B CN202411124113.2A CN202411124113A CN119024006B CN 119024006 B CN119024006 B CN 119024006B CN 202411124113 A CN202411124113 A CN 202411124113A CN 119024006 B CN119024006 B CN 119024006B
Authority
CN
China
Prior art keywords
detection
area
local
region
regions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202411124113.2A
Other languages
Chinese (zh)
Other versions
CN119024006A (en
Inventor
王磊
陈剑锋
郑鹏
林春
贺珊
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xiamen University
Original Assignee
Xiamen University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xiamen University filed Critical Xiamen University
Priority to CN202411124113.2A priority Critical patent/CN119024006B/en
Publication of CN119024006A publication Critical patent/CN119024006A/en
Application granted granted Critical
Publication of CN119024006B publication Critical patent/CN119024006B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01QSCANNING-PROBE TECHNIQUES OR APPARATUS; APPLICATIONS OF SCANNING-PROBE TECHNIQUES, e.g. SCANNING PROBE MICROSCOPY [SPM]
    • G01Q10/00Scanning or positioning arrangements, i.e. arrangements for actively controlling the movement or position of the probe
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01BMEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
    • G01B15/00Measuring arrangements characterised by the use of electromagnetic waves or particle radiation, e.g. by the use of microwaves, X-rays, gamma rays or electrons
    • G01B15/08Measuring arrangements characterised by the use of electromagnetic waves or particle radiation, e.g. by the use of microwaves, X-rays, gamma rays or electrons for measuring roughness or irregularity of surfaces
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01BMEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
    • G01B21/00Measuring arrangements or details thereof, where the measuring technique is not covered by the other groups of this subclass, unspecified or not relevant
    • G01B21/30Measuring arrangements or details thereof, where the measuring technique is not covered by the other groups of this subclass, unspecified or not relevant for measuring roughness or irregularity of surfaces
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01QSCANNING-PROBE TECHNIQUES OR APPARATUS; APPLICATIONS OF SCANNING-PROBE TECHNIQUES, e.g. SCANNING PROBE MICROSCOPY [SPM]
    • G01Q60/00Particular types of SPM [Scanning Probe Microscopy] or microscopes; Essential components thereof
    • G01Q60/24AFM [Atomic Force Microscopy] or apparatus therefor, e.g. AFM probes
    • H10P74/203
    • H10P74/23

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • General Health & Medical Sciences (AREA)
  • Nuclear Medicine, Radiotherapy & Molecular Imaging (AREA)
  • Radiology & Medical Imaging (AREA)
  • Electromagnetism (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

The application discloses a detection area forming method, a grain surface detection method and a grain surface hot spot judging method. The detection region forming method comprises the steps of selecting characterization regions on an integrated circuit layout and forming detection regions by the characterization regions, wherein the characterization regions are used for characterizing local regions with similar structures, and the sizes of the local regions are in the range of 0.5-50 microns. The die surface inspection method uses the inspection area formed by the inspection area forming method to perform the shape ni inspection on the die surface. The method for judging the hot spot on the surface of the crystal grain judges whether the hot spot exists according to the detection result of the shape ni. Compared with the prior art, the method has higher detection compression ratio, and is more beneficial to popularizing and applying detection means with high resolution on a production line.

Description

Detection region forming method, grain surface detection method and grain surface hot spot judging method
Technical Field
The application relates to the field of detection of the surface of a crystal grain subjected to CMP processing, in particular to a detection area forming method, a crystal grain surface detection method and a crystal grain surface hot spot judging method.
Background
Chemical Mechanical Polishing (CMP), also called chemical mechanical planarization, is a key process for realizing global uniform planarization of a Wafer (Wafer) in a semiconductor manufacturing process, and is the most commonly used process (about 25% of all processes) in the manufacturing process, as shown in fig. 1, the purpose of the CMP process is to realize planarization of a Wafer surface, and in the drawing of this patent, dark color portions are all semiconductor substrates, and light color portions are all functional portions made of metal materials. In this patent, the functional portion refers to a portion other than the semiconductor substrate, and most typically the functional portion is made of a metal material and may include an insulating portion. Metal parts are often used to perform functions of the circuit, such as connection and contact. The insulating portion is used for insulating isolation, and is often formed by filling a trench of semiconductor material with an insulating material.
Whether a defect exists in the CMP process is determined mainly by whether a hot spot (Hotspot) exists in a Die (Die) on the wafer. The hot spot will have a continuous impact on the subsequent steps of the semiconductor processing and eventually lead to a reduced yield. Therefore, it is important to determine whether the die has a hot spot after CMP processing to improve the yield. The creation of hot spots may originate from the design of the integrated circuit layout, from the materials used in the CMP process, or from parameters associated with the CMP process. Therefore, judging whether the grain has hot spots after the CMP processing is very important for improving the design of the layout and adjusting the CMP process. In reality, there are two types of hot spots after CMP, one of which is shown in fig. 2 as Erosion (Erosion) of a functional portion, which occurs in a metal material, generally along a metal line width direction, so that the detection of Erosion requires the detection of the shape ni (particularly, the height) in a size range of nanometers or tens of nanometers, and the other is shown in fig. 3 as a depression (Dishing) of a surface area, which occurs in a surface area of micrometers or tens of micrometers, and is strongly related to the line width of the functional portion and the density of the functional portion in the surface area, and the detection of the shape ni also requires the detection of the shape ni in nanometers.
In order to determine whether a Die (Die) on a wafer has a hot spot, it is necessary to perform a figure ni inspection (also referred to as roughness inspection) of the Die surface after each CMP process, the resolution of which should be on the order of nanometers, and in order to achieve line efficiency, it is preferable that such inspection be completed within 4 hours.
In the prior art, white light interferometers are the default option for performing die surface ni detection. Blunt et al use a white light interferometer to measure the surface roughness of semiconductor polished substrates and epitaxial layers, and Zhang et al also applied it to measure the step height of sputtered functional layers. Studies have shown that white light interferometry, while meeting the requirements substantially in terms of longitudinal resolution (0.1 nm) and measurement time (about 8 hours per die), has a lateral resolution on the order of microns or slightly less than 1 micron, and thus the detection accuracy is not satisfactory. Moreover, when the thickness of the die to be measured is too small (less than 50 nm), the die itself may be in a semitransparent state, and at this time, the measurement result may be affected by light scattering. In this regard, it is necessary to apply a layer of material to the surface of the die to achieve white light interferometry, but at the same time damage the die.
The atomic force microscope (Atomic Force Microscopy, AFM) can achieve 1nm of spatial resolution in the X-axis direction and the Y-axis direction, and has higher resolution in the Z-axis direction (height direction), so that a real three-dimensional atomic-level surface image can be provided. Meanwhile, the AFM does not need to carry out any special treatment on the sample, the damage probability of the sample in the preparation process is small, and nondestructive detection can be carried out. The AFM is used as one of powerful nanoscale resolution surface morphology detection tools, completely meets the resolution (precision) requirement of semiconductor crystal grain surface ni detection, and can not damage crystal grains in the measurement process. Xu et al used AFM to make non-destructive density measurements of etch pits (Etch Pits) created after GaN wafer CMP, and Shi et al also first achieved AFM in situ observation of local CMP behavior on sapphire. However, AFM imaging is slow, taking a lateral resolution of 10nm as an example, and imaging a region of 100 square microns size takes about 5 minutes, which can take weeks to months to measure a typical 33X 27mm 2 die. Therefore, it is difficult to apply the detection of the surface of the die ni to the production line by using a detection means such as an AFM or the like with high detection resolution.
Disclosure of Invention
The present application is directed to overcoming the above-mentioned drawbacks or problems occurring in the prior art, and providing a method for forming a detection area, a method for detecting a surface of a die, a method for determining a hot spot on a surface of a die, a computer program, a computing device, and a detection apparatus, which have a higher detection compression ratio than those of the prior art, and are more advantageous for popularizing and applying a detection means with high resolution on a production line.
In order to achieve the above purpose, the following technical scheme is adopted:
The first technical scheme relates to a detection area forming method, which is used for determining detection areas when surface detection is carried out on crystal grains subjected to CMP processing, wherein a characterization area is selected on an integrated circuit layout and is formed by the characterization areas, the characterization area is used for characterizing local areas with similar structures, and the dimensions of X axis and Y axis of the local areas are in the range of 0.5 micrometers to 50 micrometers.
A second technical solution is based on the first technical solution, wherein the dimensions of the local area X-axis and Y-axis are in the range of 10 micrometers to 30 micrometers.
A third technical solution is based on the second technical solution, wherein the dimensions of the X-axis and the Y-axis of the local area are 20 micrometers.
The fourth technical scheme is based on the first technical scheme and comprises the steps of dividing a to-be-tested part on an integrated circuit layout into a plurality of local areas, wherein all the local areas cover the to-be-tested part, the to-be-tested part covers all processing area groups, each processing area group comprises processing areas with similar structures, classifying all the local areas based on the similarity of structures to obtain local area groups, each local area group selects at least one local area as a characterization area, and the collection of all the characterization areas forms a detection area.
A fifth technical means is based on the fourth technical means, wherein adjacent partial areas overlap each other.
A sixth technical means is based on the fifth technical means, wherein the local area is obtained by sliding a virtual window over the portion to be measured.
The seventh technical scheme is based on the fourth technical scheme, wherein the to-be-measured part is determined by performing edge diffusion on each processing region in the integrated circuit layout to form corresponding diffusion regions, classifying all the diffusion regions based on structural similarity to obtain diffusion region groups, selecting at least one diffusion region from each diffusion region group as the to-be-measured region, and collecting all the to-be-measured regions to form the to-be-measured part.
An eighth technical means is based on the seventh technical means, wherein the structural similarity is rotational symmetry and/or mirror symmetry.
The ninth technical solution is based on the seventh technical solution, wherein the candidate measurement portions are sets of candidate measurement regions, the candidate measurement portions cover all diffusion region groups, and each diffusion region group has only a preset number of candidate measurement regions, and the first path is a shortest unidirectional path passing through a center point of all the candidate measurement regions in the candidate measurement portions.
A tenth technical solution is based on any one of the fourth to ninth technical solutions, wherein the detection area is the shortest second path among the candidate detection areas, the candidate detection areas are a set of candidate characterization areas, the candidate detection areas cover all local area groups and there are only a preset number of candidate characterization areas in each local area group, and the second path is the shortest unidirectional path among the candidate detection areas passing through the center point of all the candidate characterization areas.
An eleventh technical means is directed to a die surface inspection method for inspecting a die surface after CMP processing, which inspects a die surface for a shape ni based on an inspection region formed by the inspection region forming method according to any one of the first to tenth technical means.
A twelfth aspect is based on the eleventh aspect, wherein the surface of the crystal grain is inspected for shape ni by AFM.
A thirteenth aspect is based on the twelfth aspect, wherein the local area X-axis and Y-axis dimensions are less than or equal to the maximum imaging range X-axis and Y-axis dimensions of the AFM.
A fourteenth technical means is directed to a grain surface hot spot judging method for judging whether a hot spot exists on a surface of a grain after CMP processing, wherein the grain surface detecting method according to any one of the tenth to thirteenth technical means is used for performing shape ni detection on the surface of the grain, and if there is erosion of a functional portion and/or dishing of a characterization region in a detection result, the existence of the hot spot on the surface of the grain is judged.
Compared with the prior art, the scheme has the following beneficial effects:
Norma Rodriguez et al, paper Hotspot Prevention Using CMP Model in Design Implementation Flow, teaches that the planarization of CMP depends on the density and width of the metal portions in localized areas on the die. At different densities and widths, dishing and erosion may occur to varying degrees.
The Colin Hui et al paper Hotspot detection AND DESIGN recommendation using silicon calibrated CMP model indicates that dishing and erosion can occur during CMP, forming a dishing or erosion in the lower layer, resulting in copper residue or copper build-up in the upper layer. Dishing and erosion are strongly dependent on the density and linewidth of the design pattern. The wide function is more prone to dishing than the narrow function.
From the above papers, it is clear that the structure of the functional part of the local area on the surface of the die (reflected as a pattern structure on the integrated circuit layout) is a key factor affecting the distribution of hot spots in the local area after the CMP process is performed. The structure of the functional part covers two important indexes of the density and the line width of the design pattern. Of course, the partial region without a functional part should also be regarded as a functional part structure. The structurally different local regions have different hot spot formation possibilities during the execution of the CMP process.
The first technical scheme is based on the rules disclosed in the above paper, the local areas with similar structures are characterized by the characterization areas, so that the possibility of hot spots in the local areas can be characterized by only detecting the characterization areas with small quantity in the local areas with similar structures, thereby improving the detection compression ratio well, providing a basis for shortening the detection time of the crystal grains, and being more beneficial to popularizing and applying detection means with high resolution on a production line.
In the first embodiment, the size of the local area is equivalent to the size of the surface area where dishing may occur, so that both dishing and erosion hot spot detection can be covered.
In the first technical solution, the integrated circuit layout refers to a design layout of an integrated circuit on a die. In some processes it is necessary to perform multiple CMP processes, and if each CMP process has a different integrated circuit topology, the integrated circuit layout refers to the design layout corresponding to that CMP process. If the integrated circuit is a planar semiconductor integrated circuit, the integrated circuit layout is the final design layout of the integrated circuit. In the first technical scheme, the detection area is selected by using the integrated circuit layout, and compared with the method that the macro image is formed at low resolution in the detection process and the local area is divided based on the macro image, the method has the advantages of being more convenient and shorter in detection time.
The second and third solutions are preferred for the size of the local area.
The fourth technical solution provides a specific way of determining the characterization area and thus forming the detection area. In the fourth aspect, the to-be-measured portion covers all the processing region groups, and all the partial regions cover the to-be-measured portion, so that it can be ensured that the set of partial regions for similarity classification can cover all the processing regions of the structure type.
In the fifth technical solution, adjacent local areas overlap each other, so that all the functional part structures in the range of the to-be-measured part can be traversed, the influence of factors (such as starting positions) related to the division of the local areas on the detection result is further reduced, and the possibility that the characterization area better characterizes the occurrence of the hot spot is facilitated.
A sixth technical means is a specific embodiment of the fifth technical means.
In the seventh technical means, the portion to be measured is based on the diffusion region, so that not only the portion to be measured can include all types of processing regions, but also the region adjacent to the processing region can be included, and the structures of various local regions can be expressed more comprehensively. The diffusion regions are classified based on the structural similarity, at least one diffusion region is selected from each diffusion region group to serve as a to-be-detected region to jointly form the to-be-detected portion, the area of the to-be-detected portion can be reduced, the number of local regions for classification is reduced by using the repeatability of the macro structure of the grain surface, and meanwhile functional portion structures with different structural similarities can be guaranteed to be incorporated into the to-be-detected portion, so that missed detection in the detection process is avoided.
In the eighth aspect, the structural similarity is rotational symmetry and/or mirror symmetry, and thus can cover all different functional part structures.
In the ninth technical solution, the first path of the to-be-detected part is shortest in each candidate to-be-detected part, so that a basis can be provided for shortening the final detection path as much as possible on the premise of traversing all the diffusion area groups, and the detection time is further shortened.
In the tenth technical solution, the second paths of the detection areas in each candidate detection area are shortest, so that the final detection path can be shortened as much as possible on the premise of traversing all local area groups, and the detection time can be further shortened.
According to the eleventh technical scheme, the surface of the crystal grain is detected by the shape ni based on the detection area formed by the detection area forming method, so that the detection time of the crystal grain can be shortened by utilizing a high compression ratio, and the popularization and application of a detection means with high resolution on a production line are facilitated.
The twelfth technical solution is a preferred embodiment of the tenth technical solution, and the surface ni of the crystal grain is detected by AFM, so that the resolution can be ensured, and the crystal grain can be detected nondestructively, so that no material needs to be smeared on the surface of the crystal grain, and the detected crystal grain is prevented from being damaged.
In the thirteenth technical solution, the local area size is smaller than or equal to the size of the maximum imaging range of the AFM, so that when the AFM detects the characteristic area, only the probe needs to be moved, other parts do not need to be moved, and errors of detection fields caused by moving other parts are avoided. The correspondence between the characterization area detected in the actual detection process and the characterization area on the integrated circuit layout can be ensured.
In the fourteenth technical solution, the above-mentioned method for detecting the surface of a grain is used to detect the surface of the grain ni, and based on the detection result, it is determined whether a hot spot exists on the surface of the grain, and compared with the prior art, it is able to more rapidly determine whether a hot spot exists, which is more beneficial to popularizing and applying a detection means with high resolution on the production line.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments, the following brief description of the drawings is provided, in which:
FIG. 1 is a schematic view of a partial longitudinal section of a wafer before and after a CMP process;
FIG. 2 is a schematic view of a partial longitudinal section of a wafer containing erosion hot spots;
FIG. 3 is a schematic view of a partial longitudinal section of a wafer containing recessed hot spots;
FIG. 4 shows an integrated circuit layout in a first embodiment;
FIG. 5 shows a diffusion region in a first embodiment;
FIG. 6 shows a diffusion region cluster in embodiment one;
FIG. 7 shows a portion to be tested in the first embodiment;
FIG. 8 shows a partial region in embodiment one;
FIG. 9 illustrates a local region class group in embodiment one;
fig. 10 shows a detection path in the first embodiment;
fig. 11 shows a detection region and a detection path in the first embodiment;
FIG. 12 shows an integrated circuit layout in embodiment two;
FIG. 13 illustrates a representative local region of a local region class in embodiment two;
fig. 14 shows a detection path in the second embodiment.
Detailed Description
The technical solutions in the embodiments will be clearly and completely described below with reference to the accompanying drawings.
Example 1
Referring to fig. 4, fig. 4 shows an integrated circuit layout in a first embodiment. In an embodiment, the integrated circuit layout refers to a design layout of an integrated circuit corresponding to a die. In some processes it is necessary to perform multiple CMP processes, and if each CMP process has a different integrated circuit topology, the integrated circuit layout refers to the design layout corresponding to that CMP process. If the integrated circuit is a planar semiconductor integrated circuit, the integrated circuit layout is the final design layout of the integrated circuit. The integrated circuit layout is utilized to select the detection area, and compared with the method that the macro image is formed at low resolution in the detection process and the local area is divided based on the macro image, the method has the advantages of being more convenient and shorter in detection time.
As shown in fig. 4, the dimension of the integrated circuit layout in the X-axis direction is 12.5 micrometers, and the dimension in the Y-axis direction is 8.5 micrometers in the present embodiment. In this embodiment, there are 6 processing regions, A1 to A6, on the integrated circuit layout. Only the functional part is included in each processing area. I.e. in this embodiment, the non-functional parts are not included in the processing area. The functional part in this embodiment is a metal part, in particular a copper layer. Wherein, the dimensions of A1, A3, A4 and A6 are the same, the dimension of the X axis direction is 2 micrometers, the dimension of the Y axis direction is 3 micrometers, the dimensions of A2 and A5 are the same, the dimension of the X axis direction is 6 micrometers, and the dimension of the Y axis direction is 3 micrometers. The distance between two processing regions adjacent in the X-axis direction was 0.25 μm, and the distance between two processing regions adjacent in the Y-axis direction was 0.5 μm. The distance from the processing region to the adjacent edge of the integrated circuit layout is 1 micron in the X-axis direction and also 1 micron in the Y-axis direction.
In this embodiment, the detection region E and the detection path F are formed by the following steps based on the integrated circuit layout.
And step 1, respectively performing edge diffusion on each processing area in the integrated circuit layout to form a diffusion area, wherein the to-be-measured part is based on the diffusion area, so that the to-be-measured part can comprise all types of processing areas, can comprise areas adjacent to the processing areas, and can more comprehensively express the structures of various local areas. See in particular fig. 4 and 5. Fig. 4 and 5 show the diffusion region in the present embodiment. As shown in fig. 4, the red frame in fig. 4 is a diffusion region formed after the edge of the processing region A1 is diffused. In this embodiment, each side of the processing region is out-diffused by a distance of 1 micron. The specific manner of setting the diffusion distance will be described later in detail. As shown in fig. 5, the processing regions A1 to A6 are edge-diffused to form corresponding diffusion regions B1 to B6;
and 2, classifying all the diffusion areas based on rotational symmetry and/or mirror symmetry to obtain diffusion area groups, wherein in the embodiment, the classification modes of the diffusion area groups are structural similarity, specifically rotational symmetry and mirror symmetry. In other embodiments, the structural similarity index may be rotational symmetry or mirror symmetry, and in some cases where the accuracy requirement is not high, the structural similarity index may be classified based on hamming distance or the like. The diffusion regions are classified based on rotational symmetry and/or mirror symmetry, at least one diffusion region is selected from each diffusion region group to serve as a to-be-detected region to jointly form a to-be-detected part, the area of the to-be-detected part can be reduced, the number of local regions for classification is reduced by using the repeatability of the macro structure of the surface of the crystal grain, all functional part structures can be guaranteed to be incorporated into the to-be-detected part C, and missing detection in the detection process is avoided. See in particular fig. 6. Fig. 6 shows a diffusion region group in the present embodiment. As shown in fig. 6, the number of diffusion region groups in this embodiment is two, BC1 and BC2, respectively. The diffusion region group BC1 is a set of diffusion regions B1, B3, B4, and B6, wherein B1 and B3 are mirror-symmetrical along the X-axis direction, B1 and B4 are mirror-symmetrical along the Y-axis direction, and B1 and B6 are 180-degree rotation-symmetrical. The diffusion region group BC2 is a set of diffusion regions B2 and B5, wherein B2 and B5 are mirror-symmetrical in the Y-axis direction. Any one diffusion region in the diffusion region group BC1 is not mirror symmetrical or rotation symmetrical or mirror symmetrical plus rotation symmetrical with any one diffusion region in the diffusion region group BC 2;
And 3, selecting at least one diffusion region from each diffusion region group to form a to-be-measured region, wherein the set of all to-be-measured regions forms a to-be-measured part C, and selecting one diffusion region from each diffusion region group to form the to-be-measured region in the embodiment. In this embodiment, the first path of the candidate portion C is shortest among the candidate portions. The candidate test part is a set of candidate test areas, the candidate test part covers all the diffusion area groups, and each diffusion area group has a preset number of candidate test areas, and the first path is the shortest unidirectional path passing through the center points of all the candidate test areas in the candidate test part. The first path of the candidate test part C is shortest, and the test part C can provide a basis for shortening the final detection path F as much as possible on the premise of traversing all the diffusion area groups, so that the detection time is shortened. In this embodiment, the preset number is 1. Specifically, the embodiment includes 8 candidate test portions, where each candidate test portion is a set of two candidate test regions, and the two candidate test regions are respectively from two diffusion region groups. The 8 candidate test sets are respectively a set of B1 and B2, a set of B1 and B5, a set of B3 and B2, a set of B3 and B5, a set of B4 and B2, a set of B4 and B5, a set of B6 and B2, and a set of B6 and B5. In this embodiment, the first path is a path between center points in two candidate regions in the candidate test portion, and when the diffusion region group exceeds 3 or more, the first path is a shortest unidirectional path passing through center points in all candidate regions in the candidate test portion. According to the above rule, the first path containing the candidate test portions of B1 and B2 is shortest. Of course, the first path of the candidate test portions including B3 and B2, the candidate test portions including B4 and B5, and the candidate test portions including B5 and B6 is also shortest. One of the four candidate moieties may optionally be used as moiety C. Referring to fig. 7, fig. 7 shows a portion to be measured C in the present embodiment. As shown in fig. 7, in the present embodiment, the section to be measured C is a set of the section to be measured B1 and B2. It should be noted that in other embodiments, the portion to be tested C may also be a portion of the integrated circuit layout covering all of the process area clusters. The portion to be tested may also be the entire integrated circuit layout. Of course, if the entire integrated circuit design layout is selected as the portion to be tested C, the computation time to form the test area E and the test path F will be longer, and therefore not efficient;
And 4, dividing the region of the to-be-measured part C to form a plurality of local regions, wherein all the local regions cover the to-be-measured part C, and all the local regions cover the to-be-measured part C, so that the set of the local regions for carrying out similarity classification can be ensured to cover the processing regions of all the structure types. In this embodiment, the adjacent partial areas overlap each other, and in other embodiments, the adjacent partial areas may also abut each other. Adjacent local areas are overlapped with each other, so that all functional part structures in the range of the to-be-detected part can be traversed, the influence of factors (such as starting positions) related to the division of the local areas on the detection result is further reduced, and the possibility of the occurrence of hot spots is better represented by the representation area.
Referring to fig. 7 and 8, fig. 7 and 8 show a partial region in the present embodiment. As shown in fig. 7, in the present embodiment, the size of the local area in the X-axis direction is 2 micrometers, and the size in the Y-axis direction is also 2 micrometers. Specifically, the partial area in the present embodiment is obtained by sliding a virtual window of a red frame as shown in fig. 7, which has the same size as the partial area, on the portion to be measured C. The value of each step is 1 micron when sliding the virtual window. For greater detection efficiency, the size of the localized area may be set to between 0.5-50 microns, more preferably between 10 microns and 30 microns, and even more preferably 20 microns. It should be noted that the size of the local area may or may not have a correlation with the aforementioned setting of the diffusion distance. In order to improve efficiency, the diffusion distance may be set to be generally smaller than or equal to the size of the partial region, and more preferably, the diffusion distance may be set to be a step value at the time of sliding the window, that is, the size of a portion where adjacent partial regions overlap each other. As shown in fig. 8, according to the above method for dividing local areas, the number of local areas in the present embodiment is 40, and D1 to D40 respectively;
And 5, classifying all the local areas based on the similarity of the functional part structures in the local areas to obtain local area groups. The similarity of the structures of the functional portions should include at least the similarity of the proportion of the functional portions to the area of the partial region and the similarity of the line widths of the functional portions. The structure of the function part refers to the shape of the function domain if the function part contains only one function domain, the shape of each function domain if the function part contains more than two function domains, and the positional relationship between the function domains, and if the local region does not contain the function part, the function part should be divided into a single local region group. In the classification based on the similarity of the functional part structures, one classification method which may lead to a larger group of local regions is to classify based on rotational symmetry and/or mirror symmetry, i.e. only local regions with rotational symmetry and/or mirror symmetry can be classified into one group of local regions. The present embodiment uses a classification scheme based on rotational symmetry and/or mirror symmetry. On the basis, the local areas with rotational symmetry and/or mirror symmetry after micro-translation can be classified into the same local area group. Specifically, referring to fig. 9, fig. 9 shows 8 local area groups formed based on the above classification method in the present embodiment. Wherein the local region group DC1 comprises a local region D1, the local region group DC2 comprises local regions D2, D5 to D9, D11 and D12, the local region group DC3 comprises local regions D3, D4 and D10, the local region group DC4 comprises local regions D12, D15 to D19, D22, D25 to D29, the local region group DC5 comprises local regions D13, D14, D20, D23, D24 and D30, the local region group DC6 comprises local regions D33, D34 and D40, the local region group DC7 comprises local regions D32 and D35 to D39, and the local region group DC8 comprises a local region D31;
In the embodiment, the second path of the detection area E in each alternative detection area is shortest, the alternative detection area is a set of alternative characterization areas, the alternative detection areas cover all the local area groups, and only a preset number of alternative characterization areas exist in each local area group, and the second path is the shortest unidirectional path passing through the center point of all the alternative characterization areas in the alternative detection areas. The second paths of the detection areas in the alternative detection areas are shortest, so that the final detection paths can be shortened as much as possible on the premise of traversing all local area groups, and the detection time is further shortened. In this embodiment, the preset number is 1. Referring to fig. 10 and 11, fig. 10 and 11 illustrate a detection region E and a detection path F. As shown in fig. 10 and 11, in the present embodiment, the detection area E includes 8 characterization areas, which are D1, D2, D3, D12, D23, D33, D32, and D31, respectively. The 8 token regions cover all 8 local region clusters and there is one and only one token region per local region cluster. In this embodiment, the number of alternative characterization areas is very large, and it can be intuitively seen from fig. 10 that the second path (red path in fig. 10) of the detection area E is the shortest. As shown in fig. 11, the detection path F is obtained based on the second path of the detection area E, specifically, in this embodiment, alternatively, the detection path F may be D1 sequentially through D2, D3, D12, D23, D33, D32 to D31.
In this embodiment, the detection region forming method described above may be implemented by executing a computer program. In the computer program, the algorithm for generating the diffusion region group from each diffusion region and the algorithm for generating the local region group from each local region may be one or more of a Support Vector Machine (SVM), a K nearest neighbor algorithm (KNN), a random forest, a Convolutional Neural Network (CNN), a migration learning algorithm and a reinforcement learning algorithm, and the Support Vector Machine (SVM) is selected in this embodiment. The algorithm for generating the portion to be measured based on each of the diffusion region groups and the algorithm for generating the detection region E based on each of the local region groups may be a combination of one or more of a genetic algorithm, dijkstra algorithm, a grid algorithm, a Particle Swarm Optimization (PSO) algorithm, and an Ant Colony Optimization (ACO) algorithm. Specifically, the genetic algorithm is selected in this embodiment.
The embodiment also discloses a detection device, which comprises a detection device, a calculation device and a control device. The detecting device is an Atomic Force Microscope (AFM) and is used for detecting the shape ni of the crystal grain after the CMP processing and outputting a shape ni detection result. Compared with a white light interferometer, the AFM is used for carrying out surface ni detection on the crystal grains, the resolution can be ensured, nondestructive detection can be carried out on the crystal grains, no material is required to be smeared on the surfaces of the crystal grains, and the detected crystal grains are prevented from being damaged. In this embodiment, the maximum imaging range of the AFM has an X-axis dimension of 2 micrometers and a Y-axis dimension of 2 micrometers. Thus, in this embodiment, the size of the local area is equal to the size of the maximum imaging range of the AFM, and in other embodiments, the size of the local area may be set smaller than the size of the maximum imaging range of the AFM. The size of the local area is smaller than or equal to the size of the maximum imaging range of the AFM, so that the AFM only needs to move the probe when detecting the characteristic area, other parts do not need to be moved, and errors of detection vision caused by moving other parts are avoided. The correspondence between the characterization area detected in the actual detection process and the characterization area on the integrated circuit layout can be ensured. The computing device includes an input unit, an output unit, a storage unit, and a computing unit. The input unit is used for acquiring the integrated circuit layout, the output unit is used for outputting the detection area and the detection path, the storage unit is used for storing the computer program, and the calculation unit is used for calling and executing the computer program so as to generate the detection area and the detection path based on the integrated circuit layout. The control device is used for acquiring the detection area and the detection path from the computing device so as to control the detection device to perform ni detection on the crystal grain according to the detection path within the detection area. In this embodiment, the AFM detects the shape ni in the selected local area by moving the probe, which may be in a grid (master) scanning mode or in a line scanning mode. The present embodiment adopts a raster scanning method. In this embodiment, the AFM movement between the characterization regions is achieved primarily by displacement of other parts than the probe, such as by movement of a cantilever or support arm or other probe-mounted mechanism along the X-axis and Y-axis.
The embodiment also discloses a method for judging the hot spot on the surface of the crystal grain, which is used for judging whether the hot spot exists on the surface of the crystal grain after the CMP processing. Specifically, the grain surface hot spot judging method judges whether or not there is erosion of the functional portion and/or dishing of the characterization region based on the detection result output by the above-described detecting apparatus. Optionally, in each characterization area, it is determined that there is erosion of the functional portion if the functional portion height is below the height of the semiconductor substrate and the height difference exceeds a first threshold. The first threshold may be set to 10nm, or may be specifically set according to the process requirements. If the overall height of the characterization area with the functional part is lower than that of the characterization area without the functional part or with less functional part and the height difference exceeds a second threshold value, the existence of the depression of the characterization area is judged. The second threshold may be set to 20-50 nanometers, or may be specifically set according to the process requirements. As long as any erosion or dishing exists, the existence of hot spots on the surface of the crystal grain should be judged. By using the grain surface detection method to carry out figure ni detection on the grain surface and judging whether hot spots exist on the grain surface based on the detection result, compared with the prior art, whether the hot spots exist can be judged more rapidly, and the popularization and application of the detection means with high resolution ratio on the production line are facilitated.
In this example, the total area of the die was 106.25 square microns, and the inspection area E included 8 characterization areas, each of which had an area of 4 square microns, so the area of the inspection area was 32 square microns, and thus the inspection compression ratio was 3.32. Of course, this embodiment is only for illustrating the method of this patent, and in practical application, the actual compression ratio is far greater than that of this embodiment due to the high repeatability of the processing region and the high similarity of the local region.
Example two
Referring to fig. 12, fig. 12 shows an abbreviated view of an integrated circuit layout of a die in a second embodiment. As shown in fig. 12, the integrated circuit layout in the second embodiment includes two types of processing regions which are arranged along the X-axis and repeated as one repeating unit. The entire integrated circuit layout has 48 repeating units along the X-axis and 96 repeating units along the Y-axis. In one repeating unit, the size of the left processing area in the X-axis direction is 10 micrometers, the size of the Y-axis direction is 10 micrometers, the processing area is provided with a functional part and a nonfunctional part, the color of the functional part is lighter and is a copper layer, the color of the nonfunctional part is darker and is a semiconductor substrate, the functional part comprises 8 square rings which are nested with each other, the line width of each ring is 0.3 micrometer, the distance between the rings is 0.3 micrometer, the size of the right processing area in the X-axis direction is 9.9 micrometers, the size of the Y-axis direction is 10 micrometers, the processing area is also provided with a nonfunctional part, the color of the functional part is lighter and is a copper layer, the nonfunctional part is darker and is a semiconductor substrate, the functional part is only one, a plurality of square nonfunctional substrate subfields are embedded between the functional part, the semiconductor substrate subfields are square, the size in the X-axis direction and the size of the Y-axis direction are both 0.3 micrometers, and the distance between the two directions in the X-axis direction and the Y-axis direction are both 0.3 micrometer. In each repeating unit, the interval between the left and right processing regions is 0.3 micrometers, the interval between the two repeating units is 0.3 micrometers in the X-axis direction, and the interval between the two repeating units is 0.3 micrometers in the Y-axis direction. Based on the above dimensions, in the second embodiment, the area of each repeating unit is 20120 square micrometers, and 4608 repeating units are total, and the area of the entire integrated circuit layout is approximately 92712960 square micrometers.
The detection region and the detection path of the second embodiment can be obtained in the same manner as in the first embodiment. Unlike the first embodiment, the diffusion distance is 5 micrometers, the dimension of the partial region in the X-axis direction is 10 micrometers, the dimension in the Y-axis direction is 10 micrometers, and the step value is 5 micrometers in the second embodiment. In this embodiment, the method for obtaining the local region group by using the structural similarity is to classify the local regions having rotational symmetry and/or mirror symmetry after the minor translation into the same local region group. Referring to fig. 13, fig. 13 shows the characterization areas of each local area group in the present embodiment. As shown in fig. 13, in this embodiment, there are 11 local area groups, DC01 to DC11 respectively, and the characterization area in each local area group is shown in fig. 13. Fig. 14 shows a detection path in the present embodiment. As shown in fig. 14, the detection path in the present embodiment is indicated by a red line. The corresponding detection region is also determined by the set of characterization regions.
The calculation means for outputting the inspection area and the inspection path in the second embodiment is substantially the same as that in the first embodiment, and the inspection apparatus for inspecting the shape ni of the die after CMP processing is also substantially the same as that in the first embodiment, except that the AFM maximum imaging range is 10 micrometers×10 micrometers.
The die surface detection method and the die surface hot spot judgment method in the second embodiment are the same as those in the first embodiment.
In a second embodiment, the detection area comprises 11 characterization areas, each characterization area has an area of 100 micrometers, the detection area has an area of 1100 square micrometers, and the detection compression ratio is 84284.5. Therefore, by adopting the detection area forming method, a large detection compression ratio can be realized, the detection time is greatly shortened, and the popularization and application of the detection means with high resolution on the production line are facilitated.
According to the embodiment, the local areas with similar structures are characterized by the characterization areas, so that the possibility of hot spots in the local areas can be characterized by only detecting the characterization areas with small quantity in the local areas with similar structures, the detection compression ratio is well improved, the detection time of grains is shortened, and the popularization and application of detection means with high resolution on a production line are facilitated.
The above embodiment utilizes the integrated circuit layout to select the detection area, and has the advantages of more convenience and shorter detection time compared with the method that the macro image is formed at low resolution in the detection process and the local area is divided based on the macro image.

Claims (13)

1.检测区域形成方法,其用于确定对经过CMP加工后的晶粒进行表面检测时的检测区域,其特征是,在集成电路版图上选择表征区域并由各表征区域形成检测区域;所述表征区域用于表征具有相似结构的局部区域,所述局部区域X轴和Y轴的尺寸在0.5微米至50微米范围内;所述检测区域形成方法包括如下步骤:1. A method for forming a detection area, used to determine the detection area when performing surface inspection on a CMP-processed die, characterized in that characterization areas are selected on an integrated circuit layout and the detection area is formed by each characterization area; the characterization areas are used to characterize local regions with similar structures, and the dimensions of the local regions along the X and Y axes are in the range of 0.5 micrometers to 50 micrometers; the method for forming the detection area includes the following steps: 对集成电路版图上的拟测部分进行区域划分形成若干局部区域,所述拟测部分覆盖所有加工区域类群,每个加工区域类群包括具有相似结构的加工区域,所有局部区域覆盖拟测部分;The area to be tested on the integrated circuit layout is divided into several local areas. The area to be tested covers all processing area groups. Each processing area group includes processing areas with similar structures. All local areas cover the area to be tested. 对所有局部区域基于结构的相似性进行分类获得局部区域类群;Local regions are classified based on structural similarity to obtain local region groups; 每个局部区域类群选择至少一个局部区域作为表征区域,所有表征区域的集合形成检测区域。Each local region group selects at least one local region as the representation region, and the set of all representation regions forms the detection region. 2.如权利要求1所述的检测区域形成方法,其特征是,所述局部区域X轴和Y轴的尺寸在10微米至30微米范围内。2. The detection area formation method as described in claim 1, characterized in that the dimensions of the local area along the X and Y axes are in the range of 10 micrometers to 30 micrometers. 3.如权利要求2所述的检测区域形成方法,其特征是,所述局部区域X轴和Y轴的尺寸为20微米。3. The detection area formation method as described in claim 2, characterized in that the dimensions of the local area along the X and Y axes are 20 micrometers. 4.如权利要求1所述的检测区域形成方法,其特征是,相邻的局部区域彼此重叠。4. The detection area formation method as described in claim 1, characterized in that adjacent local areas overlap each other. 5.如权利要求4所述的检测区域形成方法,其特征是,所述局部区域通过在拟测部分滑动虚拟窗口获得。5. The detection area formation method as described in claim 4, characterized in that the local area is obtained by sliding a virtual window over the area to be measured. 6.如权利要求1所述的检测区域形成方法,其特征是,通过如下步骤确定拟测部分:6. The detection area formation method as described in claim 1, characterized in that the area to be measured is determined by the following steps: 对集成电路版图中每个加工区域作边缘扩散形成对应的扩散区域;Edge diffusion is applied to each processing area in the integrated circuit layout to form a corresponding diffusion region; 对所有扩散区域基于结构相似性进行分类获得扩散区域类群;All diffusion regions are classified based on structural similarity to obtain diffusion region groups; 每个扩散区域类群中选取至少一个扩散区域作为拟测区域,所有拟测区域的集合形成拟测部分。At least one diffusion region is selected from each diffusion region group as the proposed region, and the collection of all proposed regions forms the proposed part. 7.如权利要求6所述的检测区域形成方法,其特征是,所述结构相似性为旋转对称性和/或镜像对称性。7. The detection region formation method as described in claim 6, wherein the structural similarity is rotational symmetry and/or mirror symmetry. 8.如权利要求6所述的检测区域形成方法,其特征是,所述拟测部分在各备选拟测部分中第一路径最短;所述备选拟测部分为备选拟测区域的集合,所述备选拟测部分覆盖所有扩散区域类群且每个扩散区域类群中有且仅有预设数量的备选拟测区域;所述第一路径为备选拟测部分中经过所有备选拟测区域的中心点的最短单向路径。8. The detection area formation method as described in claim 6, characterized in that the first path of the proposed detection part is the shortest among all candidate proposed detection parts; the candidate proposed detection part is a set of candidate proposed detection areas, the candidate proposed detection part covers all diffusion area groups and each diffusion area group has one and only a preset number of candidate proposed detection areas; the first path is the shortest one-way path among the candidate proposed detection parts that passes through the center point of all candidate proposed detection areas. 9.如权利要求4至8中任一项所述的检测区域形成方法,其特征是,所述检测区域在各备选检测区域中第二路径最短;所述备选检测区域为备选表征区域的集合,所述备选检测区域覆盖所有局部区域类群且每个局部区域类群中有且仅有预设数量的备选表征区域;所述第二路径为备选检测区域中经过所有备选表征区域的中心点的最短单向路径。9. The detection region formation method according to any one of claims 4 to 8, characterized in that the detection region has the shortest second path among all candidate detection regions; the candidate detection region is a set of candidate representation regions, the candidate detection region covers all local region groups and each local region group has one and only a predetermined number of candidate representation regions; the second path is the shortest unidirectional path in the candidate detection region that passes through the center point of all candidate representation regions. 10.晶粒表面检测方法,其用于检测经过CMP加工后的晶粒表面,其特征是,基于如权利要求1至9中任一项所述的检测区域形成方法形成的检测区域,对晶粒表面进行形貎检测。10. A grain surface inspection method for inspecting the grain surface after CMP processing, characterized in that the grain surface is subjected to shape and appearance inspection based on the inspection area formed by the inspection area formation method as described in any one of claims 1 to 9. 11.如权利要求10所述的晶粒表面检测方法,其特征是,利用AFM对所述晶粒表面进行形貎检测。11. The grain surface detection method as described in claim 10, characterized in that AFM is used to perform shape and texture detection on the grain surface. 12.如权利要求11所述的晶粒表面检测方法,其特征是,所述局部区域X轴和Y轴的尺寸小于或等于AFM的最大成像范围X轴和Y轴的尺寸。12. The grain surface detection method as described in claim 11, characterized in that the dimensions of the local region along the X and Y axes are less than or equal to the dimensions of the maximum imaging range along the X and Y axes of the AFM. 13.晶粒表面热点判断方法,其用于判断经过CMP加工后的晶粒表面是否存在热点,其特征是,其采用如权利要求10至12中任一项所述的晶粒表面检测方法对晶粒表面进行形貎检测,如检测结果中存在功能部分的侵蚀和/或表征区域的凹陷,则判断晶粒表面存在热点。13. A method for determining hot spots on grain surfaces, used to determine whether hot spots exist on the surface of grains after CMP processing, characterized in that it uses the grain surface detection method as described in any one of claims 10 to 12 to perform shape and texture detection on the grain surface, and if the detection results show erosion of functional parts and/or depression of characterization areas, then it is determined that hot spots exist on the grain surface.
CN202411124113.2A 2024-08-15 2024-08-15 Detection region forming method, grain surface detection method and grain surface hot spot judging method Active CN119024006B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202411124113.2A CN119024006B (en) 2024-08-15 2024-08-15 Detection region forming method, grain surface detection method and grain surface hot spot judging method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202411124113.2A CN119024006B (en) 2024-08-15 2024-08-15 Detection region forming method, grain surface detection method and grain surface hot spot judging method

Publications (2)

Publication Number Publication Date
CN119024006A CN119024006A (en) 2024-11-26
CN119024006B true CN119024006B (en) 2025-11-07

Family

ID=93532516

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202411124113.2A Active CN119024006B (en) 2024-08-15 2024-08-15 Detection region forming method, grain surface detection method and grain surface hot spot judging method

Country Status (1)

Country Link
CN (1) CN119024006B (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107533103A (en) * 2015-05-20 2018-01-02 科磊股份有限公司 Mistake and defect in logic chip based on voltage-contrast derive
CN110851946A (en) * 2019-08-14 2020-02-28 中国科学院微电子研究所 CMP defect detection method, apparatus, storage medium and processor

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4855253A (en) * 1988-01-29 1989-08-08 Hewlett-Packard Test method for random defects in electronic microstructures
US8755045B2 (en) * 2012-01-06 2014-06-17 Taiwan Semiconductor Manufacturing Company, Ltd. Detecting method for forming semiconductor device
CN111128780A (en) * 2019-12-26 2020-05-08 华虹半导体(无锡)有限公司 Wafer backside solid particle detection method
CN117173176B (en) * 2023-11-02 2024-01-26 张家港中贺自动化科技有限公司 Multi-layer photoetching process hot spot detection method based on image processing
CN117891143B (en) * 2024-02-21 2024-07-23 广东工业大学 Lithography hotspot detection method based on 2D overlap judgment

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107533103A (en) * 2015-05-20 2018-01-02 科磊股份有限公司 Mistake and defect in logic chip based on voltage-contrast derive
CN110851946A (en) * 2019-08-14 2020-02-28 中国科学院微电子研究所 CMP defect detection method, apparatus, storage medium and processor

Also Published As

Publication number Publication date
CN119024006A (en) 2024-11-26

Similar Documents

Publication Publication Date Title
KR102828411B1 (en) Method for cross-sectional imaging of the inspection volume of a wafer
CN114599934B (en) FIB-SEM 3D Tomography for Measuring Shape Deviations of HAR Structures
KR101647008B1 (en) Methods and systems for generating an inspection process for a wafer
TWI669766B (en) Using three-dimensional representations for defect-related applications
KR102408848B1 (en) Source identification of Newson's defects on the wafer
US11231376B2 (en) Method for semiconductor wafer inspection and system thereof
TWI826123B (en) Methods and inspection systems for generating 3d volume inspection of semiconductor wafers with increased accuracy
CN114754713B (en) Probe damage detection method for atomic force microscope
CN109659246B (en) A method for measuring the inclination of an opening and a method for preparing a three-dimensional memory
JP7756055B2 (en) Local shape deviations in semiconductor samples
TW202339038A (en) Machine learning based examination of a semiconductor specimen and training thereof
US7047154B2 (en) Interconnection pattern inspection method, manufacturing method of semiconductor device and inspection apparatus
CN119024006B (en) Detection region forming method, grain surface detection method and grain surface hot spot judging method
WO2026036631A1 (en) Detection area formation method, grain surface detection method, and grain surface hotspot determination method
CN111261538A (en) Wafer inspection method and inspection equipment
Ahn et al. Automatic defect review of a patterned wafer using hybrid metrology
Bunday et al. Metrology
Schwalb et al. Advances in correlative microscopy and next-generation devices toward the CHIPS Act
TWI871008B (en) Improved method and apparatus for segmentation of semiconductor inspection images
US20120137396A1 (en) Characterizing Dimensions of Structures Via Scanning Probe Microscopy
WO2025261786A1 (en) 3d inspection of buried regions of interest with reduced milling artefacts
CN117316793B (en) A method and device for detecting steps on epitaxial wafer surface
US20250391114A1 (en) Algorithm for 3d reconstruction of diagonally cut semiconductor logic structure
Kim et al. In-line critical dimension and sidewall roughness metrology study for compound nanostructure process control by in-line 3D atomic force microscope
Yang Metrology and Inspection Equipment

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant