CN119008811A - Multi-junction solar cell for space and preparation method thereof - Google Patents
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Abstract
The invention relates to the technical field of solar cell structures, in particular to a multi-junction solar cell for space and a preparation method thereof. The multi-junction solar cell for the space comprises a back electrode, a Si substrate, a bonding metal layer, an ODR reflecting layer, a subcell structure, a tunneling junction, an ohmic contact layer, an antireflection film and a front electrode; the ODR reflecting layer is sequentially a dielectric film, an ohmic contact alloy layer and an Au layer from top to bottom. According to the invention, through optimizing from the preparation process and overturning the epitaxial layer twice, the ODR reflecting layer is added in the multi-junction solar cell structure, so that the reflection and absorption of light are greatly improved, the overall reflection efficiency of the solar cell is improved, and meanwhile, the space radiation resistance of the solar cell is improved by thinning the thickness of each epitaxial layer of each sub-cell.
Description
Technical Field
The invention relates to the technical field of solar cell structures, in particular to a multi-junction solar cell for space and a preparation method thereof.
Background
The solar cell for space at present has the main structure that GaAs and GaInP sub-cell structures are sequentially grown on a germanium substrate in an epitaxial mode to form a Ge/GaAs/GaInP three-junction solar cell structure, and then a solar cell chip capable of being used by a space vehicle is manufactured through a chip technology. While this structure, which is currently the mainstream, has mainly the following drawbacks: firstly, a substrate made of germanium material is needed to be used as a bottom battery, a large amount of germanium is consumed, and the germanium battery can only generally contribute 1% -2% of efficiency, and compared with the existing price and scarcity property of the germanium material, the cost performance is lower, and the resource waste is serious; secondly, some products grow a DBR structure in an epitaxial structure, so that the light reflection is increased to improve the light utilization rate, and the epitaxially grown DBR has high reflectivity but narrow reflection spectrum, so that the light absorption of a single sub-cell can be improved, and the improvement of the overall efficiency is limited; thirdly, in order to better absorb sunlight, each sub-cell must have a certain thickness, but the increase of the thickness also increases the space irradiation attenuation, so that the service life of the solar cell in space is limited. Therefore, development of a novel solar cell for space is urgently required.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides a multi-junction solar cell for space and a preparation method thereof, which can effectively solve the problems of high cost, limited reflection effect and low service life of the structure of the existing solar cell.
The invention provides a preparation method of a multi-junction solar cell for space, which comprises the following steps:
S1, growing an epitaxial wafer of a multi-junction solar cell on a GaAs substrate, wherein the epitaxial wafer sequentially comprises a corrosion cut-off layer, a subcell structure, a tunneling junction and an ohmic contact layer;
s2, sequentially depositing a silicon nitride (Si 3N4) sacrificial layer and a silicon dioxide (SiO 2) layer on the surface of the epitaxial wafer by using a PECVD (plasma enhanced chemical vapor deposition) technology;
s3, bonding the epitaxial wafer and the sapphire temporary substrate together by utilizing a temporary bonding technology, and then removing the GaAs substrate and the corrosion stop layer to turn over the epitaxial wafer for the first time;
S4, manufacturing an ODR reflecting layer (omnibearing metal reflecting layer) on the epitaxial wafer;
S5, bonding the epitaxial wafer and the Si substrate together by utilizing a metal bonding technology, and removing the sapphire temporary substrate to realize second overturn of the epitaxial wafer;
S6, performing chip process manufacturing on the turned epitaxial wafer.
According to the invention, through twice epitaxial layer overturning, an ODR reflecting layer is added in a multi-junction solar cell structure, so that the reflection and absorption of light are greatly improved, and the secondary absorption of light by the solar cell is realized, thereby improving the conversion efficiency of the solar cell, and further, the thickness of each sub-cell epitaxial wafer can be reduced, thereby improving the space radiation resistance of the solar cell; in addition, the invention does not use a germanium substrate, saves germanium materials and has high cost performance.
Further, in the above technical solution S1, the material of the corrosion-stopping layer is InGaP or AlInP; the subcell structure is two junctions or a single junction, the growth sequence of the two junctions is GaAs and InGaP, and the single junction is GaAs or InGaP; the tunneling junction is GaAs/AlGaAs or GaAs/GaInP; the whole thickness of the sub-cell is 1-2 mu m, and can be 1/4 to 1/2 of the thickness of the conventional solar cell structure; the ohmic contact layer is made of GaAs.
Further, in the above technical solution, the subcell structure includes a back reflection layer, a base region, an emitter region, a PN junction, and a window layer; the GaAs sub-cell window layer is made of AlGaAs or InGaP, and the InGaP sub-cell window layer is made of AlInP.
Further, in the above technical aspect S2, the thickness of the silicon nitride sacrificial layer is not less than 0.5 μm, and the thickness of the silicon dioxide layer is not less than 2 μm.
Further, in the above technical solution S3, the bonding conditions are: the vacuum degree is lower than 5E-01Pa, the pressure is 15000kgf, the temperature is 375 ℃, and the bonding time is 45min; the chemical components of the etching solution for removing the GaAs substrate are mixed solution with the volume ratio of NH 4OH、H2O2、H2 O of 1:1:5 or 1:5:5; the solution for removing the corrosion-stopping layer is hydrochloric acid solution.
Further, in the above technical solution S4, the method for manufacturing the ODR reflective layer includes the following steps: firstly, depositing a dielectric film on the surface of an epitaxial wafer by adopting an electron beam evaporation technology or a PECVD technology; then, a pattern is made on the dielectric film by a photoetching technology, the dielectric film of the exposed part is corroded by adopting chemical solution corrosion or dry etching, and the residual photoresist on the surface is removed; and finally, firstly depositing an ohmic contact alloy layer on the dielectric film, and then depositing an Au layer. According to the invention, firstly, holes are formed in the dielectric film, then, ohmic contact layer metal is evaporated, so that smooth current can be ensured, meanwhile, the size and distribution of the through holes are controlled through a photoetching technology, and on the premise that ohmic contact is not affected, the maximum dielectric film is reserved, and the reflectivity is increased.
Further, in the above technical solution, the dielectric film is MgF 2 or SiO 2; the ohmic contact alloy layer is made of AuZn or AuBe, and the thickness of the ohmic contact alloy layer is 0.12 mu m; the thickness of the Au layer is more than or equal to 0.5 mu m. The invention selects AuZn or AuBe which can realize good ohmic contact with the GaAs ohmic contact layer, has good combination effect, simultaneously has higher reflectivity, can form good fusion with the subsequent evaporation Au bonding layer, and has good reliability.
Further, in the above technical scheme S5, before bonding, a bonding metal layer is deposited on the Si substrate, where the bonding metal layer is a metal with high adhesion to the silicon wafer, and the outermost layer is Au or In; when bonding, the metal faces the metal surface, and bonding conditions are as follows: the pressure is 7000kgf-9000kgf, the temperature is divided into three stages, namely a first stage 240 ℃ for 5min, a second stage 320 ℃ for 10min and a third stage 100 ℃ for 5min. The first stage in the technical scheme is a primary fusion stage, and low-temperature high-pressure is adopted, so that the metal thermal deformation can be reduced; the second stage is a main fusion stage, and high temperature and high pressure are adopted to fuse metals together; and in the third stage, the temperature is gradually reduced under the condition of keeping the pressure unchanged, so that the gradual release of the wafer stress is facilitated, the wafer cracking can be prevented, and the bonding effect is integrally improved.
Further, in the above technical solution S5, the method for removing the sapphire temporary substrate includes: and ablating the silicon nitride sacrificial layer by using a laser stripping technology to separate the sapphire, and corroding the residual bonding layer and the sacrificial layer by using an HF acid solution.
Further, in the above technical scheme S6, the chip process manufacturing includes the processes of front electrode manufacturing, antireflection film manufacturing, back thinning, back electrode manufacturing, cutting, testing, and the like, and the conventional multi-junction solar cell manufacturing process is adopted in the process.
The invention also provides the multi-junction solar cell for the space, which is prepared by the preparation method, and comprises a back electrode, a Si substrate, a bonding metal layer, an ODR reflecting layer, a dielectric film, a subcell structure, a tunneling junction, an ohmic contact layer, an antireflection film and a front electrode.
Compared with the prior art, the invention has the beneficial effects that:
1. According to the invention, optimization is performed from the aspect of preparation technology, through adopting a forward growth solar cell structure mode, an ODR reflecting layer is added in a multi-junction solar cell structure after two times of epitaxial layer overturning, and not only is the reflection spectrum covered on all epitaxial structures, but also the reflection absorption of light is greatly improved, so that the overall reflection efficiency of the solar cell is improved; meanwhile, the secondary absorption of the solar cell to light can be realized, and the conversion efficiency of the solar cell is improved.
2. According to the solar cell, after the reflection effect is improved, the thickness of the epitaxial layer of each sub-cell can be properly reduced, the overall thickness of the sub-cell can be controlled to be 1/4 to 1/2 of that of a conventional solar cell structure, and the space anti-radiation performance of the solar cell is greatly improved.
3. The invention uses silicon to replace germanium material as the substrate, thus not only greatly improving the reliability, but also reducing the cost.
Drawings
Fig. 1 is a schematic diagram of an epitaxial wafer structure in S1 of the present invention;
Fig. 2 is a schematic diagram of a temporary bonding structure of an epitaxial wafer in S3 of the present invention;
FIG. 3 is a schematic diagram of the structure of an epitaxial wafer after one-time overturn and ODR reflection layer fabrication;
Fig. 4 is a schematic structural diagram of the epitaxial wafer in S5 after the epitaxial wafer is secondarily flipped to the Si substrate;
Fig. 5 is a schematic structural diagram of a space multi-junction solar cell prepared according to the present invention.
The reference numerals in the schematic drawings indicate:
1. A GaAs substrate; 2. etching the stop layer; 3. a subcell structure and a tunneling junction; 4. an ohmic contact layer; 5. a silicon nitride sacrificial layer; 6. a silicon dioxide layer; 7. a sapphire temporary substrate; 8. an ODR reflective layer; 8-1, a dielectric film; 8-2, ohmic contact with the alloy layer; 8-3, an Au layer; 9. a Si substrate; 10. a bonding metal layer; 11. a front electrode; 12. an antireflection film; 13. and a back electrode.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. The following description of at least one exemplary embodiment is merely exemplary in nature and is in no way intended to limit the application, its application, or uses. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
In the description of the present application, it should be understood that the terms "first," "second," and the like are used for defining the components, and are merely for convenience in distinguishing the corresponding components, and the terms are not meant to have any special meaning unless otherwise indicated, so that the scope of the present application is not to be construed as being limited.
In the description of the present application, it should be understood that the azimuth or positional relationships indicated by the azimuth terms such as "front, rear, upper, lower, left, right", "lateral, vertical, horizontal", and "top, bottom", etc., are generally based on the azimuth or positional relationships shown in the drawings, merely to facilitate description of the present application and simplify the description, and these azimuth terms do not indicate and imply that the apparatus or elements referred to must have a specific azimuth or be constructed and operated in a specific azimuth, and thus should not be construed as limiting the scope of protection of the present application; the orientation word "inner and outer" refers to inner and outer relative to the contour of the respective component itself.
Referring to fig. 1 to 5, it should be noted that the illustrations provided in the present embodiment are only schematic illustrations of the basic concept of the present invention, and only the components related to the present invention are shown in the illustrations, rather than being drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of each component in actual implementation may be arbitrarily changed, and the layout of the components may be more complex.
Some embodiments of the present invention provide a method of fabricating a multi-junction solar cell for space, comprising the steps of:
S1, growing an epitaxial wafer of a multi-junction solar cell on a GaAs substrate 1, wherein the epitaxial wafer sequentially comprises a corrosion cut-off layer 2, a subcell structure, a tunneling junction 3 and an ohmic contact layer 4, and the structural schematic diagram is shown in FIG 1;
Specifically, epitaxial structures of multi-junction solar cells are grown on GaAs substrates using organometallic chemical vapor deposition methods. First a corrosion-stopping layer is grown, the material is InGaP or AlInP; then growing an epitaxial structure, wherein the epitaxial structure can be a two-junction or a single-junction; when the junction is two, the growth sequence is GaAs and InGaP in sequence; when single-junction, it may be single-junction GaAs or single-junction InGaP; the sub-cells are connected by a tunneling junction, which may be GaAs/AlGaAs or GaAs/GaInP. The outermost surface of the epitaxial layer is made of GaAs material and is used as an ohmic contact layer material; the subcell structure comprises a back reflection layer, a base region, an emitter region and a window layer, wherein the PN junction is arranged between the base region and the emitter region. The thickness of the integral sub-cell may be 1/2 to 1/4 of the conventional structure, and is generally 1 μm to 2 μm as the case may be; the GaAs sub-cell window layer can be AlGaAs material or InGaP material, and the InGaP sub-cell window layer is AlInP material.
S2, sequentially depositing a silicon nitride sacrificial layer 5 and a silicon dioxide layer 6 on the surface of the epitaxial wafer by using a PECVD technology; specifically, si 3N4 and SiO 2 are sequentially deposited on the surface of the epitaxial wafer by using a PECVD technique, wherein Si 3N4 is not less than 0.5 μm thick as a sacrificial layer, and SiO 2 is not less than 2 μm thick as a bonding layer.
S3, bonding the epitaxial wafer and the sapphire temporary substrate 7 together by using a temporary bonding technology, removing the GaAs substrate and the corrosion cut-off layer, and turning over the epitaxial wafer for the first time, wherein the schematic diagram of the temporary bonding structure of the epitaxial wafer is shown in FIG. 2; specifically, the surface of the epitaxial wafer is polished by using a CMP (chemical mechanical polishing) technology, the surface roughness after polishing is not more than 5nm, the polished epitaxial wafer and the sapphire temporary substrate are subjected to surface activation, the activation treatment aims at manufacturing a suspension bond on the surface, a physical method such as chemical solution or plasma treatment can be used, the epitaxial wafer and the sapphire temporary substrate are bonded together after activation, and the bonding conditions are as follows: the vacuum degree is lower than 5E-01Pa, the pressure is 15000kgf, the temperature is 375 ℃, and the bonding time is 45min; then, etching the GaAs substrate by using a mixed solution with the chemical composition of NH 4OH、H2O2、H2 O in a volume ratio of 1:1:5 or 1:5:5; the etching reaction can be carried out in a cooling tank, so that the heat released by the reaction can be absorbed conveniently, other chemical solutions capable of corroding the GaAs material can be used, the etching is carried out until the etching stop layer is stopped naturally, and then HCl or other chemical solvents capable of corroding the InGaP or AlInP material are used for removing the etching stop layer. Thus, the first inversion of the epitaxial layer is completed.
S4, manufacturing an ODR reflecting layer 8 on the epitaxial wafer, wherein the obtained structure schematic diagram is shown in FIG. 3; specifically, the method for manufacturing the ODR reflecting layer comprises the following steps: firstly, depositing a dielectric film 8-1 on the surface of an epitaxial wafer by adopting an electron beam evaporation technology or a PECVD technology, wherein the dielectric film can be a dielectric film with MgF 2、SiO2 and the like and lower than AlInP in refractive index, and can be deposited by adopting the electron beam evaporation technology or the PECVD technology and the like; then, a pattern is made on the dielectric film by a photoetching technology, the dielectric film of the exposed part is corroded by adopting chemical solution corrosion or dry etching, the corrosion can adopt chemical solution corrosion or dry etching, and the residual photoresist on the surface is removed; then, firstly depositing an ohmic contact alloy layer 8-2 on the dielectric film, wherein the material of the ohmic contact alloy layer can be AuZn or AuBe, or other materials which can form ohmic contact and have high reflectivity, so that an omnibearing reflecting mirror is formed while ohmic contact is formed, and the thickness of the ohmic contact alloy layer is preferably 0.12 mu m; finally, the Au layer 8-3 is deposited as a bonding layer, so that the bonding with a subsequent substrate is facilitated, and Au or other combined metals can be used on the premise of ensuring good bonding quality, and the overall thickness is not less than 0.5 mu m.
S5, bonding the epitaxial wafer and the Si substrate 9 together by utilizing a metal bonding technology, removing the sapphire temporary substrate, and realizing second overturn of the epitaxial wafer, wherein the obtained structure schematic diagram is shown in FIG. 4; specifically, when bonding, the bonding metal layer 10 is deposited on the silicon wafer, the bonding metal layer may be Ti or Al or other metal with high adhesiveness to the silicon wafer, and the outermost surface of the bonding metal layer is Au, in or other material suitable for metal bonding; when bonding, the metal faces the metal surface, and bonding conditions are as follows: the pressure is 7000kgf-9000kgf, the temperature is divided into three stages, namely a first stage 240 ℃ for 5min, a second stage 320 ℃ for 10min and a third stage 100 ℃ for 5min. When the sapphire temporary substrate is removed, a laser stripping technology is used, and the Si 3N4 sacrificial layer is ablated by laser, so that the sapphire separation action is realized; and etching the residual bonding layer and the sacrificial layer by using an HF acid solution. Thus, the second inversion of the epitaxial layer is completed.
S6, performing chip process manufacturing on the turned epitaxial wafer; specifically, the front electrode 11, the antireflection film 12, the back surface thinning, the back electrode 13, the dicing, the testing and the like are sequentially manufactured on the inverted epitaxial wafer, and the chip manufacturing is completed. This process is substantially identical to conventional multi-junction solar cell fabrication processes.
Still further embodiments of the present invention provide a multi-junction solar cell for space, the structural schematic diagram of which is shown in fig. 5, and the multi-junction solar cell for space includes a back electrode 13, a Si substrate 9, a bonding metal layer 10, an ODR reflective layer 8, a subcell structure and a tunneling junction 3, an ohmic contact layer 4, an anti-reflective film 12, and a front electrode 11. Wherein the ODR reflecting layer is sequentially provided with a dielectric film 8-1, an ohmic contact alloy layer 8-2 and an Au layer 8-3 from top to bottom; and the ohmic contact alloy layer passes through the dielectric film remained after the patterning and is in ohmic contact with the cell epitaxial structure.
In summary, the preparation process is optimized, the ODR reflecting layer is added into the multi-junction solar cell structure through twice epitaxial layer overturning by adopting a forward growth solar cell structure mode, the reflection absorption of light is greatly improved, the secondary absorption of light by the solar cell is realized, the conversion efficiency of the solar cell is improved, and meanwhile, the thickness of each sub-cell epitaxial wafer can be reduced, so that the space radiation resistance of the solar cell is improved; in addition, the invention does not use a germanium substrate, saves germanium materials and has high cost performance.
Finally, it should be emphasized that the foregoing description is merely illustrative of the preferred embodiments of the invention, and that various changes and modifications can be made by those skilled in the art without departing from the spirit and principles of the invention, and any such modifications, equivalents, improvements, etc. are intended to be included within the scope of the invention.
Claims (10)
1. The preparation method of the multi-junction solar cell for the space is characterized by comprising the following steps of:
S1, growing an epitaxial wafer of a multi-junction solar cell on a GaAs substrate, wherein the epitaxial wafer sequentially comprises a corrosion cut-off layer, a subcell structure, a tunneling junction and an ohmic contact layer;
S2, sequentially depositing a silicon nitride sacrificial layer and a silicon dioxide layer on the surface of the epitaxial wafer by using a PECVD technology;
s3, bonding the epitaxial wafer and the sapphire temporary substrate together by utilizing a temporary bonding technology, and then removing the GaAs substrate and the corrosion stop layer to turn over the epitaxial wafer for the first time;
S4, manufacturing an ODR reflecting layer on the epitaxial wafer;
S5, bonding the epitaxial wafer and the Si substrate together by utilizing a metal bonding technology, and removing the sapphire temporary substrate to realize second overturn of the epitaxial wafer;
S6, performing chip process manufacturing on the turned epitaxial wafer.
2. The method for manufacturing a multi-junction solar cell for space according to claim 1, wherein in S1, the material of the corrosion-cut-off layer is InGaP or AlInP; the subcell structure is two junctions or a single junction, the growth sequence of the two junctions is GaAs and InGaP, and the single junction is GaAs or InGaP; the tunneling junction is GaAs/AlGaAs or GaAs/GaInP; the overall thickness of the sub-battery is 1-2 mu m; the ohmic contact layer is made of GaAs.
3. The method for manufacturing a multi-junction solar cell for space according to claim 2, wherein the subcell structure comprises a back reflection layer, a base region, an emitter region, a PN junction, and a window layer; the GaAs sub-cell window layer is made of AlGaAs or InGaP, and the InGaP sub-cell window layer is made of AlInP.
4. The method of claim 1, wherein in S2, the thickness of the silicon nitride sacrificial layer is not less than 0.5 μm and the thickness of the silicon dioxide layer is not less than 2 μm.
5. The method for manufacturing a multi-junction solar cell for space according to claim 1, wherein in S3, bonding conditions are: the vacuum degree is lower than 5E-01Pa, the pressure is 15000kgf, the temperature is 375 ℃, and the bonding time is 45min; the chemical components of the etching solution for removing the GaAs substrate are mixed solution with the volume ratio of NH 4OH、H2O2、H2 O of 1:1:5 or 1:5:5; the solution for removing the corrosion-stopping layer is hydrochloric acid solution.
6. The method for manufacturing a multi-junction solar cell for space according to claim 1, wherein in S4, the method for manufacturing the ODR reflective layer comprises the steps of: firstly, depositing a dielectric film on the surface of an epitaxial wafer by adopting an electron beam evaporation technology or a PECVD technology; then, a pattern is made on the dielectric film by a photoetching technology, the dielectric film of the exposed part is corroded by adopting chemical solution corrosion or dry etching, and the residual photoresist on the surface is removed; and finally, firstly depositing an ohmic contact alloy layer on the dielectric film, and then depositing an Au layer.
7. The method of claim 6, wherein the dielectric film is MgF 2 or SiO 2; the ohmic contact alloy layer is made of AuZn or AuBe, and the thickness of the ohmic contact alloy layer is 0.12 mu m; the thickness of the Au layer is more than or equal to 0.5 mu m.
8. The method for preparing a multi-junction solar cell for space according to claim 1, wherein In S5, a bonding metal layer is deposited on the Si substrate before bonding, the bonding metal layer is a metal with high adhesion with a silicon wafer, and the outermost layer is Au or In; when bonding, the metal faces the metal surface, and bonding conditions are as follows: the pressure is 7000kgf-9000kgf, the temperature is divided into three stages, namely a first stage 240 ℃ for 5min, a second stage 320 ℃ for 10min and a third stage 100 ℃ for 5min.
9. The method for manufacturing a multi-junction solar cell for space according to claim 1, wherein in S5, the method for removing the sapphire temporary substrate is as follows: and ablating the silicon nitride sacrificial layer by using a laser stripping technology to separate the sapphire, and corroding the residual bonding layer and the sacrificial layer by using an HF acid solution.
10. A spatially multi-junction solar cell prepared by the preparation method of any one of claims 1-9.
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