CN118962209B - Novel manufacturing process of semiconductor test probe card - Google Patents
Novel manufacturing process of semiconductor test probe card Download PDFInfo
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- CN118962209B CN118962209B CN202411426456.4A CN202411426456A CN118962209B CN 118962209 B CN118962209 B CN 118962209B CN 202411426456 A CN202411426456 A CN 202411426456A CN 118962209 B CN118962209 B CN 118962209B
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R3/00—Apparatus or processes specially adapted for the manufacture or maintenance of measuring instruments, e.g. of probe tips
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00023—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems without movable or flexible elements
- B81C1/00111—Tips, pillars, i.e. raised structures
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/10—Electroplating with more than one layer of the same or of different metals
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D7/00—Electroplating characterised by the article coated
- C25D7/12—Semiconductors
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
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- Chemical & Material Sciences (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
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- Chemical Kinetics & Catalysis (AREA)
- Electrochemistry (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Analytical Chemistry (AREA)
- Measuring Leads Or Probes (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
The invention provides a novel manufacturing process of a semiconductor test probe card, which comprises the steps of growing a first metal layer on a silicon substrate, growing a second metal layer on the silicon substrate, growing a silicon oxide layer on the first metal layer and the second metal layer, performing dry etching on the silicon oxide layer, performing partial dry etching on the second metal layer to form a probe beam, removing the silicon oxide layer, performing partial etching on the second metal layer to form a probe head, removing a third photoresist layer to obtain a first intermediate product, filling a glue layer on the top surface of the first intermediate product and bonding a glass plate, etching the silicon substrate and the first metal layer to grow metal columns, removing the glass plate and the glue layer, bonding the metal columns and a ceramic substrate, and etching the first metal layer to obtain the probe card. The novel manufacturing process of the semiconductor test probe card provided by the invention simplifies the process flow, improves the productivity, can well control the angle of the probe tip and improves the probe yield.
Description
Technical Field
The invention belongs to the technical field of semiconductors, and particularly relates to a novel manufacturing process of a semiconductor test probe card.
Background
A probe card is a critical device for electronic testing and analysis, which consists of a plurality of probes, the electrical properties of which can be tested and analyzed by contacting the contact points of the circuit or device to be tested. The probe card is widely applied to the research and development and manufacturing processes in the fields of integrated circuits, PCB circuits, novel electronic devices and the like.
The MEMS probe card is a novel probe card manufactured by utilizing a micro-electromechanical system (MEMS) technology, and mainly has the characteristics that (1) the density of the ultra-high probe is high, the MEMS probes can be integrated into more than 100000 pins in one probe card by utilizing a micromachining technology, the test requirement of an electronic device is met, (2) the excellent contact performance is achieved, the shape of the tip of the MEMS probe is fine, the diameter of the tip of the MEMS probe can be as small as a few micrometers, the MEMS probe can provide stable and reliable contact force and electric contact in a tiny contact area, the test precision is greatly improved, the integrated manufacturing is realized, the whole MEMS probe array can be manufactured by adopting batch micromachining, and the consistency and the reliability of the probe array are improved, and (4) the tiny size is realized.
The method comprises the specific procedures of firstly plating a layer of oxide on a silicon substrate, then cleaning, gluing, photoetching and developing to obtain a pattern, then carrying out dry etching on the silicon substrate, then cleaning to obtain a groove body shape, then carrying out wet etching to optimize the angle of a needle head, then carrying out physical vapor film forming on the groove body for multiple times, carrying out gluing, photoetching and developing to obtain the pattern, then carrying out chemical plating to fill the groove body with metal, carrying out chemical grinding for multiple times, bonding a layer of glass on the front surface, finally carrying out dry etching on the back surface to remove silicon materials nearby the metal, and then removing the glass bonded originally to obtain the probe. And then removing the silicon substrate around the probe by dry etching, performing multiple gluing, photoetching, developing, wet etching, electrochemical coating and chemical grinding on the existing ceramic substrate to obtain a metal column capable of being connected with the probe, bonding the probe and the ceramic substrate together by a bonding process, and finally removing metals in the residual silicon substrate and the silicon substrate by wet etching to complete the probe card. However, the existing manufacturing process flow is more, the productivity is low, the angle of the probe tip is not well controlled, and the yield of the probe is affected.
Disclosure of Invention
The invention aims to solve the technical problems of providing a novel semiconductor test probe card manufacturing process, simplifying the process flow, improving the productivity, well controlling the angle of the probe tip and improving the probe yield.
In order to solve the technical problems, the invention provides a novel semiconductor test probe card manufacturing process, which comprises a probe manufacturing process and a probe packaging process;
the probe manufacturing process specifically comprises the following steps:
Step 1, a first metal layer is grown on a silicon substrate;
step 2, coating a first photoresist layer on the first metal layer, photoetching and developing a first preset position of the first photoresist layer to form a probe growth position;
Step 3, growing a second metal layer on the silicon substrate by utilizing an electroplating method at the probe growth position;
step 4, removing the first photoresist layer and cleaning;
Step 5, growing a silicon oxide layer on the first metal layer and the second metal layer;
step 6, coating a second photoresist layer on the silicon oxide layer, photoetching and developing a second preset position of the second photoresist layer to form a probe beam etching position;
Step 7, dry etching is carried out on the silicon oxide layer right below the etching position of the probe beam;
Step 8, performing partial dry etching on the second metal layer right below the etching position of the probe beam to form the probe beam;
Step 9, removing the second photoresist layer and cleaning;
Step 10, cleaning after removing the silicon oxide layer;
Step 11, coating a third photoresist layer on the first metal layer and the second metal layer, photoetching and developing a third preset position of the third photoresist layer to form a probe needle angle etching position;
step 12, partially etching the second metal layer right below the etching position of the probe needle angle to form a probe needle head;
step 13, removing the third photoresist layer, and cleaning to obtain a first intermediate product, wherein the first intermediate product comprises a silicon substrate, a first metal layer covering the top surface of the silicon substrate and a probe formed by manufacturing the top surface of the first metal layer;
The probe packaging process specifically comprises the following steps:
step 14, filling a glue layer on the top surface of the first intermediate product;
step 15, bonding a glass plate on the top surface of the glue layer to obtain a second intermediate product;
step 16, turning over the second intermediate product so that the silicon substrate is positioned at the uppermost part of the second intermediate product;
step 17, coating a fourth photoresist layer on the top surface of the silicon substrate, photoetching and developing a fourth preset position of the fourth photoresist layer to form a metal column etching position;
step 18, etching the silicon substrate right below the metal column etching position;
Step 19, etching the first metal layer right below the metal column etching position to form a metal column growth position;
Step 20, growing a metal column at a metal column growth position by utilizing an electroplating method;
Step 21, removing the fourth photoresist layer and then cleaning to obtain a third intermediate product;
step 22, turning the third intermediate product so that the glass plate is positioned at the uppermost part of the third intermediate product;
Step 23, removing the glass plate;
Step 24, removing the glue layer;
Step 25, bonding the metal column with the ceramic substrate;
in step 26, the first metal layer is etched to remove the silicon substrate 1, thereby obtaining a probe card.
As a further improvement of the present invention, in the step 12, a dry etching trench process is used to partially etch the second metal layer under the etched position of the probe needle angle according to the preset needle angle, so as to form the probe needle.
As a further improvement of the present invention, in the step 5, the silicon oxide layer covers the entire top surface of the first metal layer and the entire top surface of the second metal layer;
in the step 6, the second photoresist layer covers the whole top surface of the silicon oxide layer, and the probe beam etching position is positioned right above the second metal layer.
As a further improvement of the invention, in the step 11, the third photoresist layer covers the whole top surface of the first metal layer and the whole top surface of the second metal layer, and the probe needle angle etching position is located right above the second metal layer.
As a further improvement of the present invention, in the step 14, the top surface of the glue layer is uniform in height.
As a further improvement of the present invention, in the step 17, the metal pillar etching is located directly above the probe.
As a further improvement of the present invention, in the step 20, the top surface of the metal pillar is higher than the top surface of the silicon substrate.
As a further improvement of the present invention, in the step 18, dry etching is performed on the silicon substrate directly under the metal pillar etching position.
As a further improvement of the present invention, in the step 19, a wet etching is performed on the first metal layer directly under the metal pillar etching position.
As a further development of the invention, in step 26, a wet etching of the first metal layer is performed.
Compared with the prior art, the technical scheme of the invention has the following beneficial effects:
According to the novel manufacturing process of the semiconductor test probe card, the first metal layer and the second metal layer are plated on the silicon substrate in sequence when the probe is manufactured, and then the second metal layer is etched by adopting a dry etching method to form the probe, so that the angle of a probe head can be better controlled when the second metal layer is etched by the dry method, the uniformity of the probe is improved, and the yield of the probe is improved. The process flow for manufacturing the probe omits a plurality of wet etching steps, omits a bonding process step, omits a physical vapor phase coating step, omits a chemical mechanical polishing step, simplifies the process flow for manufacturing the probe, improves the productivity and saves the cost. When the probe is packaged, the metal column connected with the probe is manufactured on the silicon substrate, then the metal column and the ceramic substrate are bonded together through a bonding process, finally the silicon substrate is removed, only one gluing, photoetching and developing process is omitted in the process flow of packaging the probe, only one electrochemical coating process is omitted, a plurality of electrochemical coating processes are omitted, a chemical grinding process is omitted, the process flow is simplified, and the productivity is improved. The process flow of packaging the probes reduces the use quantity of the photoetching machines for the ceramic substrate, saves the cost, and breaks through the limit of the productivity of the photoetching machines.
Drawings
FIG. 1 is a flow chart of a probe fabrication process in a novel semiconductor test probe card fabrication process in accordance with an embodiment of the present invention;
fig. 2 is a flow chart of a probe packaging process in a novel semiconductor test probe card manufacturing process in accordance with an embodiment of the present invention.
The figure shows a silicon substrate 1, a first metal layer 2, a first photoresist layer 3, a probe growth position 31, a second metal layer 4, a silicon oxide layer 5, a second photoresist layer 6, a probe beam etching position 61, a third photoresist layer 7, a probe needle angle etching position 71, a probe beam 81, a probe needle 82, a probe 8, a glue layer 9, a glass plate 10, a fourth photoresist layer 11, a metal column etching position 111, a metal column growth position 23, a metal column 12 and a ceramic substrate 13.
Detailed Description
The technical scheme of the invention is described in detail below with reference to the accompanying drawings.
The terms first, second, third, fourth and the like in the description and in the claims and in the above drawings are used for distinguishing between different objects and not necessarily for describing a particular sequential or chronological order.
The embodiment of the invention provides a novel manufacturing process of a semiconductor test probe card, which comprises a probe manufacturing process shown in figure 1 and a probe packaging process shown in figure 2.
As shown in fig. 1, the probe manufacturing process specifically includes the following steps:
Step 1, cleaning a silicon substrate 1, and plating a first metal layer 2 on the silicon substrate 1 by using a physical vapor deposition method. Preferably, the first metal layer 2 covers the entire top surface of the silicon substrate 1.
Step 2, coating a first photoresist layer 3 on the first metal layer 2, and performing photoetching and developing on a first preset position of the first photoresist layer 3 to form a probe growth position 31. The bottom surface of the probe growth position 31 is the top surface of the first metal layer 2, and the periphery of the probe growth position 31 is provided with the first photoresist layer 3.
Step 3, a second metal layer 4 is grown on the first metal layer 2 by electroplating at the probe growth site 31. The second metal layer 4 fills the probe growth sites 31.
Due to the presence of the first photoresist layer 3, the second metal layer 4 is grown only at the probe growth sites 31 during electroplating.
And 4, removing the first photoresist layer 3 by using a photoresist remover and cleaning.
And 5, plating a silicon oxide layer 5 on the first metal layer 2 and the second metal layer 4 by using chemical vapor deposition equipment. Preferably, the silicon oxide layer 5 covers the entire top surface of the first metal layer 2 and the entire top surface of the second metal layer 4.
And 6, coating a second photoresist layer 6 on the silicon oxide layer 5, and photoetching and developing a second preset position of the second photoresist layer 6 to form a probe beam etching position 61.
Preferably, the second photoresist layer 6 covers the entire top surface of the silicon oxide layer 5, the probe beam etching sites 61 are located directly above the second metal layer 4, and the probe beam etching sites 61 are only a portion of the second photoresist layer 6 located above the second metal layer.
And 7, performing dry etching on the silicon oxide layer below the probe beam etching position 61. Specifically, the silicon oxide layer located below the probe beam etching position 61 is entirely etched away by a dry etching machine.
And 8, performing partial dry etching on the second metal layer below the probe beam etching position 61 to form a probe beam 81. Specifically, the second metal layer located under the probe beam etching position 61 is etched away by a dry etching machine to leave a part of the thickness, thereby forming the probe beam 81.
Since the probe beam 81 is to be formed, the second metal layer needs to be dry etched for a long time, if only one photo-resist layer is coated on the second metal layer 4 and the first metal layer 2, the blocking capability of the photo-resist layer is limited, and the first metal layer and the second metal layer cannot be effectively protected from forming the part outside the probe beam. In the steps 5 to 8, the silicon oxide layer 5 is plated on the first metal layer 2 and the second metal layer 4, and then the second photoresist layer 6 is coated on the silicon oxide layer 5, and the dry etching machine only etches the second metal layer right under the probe beam etching position 61 due to the existence of the silicon oxide layer 5 and the second photoresist layer 6. The blocking resistance is enhanced compared to a single photoresist layer, protecting the first and second metal layers under the second photoresist layer 6 and the silicon oxide layer 5.
And 9, removing the second photoresist layer 6 by using a photoresist remover and then cleaning.
And step 10, etching all the silicon oxide layer 5 by using a dry etching machine, thereby removing the silicon oxide layer 5 and cleaning.
And 11, coating a third photoresist layer 7 on the first metal layer 2 and the second metal layer 4, and photoetching and developing a third preset position of the third photoresist layer to form a probe needle angle etching position 71. The probe pin angle etching position 71 is located on the upper side circumference of the non-etched portion of the second metal layer 4. Preferably, the third photoresist layer 7 covers the entire top surface of the first metal layer 2 and the entire top surface of the second metal layer 4, and the probe pin angle etching position 71 is located right above the second metal layer 4.
In step 12, the second metal layer under the probe tip etching position 71 is partially etched to form a probe tip 82. Specifically, according to the preset needle angle, the metal layer below the probe needle angle etching position 71 is partially etched by using a trench process by using a dry etching machine, so as to form a probe needle 82. The probe tip 82 prepared in this step and the probe beam 81 prepared in step 8 are formed as an integral structure, forming the probe 8.
The third photoresist layer 7 protects the second metal layer and the first metal layer below the third photoresist layer 7 from being etched by a dry etching machine. The dry etcher only partially etches the second metal layer directly under the probe pin angle etch site 71.
And step 13, removing the third photoresist layer 7 by using a photoresist remover, and cleaning to obtain a first intermediate product. The first intermediate product comprises a silicon substrate 1, a first metal layer 2 covered on the top surface of the silicon substrate 1, and a probe 8 formed on the top surface of the first metal layer 2.
As shown in fig. 2, the probe packaging process specifically includes the following steps:
And 14, filling a glue layer 9 on the top surface of the first intermediate product. The glue layer 9 covers the probes 8 and the first metal layer 2. Preferably, the top surface of the glue layer 9 is of uniform height, i.e. the top surface of the glue layer 9 is level.
And 15, bonding a glass plate 10 on the top surface of the glue layer 9 to obtain a second intermediate product.
At step 16, the second intermediate product is flipped so that the probes 8 are located under the silicon substrate 1. After the inversion, the surface of the silicon substrate 1 not covered with the first metal layer becomes the top surface of the silicon substrate.
In step 17, a fourth photoresist layer 11 is coated on the top surface of the silicon substrate 1, and a metal post etching position 111 is formed by performing photolithography and development on a fourth preset position of the fourth photoresist layer 11.
The metal pillar etch site 111 is located directly above the probe 8. The bottom surface of the metal post etching position 111 is the top surface of the silicon substrate 1, and the periphery of the metal post etching position 111 is the fourth photoresist layer 11.
In step 18, the silicon substrate 1 directly below the metal pillar etching site 111 is etched.
Preferably, the silicon substrate 1 directly below the metal pillar etching site 111 is dry etched.
Due to the presence of the fourth photoresist layer 11, only the silicon substrate 1 directly under the metal pillar etching site 111 is etched at the time of etching.
In step 19, the first metal layer 2 directly below the metal pillar etching site 111 is etched to form a metal pillar growth site 23.
Preferably, the first metal layer 2 directly below the metal pillar etching site 111 is wet etched.
The bottom surface of the metal column growth position 23 is the top surface of the probe 8, and the periphery of the metal column growth position 23 is sequentially provided with a first metal layer 2, a silicon substrate 1 and a fourth photoresist layer 11 from bottom to top.
At step 20, metal pillars 12 are grown at metal pillar growth sites 23 using an electroplating process. The top surface of the metal posts 12 is higher than the top surface of the silicon substrate 1.
Due to the presence of the fourth photoresist layer 11, the metal pillars 12 are grown only at the metal pillar growth sites 23 during electroplating.
And step 21, removing the fourth photoresist layer 11, and then cleaning to obtain a third intermediate product.
And (4) filling the glue layer 9 on the top surface of the first intermediate product and bonding the glass plate 10 in sequence in the steps 14 and 15, and using the glue layer as a supporting structure of the probe after the overturning in the step 16. The top surface of the glue layer 9 before turning is horizontal, the top surface of the glass plate is also horizontal, and then the bottom surface of the glass plate after turning is horizontal, so that the top surface of the silicon substrate after turning is horizontal, and the silicon substrate 1 right below the metal column etching position 111 is conveniently subjected to dry etching in step 19.
At step 22, the third intermediate product is flipped so that the probes 8 are located above the silicon substrate 1. After the overturning, the opposite surface of the metal column connected with the probe becomes the bottom surface of the metal column.
Step 23, removing the glass sheet 10.
Step 24, the glue layer 9 is removed.
And step 25, bonding the bottom surface of the metal post 12 with the top surface of the metal layer on the top surface of the ceramic substrate 13.
In step 26, the first metal layer 2 is etched to remove the silicon substrate 1, thereby obtaining a probe card.
Preferably, the first metal layer 2 is wet etched.
Since the first metal layer 2 is grown on the silicon substrate 1 in the step 1, the first metal layer 2 is only etched in the step, and the silicon substrate 1 is automatically removed after the first metal layer 2 is completely etched.
According to the novel manufacturing process of the semiconductor test probe card, the first metal layer is plated on the silicon substrate, and then the probe is grown, so that the first metal layer is located between the probe and the silicon substrate, in the step 26, only the first metal layer is needed to be etched, when the first metal layer is completely etched, the silicon substrate 1 automatically drops, the silicon substrate does not need to be etched, and compared with the silicon substrate, the thinner metal layer is easy to etch, so that the process is simplified, and the productivity is improved.
The novel manufacturing process of the semiconductor test probe card provided by the embodiment of the invention has the advantages that the second metal layer is plated on the first metal layer when the probe is manufactured, and then the second metal layer is etched by adopting the dry etching method to form the probe, so that a plurality of wet etching steps, bonding process steps, physical vapor phase film plating steps and chemical mechanical polishing steps are omitted, the process flow is simplified, the productivity is improved, and the cost is saved. The method of the embodiment adopts a dry etching groove process to etch the second metal layer, so that the angle of the probe needle head can be better controlled, the uniformity of the probe is improved, and the yield of the probe is improved.
The novel manufacturing process of the semiconductor test probe card comprises the steps of manufacturing a metal column connected with a probe on a silicon substrate when the probe is packaged, bonding the metal column and a ceramic substrate together through a bonding process, and finally removing the silicon substrate. Compared with the prior art, the method has the advantages that only one process is needed for gluing, photoetching and developing, only one process is needed for electrochemical coating, multiple electrochemical coating processes are needed, the chemical grinding process is also needed, the process flow is simplified, and the productivity is improved.
The novel manufacturing process of the semiconductor test probe card provided by the embodiment of the invention has the advantages that the metal column is manufactured on the silicon substrate when the probe is packaged, the glue coating, photoetching and developing processes are only carried out on the silicon substrate, the metal column is manufactured on the ceramic substrate by the existing method, and the glue coating, photoetching and developing processes are carried out on the ceramic substrate.
The foregoing is merely illustrative of the present invention, and the present invention is not limited thereto, and any changes or substitutions easily contemplated by those skilled in the art within the scope of the present invention should be included in the present invention.
Claims (10)
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| CN202411426456.4A CN118962209B (en) | 2024-10-14 | 2024-10-14 | Novel manufacturing process of semiconductor test probe card |
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| CN202411426456.4A CN118962209B (en) | 2024-10-14 | 2024-10-14 | Novel manufacturing process of semiconductor test probe card |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN119199220B (en) * | 2024-11-26 | 2025-04-08 | 南京云极芯半导体科技有限公司 | Method for manufacturing space transformer of probe card |
| CN120685944B (en) * | 2025-08-13 | 2025-10-17 | 南京云极芯半导体科技有限公司 | Preparation method of probes in semiconductor probe card |
| CN120847454B (en) * | 2025-09-22 | 2025-11-25 | 南京云极芯半导体科技有限公司 | A method for fabricating a semiconductor probe card |
| CN120847453B (en) * | 2025-09-22 | 2025-11-21 | 南京云极芯半导体科技有限公司 | A wafer fabrication method to improve alignment accuracy during semiconductor probe card bonding |
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| CN101113990A (en) * | 2006-07-24 | 2008-01-30 | 南茂科技股份有限公司 | Manufacturing method of probe card |
| CN111638442A (en) * | 2020-06-10 | 2020-09-08 | 深圳市道格特科技有限公司 | Cantilever beam probe card prepared by MEMS process and preparation method |
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| US6414501B2 (en) * | 1998-10-01 | 2002-07-02 | Amst Co., Ltd. | Micro cantilever style contact pin structure for wafer probing |
| TWI224676B (en) * | 2001-05-09 | 2004-12-01 | Chipmos Technologies Inc | Method of manufacturing 3-dimensional probe needles |
| CN100492017C (en) * | 2005-11-29 | 2009-05-27 | 旺矽科技股份有限公司 | Method for batch manufacturing vertical probe card micropore guide plate |
| TW200832578A (en) * | 2006-12-04 | 2008-08-01 | Int Semiconductor Tech Ltd | Method for forming Au-bump with clean surface |
| TW201211545A (en) * | 2010-09-10 | 2012-03-16 | Ccp Contact Probes Co Ltd | A manufacturing method for probe |
| CN115078792B (en) * | 2022-06-16 | 2025-03-25 | 深圳市容微精密电子有限公司 | Method for preparing elastic probe card, elastic probe card |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101113990A (en) * | 2006-07-24 | 2008-01-30 | 南茂科技股份有限公司 | Manufacturing method of probe card |
| CN111638442A (en) * | 2020-06-10 | 2020-09-08 | 深圳市道格特科技有限公司 | Cantilever beam probe card prepared by MEMS process and preparation method |
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Denomination of invention: A New Manufacturing Process for Semiconductor Test Probe Cards Granted publication date: 20241231 Pledgee: Bank of China Limited Nanjing Jiangbei New Area Branch Pledgor: Nanjing Yunjixin Semiconductor Technology Co.,Ltd. Registration number: Y2025980021476 |