CN118731621A - A semiconductor device aging test method, system and medium - Google Patents
A semiconductor device aging test method, system and medium Download PDFInfo
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- CN118731621A CN118731621A CN202410767035.1A CN202410767035A CN118731621A CN 118731621 A CN118731621 A CN 118731621A CN 202410767035 A CN202410767035 A CN 202410767035A CN 118731621 A CN118731621 A CN 118731621A
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- G—PHYSICS
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
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- G01R31/26—Testing of individual semiconductor devices
- G01R31/2642—Testing semiconductor operation lifetime or reliability, e.g. by accelerated life tests
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- G06F2119/02—Reliability analysis or reliability optimisation; Failure analysis, e.g. worst case scenario performance, failure mode and effects analysis [FMEA]
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Abstract
The embodiment of the application provides a semiconductor device aging test method, a system and a medium, wherein the method comprises the following steps: analyzing standard parameters of the semiconductor device based on the use scene of the semiconductor device to obtain standard parameter information; constructing an aging test environment to obtain aging test information and acquiring real-time state information of semiconductor devices of different time nodes; comparing the real-time state information of the semiconductor devices of adjacent time nodes to obtain a state deviation rate, and judging whether the state deviation rate is larger than or equal to a set state deviation rate threshold value; if the service life of the semiconductor is greater than or equal to the service life attenuation information, predicting the service life of the semiconductor according to the service life attenuation information; and if the aging test information is smaller than the preset threshold value, the aging test information is adjusted to perform accelerated aging test on the semiconductor to obtain aging test data, the aging test with different parameters is performed on the semiconductor device by constructing different aging test environments, and the life attenuation is predicted according to the fluctuation information in the test process, so that the aging test result is obtained.
Description
Technical Field
The application relates to the technical field of semiconductor device burn-in test, in particular to a semiconductor device burn-in test method, a semiconductor device burn-in test system and a semiconductor device burn-in test medium.
Background
As the integration of semiconductor devices increases rapidly, the size of the semiconductor devices decreases and the failure rate of each unit of the semiconductor devices increases proportionally. In order to ensure the reliability of the semiconductor device, it is necessary to detect defective cells at the beginning. One of the most common methods of detecting defective cells is burn-in. The burn-in test is a process of performing a corresponding condition-enhanced experiment on the product under the condition that various factors involved in the actual use condition of the product are simulated, and is generally used for detecting relevant parameters of a semiconductor device by adopting extreme conditions in the semiconductor field until the parameters of the semiconductor device are abnormal, wherein the extreme conditions are high temperature, high pressure, high humidity or the like. The aging test in the prior art cannot construct different aging test environments, can only perform single parameter test, cannot analyze linkage interference among different test states, and affects test precision; in view of the above problems, an effective technical solution is currently needed.
Disclosure of Invention
The embodiment of the application aims to provide a semiconductor device aging test method, a system and a medium, which are used for carrying out aging tests of different parameters on a semiconductor device by constructing different aging test environments so as to analyze the aging test state of the semiconductor device and predict service life attenuation according to fluctuation information in the test process so as to obtain an aging test result.
The embodiment of the application also provides a semiconductor device aging test method, which comprises the following steps:
S101, analyzing standard parameters of a semiconductor device based on the use scene of the semiconductor device to obtain standard parameter information;
S102, constructing an aging test environment according to standard parameter information to obtain aging test information, performing aging test on the semiconductor device according to the aging test information, and obtaining real-time state information of the semiconductor device of different time nodes;
s103, comparing the real-time state information of the semiconductor devices of adjacent time nodes to obtain a state deviation rate, and judging whether the state deviation rate is larger than or equal to a set state deviation rate threshold value;
S104, if the service life of the semiconductor device is greater than or equal to the service life of the semiconductor device, generating fluctuation information of the semiconductor device, analyzing service life attenuation information of the semiconductor device according to the fluctuation information, and predicting the service life of the semiconductor device according to the service life attenuation information;
And S105, if the data is smaller than the reference data, generating correction information, adjusting ageing test parameters according to the correction information, performing accelerated ageing test on the semiconductor according to the ageing test parameters, obtaining ageing test data, and transmitting the ageing test data to the terminal in real time.
Optionally, in the burn-in test method for a semiconductor device according to the embodiment of the present application, standard parameters of the semiconductor device are analyzed based on a usage scenario of the semiconductor device, and standard parameter information is obtained, including:
S201, acquiring a use scene of a semiconductor device, and generating scene loss information according to the use scene of the semiconductor;
s202, acquiring current state information of a semiconductor device, carrying out loss acceleration information on the current state information according to scene loss information, and correcting the current state information according to the loss acceleration information to obtain correction information;
s203, optimizing parameter information of the semiconductor device according to the correction information to generate an optimization coefficient;
S204, multiplying the optimization coefficient by the parameter information of the semiconductor device to obtain standard parameter information.
Optionally, in the method for burn-in testing a semiconductor device according to the embodiment of the present application, a burn-in test environment is constructed according to standard parameter information to obtain burn-in test information, and the burn-in test is performed on the semiconductor device according to the burn-in test information, including:
S301, standard parameter information of a semiconductor device is obtained, and an aging test environment is constructed according to the standard parameter information of the semiconductor device;
s302, inputting the aging test environment into a test model to output a test strategy, and testing the semiconductor device according to the test strategy to obtain aging test information;
s303, analyzing the aging test temperatures of different time nodes according to the aging test information, and comparing the aging test temperatures of adjacent time nodes to obtain a temperature deviation rate;
s304, judging whether the temperature deviation rate is larger than or equal to a set temperature deviation rate threshold value;
S305, if the temperature is greater than or equal to the temperature, analyzing the heat transmission state according to the temperature of the semiconductor device; and if the data is smaller than the predetermined value, generating test data of the semiconductor device, and transmitting the test data to the terminal.
Optionally, in the method for testing semiconductor device burn-in according to the embodiment of the present application, if the information is greater than or equal to the information, generating fluctuation information of the semiconductor device, analyzing life attenuation information of the semiconductor device according to the fluctuation information, and predicting the life of the semiconductor device according to the life attenuation information, including:
Acquiring real-time state information of the semiconductor devices of the adjacent time nodes, analyzing state jump information according to the real-time state information of the semiconductor devices of the adjacent time nodes, and generating state fluctuation information according to the state jump information;
comparing the state fluctuation information with the set fluctuation information to obtain a fluctuation deviation rate;
Judging whether the fluctuation deviation rate is larger than a set fluctuation deviation rate threshold value or not;
if the time is greater than the preset time, judging that the semiconductor device fails, and recording the failure time;
if the current state information is smaller than the current state information, the service life of the semiconductor device is predicted according to the current state information.
Optionally, in the method for burn-in testing a semiconductor device according to the embodiment of the present application, a burn-in test environment is constructed according to standard parameter information to obtain burn-in test information, and the burn-in test is performed on the semiconductor device according to the burn-in test information, including:
obtaining standard parameter information of a semiconductor device to construct an aging test environment, wherein the aging test environment comprises a current test and a temperature test;
Constructing a relation curve of current and time according to an aging test environment, and generating curve parameters;
performing current test on the semiconductor device according to a relation curve of current and time and a set time to obtain the running current of the semiconductor device;
Obtaining threshold current according to standard parameter information of the semiconductor device;
comparing the operation current of the semiconductor device with a threshold current, and judging whether the threshold current is larger than the operation current of the semiconductor device;
if the current is greater than the preset threshold value, inputting different currents according to the relation curve to test the semiconductor device;
if the current is smaller than the threshold current, screening out curve points exceeding the threshold current on the relation curve, fitting the curve points to a new relation curve, and optimizing curve parameters.
Optionally, in the method for testing semiconductor device burn-in according to the embodiment of the present application, a burn-in environment is constructed according to standard parameter information to obtain burn-in information, and the method further includes:
constructing a current test environment and a voltage test environment according to standard parameter information of the semiconductor device;
performing continuous current impact on the semiconductor device according to the current testing environment to obtain current testing time, and detecting the running temperature of the semiconductor device to obtain a first testing temperature;
continuously pressurizing and impacting the semiconductor device according to the voltage testing environment to obtain voltage testing time, and detecting the running temperature of the semiconductor device to obtain a second testing temperature;
setting a first coefficient according to the current test time and setting a second coefficient according to the voltage test time;
And the first coefficient and the second coefficient are multiplied by the first test temperature and the second test temperature respectively to carry out adjustment and optimization, so that the linkage test temperature is obtained.
In a second aspect, an embodiment of the present application provides a semiconductor device burn-in system, including: the memory comprises a program of a semiconductor device burn-in test method, and the program of the semiconductor device burn-in test method realizes the following steps when being executed by the processor:
Analyzing standard parameters of the semiconductor device based on the use scene of the semiconductor device to obtain standard parameter information;
Constructing an aging test environment according to the standard parameter information to obtain aging test information, performing aging test on the semiconductor device according to the aging test information, and obtaining real-time state information of the semiconductor device of different time nodes;
comparing the real-time state information of the semiconductor devices of adjacent time nodes to obtain a state deviation rate, and judging whether the state deviation rate is larger than or equal to a set state deviation rate threshold value;
If the service life of the semiconductor device is greater than or equal to the service life of the semiconductor device, generating fluctuation information of the semiconductor device, analyzing service life attenuation information of the semiconductor device according to the fluctuation information, and predicting the service life of the semiconductor device according to the service life attenuation information;
If the data is smaller than the threshold value, generating correction information, adjusting ageing test parameters according to the correction information, performing accelerated ageing test on the semiconductor according to the ageing test parameters, obtaining ageing test data, and transmitting the ageing test data to the terminal in real time.
Optionally, in the burn-in test system for a semiconductor device according to the embodiment of the present application, standard parameters of the semiconductor device are analyzed based on a usage scenario of the semiconductor device, and standard parameter information is obtained, including:
Acquiring a use scene of the semiconductor device, and generating scene loss information according to the use scene of the semiconductor;
Acquiring current state information of the semiconductor device, carrying out loss acceleration information on the current state information according to scene loss information, and correcting the current state information according to the loss acceleration information to obtain correction information;
Optimizing parameter information of the semiconductor device according to the correction information to generate an optimization coefficient;
and multiplying the optimization coefficient by the parameter information of the semiconductor device to obtain standard parameter information.
Optionally, in the burn-in test system for a semiconductor device according to the embodiment of the present application, a burn-in test environment is constructed according to standard parameter information to obtain burn-in test information, and the burn-in test is performed on the semiconductor device according to the burn-in test information, including:
Standard parameter information of the semiconductor device is obtained, and an aging test environment is constructed according to the standard parameter information of the semiconductor device;
inputting the aging test environment into a test model and outputting a test strategy;
testing the semiconductor device according to the testing strategy to obtain burn-in test information;
According to the aging test information, analyzing the aging test temperatures of different time nodes, and comparing the aging test temperatures of adjacent time nodes to obtain a temperature deviation rate;
judging whether the temperature deviation rate is larger than or equal to a set temperature deviation rate threshold value;
If the temperature is greater than or equal to the temperature, analyzing the heat transmission state according to the temperature of the semiconductor device;
And if the data is smaller than the predetermined value, generating test data of the semiconductor device, and transmitting the test data to the terminal.
In a third aspect, an embodiment of the present application further provides a computer readable storage medium, where a semiconductor device burn-in test method program is included, where the semiconductor device burn-in test method program, when executed by a processor, implements the steps of the semiconductor device burn-in test method according to any one of the above.
As can be seen from the above, according to the method, the system and the medium for testing semiconductor device burn-in provided by the embodiments of the present application, standard parameter information is obtained by analyzing standard parameters of a semiconductor device based on the usage scenario of the semiconductor device; constructing an aging test environment according to the standard parameter information to obtain aging test information, performing aging test on the semiconductor device according to the aging test information, and obtaining real-time state information of the semiconductor device of different time nodes; comparing the real-time state information of the semiconductor devices of adjacent time nodes to obtain a state deviation rate, and judging whether the state deviation rate is larger than or equal to a set state deviation rate threshold value; if the service life of the semiconductor device is greater than or equal to the service life of the semiconductor device, generating fluctuation information of the semiconductor device, analyzing service life attenuation information of the semiconductor device according to the fluctuation information, and predicting the service life of the semiconductor device according to the service life attenuation information; if the parameter is smaller than the preset threshold value, generating correction information, adjusting ageing test parameters according to the correction information, performing accelerated ageing test on the semiconductor according to the ageing test parameters, obtaining ageing test data, transmitting the ageing test data to a terminal in real time, performing ageing tests of different parameters on the semiconductor device by constructing different ageing test environments, analyzing the ageing test state of the semiconductor device, and predicting service life attenuation according to fluctuation information in the test process, thereby obtaining an ageing test result.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and should not be considered as limiting the scope, and other related drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a flowchart of a semiconductor device burn-in test method according to an embodiment of the present application;
Fig. 2 is a flowchart of obtaining semiconductor device standard parameter information of a semiconductor device burn-in test method according to an embodiment of the present application;
Fig. 3 is a flow chart of temperature analysis in the burn-in test process of a semiconductor device according to the burn-in test method of a semiconductor device according to an embodiment of the present application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. The components of the embodiments of the present application generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the application, as presented in the figures, is not intended to limit the scope of the application, as claimed, but is merely representative of selected embodiments of the application. All other embodiments, which can be made by a person skilled in the art without making any inventive effort, are intended to be within the scope of the present application.
It should be noted that like reference numerals and letters refer to like items in the following figures, and thus once an item is defined in one figure, no further definition or explanation thereof is necessary in the following figures. Meanwhile, in the description of the present application, the terms "first", "second", and the like are used only to distinguish the description, and are not to be construed as indicating or implying relative importance.
Referring to fig. 1, fig. 1 is a flowchart illustrating a method for burn-in testing a semiconductor device according to some embodiments of the application. The semiconductor device burn-in test method is used in terminal equipment and comprises the following steps:
s101, analyzing standard parameters of the semiconductor device based on the use scene of the semiconductor device to obtain standard parameter information;
S102, constructing an aging test environment according to standard parameter information to obtain aging test information, performing aging test on the semiconductor device according to the aging test information, and obtaining real-time state information of the semiconductor device of different time nodes;
S103, comparing the real-time state information of the semiconductor devices of the adjacent time nodes to obtain a state deviation rate, and judging whether the state deviation rate is larger than or equal to a set state deviation rate threshold value;
s104, if the service life of the semiconductor device is greater than or equal to the service life of the semiconductor device, generating fluctuation information of the semiconductor device, analyzing service life attenuation information of the semiconductor device according to the fluctuation information, and predicting the service life of the semiconductor device according to the service life attenuation information;
and S105, if the data is smaller than the reference data, generating correction information, adjusting ageing test parameters according to the correction information, performing accelerated ageing test on the semiconductor according to the ageing test parameters, obtaining ageing test data, and transmitting the ageing test data to the terminal in real time.
It should be noted that, through constructing different ageing test environments and carrying out ageing test on the semiconductor device, in the test process, real-time state change of the semiconductor is analyzed, fluctuation information is obtained through a set state deviation rate threshold value, each time fluctuation information is generated to represent an ageing node, thereby generating attenuation signals influencing the service life of the semiconductor device, and life attenuation information is obtained, so that the service life of the semiconductor device is accurately predicted, the ageing test precision is improved, in addition, the ageing test parameters are continuously adjusted to carry out high-speed ageing on the semiconductor device, and the ageing test time is shortened.
Referring to fig. 2, fig. 2 is a flow chart of obtaining semiconductor device standard parameter information of a semiconductor device burn-in test method according to some embodiments of the application. According to the embodiment of the application, standard parameters of the semiconductor device are analyzed based on the use scene of the semiconductor device, and standard parameter information is obtained, which comprises the following specific steps:
S201, acquiring a use scene of a semiconductor device, and generating scene loss information according to the use scene of the semiconductor device;
S202, acquiring current state information of a semiconductor device, carrying out loss acceleration information on the current state information according to scene loss information, and correcting the current state information according to the loss acceleration information to obtain correction information;
S203, optimizing parameter information of the semiconductor device according to the correction information to generate an optimization coefficient;
S204, multiplying the optimization coefficient by the parameter information of the semiconductor device to obtain standard parameter information.
It should be noted that, different usage scenarios may generate corresponding scenario damage to the semiconductor device, and in the process of calculating the standard parameter of the semiconductor device, the status of the semiconductor device needs to be corrected by the scenario loss information in consideration of the scenario loss of the usage scenario, so that the obtained standard parameter information has higher precision.
Referring to fig. 3, fig. 3 is a flow chart illustrating a temperature analysis during a burn-in test of a semiconductor device according to a burn-in test method of a semiconductor device according to some embodiments of the present application. According to the embodiment of the application, an aging test environment is constructed according to standard parameter information to obtain aging test information, and the aging test is carried out on the semiconductor device according to the aging test information, which comprises the following steps:
S301, standard parameter information of a semiconductor device is obtained, and an aging test environment is constructed according to the standard parameter information of the semiconductor device;
s302, inputting the aging test environment into a test model to output a test strategy, and testing the semiconductor device according to the test strategy to obtain aging test information;
S303, analyzing the aging test temperatures of different time nodes according to the aging test information, and comparing the aging test temperatures of adjacent time nodes to obtain a temperature deviation rate;
s304, judging whether the temperature deviation rate is larger than or equal to a set temperature deviation rate threshold value;
S305, if the temperature is greater than or equal to the temperature, analyzing the heat transmission state according to the temperature of the semiconductor device; and if the data is smaller than the predetermined value, generating test data of the semiconductor device, and transmitting the test data to the terminal.
It should be noted that, by constructing a test model to output a test strategy matched with a test environment, different aging test information is generated for different semiconductor devices, and in the aging test process, heat generated by temperature is obtained by analyzing aging test temperatures at different times, and the influence of the temperature on the semiconductor aging test is obtained by analyzing heat transmission states.
According to an embodiment of the present invention, if the lifetime attenuation information is greater than or equal to the lifetime attenuation information, the lifetime of the semiconductor device is predicted by generating the fluctuation information of the semiconductor device, analyzing the lifetime attenuation information of the semiconductor device according to the fluctuation information, and specifically including:
Acquiring real-time state information of the semiconductor devices of the adjacent time nodes, analyzing state jump information according to the real-time state information of the semiconductor devices of the adjacent time nodes, and generating state fluctuation information according to the state jump information;
comparing the state fluctuation information with the set fluctuation information to obtain a fluctuation deviation rate;
judging whether the fluctuation deviation rate is larger than a set fluctuation deviation rate threshold value or not;
if the time is greater than the preset time, judging that the semiconductor device fails, and recording the failure time;
if the current state information is smaller than the current state information, the service life of the semiconductor device is predicted according to the current state information.
By analyzing the real-time state information of the adjacent time nodes, when the state difference is large, the state jump information is generated to obtain the state fluctuation information, the state fluctuation information can be understood as that the state of the semiconductor device is suddenly changed when the current time node is transited to the next time node, the failure of the semiconductor device occurs at the moment, and the failure time is recorded, so that the failure time is analyzed to be short failure or permanent failure, and the service life of the semiconductor device is accurately analyzed.
According to the embodiment of the invention, an aging test environment is constructed according to standard parameter information to obtain aging test information, and the aging test is carried out on the semiconductor device according to the aging test information, which comprises the following steps:
obtaining standard parameter information of a semiconductor device to construct an aging test environment, wherein the aging test environment comprises a current test and a temperature test;
Constructing a relation curve of current and time according to an aging test environment, and generating curve parameters;
performing current test on the semiconductor device according to a relation curve of current and time and a set time to obtain the running current of the semiconductor device;
Obtaining threshold current according to standard parameter information of the semiconductor device;
comparing the operation current of the semiconductor device with a threshold current, and judging whether the threshold current is larger than the operation current of the semiconductor device;
if the current is greater than the preset threshold value, inputting different currents according to the relation curve to test the semiconductor device;
if the current is smaller than the threshold current, screening out curve points exceeding the threshold current on the relation curve, fitting the curve points to a new relation curve, and optimizing curve parameters.
In the current surge test of the semiconductor device, the current input to the semiconductor device cannot exceed the threshold current, so that the semiconductor device is prevented from being broken down directly, damage is caused, the input current is required to be gradually increased, and the burn-in time is set for the burn-in test.
According to the embodiment of the invention, an aging test environment is constructed according to standard parameter information to obtain aging test information, and the aging test is carried out on the semiconductor device according to the aging test information, and the method further comprises the following steps:
constructing a current test environment and a voltage test environment according to standard parameter information of the semiconductor device;
performing continuous current impact on the semiconductor device according to the current testing environment to obtain current testing time, and detecting the running temperature of the semiconductor device to obtain a first testing temperature;
continuously pressurizing and impacting the semiconductor device according to the voltage testing environment to obtain voltage testing time, and detecting the running temperature of the semiconductor device to obtain a second testing temperature;
setting a first coefficient according to the current test time and setting a second coefficient according to the voltage test time;
And the first coefficient and the second coefficient are multiplied by the first test temperature and the second test temperature respectively to carry out adjustment and optimization, so that the linkage test temperature is obtained.
The semiconductor device operation temperature is tested in the current test environment and the voltage test environment respectively, the test temperature is optimized and adjusted by analyzing the relation between the current and the voltage to obtain the linkage test temperature, and the linkage test temperature can be accurately analyzed during the synchronous test of the current and the voltage, so that the dual-parameter synchronous matching aging test of the semiconductor device is realized, and the test effect is improved.
According to the embodiment of the invention, if the time is greater than the preset threshold value, judging that the semiconductor device fails, and recording the failure time, further comprising:
acquiring the failure time of the semiconductor device, and comparing the failure time with a set time threshold;
if the failure time is greater than the set time threshold, judging that the semiconductor device is permanently failed and judging that the semiconductor device is damaged;
and if the failure time is smaller than the set time threshold, judging that the temporary failure exists.
It should be noted that, the failure state in the semiconductor device burn-in test process is obtained by analyzing the failure time of the semiconductor device, so as to accurately obtain the burn-in test result.
According to the embodiment of the invention, if the information is smaller than the predetermined threshold value, generating correction information, adjusting aging test parameters according to the correction information, and performing accelerated aging test on the semiconductor by adjusting the aging test information according to the aging test parameters, wherein the method comprises the following steps:
the method comprises the steps of obtaining correction information by analyzing whether the state deviation rate of the semiconductor device is larger than or equal to a set state deviation rate threshold value, and if so, obtaining an aging test parameter, and adjusting the aging test parameter by the correction information;
inputting a test model according to the aging test parameters to obtain normal test time;
Setting an acceleration factor, constraining the test model according to the acceleration factor to obtain a new test model, inputting the new test model based on the adjusted aging test parameters, and outputting acceleration test time;
And obtaining an acceleration test result according to the time ratio of the normal test time to the acceleration test time.
It should be noted that, in the aging test, the temperature is an important acceleration factor of the acceleration element, and by setting the normal temperature and the high temperature, the normal test time and the high temperature test time are analyzed, and 40% of the microelectronic failures are related to the temperature.
The normal semiconductor device failure time relationship is calculated as follows:
；
subscripts 1,2 denote normal and high temperature conditions respectively, Representing a temperature acceleration factor; A constant indicating driving energy, which is related to the type of the semiconductor device; Representing the Boltzmann constant; Indicating the temperature at which it is normal, Indicating the temperature at the time of the burn-in test.
According to the embodiment of the invention, when the voltage environment test is performed, the method further comprises the following steps:
And setting a voltage acceleration factor to accelerate the aging condition of the test voltage of the semiconductor device.
The voltage acceleration factor is calculated as follows:
；
wherein, Representing an index the function of the function is that,Representing a voltage acceleration factor; representing the characteristic coefficient of the semiconductor material, and the value range is Indicating the voltage under normal operating conditions,Representing the voltage at the time of burn-in test.
Calculating according to the temperature acceleration factor and the voltage acceleration factor to obtain a total aging acceleration test factor, wherein the total aging test acceleration factor has the following calculation formula:
；
Wherein the method comprises the steps of Indicating the total burn-in test acceleration factor,Indicating the temperature acceleration factor of the temperature,Indicating the permittivity.
In a second aspect, an embodiment of the present application provides a semiconductor device burn-in system, including: the memory and the processor, the memory includes the program of the semiconductor device burn-in test method, the program of the semiconductor device burn-in test method realizes the following steps when being executed by the processor:
Analyzing standard parameters of the semiconductor device based on the use scene of the semiconductor device to obtain standard parameter information;
Constructing an aging test environment according to the standard parameter information to obtain aging test information, performing aging test on the semiconductor device according to the aging test information, and obtaining real-time state information of the semiconductor device of different time nodes;
comparing the real-time state information of the semiconductor devices of adjacent time nodes to obtain a state deviation rate, and judging whether the state deviation rate is larger than or equal to a set state deviation rate threshold value;
If the service life of the semiconductor device is greater than or equal to the service life of the semiconductor device, generating fluctuation information of the semiconductor device, analyzing service life attenuation information of the semiconductor device according to the fluctuation information, and predicting the service life of the semiconductor device according to the service life attenuation information;
If the data is smaller than the threshold value, generating correction information, adjusting ageing test parameters according to the correction information, performing accelerated ageing test on the semiconductor according to the ageing test parameters, obtaining ageing test data, and transmitting the ageing test data to the terminal in real time.
It should be noted that, through constructing different ageing test environments and carrying out ageing test on the semiconductor device, in the test process, real-time state change of the semiconductor is analyzed, fluctuation information is obtained through a set state deviation rate threshold value, each time fluctuation information is generated to represent an ageing node, thereby generating attenuation signals influencing the service life of the semiconductor device, and life attenuation information is obtained, so that the service life of the semiconductor device is accurately predicted, the ageing test precision is improved, in addition, the ageing test parameters are continuously adjusted to carry out high-speed ageing on the semiconductor device, and the ageing test time is shortened.
According to the embodiment of the invention, standard parameters of the semiconductor device are analyzed based on the use scene of the semiconductor device, and standard parameter information is obtained, which comprises the following specific steps:
Acquiring a use scene of the semiconductor device, and generating scene loss information according to the use scene of the semiconductor;
Acquiring current state information of the semiconductor device, carrying out loss acceleration information on the current state information according to scene loss information, and correcting the current state information according to the loss acceleration information to obtain correction information;
Optimizing parameter information of the semiconductor device according to the correction information to generate an optimization coefficient;
and multiplying the optimization coefficient by the parameter information of the semiconductor device to obtain standard parameter information.
It should be noted that, different usage scenarios may generate corresponding scenario damage to the semiconductor device, and in the process of calculating the standard parameter of the semiconductor device, the status of the semiconductor device needs to be corrected by the scenario loss information in consideration of the scenario loss of the usage scenario, so that the obtained standard parameter information has higher precision.
According to the embodiment of the invention, an aging test environment is constructed according to standard parameter information to obtain aging test information, and the aging test is carried out on the semiconductor device according to the aging test information, which comprises the following steps:
Standard parameter information of the semiconductor device is obtained, and an aging test environment is constructed according to the standard parameter information of the semiconductor device;
inputting the aging test environment into a test model and outputting a test strategy;
testing the semiconductor device according to the testing strategy to obtain burn-in test information;
According to the aging test information, analyzing the aging test temperatures of different time nodes, and comparing the aging test temperatures of adjacent time nodes to obtain a temperature deviation rate;
Judging whether the temperature deviation rate is larger than or equal to a set temperature deviation rate threshold value;
If the temperature is greater than or equal to the temperature, analyzing the heat transmission state according to the temperature of the semiconductor device;
And if the data is smaller than the predetermined value, generating test data of the semiconductor device, and transmitting the test data to the terminal.
It should be noted that, by constructing a test model to output a test strategy matched with a test environment, different aging test information is generated for different semiconductor devices, and in the aging test process, heat generated by temperature is obtained by analyzing aging test temperatures at different times, and the influence of the temperature on the semiconductor aging test is obtained by analyzing heat transmission states.
According to an embodiment of the present invention, if the lifetime attenuation information is greater than or equal to the lifetime attenuation information, the lifetime of the semiconductor device is predicted by generating the fluctuation information of the semiconductor device, analyzing the lifetime attenuation information of the semiconductor device according to the fluctuation information, and specifically including:
Acquiring real-time state information of the semiconductor devices of the adjacent time nodes, analyzing state jump information according to the real-time state information of the semiconductor devices of the adjacent time nodes, and generating state fluctuation information according to the state jump information;
comparing the state fluctuation information with the set fluctuation information to obtain a fluctuation deviation rate;
judging whether the fluctuation deviation rate is larger than a set fluctuation deviation rate threshold value or not;
if the time is greater than the preset time, judging that the semiconductor device fails, and recording the failure time;
if the current state information is smaller than the current state information, the service life of the semiconductor device is predicted according to the current state information.
By analyzing the real-time state information of the adjacent time nodes, when the state difference is large, the state jump information is generated to obtain the state fluctuation information, the state fluctuation information can be understood as that the state of the semiconductor device is suddenly changed when the current time node is transited to the next time node, the failure of the semiconductor device occurs at the moment, and the failure time is recorded, so that the failure time is analyzed to be short failure or permanent failure, and the service life of the semiconductor device is accurately analyzed.
According to the embodiment of the invention, an aging test environment is constructed according to standard parameter information to obtain aging test information, and the aging test is carried out on the semiconductor device according to the aging test information, which comprises the following steps:
obtaining standard parameter information of a semiconductor device to construct an aging test environment, wherein the aging test environment comprises a current test and a temperature test;
Constructing a relation curve of current and time according to an aging test environment, and generating curve parameters;
performing current test on the semiconductor device according to a relation curve of current and time and a set time to obtain the running current of the semiconductor device;
Obtaining threshold current according to standard parameter information of the semiconductor device;
comparing the operation current of the semiconductor device with a threshold current, and judging whether the threshold current is larger than the operation current of the semiconductor device;
if the current is greater than the preset threshold value, inputting different currents according to the relation curve to test the semiconductor device;
if the current is smaller than the threshold current, screening out curve points exceeding the threshold current on the relation curve, fitting the curve points to a new relation curve, and optimizing curve parameters.
In the current surge test of the semiconductor device, the current input to the semiconductor device cannot exceed the threshold current, so that the semiconductor device is prevented from being broken down directly, damage is caused, the input current is required to be gradually increased, and the burn-in time is set for the burn-in test.
According to the embodiment of the invention, an aging test environment is constructed according to standard parameter information to obtain aging test information, and the aging test is carried out on the semiconductor device according to the aging test information, and the method further comprises the following steps:
constructing a current test environment and a voltage test environment according to standard parameter information of the semiconductor device;
performing continuous current impact on the semiconductor device according to the current testing environment to obtain current testing time, and detecting the running temperature of the semiconductor device to obtain a first testing temperature;
continuously pressurizing and impacting the semiconductor device according to the voltage testing environment to obtain voltage testing time, and detecting the running temperature of the semiconductor device to obtain a second testing temperature;
setting a first coefficient according to the current test time and setting a second coefficient according to the voltage test time;
And the first coefficient and the second coefficient are multiplied by the first test temperature and the second test temperature respectively to carry out adjustment and optimization, so that the linkage test temperature is obtained.
The semiconductor device operation temperature is tested in the current test environment and the voltage test environment respectively, the test temperature is optimized and adjusted by analyzing the relation between the current and the voltage to obtain the linkage test temperature, and the linkage test temperature can be accurately analyzed during the synchronous test of the current and the voltage, so that the dual-parameter synchronous matching aging test of the semiconductor device is realized, and the test effect is improved.
According to the embodiment of the invention, if the time is greater than the preset threshold value, judging that the semiconductor device fails, and recording the failure time, further comprising:
acquiring the failure time of the semiconductor device, and comparing the failure time with a set time threshold;
if the failure time is greater than the set time threshold, judging that the semiconductor device is permanently failed and judging that the semiconductor device is damaged;
and if the failure time is smaller than the set time threshold, judging that the temporary failure exists.
It should be noted that, the failure state in the semiconductor device burn-in test process is obtained by analyzing the failure time of the semiconductor device, so as to accurately obtain the burn-in test result.
According to the embodiment of the invention, if the information is smaller than the predetermined threshold value, generating correction information, adjusting aging test parameters according to the correction information, and performing accelerated aging test on the semiconductor by adjusting the aging test information according to the aging test parameters, wherein the method comprises the following steps:
the method comprises the steps of obtaining correction information by analyzing whether the state deviation rate of the semiconductor device is larger than or equal to a set state deviation rate threshold value, and if so, obtaining an aging test parameter, and adjusting the aging test parameter by the correction information;
inputting a test model according to the aging test parameters to obtain normal test time;
Setting an acceleration factor, constraining the test model according to the acceleration factor to obtain a new test model, inputting the new test model based on the adjusted aging test parameters, and outputting acceleration test time;
And obtaining an acceleration test result according to the time ratio of the normal test time to the acceleration test time.
It should be noted that, in the aging test, the temperature is an important acceleration factor of the acceleration element, and by setting the normal temperature and the high temperature, the normal test time and the high temperature test time are analyzed, and 40% of the microelectronic failures are related to the temperature.
The normal semiconductor device failure time relationship is calculated as follows:
；
subscripts 1,2 denote normal and high temperature conditions respectively, Representing a temperature acceleration factor; A constant indicating driving energy, which is related to the type of the semiconductor device; Representing the Boltzmann constant; Indicating the temperature at which it is normal, Indicating the temperature at the time of the burn-in test.
According to the embodiment of the invention, when the voltage environment test is performed, the method further comprises the following steps:
And setting a voltage acceleration factor to accelerate the aging condition of the test voltage of the semiconductor device.
The voltage acceleration factor is calculated as follows:
；
wherein, Representing an index the function of the function is that,Representing a voltage acceleration factor; The number of semiconductor experimental samples is represented; Indicating the voltage under normal operating conditions, Representing the voltage at the time of burn-in test.
Calculating according to the temperature acceleration factor and the voltage acceleration factor to obtain a total aging acceleration test factor, wherein the total aging test acceleration factor has the following calculation formula:
；
Wherein the method comprises the steps of Indicating the total burn-in acceleration factor.
A third aspect of the present invention provides a computer readable storage medium having embodied therein a semiconductor device burn-in test method program which, when executed by a processor, implements the steps of the semiconductor device burn-in test method as in any one of the above.
According to the semiconductor device aging test method, system and medium disclosed by the invention, standard parameter information is obtained by analyzing standard parameters of a semiconductor device based on the use scene of the semiconductor device; constructing an aging test environment according to the standard parameter information to obtain aging test information, performing aging test on the semiconductor device according to the aging test information, and obtaining real-time state information of the semiconductor device of different time nodes; comparing the real-time state information of the semiconductor devices of adjacent time nodes to obtain a state deviation rate, and judging whether the state deviation rate is larger than or equal to a set state deviation rate threshold value; if the service life of the semiconductor device is greater than or equal to the service life of the semiconductor device, generating fluctuation information of the semiconductor device, analyzing service life attenuation information of the semiconductor device according to the fluctuation information, and predicting the service life of the semiconductor device according to the service life attenuation information; if the parameter is smaller than the preset threshold value, generating correction information, adjusting ageing test parameters according to the correction information, performing accelerated ageing test on the semiconductor according to the ageing test parameters, obtaining ageing test data, transmitting the ageing test data to a terminal in real time, performing ageing tests of different parameters on the semiconductor device by constructing different ageing test environments, analyzing the ageing test state of the semiconductor device, and predicting service life attenuation according to fluctuation information in the test process, thereby obtaining an ageing test result.
In the several embodiments provided by the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. The above described device embodiments are only illustrative, e.g. the division of units is only one logical function division, and there may be other divisions in actual implementation, such as: multiple units or components may be combined or may be integrated into another system, or some features may be omitted, or not performed. In addition, the various components shown or discussed may be coupled or directly coupled or communicatively coupled to each other via some interface, whether indirectly coupled or communicatively coupled to devices or units, whether electrically, mechanically, or otherwise.
The units described above as separate components may or may not be physically separate, and components shown as units may or may not be physical units; can be located in one place or distributed to a plurality of network units; some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in each embodiment of the present invention may be integrated in one processing unit, or each unit may be separately used as one unit, or two or more units may be integrated in one unit; the integrated units may be implemented in hardware or in hardware plus software functional units.
Those of ordinary skill in the art will appreciate that: all or part of the steps for implementing the above method embodiments may be implemented by hardware related to program instructions, and the foregoing program may be stored in a readable storage medium, where the program, when executed, performs steps including the above method embodiments; and the aforementioned storage medium includes: a mobile storage device, a Read-only memory (ROM), a random access memory (RAM, randomAccessMemory), a magnetic disk, or an optical disk, etc., which can store program codes.
Or the above-described integrated units of the invention may be stored in a readable storage medium if implemented in the form of software functional modules and sold or used as separate products. Based on such understanding, the technical solution of the embodiments of the present invention may be embodied in essence or a part contributing to the prior art in the form of a software product stored in a storage medium, including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the methods described in the embodiments of the present invention. And the aforementioned storage medium includes: a removable storage device, ROM, RAM, magnetic or optical disk, or other medium capable of storing program code.
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