CN118376822B

CN118376822B - Semiconductor wafer aging test system and probe card

Info

Publication number: CN118376822B
Application number: CN202410817557.8A
Authority: CN
Inventors: 何亚军; 邱碧辉; 梁建
Original assignee: Shanghai Zenfocus Semi Tech Co ltd
Current assignee: Shanghai Zenfocus Semi Tech Co ltd
Priority date: 2024-06-24
Filing date: 2024-06-24
Publication date: 2024-08-27
Anticipated expiration: 2044-06-24
Also published as: CN118376822A

Abstract

The application provides a semiconductor wafer burn-in test system and a probe card, which are applied to the technical field of semiconductor wafer test and probe card, wherein the probe card is subjected to layered structure design and stacking design, and comprises a mounting plate, a PCB (printed circuit board), a ceramic substrate, a spring probe and a fixed ring, wherein the mounting plate, the PCB, the ceramic substrate and the fixed ring are connected by designing corresponding air inlet and outlet structure parts based on stacking seal, the spring probe is directly electrically connected with the wafer and the PCB, so that the consistency of each performance of the probe card can be maintained in the burn-in test, a brand new probe card with good safety, reliability and consistency is provided, a usable probe card is provided for early burn-in test in wafer production, and the wafer can be exposed to design and production defects through the burn-in test as soon as possible.

Description

Semiconductor wafer aging test system and probe card

Technical Field

The application relates to the technical field of semiconductor wafer testing and probe card, in particular to a semiconductor wafer burn-in testing system and a probe card.

Background

For wafer of power transistors (such as IGBT and SiC), hundreds or even 1000 Die (also called chips) are formed on a single wafer, so that 2-3 times PogoPin (spring probes) are required for testing the Die simultaneously, the total Force is large, the total area is large, the contact resistance consistency requirement is high, and the burn-in test is performed under the environment of high temperature, high air pressure and high voltage for a long time, so that a stable test is required to be maintained on the whole wafer.

For these reasons, there are very few probe cards at home and abroad that burn-in test power semiconductor wafers at the wafer level. Because of the lack of a probe card for burn-in test, the wafer cannot detect the design of the chip in the early test link, so that the yield of the chip cannot be ensured, the production efficiency is low, and the cost is always high.

Based on this, a probe card solution capable of performing a wafer burn-in test is needed.

Disclosure of Invention

In view of this, the embodiments of the present disclosure provide a semiconductor wafer burn-in test system and a probe card, and provide a probe card capable of simultaneously testing all chips on an entire wafer, so that the probe card can still maintain good contact stability, consistency, etc. under a complex environment, and thus the probe card can perform burn-in test on the wafer under a high-temperature, high-pressure and high-voltage environment for a long time, and a safe and reliable burn-in probe card is provided for the industry.

The embodiment of the specification provides the following technical scheme:

the embodiment of the specification provides a semiconductor wafer burn-in test probe card, which comprises:

the mounting plate is used as a main structure of the probe card, and corresponding steps are respectively arranged at the positions where the air inlet interface and the air outlet interface are mounted;

The PCB is provided with an air inlet notch and an air outlet notch which penetrate through the PCB, a first sealing ring is arranged between the PCB and the mounting plate, and the PCB is covered above the steps so that an air inlet channel is formed from the air inlet interface to the air inlet notch of the PCB through the corresponding steps of the mounting plate, and an air outlet channel is formed from the air outlet notch of the PCB through the corresponding steps of the mounting plate to the air outlet interface;

the ceramic substrate is arranged on the PCB and provided with a plurality of pinholes, and the pinholes are used for arranging spring probes;

the spring probe is arranged in the pinhole of the ceramic substrate, wherein a tip of one end of the spring probe is electrically connected with the PCB, and a tip of the other end of the spring probe is higher than the surface of the ceramic substrate;

The fixing ring is arranged on the PCB and surrounds the periphery of the ceramic substrate with a preset gap, a second sealing ring is arranged between the fixing ring and the PCB, and a gap between the fixing ring and the ceramic substrate is correspondingly communicated with the air inlet channel and the air outlet channel;

After the wafer chuck carrying the wafer is in sealing connection with the fixing ring through the third sealing ring, the tip of the spring probe is in electrical contact with the wafer to be subjected to the burn-in test, and the gap among the wafer, the wafer chuck and the ceramic substrate realizes the penetration between the air inlet channel and the air outlet channel so as to provide a sealing cavity filled with protective gas in the burn-in test for the wafer.

Compared with the prior art, the beneficial effects that above-mentioned at least one technical scheme that this description embodiment adopted can reach include at least:

Through the layered structure design, a closed cavity can be provided for the wafer to inflate and remove the protective gas, so that the wafer is ensured to be suitable for performing the aging test; moreover, through adopting the spring probe to directly carry out the electricity with wafer, PCB board and being connected, can guarantee that the position accuracy of spring probe (PogoPin) is less than or equal to + -0.015, be favorable to very much in the ageing test uniformity, still the needle card can support the test under the wafer environment of 25 to +200deg.C, satisfies ageing requirement.

Also, since a test of protecting the wafer with a shielding gas (e.g., an inert gas) can be performed, the probe card can support, but is not limited to, a burn-in test of a constant voltage of 2000V or an alternating dynamic voltage of 0V/2000V.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings can be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic cross-sectional view of a burn-in probe card of the present application;

FIG. 2 is a schematic diagram of an exploded view of a burn-in test probe card of the present application;

FIG. 3 is a schematic view in partial cross-section of a burn-in test probe card of the present application;

FIG. 4 is a schematic isometric view of a burn-in probe card of the present application;

FIG. 5 is a schematic diagram of a burn-in test probe card and a tester according to the present application.

Reference numerals illustrate: 1. an air inlet joint; 2. an air outlet joint; 3. a first screw set; 4. a leakage isolation plate; 5. a first positioning pin; 6. nonmetallic screw (PEEK); 7. a fourth seal ring; 8. a second positioning pin; 9. a fifth seal ring; 10. a PCB board; 11. a mounting plate (STIFFENER); 12. an air outlet slot; 13. a spring probe (PogoPin); 14. a securing ring (FixRing); 15. a second screw set; 16. a third screw set; 17. a fourth screw set; 18. screwing the screw by hand; 19. a protective cover plate; 20. a second seal ring; 21. ceramic substrates (also known as ceramic Housing or ceramic susceptor, etc.); 22. a press-contact surface; 23. air inlet holes; 24. an air inlet slot; 25. a first anti-creeping notch; 26. a second anti-creeping notch; 27. an air flow channel; 28. a first probe well (Source Pin well); 29. a second probe well (Gate Pin well); 30. a wafer; 31. wafer chucks (Chuck); 32. a third seal ring; 33. a first seal ring; 34. a probe set module (PogoTower); 35. a test machine; 36. positioning a mask; 37. a third locating pin; 38. and a reinforcing support plate.

Detailed Description

Embodiments of the present application will be described in detail below with reference to the accompanying drawings.

Other advantages and effects of the present application will become apparent to those skilled in the art from the following disclosure, which describes the embodiments of the present application with reference to specific examples. It will be apparent that the described embodiments are only some, but not all, embodiments of the application. The application may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present application. It should be noted that the following embodiments and features in the embodiments may be combined with each other without conflict. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.

It is noted that various aspects of the embodiments are described below within the scope of the following claims. It should be apparent that the aspects described herein may be embodied in a wide variety of forms and that any specific structure and/or function described herein is merely illustrative. Based on the present disclosure, one skilled in the art will appreciate that one aspect described herein may be implemented independently of any other aspect, and that two or more of these aspects may be combined in various ways. For example, apparatus may be implemented and/or methods practiced using any number and aspects set forth herein. In addition, such apparatus may be implemented and/or such methods practiced using other structure and/or functionality in addition to one or more of the aspects set forth herein.

It should also be noted that the illustrations provided in the following embodiments merely illustrate the basic concept of the present application by way of illustration, and only the components related to the present application are shown in the drawings and are not drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of the components in actual implementation may be arbitrarily changed, and the layout of the components may be more complicated.

In addition, in the following description, specific details are provided in order to provide a thorough understanding of the examples. However, it will be understood by those skilled in the art that the present invention may be practiced without these specific details.

Chip burn-in testing generally involves multiple aspects such as electrical, temperature, humidity, vibration, etc., and simulates a long-term high-load operating environment by simulating the excitation of an analog circuit and the inspection of on-line functions, and the simulation test of a solid environment such as continuously changing temperature, humidity, vibration, etc., to comprehensively detect and evaluate the chip.

Therefore, chip burn-in testing plays a very important role in chip design and manufacturing processes. Specifically, on one hand, defects and problems in chip design and manufacture can be found and solved early through chip burn-in test, and the quality and reliability of chip design and manufacture are improved; on the other hand, the chip aging test can also detect the service life and reliability of the chip, and provides an important reference basis for the design, production and maintenance of products.

However, the conventional probe card is only used as a probe card for testing the electrical performance of a wafer, and cannot perform burn-in test on the whole wafer, particularly, 1TD burn-in test on a power semiconductor SiC wafer, so that the conventional solution only performs the chip burn-in test after the chip is cut or packaged, and therefore, the design and production defects of the chip cannot be exposed in the early test as soon as possible and can only be found out in the subsequent test environment, and therefore, the test and production efficiency of the chip are very low, the cost is very high, and the yield is low.

Therefore, it is required to complete the burn-in test at the front end (wafer test link) early so as to fully discover and expose defects in chip design and production and improve the production yield of chips.

Although the 1TD solution can test all chips on the whole wafer simultaneously, qualified chips are detected and screened out and are packaged independently, so that the yield and the chip production efficiency are improved, the chip packaging cost is reduced, and the like. However, the 1TD solution cannot perform burn-in test at the early stage of the wafer test because of the lack of a probe card for burn-in test, especially for power semiconductor wafers (such as SiC, IGBT, etc.), so that wafer defects cannot be exposed at the early stage through the burn-in test.

Based on this, the embodiment of the present specification proposes a new design concept of an aging test probe card:

as shown in fig. 1 to 2, the probe card solution proposed by the present application is significantly different from a general probe card in the following aspects:

On the one hand, the area for butting the probe card with the wafer to be tested is arranged in the central area of the probe card, and when the structure of the probe card is designed, a circular annular split-area design structure is adopted. The central region may be the region at the center of the entire probe card, or may be a region slightly off-center, and is not limited thereto.

In practice, the probe card structure is flattened by layering the layers that make up the probe card, based on the generally circular shape of the wafer, and then stacking the layers in a circular fashion over the central docking area.

As shown in fig. 1 and 2, the probe card structure is layered into structural layers such as a mounting plate 11, a PCB board 10, a ceramic substrate 21, and a fixing ring 14, wherein the mounting plate 11 is used as a main structure of the probe card, a gas inlet and gas outlet related channel (may be referred to as a gas channel, a port for connecting a gas port, etc. without limitation) is provided in the middle of the mounting plate 11, the PCB board 10 is stacked on the mounting plate 11 through a first sealing ring 33, the fixing ring (FixRing) 14 is stacked on the PCB board 10 through a second sealing ring 20, the PCB board 10 is designed with a gas inlet notch 24, a gas outlet notch 12, and the fixing ring 14 surrounds the periphery of the ceramic substrate 21 with a certain gap distance, so that when the PCB board 10 is covered on the mounting plate 11, and a wafer chuck 31 carrying a wafer 30 to be tested is stacked on the fixing ring 14 through a third sealing ring 32, the gas channel of the mounting plate 11 can pass through the notch of the PCB board 10 first, the gaps between the ceramic substrate 21 and the fixing ring 14, the gaps existing after the wafer is contacted with the probes, and the like are communicated together to form a sealed airflow cavity, namely a sealed cavity for airflow is formed in the butt joint area of the probe card and the wafer, the sealed cavity can provide a good airtight environment for the wafer in the aging test, for example, the wafer is protected by protective gas (such as inert gas) when the air port is inflated to the sealed cavity, the isolation protection is effectively realized, the safety, the reliability and the like of the wafer in the test are ensured, for example, under the inflation of the protective gas, the air in the cavity can be discharged, the phenomena of striking fire caused by the breakdown of the air in the aging test are avoided, the wafer is not easy to receive pollution and the like under the protection of the protective gas, therefore, a probe card structure capable of providing a closed cavity for a wafer is important for burn-in testing of the wafer.

Therefore, the needle card wraps the wafer in the sealed testing cavity, the testing cavity is connected with the air inlet interface and the air outlet interface, and inert gas can be filled in the whole cavity through air inlet of the air inlet interface, so that the wafer in the aging test is well protected.

In terms of the type selection and the mounting structure of the probes, in view of the probe card for general electrical performance test, although the vertical probes can be selected, the vertical probes are usually welded on the ceramic substrate, so that the electrical connection from the probes to the PCB is realized by the electrical connection between the ceramic substrate and the PCB, and the electrical connection between the ceramic substrate and the PCB is realized by the electrical connection of the probes, and the like, the problems of unsafe and unreliable performance and the like possibly exist in long-term aging test, so that the vertical spring probes are selected, although the ceramic substrate is still used for realizing the mounting of the probes, the probes are not welded on the ceramic substrate any more (namely, the probes use a circuit on the ceramic substrate), but the probes are limited by the ceramic substrate based on the self-elasticity characteristics of the probes, after the probes are embedded in pinholes of the ceramic substrate, the probes are directly contacted with Pad (which can be called contacts, pads and the like) on the PCB, and the Pad on the wafer can be directly contacted with the other ends of the probes, so that the elastic force of the probes can be utilized, and the contact performance of the probes with the PCB and the wafer respectively can be ensured, and the good aging performance of the probes can still be realized in long-term design; in addition, the spring probe is directly contacted with the PCB board by the structural design, and the replacement, the maintenance and the like of the probe are very convenient.

On the basis of the structural design of the first aspect and the second aspect, the structure of the needle card is simplified, the assembly of the needle card is facilitated, the PCB board can be conveniently subjected to routing, circuit equal-length design and the like, and the testing performance is further guaranteed. This is because: the number of probes of the probe card is very large, such as a 6 inch SiC power semiconductor wafer, and hundreds or even thousands of chips (Die) are designed, so that even if each chip is only connected with a gate and a source, thousands of probes are still needed, and the PCB board is the electrical signal of the probes and must pass through the ground, so that the PCB board is required to pass through the electrical signals. Therefore, if the probe card structural design can help the signal routing of the PCB board, such structural improvement is also very critical and important in realizing the burn-in probe.

The following describes the technical solutions provided by the embodiments of the present application with reference to fig. 1 to 5.

The semiconductor wafer burn-in test probe card provided in the embodiments of the present disclosure may include: mounting plate 11, PCB board 10, ceramic substrate 21, retaining ring 14, spring probe 13.

The mounting board 11 is used as a main structure of the probe card, and is a stress and support part of the whole structure of the probe card, so that corresponding steps (such as a concave step illustrated in fig. 1) can be respectively arranged at positions where an air inlet interface (such as an air inlet connector 1 illustrated in fig. 2) and an air outlet interface (such as an air outlet connector 2 illustrated in fig. 2) are mounted, and the surface of the step is lower than that of the mounting board 11, so that after the PCB board 10 is covered, an air flow channel is formed by using the step.

The PCB 10 is arranged on the mounting plate, the PCB 10 is provided with an air inlet notch 14 and an air outlet notch 12 penetrating the PCB, a first sealing ring 33 is arranged between the PCB 10 and the mounting plate 11, and the PCB 10 is covered above the steps so that an air inlet channel is formed from the air inlet interface to the air inlet notch of the PCB through the corresponding steps of the mounting plate 11, and an air outlet channel is formed from the air outlet notch of the PCB 10 to the air outlet interface through the corresponding steps of the mounting plate 11. Wherein the inlet and outlet channels may be collectively referred to as an air flow channel 27 as illustrated in fig. 1.

The ceramic substrate 21 is fixedly mounted on the PCB board 10 and the ceramic substrate 21 is provided with a number of pinholes, which can be used for providing spring probes. Pinholes may be correspondingly provided in accordance with test points (pads) of the die on the wafer, such that the pinholes are utilized to define probe locations so that the probes can precisely correspond to the wafer pads. For example, when performing burn-in test on chips on a power wafer, since each chip needs at least a probe to be electrically connected to a Source and a Gate, and usually one probe to be connected to one Gate, and two probes to be connected to one Source, a corresponding first probe hole 28 (Source Pin hole) and a corresponding second probe hole 29 (Gate Pin hole) may be provided on the ceramic substrate, respectively.

The spring probes 13 are disposed in pinholes of the ceramic substrate 21, and the spring probes 13 are directly electrically connected with the PCB board 10, and tips of the spring probes are higher than the surface of the ceramic substrate 21 so as to make electrical contact with the wafer under test. As described above, the spring probe is selected, and the spring characteristic of the spring probe is utilized to maintain the consistent characteristic of the probe in the burn-in test, namely, on one hand, the probe is not welded on the ceramic substrate but is arranged in the pinhole, and on the other hand, the probe is not directly electrically connected with the PCB by means of the electrical connection between the ceramic substrate and the PCB, and the contact with the wafer is realized with high precision by limiting the offset condition of the probe in the transverse direction by utilizing the pinhole.

The fixed ring 14 is mounted on the PCB 10 and surrounds the periphery of the ceramic substrate 21 with a preset gap, wherein a second sealing ring 20 is disposed between the fixed ring 14 and the PCB 10, and the preset gap between the fixed ring 14 and the ceramic substrate 21 is correspondingly communicated with the air inlet channel and the air outlet channel.

In practice, because a gap exists between the fixing ring 14 and the ceramic substrate 21, and the probe in the ceramic substrate 21 is slightly higher than the substrate surface to contact with the wafer, at this time, the gap between the wafer and the ceramic substrate, and the gap between the fixing ring and the ceramic substrate form a through air flow channel together with the air inlet channel and the air outlet channel, so when the wafer chuck 31 carrying the wafer 30 is in sealed connection with the fixing ring 14 through the third sealing ring 32, the tip at one end of the spring probe 13 is in electrical contact with the wafer 30 to be subjected to burn-in test, and the tip at the other end of the spring probe 13 is in electrical contact with the PCB board, and the through between the air inlet channel and the air outlet channel is realized by utilizing the gap between the wafer, the wafer chuck and the ceramic substrate, thereby providing a sealing cavity for the wafer in the burn-in test, and finally providing a protective gas for the wafer by utilizing the sealing cavity to perform the burn-in test.

It should be noted that, each layered structure may be provided with a groove for embedding the sealing ring (such as the mounting board in the illustration in fig. 1 is provided with a groove), or may not be provided with a related groove (such as the PCB in the illustration in fig. 1 is not provided with a groove), and the sealing connection is realized by pressing the sealing ring by means of each layered structure. In addition, the structure of pressing the seal rings between the layers as illustrated in fig. 1 is one implementation example, and should not be taken as a sole limitation.

In summary, by improving the structure of the probe card, the structure of the probe card can provide a stable, reliable and safe test environment for the wafer in the burn-in test, and the performance of the probe card can also keep consistency in the burn-in test, so that the safe and reliable probe card is provided for the wafer to develop the early burn-in test.

In some embodiments, the wafer needs to be subjected to a long-time high-temperature, high-pressure, high-voltage and other test environments, so that the design requirement of the electric leakage index under the high-temperature and high-pressure test is further considered, and the electric leakage performance is further improved.

In some examples, leakage performance of the probe card is improved by design.

For example, a plurality of first anti-leakage notch 25 and second anti-leakage notch 26 are further arranged on the mounting plate 11, and a layer of anti-leakage isolation plate 4 is additionally arranged between the mounting plate 11 and the PCB 10, wherein the anti-leakage isolation plate 4 can cover the first anti-leakage notch 25 and the second anti-leakage notch 26, and the leakage characteristic of the PCB can be further reduced through the anti-leakage notch and the isolation plate.

For example, the anti-leakage isolation board 4 is locked between the mounting board 11 and the PCB board 10 by non-metal screws (Peek), and by the connection mode of the non-metal screws, the strength of the PCB board can be supported, and meanwhile, the anti-leakage effect can be achieved.

For example, the leakage current index in the PCB board design index is designed as follows: less than or equal to 1pA@20V, 2000V at the temperature of 100pA@200℃. In the implementation, a high-voltage-resistant material can be selected on the PCB laminated material, the requirement of the spacing between the wires is maintained, and the PCB can achieve the above-mentioned required leakage index.

In some examples, the leakage performance of the probe card is improved by the selection of the sheet material.

For example, the base material of the anti-creeping separator 4 is selected from a base material having one or more of the following characteristics: the volume resistivity is more than or equal to 1.2 multiplied by 10 ¹⁰ M omega cm, and the relative leakage index is more than or equal to 250V.

In conclusion, through the improvement means such as add the division board, and select material, can both further promote the electric leakage performance of probe card for probe card electric leakage is very little, is fit for ageing test more.

In some embodiments, the mounting board 11 is used as the probe card main Structure (STIFFENER) in more time, so a layer of reinforcing support structure can be additionally arranged between the mounting board 11 and the PCB board 10, so that the PCB board is supported by the support structure, the mounting of the PCB board is more stable, and the PCB board can maintain consistency in the whole burn-in test.

In practice, a layer of reinforcing support plate (Backer) 38 is additionally arranged between the mounting plate 11 and the PCB 10, and an air inlet runner and an air outlet runner are correspondingly reserved at two sides of the reinforcing support plate 38, and the air inlet runner and the air outlet runner are correspondingly arranged at an air inlet interface and an air outlet interface, so that gas flows through the air inlet runner from the air inlet interface, then enters the air inlet channel, and the gas flows through the air outlet runner from the air outlet channel to the air outlet interface. It should be noted that, if the sealing requirement between the mounting board 11 and the reinforcing support board 38 is not required, the first sealing ring 33 may be disposed between the reinforcing support board and the PCB board, and the position of the first sealing ring 33 may also be set according to the actual sealing connection requirement, which is not limited herein.

In one example, when only the reinforcing support plate 38 is added without adding the anti-creeping isolation plate 4, the reinforcing support plate 38 may be disposed between the mounting plate 11 and the PCB board 10.

In one example, when the reinforcing support plate 38 and the anti-creeping isolation plate 4 are added at the same time, the anti-creeping isolation plate 4 may be provided to support the reinforcing support plate 38 and the PCB board 10, and the reinforcing support plate 38 is connected to the mounting plate 11.

In the foregoing examples, when corresponding layered structures, such as a reinforcing support plate, an anti-leakage isolation plate, etc., are added, in order to achieve connection between the layered structures and maintain the sealing performance of the sealing cavity, and accordingly, when the layered structures are connected to other structures, sealing connection is also required by using sealing rings, and specifically, the fourth sealing ring 7, the fifth sealing ring 9, etc. illustrated in fig. 2 may be disposed between the corresponding layered structures. For example, sealing connection is performed between the reinforcing support plate and the mounting plate (or the PCB board or the anti-leakage isolation plate) by using sealing rings, wherein the fourth sealing ring 7, the fifth sealing ring 9 and the like can be selected according to actual sealing connection, and the invention is not limited herein.

In some examples, for high-precision installation requirements, the high-precision installation between the layered structures can be further improved by using positioning pins with very high design precision, for example, the reinforcing support plate performs high-precision positioning installation with the mounting plate 11 through the first positioning pins 5, the mounting plate 11 performs high-precision positioning installation with the PCB board based on the second positioning pins 8, and the like, in addition, the installation precision can be improved by using high-precision positioning pins between other layered structures, and the description is not expanded one by one.

In some embodiments, by providing specific ventilation holes in both the PCB 10 and the ceramic substrate 21, the ventilation holes can be used for effective inflation and deflation.

Referring to fig. 1, a schematic cross-sectional view is shown, which may be provided with air inlet holes 23 on the PCB 10 and the ceramic substrate 21, where the air inlet holes 23 are communicated with the air flow channel, for example, the air inlet holes 23 are arranged above the step, so that when part of air flows through the air inlet channel and/or the air inlet channel, the air directly passes through the air inlet holes 23, that is, passes through the PCB and the ceramic substrate to reach one side of the wafer to be tested, and the purpose of designing the air holes can be further ensured: filling the inert gas into the sealed cavity where the wafer is located, wherein the gas in the sealed cavity enters from one side of the cavity and flows out from the other side of the cavity, the original air in the sealed cavity is completely discharged, and the inert gas reaches the contact position of the probe and the wafer.

Further, the air inlet holes 23 can be arranged between the pinholes, namely, the air holes are arranged between the pinholes, so that part of the air passing through the air inlet holes 23 is directly dispersed to the contact surface of the wafer and the probe tip, the contact surface is well wrapped, and the contact performance in the aging test is further ensured.

In some embodiments, the electrical contact performance and the elastic performance of the spring probe are further improved by optimizing the spring probes in different structural forms, so that the probes can maintain good consistency in long-term aging tests.

In one example, the spring probe is a double-ended double-acting spring probe (also referred to as double-ended double-acting burn-in PogoPin), and the pads of the double-ended double-acting spring probe, which are respectively contacted with the wafer, are connected in conduction with the pads of the PCB board. Therefore, by using the double-headed double-acting spring needle, when the wafer and the probe are reliably contacted, the probe can keep good contact performance with the PCB under the action of the probe stroke, and the consistency of the probe in the aging test is further improved.

In some embodiments, the consistency of the probe in the aging test can be improved by selecting a mode, improving a design and the like aiming at the double-head double-acting spring needle.

For example, the spring Force (Force) of a single spring probe is designed to be 12+ -2 gf, so that all probes of the probe card have good uniformity under the stroke.

For example, the tip of the probe is designed in an improved manner, that is, the spring probe tip for contacting with the wafer is arranged in a hemispherical shape, and the size of the rounded corner of the hemispherical needle can be set according to the size of the wafer Pad, so that the indentation size of the tip to the wafer Pad can be controlled conveniently, and the electrical contact between the tip and the wafer Pad can be maintained. It should be noted that the needle tip contacting the PCB board may be designed with similar improvements, and is not developed here.

For example, the spring probe is a probe manufactured by processing a stainless steel material (such as SUS631, which has a temperature resistance of 260 ℃ or higher) with a temperature resistance, and the stainless steel material is very suitable for manufacturing an aging test probe due to the high temperature resistance.

For example, the outer surface of the spring probe is coated with a plating layer with a preset thickness so that the contact resistance of the spring probe meets the preset consistency requirement. The thickness of the coating and the contact resistance may be determined according to the design requirements of the electrical properties of the specific probe, and are not limited herein.

For example, the initial planarity of the probe is set to improve the uniformity of the probe under the action of the stroke. Specifically, after the spring probes are mounted on the ceramic substrate, when the probes are not contacted by the wafer, the flatness of the needle tip is designed to be less than or equal to 50 mu m, so that all the probes have very high initial flatness, and the consistency of the probes when contacting the wafer is ensured.

For example, the flatness of the tip of the spring probe controlled by the PCB is less than or equal to 50 μm, namely, the initial flatness with very high precision is provided for the probe through the PCB, which is also beneficial to the consistency of the contact performance of the probe.

Therefore, through the targeted improved design of the probes, the probe card carries out high-precision design and processing on the contact point flatness of the surface probes in the PCB design stage, so that the flatness consistency of the needle points of the probe card after assembly is ensured to be very high, for example, the flatness of all the probes in the probe card is less than 100 mu m, and therefore, when the probe card and a wafer contact test are carried out, all the probes can have good contact performance, and the contact safety and reliability are ensured.

In some embodiments, the ceramic substrate is designed with corresponding improvements, which also helps to promote consistency of the probe card in burn-in testing.

For example, a plurality of press-contact surfaces 22, such as 8-16 press-contact surfaces 22, are provided on the ceramic substrate 21, and some or all of the press-contact surfaces are located between the fixing ring 14 and the PCB 10, so that the ceramic substrate can be locked with the PCB based on the press-contact surfaces, and the ceramic substrate can be uniformly stressed, is not easy to deform or crack, and is ensured to have very good consistent performance in the whole burn-in test.

For example, by selecting the material of the ceramic substrate, performance of the ceramic substrate in the burn-in test can be improved. In particular, the ceramic substrate may preferably be a ceramic sheet made of a precision machined ceramic material, wherein the ceramic material meets one or more of the following parameter requirements: the thermal expansion coefficient is 4 multiplied by 10 ^-6/K~5.8×10^-6/K, and the volume resistivity is more than or equal to 10 ¹⁴ (omega cm). Therefore, materials with good performance and ceramic plates produced by precise machining are selected, the performance of the materials in an aging environment is more stable, and the overall performance consistency of the probe card in an aging test environment is further improved.

For example, the flatness of the ceramic substrate is designed to be very high in precision, such as ensuring flatness less than or equal to 20 μm in precision machining, and the performance of the probe card in different ageing environments can be kept to be better consistent.

In some embodiments, with respect to the traditional cable connection manner between the probe card and the testing machine (or the testing machine), related improvement design can be performed, so that performance consistency of the connection manner in the burn-in test is further improved, and the probe card is more suitable for the burn-in test occasion.

Whereas the mounting board 11 is the main structure of the probe card, and the layered and stacked structure realizes a flattened probe card, conventional cable electrical connection can be replaced by a probe group module (PogoTower).

Specifically, a plurality of probe set modules 34 are additionally arranged on the semiconductor wafer burn-in test probe card, and corresponding through holes are formed in the mounting board 11, so that the probe set modules 34 can be hidden in the through holes, one ends of the probe set modules 34 are electrically connected with the PCB board 10, and the other ends of the probe set modules 34 are directly electrically connected with relevant interfaces of the test machine. It should be noted that, the probe set module 34 may be used as an interface form of the electrical connection, specifically, may be designed according to the electrical connection between the PCB board and the test machine, and may be implemented using a related interface module, a connector, or the like, and the specific form is not limited.

In some embodiments, the isometric design is realized for the routing of the PCB, so the probe set modules 34 can be uniformly distributed around the PCB in a circular ring structure, simplifying the routing design and routing isometric design of the PCB, thereby facilitating the consistent performance of the PCB in burn-in testing.

Furthermore, the wiring design precision of the PCB can be improved, for example, the error control of the wiring length is not more than 10mil, so that the long-term consistency of the PCB in the aging test is ensured, and the wiring design under the precision is also beneficial to the layout of more wirings of the PCB.

In some embodiments, the improvement of the assembly process is also helpful to improve the overall performance of the probe card, further improving consistency in burn-in testing.

The positioning mask plate structure layer is additionally arranged in the probe card, and because the wafer is manufactured based on the mask plate, but no relevant reference exists between the wafer and the needle card, the mask plate positioning structure is introduced into the aging test probe card, so that the accurate position of the ceramic substrate (Housing) is adjusted through the accurate positioning process of positioning the mask plate and the fixing ring (FixRing).

In practice, since the chip test Pad in the pinhole mounting wafer of the ceramic substrate is designed with high precision, and the wafer is sometimes manufactured according to the mask, and the design precision of the mask is the highest, positioning of the mask 36, the wafer chuck 31, the fixing ring 14 and other components can be completed according to preset precision in the assembly process, so that the alignment of the probes of the ceramic substrate to the wafer is ensured, and thus, the consistency in long-term aging test can be maintained.

In some examples, the locking may be performed after the high precision positioning is accomplished using the dowel pins. For example, by using the third positioning pins 37, high-precision positioning and mounting between the positioning mask 36 and the wafer chuck 31, the fixing ring 14, and the like are respectively realized, so that the position precision of the ceramic substrate can be kept to meet the preset precision requirement.

Specifically, corresponding positioning matching parts can be arranged on the positioning mask 36 and the fixed ring 14, and then the positioning mask and the fixed ring can be positioned according to preset precision through high-precision positioning between the positioning pins 37 and the positioning matching parts.

It should be noted that, after positioning is completed, the locking may be achieved by using a corresponding screw set. For example, after the ceramic substrate is adjusted, the locking is completed by the third screw set 16 and the fourth screw set 17. The lock may be a pressure-bonding surface of the ceramic substrate pressed by the fixing ring 14, or may be another part of the ceramic substrate pressed by the fixing ring.

In addition, the PCB 10 may be locked to the mounting board 11 by the second screw set 15, and the reinforcing support plate 38 may be locked to the mounting board 11 by the first screw set 3, so that other layers may be locked accordingly, which is not described.

By high-precision locking, the ceramic holding position precision deviation is not more than +/-30 mu m, namely the eccentricity of the wafer to be detected is not more than 30 mu m.

In some embodiments, the probe card of the application is based on the fact that the spring probes are directly conducted with the PCB, and then the electric signals are connected to the testing circuit of the tester through the amplifying circuit, especially in the application of power semiconductor wafers (such as SiC, IGBT and the like), the number of testing pads of chips on the wafer is small, the area is large, the number of the spring probes required by a single chip is relatively small, the center distance between the probes is large (generally larger than 2 mm), and the probe card is suitable for the vertical spring probes, so that the distance between the spring pins is controlled to be 1.5-4mm according to the testing Pad characteristics of the chips, not only can the testing of all IC chips of the power semiconductor wafers be met, but also electric leakage can be effectively prevented, the compression stroke of the spring pins is large, and the spring pins are convenient to replace.

Therefore, the probe card can support 6 inches of power semiconductor wafers and also support more than 1024 IC chips. For each Die on the wafer, a maximum of 3 PogoPin connections are supported, of which 1 connects Gate and the rest connects Source, and the number of probes is only three thousand.

In some embodiments, in view of the very large number of probes on a probe card, a protective cover may be added to provide protection for the probe card, as the cover protective cover need only be removed.

Referring to fig. 2, a protective cover 19 is added, wherein the protective cover 19 is detachably connected to the fixing ring 14, so that the probe card is protected by installing the protective cover when the probe card is in a non-use state.

Further, the protective cover plate 19 and the fixed ring 14 are detachably connected through the hand screw 18, so that the cover plate is very convenient to detach.

Based on the same inventive concept, the application also provides a semiconductor wafer burn-in test system for providing reference for performing burn-in test on a wafer.

The semiconductor wafer burn-in test system includes: a probe card and a test machine 35, wherein the probe card is electrically connected with the test machine 35, and the probe card is a semiconductor wafer burn-in test probe card as described in any one of examples in the specification.

It should be noted that fig. 5 illustrates one example of a system, i.e. a flattened probe card, which is based on a probe set module directly connected to a test machine to perform a burn-in test on a wafer, but should not be understood as the only example.

In this specification, identical and similar parts of the embodiments are referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, the description is relatively simple for the embodiments described later, and reference is made to the description of the foregoing embodiments for relevant points.

The foregoing is merely illustrative of the present application, and the present application is not limited thereto, and any changes or substitutions easily contemplated by those skilled in the art within the scope of the present application should be included in the present application. Therefore, the protection scope of the application is subject to the protection scope of the claims.

Claims

1. A semiconductor wafer burn-in probe card, comprising:

2. The semiconductor wafer burn-in probe card of claim 1, further comprising an anti-creep spacer, wherein the mounting plate is further provided with a plurality of first anti-creep slots and second anti-creep slots, wherein the anti-creep spacer is disposed between the mounting plate and the PCB, and wherein the anti-creep spacer covers the first anti-creep slots and the second anti-creep slots.

3. The semiconductor wafer burn-in probe card of claim 2 wherein the substrate of the anti-creep spacer is a substrate material having one or more of the following characteristics: the volume resistivity is more than or equal to 1.2 multiplied by 10 ¹⁰ M omega cm, and the relative leakage index is more than or equal to 250V;

and/or the leakage current of the PCB respectively meets the following different conditions: less than or equal to 1pA@20V, 2000V at the temperature of 100pA@200 ℃;

and/or the anti-leakage isolation plate is locked between the mounting plate and the PCB through a nonmetal screw so as to support the strength of the PCB and achieve anti-leakage.

4. The semiconductor wafer burn-in probe card of claim 1, further comprising a reinforcing support plate, wherein the reinforcing support plate is provided with an inlet flow channel and an outlet flow channel on opposite sides thereof, the inlet flow channel and the outlet flow channel being arranged in correspondence with the inlet port and the outlet port such that gas flows from the inlet port through the inlet flow channel and then into the inlet channel, and gas flows from the outlet channel through the outlet flow channel to the outlet port.

5. The probe card according to claim 4, wherein the PCB is provided with air inlet holes, wherein the air inlet holes are located above the steps, so that part of the air enters the air inlet channel and/or the air inlet channel, and passes through the PCB and the ceramic substrate directly through the air inlet holes to reach one side of the wafer to be tested.

6. The semiconductor wafer burn-in probe card of claim 5, wherein the gas inlet vents are disposed between the pinholes such that a portion of the gas passing through the gas inlet vents is dispersed to the wafer to probe tip interface.

7. The probe card of claim 1, wherein the spring probe is a double-ended double-acting spring probe, and the two needle points of the double-ended double-acting spring probe respectively contact with the Pad of the wafer and are connected with the Pad of the PCB board in a conducting manner.

8. The semiconductor wafer burn-in probe card of claim 7, wherein the spring force of the single spring probe is 12±2gf;

And/or, the spring probe tip for contacting the wafer is arranged in a hemispherical shape, and the size of the round angle of the hemispherical needle head is set according to the size of the wafer Pad so as to control the indentation size of the probe tip to the wafer Pad, and simultaneously, the electrical contact between the probe tip and the wafer Pad is kept;

and/or the spring probe is a probe manufactured by processing a stainless steel material with super temperature resistance;

And/or the outer surface of the spring probe is coated with a plating layer according to a preset thickness so that the contact resistance of the spring probe meets a preset consistency requirement;

and/or the flatness of the needle tip of the spring probe controlled by the ceramic substrate is less than or equal to 50 μm;

And/or the planeness of the needle tip of the spring probe controlled by the PCB is less than or equal to 50 mu m.

9. The probe card for burn-in testing of semiconductor wafers according to claim 1, wherein the ceramic substrate is provided with 8-16 press-contact surfaces, and part or all of the press-contact surfaces are positioned between the fixing ring and the PCB board, so that the ceramic substrate and the PCB board are locked based on the press-contact surfaces, and the ceramic substrate is uniformly stressed and is not easy to deform or crack.

10. The semiconductor wafer burn-in probe card of claim 1 wherein the ceramic substrate is a ceramic wafer made of precision machined ceramic material, wherein the ceramic material meets one or more of the following parameter requirements: the thermal expansion coefficient is 4 multiplied by 10 ^-6/K~5.8×10^-6/K, and the volume resistivity is more than or equal to 10 ¹⁴ ohm cm;

and/or the flatness of the ceramic substrate is less than or equal to 20 μm.

11. The semiconductor wafer burn-in probe card of claim 1, further comprising a plurality of probe set modules, wherein the mounting plate is further provided with corresponding through holes, the probe set modules are disposed in the through holes, wherein one ends of the probe set modules are electrically connected to the PCB board, and the other ends of the probe set modules are electrically connected to a test machine.

12. The probe card of claim 11, wherein the plurality of probe set modules are uniformly distributed around the PCB in a circular ring configuration to facilitate routing of the PCB and equal length routing of the PCB.

13. The semiconductor wafer burn-in probe card of claim 12 wherein the trace length error of the PCB is less than or equal to 10 mils.

14. The semiconductor wafer burn-in probe card of claim 1, further comprising a positioning mask, wherein the positioning mask is configured to be positioned with a predetermined precision with respect to the retaining ring such that the positional precision of the ceramic substrate meets the predetermined precision requirement.

15. The probe card for burn-in testing of semiconductor wafers according to claim 14, wherein the ceramic substrate is locked to the PCB by a first screw set, the fixing ring is locked to the PCB by a second screw set, and the eccentric accuracy between the ceramic substrate and the wafer to be tested is less than or equal to 30 μm;

and/or the positioning mask plate and the fixing ring are provided with corresponding positioning matching parts, and positioning is finished between the positioning mask plate and the fixing ring according to preset precision through positioning between the positioning pins and the positioning matching parts.

16. The semiconductor wafer burn-in probe card of claim 1 wherein the center-to-center spacing between spring probes is set to 1.5-4mm to meet testing of all dies of a power semiconductor wafer.

17. The semiconductor wafer burn-in probe card of claim 16 wherein the power semiconductor wafer is a 6 inch SiC wafer.

18. The semiconductor wafer burn-in probe card of claim 1, further comprising a protective cover plate removably coupled to the retaining ring for protection by mounting the protective cover plate when the probe card is not in use.

19. The semiconductor wafer burn-in probe card of claim 18, wherein said protective cover plate and retaining ring are removably coupled by hand screws.

20. A semiconductor wafer burn-in system, comprising: the probe card is electrically connected with the testing machine, and an air inlet interface and an air outlet interface of the probe card are respectively connected with the air inlet and outlet equipment through an air channel; wherein the probe card is a semiconductor wafer burn-in probe card according to any one of claims 1-19.