CN118301973A - Display substrate and display device - Google Patents

Abstract

The present application provides a display substrate and a display device, the display substrate comprising: a substrate layer, the substrate layer comprising a display area, an opening area, and an isolation area arranged between the display area and the opening area; a first gate metal layer, a source-drain metal layer, and an isolation column arranged on one side of the substrate layer and stacked in sequence along the thickness direction of the display substrate; wherein the first gate metal layer, the source-drain metal layer, and the isolation column are located in the isolation area; a light-emitting layer, the light-emitting layer comprising a first part and a second part, the first part being arranged on a side of the isolation column away from the substrate layer, the second part being arranged on a side of the source-drain metal layer away from the substrate layer, and in a first direction, the first part and the second part are discontinuously arranged at both ends of the isolation column, and the first direction is perpendicular to the thickness direction of the display substrate. The technical solution of the present application can improve the black spot phenomenon in the display area around the opening area of the display substrate.

Description

Display substrate and display device

Technical Field

The present application relates to the technical field of display devices, and more particularly, to a display substrate and a display apparatus.

Background

Along with increasing requirements of people on high-screen duty ratio of electronic equipment, current intelligent terminal products are developing towards full-screen display technology, and making holes in a display area as light-transmitting areas of functional elements such as cameras and fingerprint identification is a mainstream trend of the full-screen display technology at present. However, the display substrate is likely to suffer from black spots in the display area around the opening area.

As the customized product shape of the display substrate varies, and in order to meet the demands of high-end customers, the bezel needs to be as small as possible, resulting in that the data signal lines or other longitudinal signal lines of part of the pixels have to be routed across the display area (Fanout in AA, FIAA), that is, in the flat layer of the display substrate. The FIAA technology can cause the height of the flat layer of the display area to be increased, increase the step difference between the display area and the open area, aggravate the bad phenomenon of black spots of the display area around the open area, and influence the user experience.

Disclosure of Invention

In view of the above, embodiments of the present application provide a display substrate and a display device, which can improve the black spot defect of the display area around the opening area of the display substrate.

In a first aspect, there is provided a display substrate including: the substrate layer comprises a display area, an open pore area and an isolation area arranged between the display area and the open pore area; the first gate metal layer, the source drain metal layer and the isolation column are sequentially stacked along the thickness direction of the display substrate; the first gate metal layer, the source drain metal layer and the isolation column are positioned in the isolation region; the light-emitting layer comprises a first part and a second part, wherein the first part is arranged on one side, far away from the substrate layer, of the isolation column, the second part is arranged on one side, far away from the substrate layer, of the source drain metal layer, and the first part and the second part are discontinuously arranged at two ends of the isolation column in a first direction, and the first direction is perpendicular to the thickness direction of the display substrate.

With reference to the first aspect, in certain implementations of the first aspect, the display substrate includes: a plurality of isolation columns arranged at intervals along the first direction; a plurality of first gate metal layers arranged at intervals along a first direction; the isolation columns and the first gate metal layers are in one-to-one correspondence.

With reference to the first aspect, in some implementations of the first aspect, the source-drain metal layer covers a side of the first gate metal layer away from the substrate layer and a side of the first gate metal layer, and a direction in which the side of the first gate metal layer is located intersects the first direction.

With reference to the first aspect, in some implementations of the first aspect, two ends of the first gate metal layer in the first direction respectively exceed two ends of the isolation pillar in the first direction.

With reference to the first aspect, in certain implementations of the first aspect, a spacing between an end of the first gate metal layer in the first direction and an end of the isolation pillar in the first direction is 1 μm or more.

With reference to the first aspect, in certain implementations of the first aspect, the dimension of the isolation column in the first direction ranges from 5 μm to 7 μm.

With reference to the first aspect, in some implementations of the first aspect, the display substrate further includes a second gate metal layer and a third gate metal layer, where the second gate metal layer and the third gate metal layer are sequentially stacked between the substrate layer and the first gate metal layer along a thickness direction of the display substrate, the second gate metal layer is continuously disposed in the first direction, and the third gate metal layer is continuously disposed in the first direction.

With reference to the first aspect, in certain implementations of the first aspect, the display substrate includes a first isolation pillar region and a second isolation pillar region arranged along the first direction, the first isolation pillar region including at least two isolation pillars, the second isolation pillar region including at least two isolation pillars.

With reference to the first aspect, in some implementations of the first aspect, the display substrate further includes a barrier pillar disposed between the first isolation pillar region and the second isolation pillar region, where the barrier pillar includes a first planar layer, a second planar layer, a third planar layer, and a dielectric film layer sequentially disposed along a thickness direction of the display substrate.

With reference to the first aspect, in certain implementations of the first aspect, the barrier column further includes a first insulating layer disposed on a side of the dielectric film layer remote from the substrate layer.

With reference to the first aspect, in certain implementations of the first aspect, a second insulating layer is disposed between two adjacent isolation pillars in the second isolation pillar region.

In a second aspect, a display device is provided, including a display substrate in any possible implementation manner of the first aspect.

Drawings

FIG. 1 is a schematic block diagram of a display substrate according to an embodiment of the present application;

FIG. 2 is a schematic block diagram of a substrate layer according to an embodiment of the present application;

FIG. 3 is an enlarged view of portion A of FIG. 1;

Fig. 4 is a schematic flow chart of a preparation method of a display substrate according to an embodiment of the application.

Detailed Description

The technical solutions in the embodiments of the present application will be described below with reference to the accompanying drawings. It will be apparent that the described embodiments are only some, but not all, embodiments of the application.

The technical solutions in the embodiments of the present application will be described below with reference to the accompanying drawings in the embodiments of the present application. Wherein, in the description of the embodiments of the present application, unless otherwise indicated, "/" means or, for example, a/B may represent a or B; "and/or" herein is merely an association relationship describing an association object, and means that three relationships may exist, for example, a and/or B may mean: a exists alone, A and B exist together, and B exists alone.

The terms "first" and "second" are used below for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In addition, in the description of the present embodiment, unless otherwise specified, the meaning of "a plurality" is two or more.

Reference in the specification to "one embodiment" or "some embodiments" or the like means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," and the like in the specification are not necessarily all referring to the same embodiment, but mean "one or more but not all embodiments" unless expressly specified otherwise. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless expressly specified otherwise.

Along with increasing requirements of people on high-screen duty ratio of electronic equipment, current intelligent terminal products are developing towards full-screen display technology, and making holes in a display area as light-transmitting areas of functional elements such as cameras and fingerprint identification is a mainstream trend of the full-screen display technology at present. However, the display substrate is likely to suffer from black spots in the display area around the opening area.

Since the customized product shape of the display substrate varies and in order to meet the needs of high-end customers, the frame needs to be as small as possible, resulting in that the data signal lines or other longitudinal signal lines of part of the pixels have to be routed across the display area, i.e. in the flat layer of the display substrate, this display technology is generally called FIAA technology. The FIAA technique results in an increase in the height of the flat layer of the display region, increases the level difference between the display region and the open area, exacerbates the black spot defect (Growing Dark Spot at HIAA, GDSH) of the display region around the open area, and affects the user experience.

In view of the above, the embodiments of the present application provide a display substrate and a display device. Specifically, a first gate metal layer, a source drain metal layer and a spacer, which are sequentially stacked in the thickness direction of the display substrate, are provided in the spacer on the substrate layer side of the display substrate. In the embodiment of the application, the isolation column is raised by arranging the first gate metal layer and the source drain metal layer on one side of the substrate layer, so that the level difference between the isolation column and the flat layer of the display area is reduced, the possibility of organic glue residue around the isolation column is reduced, the possibility of the residual organic glue accelerating water vapor to erode the open pore area is reduced, and the black spot phenomenon of the display area around the open pore area of the display substrate can be improved. Meanwhile, the first part of the light-emitting layer of the display substrate is arranged on one side of the isolation column far away from the substrate layer, the second part of the light-emitting layer is arranged on one side of the source drain metal layer far away from the substrate layer, and in the first direction, the first part and the second part are discontinuously arranged at the two ends of the isolation column, namely, the electric connection of the light-emitting layer in the isolation region is isolated by the isolation column, so that the film packaging layer covered on the light-emitting layer is prevented from being corroded electrochemically, and further, the failure of the film packaging layer at the junction of the display region and the isolation region is avoided, and the black spot phenomenon of the display region around the opening region of the display substrate is improved.

Hereinafter, embodiments of the present application will be described in detail with reference to the accompanying drawings.

Fig. 1 is a schematic structural diagram of a display substrate according to an embodiment of the present application.

As shown in fig. 1, the display substrate 10 includes a substrate layer 11, isolation pillars 12 provided on one side of the substrate layer 11, a first gate metal layer 13, a source drain metal layer 14, and a light emitting layer 15.

Specifically, as shown in fig. 2, the substrate layer 11 includes a display region 111, an opening region 112, and an isolation region 113 disposed between the display region 111 and the opening region 112. The first gate metal layer 13, the source drain metal layer 14, and the isolation column 12 are disposed in the isolation region 113.

With continued reference to fig. 1, the first gate metal layer 13, the source-drain metal layer 14, and the spacer 12 are sequentially stacked in the thickness direction of the display substrate 10.

Illustratively, as shown in fig. 1, the thickness direction of the display substrate 10 is the x-direction, and the first direction is the y-direction.

It should be understood that the x-direction is only one exemplary description of the thickness direction of the display substrate 10, and does not constitute a limitation of the thickness direction of the display substrate 10 of the present application. The y-direction is only one exemplary depiction of the first direction and does not constitute a limitation of the first direction of the present application. For convenience of description, the thickness direction of the display substrate 10 is referred to as x-direction, and the first direction is referred to as y-direction.

Since the customized product shape of the display substrate 10 is varied and in order to meet the demands of high-end customers, the frame needs to be as small as possible, resulting in that the data signal lines or other longitudinal signal lines of part of the pixels must be routed across the display area 111, that is, on the flat layer of the display substrate 10, which may result in an increase in the height of the flat layer. For example, as shown in fig. 1, in the display region 111, the planarization layer 1111 includes three stacked structures, namely, a first sub-layer 1111 (a), a second sub-layer 1111 (b), and a third sub-layer 1111 (c), and the structural arrangement of the planarization layer 1111 causes an increase in the level difference between the planarization layer 1111 and the isolation pillars 12 of the isolation region 113, and an increase in the residual amount of the organic adhesive around the isolation pillars 12, so that moisture accelerates to erode the open hole region, and eventually causes a black spot defect phenomenon of the display region around the open hole region of the display substrate 10. Therefore, in the display substrate 10 provided by the embodiment of the application, the first gate metal layer 13 and the source drain metal layer 14 are arranged on one side of the substrate layer 11 to raise the isolation column 12, so as to reduce the step difference between the flat layer 1111 of the display region 111 and the isolation column 12 of the isolation region 113.

In the embodiment of the application, the first gate metal layer 13 and the source drain metal layer 14 are arranged on one side of the substrate layer 11 to raise the isolation column 12, so that the height level difference between the isolation column 12 and the flat layer 1111 of the display area 111 is reduced, the possibility of organic glue residue around the isolation column 12 is reduced, the possibility of the residual organic glue accelerating the water vapor to erode the open pore area is reduced, and the bad phenomenon of black spots in the display area around the open pore area of the display substrate 10 can be improved.

In the embodiment of the present application, the first portion 151 and the second portion 152 of the light emitting layer 15 are discontinuously disposed at both ends of the barrier ribs 12 in the y direction. Specifically, referring to fig. 3, the light emitting layer 15 includes a first portion 151 and a second portion 152, the first portion 151 is disposed on a side of the isolation pillar 12 away from the substrate layer 11, the second portion 152 is disposed on a side of the source drain metal layer 14 away from the substrate layer 11, and a height difference of the isolation pillar 12 disconnects the first portion 151 from the second portion 152 of the light emitting layer 15. The cathode electric signal transmitted from the display area 111 to the opening area 112 is interrupted in the isolation area 113, so that the leakage of K ⁺、Na⁺ plasma at the section of the polarizer is avoided from generating electrochemical reaction with the cathode and the thin film packaging layer, and further the accelerated aging of the cathode and the thin film packaging layer and the occurrence of GDSH of the display substrate 10 are reduced.

In some embodiments, as shown in fig. 1, the display substrate 10 includes a plurality of isolation pillars 12 and a plurality of first gate metal layers 13, the plurality of isolation pillars 12 are spaced apart along the y-direction, the plurality of first gate metal layers 13 are spaced apart along the y-direction, and the plurality of isolation pillars 12 and the plurality of first gate metal layers 13 are in one-to-one correspondence.

In some embodiments, as shown in fig. 1 and 3, the display substrate 10 further includes a passivation layer 21, and the passivation layer 21 is disposed on a side of the source drain metal layer 14 away from the substrate layer 11.

In some embodiments, the material of the passivation layer 21 may be SiN _x material or SiO ₂.

In some embodiments, as shown in fig. 1 and 3, the display substrate 10 further includes a second gate metal layer 16 and a third gate metal layer 17, where the second gate metal layer 16 and the third gate metal layer 17 are sequentially stacked between the substrate layer 11 and the first gate metal layer 13 along the x direction, the second gate metal layer 16 is continuously disposed in the y direction, and the third gate metal layer 17 is continuously disposed in the y direction.

In the conventional display substrate, the second gate metal layer and the third gate metal layer of the isolation region are discontinuously arranged in the y direction, and the arrangement manner is similar to that of the first gate metal layer 13 shown in fig. 1, and the second gate metal layer and the third gate metal layer are arranged at intervals in the y direction and are in one-to-one correspondence with the isolation columns 12, so that a plurality of discontinuously arranged film layers exist in the isolation region, and a smaller and deeper pit is formed between the adjacent isolation columns 12. In the embodiment of the present application, the second gate metal layer 16 and the third gate metal layer 17 are continuously disposed in the y direction, so that the isolation region 113 is raised integrally, and the step difference between the adjacent isolation pillars 12 is reduced, so that a small and deeper pit is avoided between the adjacent isolation pillars 12, and the organic glue residue is avoided.

In some embodiments, the display substrate 10 further comprises a cathode disposed on a side of the light emitting layer 15 remote from the substrate layer 11.

In some embodiments, as shown in fig. 3, a third insulating layer 22 may be disposed between the second gate metal layer 16 and the third gate metal layer 17, and the material of the third insulating layer 22 may be SiN _x.

In some embodiments, as shown in fig. 3, a fourth insulating layer 23 may be disposed between the third gate metal layer 17 and the first gate metal layer 13, and the material of the fourth insulating layer 23 may be SiN _x material and SiO ₂.

In some embodiments, the material of the first gate metal layer 13 may be metallic molybdenum.

In some embodiments, the material of the second gate metal layer 16 may be metallic molybdenum.

In some embodiments, the material of the third gate metal layer 17 may be metallic molybdenum.

In some embodiments, the source-drain metal layer 14 may be made of metal titanium and metal aluminum, and may include, for example, a first titanium layer, a first aluminum layer, and a second titanium layer (not shown) sequentially stacked along the x-direction.

In some embodiments, the material of the isolation column 12 may be metallic titanium and metallic aluminum, for example, as shown in fig. 3, may include a third titanium layer 121, a second aluminum layer 122, and a fourth titanium layer 123 sequentially stacked in the x-direction.

In the embodiment of the present application, the isolation pillar 12 is configured as a titanium-aluminum-titanium metal laminate, wherein the orthographic projection of the surface of the second aluminum layer 122 near the side of the fourth titanium layer 123 on the substrate layer 11 is located inside the orthographic projection of the surface of the second aluminum layer 122 near the side of the third titanium layer 121 on the substrate layer 11, that is, the second aluminum layer 122 has a trapezoid structure, so that when the light emitting layer 15 and the cathode are deposited, the light emitting layer 15 and the cathode are disconnected at the side wall of the second aluminum layer of the isolation pillar 12 due to the step difference.

In some embodiments, as shown in fig. 1, the source drain metal layer 14 covers a side of the first gate metal layer 13 away from the substrate layer 11 and a side of the first gate metal layer 13, and a direction in which the side of the first gate metal layer 13 is located intersects the y-direction.

Illustratively, as shown in fig. 1 and 3, the first gate metal layer 13 is a trapezoid structure.

In some embodiments, as shown in fig. 1 and 3, both ends of the first gate metal layer 13 in the y direction exceed both ends of the isolation pillar 12 in the y direction, respectively.

In the embodiment of the application, the two ends of the first gate metal layer 13 in the y direction respectively exceed the two ends of the isolation column 12 in the y direction, so that the problem that the film forming of the subsequent thin film packaging layer at the isolation column 12 is poor and the packaging effect is influenced is avoided.

In some embodiments, as shown in fig. 3, a distance Δl between an end of the first gate metal layer 13 in the y-direction and an end of the isolation pillar 12 in the y-direction is 1 μm or more.

In the embodiment of the application, by setting Δl to be greater than or equal to 1 μm, enough space is left at the two ends of the isolation column 12 in the y direction to form a step structure, so that the problem of poor film formation caused by overlarge step difference near the two ends of the isolation column 12 can be avoided when a thin film packaging layer is formed.

In some embodiments, as shown in FIG. 3, the dimension L ₁ of the spacer 12 in the y-direction can range from 5 μm to 7 μm.

In some embodiments, the isolation pillars 12 may be formed by a source/drain layer forming process of the display region 111, and the isolation pillars 12 may be prepared without adding an additional mask and process steps.

In some embodiments, as shown in fig. 1, the display substrate 10 includes first and second isolation pillar regions 1131 and 1132 arranged in the y-direction.

In the embodiment of the application, by arranging two isolation column regions, the communication between the display region 111 and the organic material in the light-emitting layer 15 of the opening region 112 is further blocked, so that the phenomenon that the display substrate 10 is GDSH is caused to influence the display effect and the service life of the display substrate 10 due to the fact that water vapor enters the display region 111 along the organic material in the light-emitting layer 15 during laser opening is prevented.

In some embodiments, the first isolation pillar region 1131 includes at least two isolation pillars 12 and the second isolation pillar region 1132 includes at least two isolation pillars 12. For example, as shown in fig. 1, the first isolation pillar region 1131 includes two isolation pillars 12, and the second isolation pillar region 1132 includes seven isolation pillars 12.

Note that the number of the isolation pillars 12 of the first isolation pillar region 1131 and the second isolation pillar region 1132 is not particularly limited, for example, the first isolation pillar region 1131 may have only one isolation pillar 12, and the second isolation pillar region 1132 may have only one isolation pillar 12 or may have at least two isolation pillars 12; the first isolation pillar region 1131 may have at least two isolation pillars 12, and the second isolation pillar region 1132 may have only one isolation pillar 12 or may have at least two isolation pillars 12. The number of the isolation pillars 12 of the first isolation pillar region 1131 may be greater than, less than, or equal to the number of the isolation pillars 12 of the second isolation pillar region 1132. For another example, the spacing between adjacent isolation columns 12 is not particularly limited, and the adjacent isolation columns 12 may have the same spacing or may have different spacing, and those skilled in the art may choose according to the actual situation.

In some embodiments, as shown in fig. 1, the display substrate 10 further includes a barrier rib 18, and the barrier rib 18 is disposed between the first and second barrier rib regions 1131 and 1132.

Specifically, as shown in fig. 1, the blocking post 18 may include a first planarization layer 181, a second planarization layer 182, a third planarization layer 183, and a dielectric film layer 184, which are sequentially disposed in the x-direction.

Note that the barrier rib 18 may include only the first planarization layer 181, the second planarization layer 182, and the dielectric film layer 184, which are sequentially disposed in the x-direction.

In some embodiments, the materials of the first planarization layer 181, the second planarization layer 182, the third planarization layer 183, and the dielectric film layer 184 may be polyimide having photosensitivity.

In some embodiments, the barrier post 18 may further include a first insulating layer disposed on a side of the dielectric film layer 184 remote from the substrate layer 11.

When the barrier rib 18 is disposed between the first isolation rib region 1131 and the second isolation rib region 1132, the second gate metal layer 16 disposed in the first isolation rib region 1131 and the second gate metal layer 16 disposed in the second isolation rib region 1132 are discontinuously disposed in the y direction, and the third gate metal layer 17 disposed in the first isolation rib region 1131 and the third gate metal layer 17 disposed in the second isolation rib region 1132 are discontinuously disposed in the y direction.

In some embodiments, as shown in fig. 1, a second insulating layer 19 is disposed between two adjacent isolation pillars 12 in the second isolation pillar region 1132.

In some embodiments, the first insulating layer and the second insulating layer 19 may be provided in the same layer, and the materials of the first insulating layer and the second insulating layer 19 may be the same.

In some embodiments, the number and location of the sidewalls of the isolation pillars 12 covered by the insulating layer in the second isolation pillar region 1132 are not particularly limited, for example, referring to fig. 1, when the second isolation pillar region 1132 includes at least two isolation pillars 12, the adjacent sidewalls of two isolation pillars 12 may each be covered by the second insulating layer 19, where two adjacent isolation pillars 12 share the second insulating layer 19. Therefore, after the cathode is deposited in the isolation region 113, the cathode is disconnected from the sidewall of the isolation column 12 where the second insulating layer 19 is not disposed and is lapped on the second aluminum layer 122, and since the gap formed by two adjacent sidewalls of the two isolation columns 12 is filled with the second insulating layer 19, the cathode originally deposited in the gap and lapped with the second aluminum layer 122 is deposited on the second insulating layer 19, so that the electrical signal transmitted from the cathode of the display region 111 to the cathode of the open hole region 112 is disconnected at the isolation column 12 of the isolation region 113 due to the presence of the second insulating layer 19, thereby reducing accelerated aging of the cathode and the thin film encapsulation layer and occurrence of GDSH of the display substrate 10.

In some embodiments, the height of the second insulating layer 19 on the sidewall of the isolation column 12 is not particularly limited, for example, the height of the second insulating layer 19 may be not less than the height of the sidewall of the isolation column 12. Due to process accuracy limitations, it is difficult to keep the height of the second insulating layer 19 on the sidewall of the isolation column 12 exactly the same as the height of the isolation column 12, and in order to ensure that the second insulating layer 19 completely covers the sidewall of the isolation column 12, the second insulating layer 19 having a higher height may be formed when the deposition of the second insulating layer 19 is performed, which in turn ensures that the sidewall of the isolation column 12 is completely covered by the second insulating layer 19.

In some embodiments, the positions and the number of the sidewalls of the isolation pillars 12 covered by the second insulating layer 19 are not particularly limited. For example, when a plurality of isolation pillars 12 are included in the second isolation pillar region 1132, the second insulation layer 19 may cover each of the sidewalls adjacent to the plurality of isolation pillars 12 in the second isolation pillar region 1132. In order to avoid the dense arrangement of the second insulating layer 19, the stress of the isolation region 113 is concentrated, so that the stress is too concentrated to cause the film layer in the isolation region 113 to crack when the laser lift-off is performed on the display substrate 10 in the back-end process. The isolation region should have at least two isolation pillars 12 therein, the adjacent sidewalls of the two isolation pillars 12 not being covered by the second insulating layer 19. For another example, when the second isolation pillar region 1132 includes a plurality of isolation pillars 12 therein, only one sidewall of each isolation pillar 12 in the second isolation pillar region 1132 should be covered with the second insulating layer 19, thereby enabling the second insulating layer 19 to be filled in the adjacent sidewalls of the isolation pillars 12 at intervals, thereby reducing stress concentration of the isolation region.

In some embodiments, an insulating layer (not shown) may be disposed between two adjacent isolation pillars 12 in the first isolation pillar region 1131.

The display substrate provided by the embodiment of the present application is described above, and the method for manufacturing the display substrate provided by the embodiment of the present application is described below, where similar parts to those of the display substrate are not described again.

As shown in fig. 4, the preparation method 400 of the display substrate includes the following steps:

s401, forming a first gate metal layer, a source drain metal layer and a spacer, which are sequentially stacked in a thickness direction of the display substrate, on the substrate layer.

And S402, forming a light-emitting layer on one side of the isolation column and the source drain metal layer, which is far away from the substrate layer.

The light-emitting layer comprises a first part and a second part, wherein the first part is arranged on one side of the isolation column far away from the substrate layer, the second part is arranged on one side of the source drain metal layer far away from the substrate layer, and the first part and the second part are discontinuously arranged at two ends of the isolation column in the first direction.

The following is a detailed description of the steps of the method for manufacturing a display substrate according to the embodiment of the present application, with reference to specific embodiments.

A) And depositing metal molybdenum on the substrate layer to form a metal molybdenum film layer, and then respectively carrying out processing technologies of photoresist coating, mask exposure, development, etching and photoresist stripping on the metal molybdenum film layer to obtain a second gate metal layer.

B) A SiN _x material is deposited over the second gate metal layer to form a first insulating layer.

C) And depositing metal molybdenum on the first insulating layer to form a metal molybdenum film layer, and then respectively carrying out processing processes of photoresist coating, mask exposure, development, etching and photoresist stripping on the metal molybdenum film layer to obtain a third gate metal layer.

D) A SiN _x material and SiO ₂ are deposited on the third gate metal layer to form a second insulating layer.

E) And depositing metal molybdenum on the second insulating layer to form a metal molybdenum film layer, and then respectively carrying out processing processes of photoresist coating, mask exposure, development, etching and photoresist stripping on the metal molybdenum film layer to obtain the first gate metal layer.

F) And respectively depositing titanium, aluminum and titanium on the first gate metal layer and the exposed second insulating layer in a laminated manner to form a titanium-aluminum-titanium metal laminated layer, and respectively carrying out processing processes of photoresist coating, mask exposure, development, etching and photoresist stripping on the titanium-aluminum-titanium metal laminated layer to obtain the source drain metal layer.

G) And depositing a SiN _x material (or SiO ₂) on the source-drain metal layer to form a SiN _x film layer, and then respectively carrying out processing processes of photoresist coating, mask exposure, development, etching and photoresist stripping on the SiN _x film layer to obtain the passivation layer.

H) And respectively depositing titanium, aluminum and titanium on the passivation layer in sequence to form a titanium-aluminum-titanium metal lamination, and respectively carrying out processing processes of photoresist coating, mask exposure, development, etching and photoresist stripping on the titanium-aluminum-titanium metal lamination to obtain the isolation column.

I) And depositing an organic luminescent material on the isolation column to form an organic material layer, and then respectively carrying out processing processes of photoresist coating, mask exposure, development, etching and photoresist stripping on the organic material layer to obtain the luminescent layer.

It should be understood that the display substrate further includes a cathode, a thin film packaging layer, and other common structures, and the preparation method of the display substrate is similar to the preparation method of each film layer, for example, one or more steps of material layer formation, photoresist coating, exposure, development, etching, photoresist stripping, and the like are performed by material deposition, so that corresponding film layers are formed, which are not described herein again.

The embodiment of the application also provides a display device, which comprises the display substrate in any possible implementation embodiment.

The display device can be a display device such as an OLED display, and any product or component with a display function such as a television, a digital camera, a mobile phone, a tablet personal computer and the like comprising the display device.

The foregoing is merely illustrative of the present application, and the present application is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (12)

1. A display substrate, comprising: A substrate layer (11), the substrate layer (11) comprising a display area (111), an opening area (112), and an isolation area (113) arranged between the display area (111) and the opening area (112); A first gate metal layer (13), a source-drain metal layer (14), and an isolation column (12) are arranged on one side of the substrate layer (11) and are stacked in sequence along the thickness direction of the display substrate; Wherein, the first gate metal layer (13), the source-drain metal layer (14) and the isolation column (12) are located in the isolation region (113); A light-emitting layer (15), the light-emitting layer (15) comprising a first portion (151) and a second portion (152), the first portion (151) being arranged on a side of the isolation column (12) away from the substrate layer (11), the second portion (152) being arranged on a side of the source-drain metal layer (14) away from the substrate layer (11), and the first portion (151) and the second portion (152) being arranged discontinuously at both ends of the isolation column (12) in a first direction, the first direction being perpendicular to a thickness direction of the display substrate. 2. The display substrate according to claim 1, characterized in that the display substrate comprises: A plurality of isolation columns (12), wherein the plurality of isolation columns (12) are arranged at intervals along the first direction; A plurality of the first gate metal layers (13), wherein the plurality of the first gate metal layers (13) are arranged at intervals along the first direction; There is a one-to-one correspondence between the plurality of isolation columns (12) and the plurality of the first gate metal layers (13). 3. The display substrate according to claim 1 or 2, characterized in that the source-drain metal layer (14) covers a side of the first gate metal layer (13) away from the substrate layer (11) and a side edge of the first gate metal layer (13), and the direction of the side edge of the first gate metal layer (13) intersects with the first direction. 4. The display substrate according to any one of claims 1 to 3, characterized in that two ends of the first gate metal layer (13) in the first direction respectively extend beyond two ends of the isolation column (12) in the first direction. 5. The display substrate according to claim 4, characterized in that a distance between an end of the first gate metal layer (13) in the first direction and an end of the isolation column (12) in the first direction is greater than or equal to 1 μm. 6. The display substrate according to any one of claims 1 to 5, characterized in that the size of the isolation column (12) in the first direction ranges from 5 μm to 7 μm. 7. The display substrate according to any one of claims 1 to 6, characterized in that the display substrate further comprises a second gate metal layer (16) and a third gate metal layer (17), the second gate metal layer (16) and the third gate metal layer (17) are sequentially stacked between the substrate layer (11) and the first gate metal layer (13) along the thickness direction of the display substrate, the second gate metal layer (16) is continuously arranged in the first direction, and the third gate metal layer (17) is continuously arranged in the first direction. 8. The display substrate according to any one of claims 1 to 7, characterized in that the display substrate comprises a first isolation column region (1131) and a second isolation column region (1132) arranged along the first direction, the first isolation column region (1131) comprising at least two of the isolation columns (12), and the second isolation column region (1132) comprising at least two of the isolation columns (12). 9. The display substrate according to claim 8, characterized in that the display substrate further comprises a blocking column (18), the blocking column (18) being arranged between the first isolation column region (1131) and the second isolation column region (1132), the blocking column (18) comprising a first flat layer (181), a second flat layer (182), a third flat layer (183) and a dielectric film layer (184) sequentially arranged along a thickness direction of the display substrate. 10. The display substrate according to claim 9, characterized in that the blocking column (18) further comprises a first insulating layer, and the first insulating layer is arranged on a side of the dielectric film layer (184) away from the substrate layer (11). 11. The display substrate according to any one of claims 8 to 10, characterized in that, in the second isolation column region (1132), a second insulating layer (19) is provided between two adjacent isolation columns (12). 12. A display device, comprising the display substrate according to any one of claims 1 to 11.