CN117956813A - Sputtering buffer layer capable of reducing contact resistance and perovskite/silicon laminated solar cell thereof - Google Patents

Abstract

The invention relates to the technical field of photovoltaic power generation, and particularly discloses a sputtering buffer layer capable of reducing contact resistance and a perovskite/silicon laminated solar cell thereof, wherein the sputtering buffer layer is made of tin-doped indium oxide, and the sputtering buffer layer is prepared by taking indium oxide and tin oxide according to a mass ratio (80-100): 10 as materials for electron beam evaporation, and adopting an electron beam evaporation method to prepare an ITO film with the thickness of 15-25 nm. The sputtering buffer layer can effectively reduce the contact resistance of the perovskite/silicon laminated solar cell, thereby improving the performance and stability of the cell; by using such a buffer layer with an optimization, the conversion efficiency of the battery is significantly improved.

Description

A sputtered buffer layer capable of reducing contact resistance and its perovskite/silicon tandem solar cell

Technical Field

The present invention relates to the technical field of photovoltaic power generation, and in particular to a sputtering buffer layer capable of reducing contact resistance and a perovskite/silicon stacked solar cell thereof.

Background technique

Perovskite/silicon tandem solar cells are a new type of solar cell, which is composed of perovskite solar cells (PSC) and silicon solar cells (Si-SC). This type of solar cell uses the complementary properties between two different materials, combining the advantages to achieve a higher photoelectric conversion efficiency. Perovskite solar cells and silicon solar cells form a stacked structure through transparent conductive materials. In this structure, perovskite solar cells absorb shorter wavelength light, while silicon solar cells absorb longer wavelength light. Through such a structure, the spectral range absorbed by a single solar cell can be maximized, thereby improving the photoelectric conversion efficiency of the entire solar cell. Perovskite/silicon tandem solar cells can optimize performance by adjusting the optical properties between the two layers, such as co-buried layer structure, stacked mode, interconnected cells, etc. This type of solar cell has a high application potential and has become one of the focuses of current solar cell research.

In the process of preparing perovskite/silicon tandem solar cells, the preparation of the top transparent electrode in the top perovskite cell requires the use of thin film deposition methods with high particle energy such as magnetron sputtering, which will damage the top perovskite cell. Therefore, it is necessary to prepare a sputtering buffer layer to protect the top perovskite cell. However, the usual sputtering buffer layer material is pure tin oxide or pure indium oxide. The band structure of these two films does not match the sputtered IZO electrode, and the contact resistance is large, which affects the fill factor and photoelectric conversion efficiency of the tandem cell.

Therefore, it is very necessary to develop a sputtered buffer layer and its perovskite/silicon tandem solar cell that can reduce contact resistance.

Summary of the invention

The purpose of the present invention is to overcome the defects of the prior art and provide a sputtering buffer layer capable of reducing contact resistance and a perovskite/silicon stacked solar cell thereof.

In order to achieve the above purpose, one of the technical solutions of the present invention is: a sputtering buffer layer that can reduce contact resistance, the sputtering buffer layer material is tin-doped indium oxide, and the sputtering buffer layer is obtained by electron beam evaporation of indium oxide and tin oxide in a mass ratio of (80-100):10 to obtain an ITO film with a thickness of 15-25nm.

In order to achieve the above objectives, the second technical solution of the present invention is: a perovskite/silicon tandem solar cell comprising the above-mentioned sputtered buffer layer.

In a preferred embodiment of the present invention, the perovskite/silicon tandem solar cell includes a bottom cell and a top cell on the bottom cell, and the top cell includes, from the inside to the outside, a hole transport layer, a perovskite active layer, an electron transport layer, a sputtering buffer layer, a transparent electrode layer, and a metal electrode layer.

The hole transport layer faces the bottom cell side.

In a preferred embodiment of the present invention, the bottom cell is a silicon cell.

In a preferred embodiment of the present invention, the perovskite/silicon tandem solar cell further comprises an intermediate interconnect layer, and the intermediate interconnect layer is located between the bottom cell and the top cell.

Further preferably, the intermediate interconnection layer is an ITO film with a thickness of 15-25 nm, and the intermediate interconnection layer is a transparent conductive layer.

In a preferred embodiment of the present invention, the hole transport layer is a structure of self-assembled monolayer (SAM) stacked with nickel oxide (NiO _x ), the nickel oxide thickness is 8-12 nm, the SAM layer thickness is 4-6 nm, and the SAM layer is made of Me-4PACz.

In a preferred embodiment of the present invention, the perovskite active layer is Cs _0.22 FA _0.78 Pb(I _0.85 Br _0.15 ) ₃ and has a thickness of 450-550 nm.

In a preferred embodiment of the present invention, the electron transport layer is a C ₆₀ thin film with a thickness of 15-25 nm.

In a preferred embodiment of the present invention, the transparent electrode layer is an indium zinc oxide (IZO) film with a thickness of 60-80 nm, the IZO film serves as a transparent electrode, and the metal electrode layer is a silver film with a thickness of 80-100 nm.

In order to achieve the above objectives, the third technical solution of the present invention is: a method for preparing a perovskite/silicon tandem solar cell comprising the above-mentioned sputtering buffer layer, comprising the following steps:

(1) Preparation of bottom battery and middle interconnection layer: Si ₃ N ₄ film is plated on one side of double-sided polished C-Si wafer by PVD as N side, and the side without Si ₃ N ₄ film is plated as P side; the Si ₃ N ₄ film is used to protect the N side from velvet, and the Si ₃ N ₄ film is removed after cleaning and velvet treatment, and then intrinsic amorphous silicon film is deposited on the N side and P side respectively by PECVD process, and then N-type amorphous silicon film is deposited on the N side of silicon wafer, and P-type amorphous silicon film is deposited on the P side of silicon wafer; then ITO film is deposited on the N side where N-type amorphous silicon film is deposited and on the P side where P-type amorphous silicon film is deposited by PVD, and finally silver film is evaporated on the ITO film deposited on the P side, the ITO film deposited on the N side is used as the middle interconnection layer, and the ITO film deposited on the P side and the evaporated silver film are used together as the bottom electrode, thus completing the preparation of bottom battery and middle interconnection layer;

(2) Preparation of hole transport layer: statically spin-coating the nickel oxide nano-dispersion on the N-side of the bottom cell prepared in step (1), annealing, cooling to room temperature, statically spin-coating SAM, and annealing in nitrogen to complete the preparation of the hole transport layer;

(3) preparing a perovskite active layer: using a one-step anti-solvent spin coating method to uniformly drop a perovskite solution onto the hole transport layer prepared in step (2) under a nitrogen atmosphere, first using a low spin coating speed to perform thin film coverage, then adding anisole to extract the film at a high spin coating speed, and immediately annealing after the spin coating to obtain a uniform and flat perovskite film; using a passivating agent to perform dynamic spin coating on the perovskite film under a nitrogen environment, and annealing after the spin coating to complete the film passivation to obtain a perovskite active layer;

(4) preparing an electron transport layer: vacuum thermally evaporating a C ₆₀ thin film on the perovskite active layer prepared in step (3) to form an electron transport layer;

(5) Preparation of sputtering buffer layer, transparent electrode layer and metal electrode layer: Indium oxide and tin oxide particles are mixed in a mass ratio of (80-100):10 as the material for electron beam evaporation, and the sputtering buffer layer is obtained by evaporation under vacuum conditions; IZO is then deposited by radio frequency magnetron sputtering to form a transparent electrode layer; finally, a silver film is deposited on the edge of the device by thermal evaporation as the metal electrode layer, i.e., the top electrode.

In a preferred embodiment of the present invention, in the step (1), the thickness of the intrinsic amorphous silicon film is 190-210 μm, the thickness of the P-type amorphous silicon film is 3-5 nm, and the thickness of the N-type amorphous silicon film is 8-12 nm; the thickness of the N-side ITO film is 15-25 nm, the thickness of the P-side ITO film is 90-110 nm, and the thickness of the P-side metallic silver film is 80-100 nm.

In a preferred embodiment of the present invention, in the step (1), the mass ratio of In ₂ O ₃ to SnO ₂ in ITO is (80-100):10.

In a preferred embodiment of the present invention, in the step (2), the rotation speed of spin coating the nickel oxide nano-dispersion is 3500-4500 rpm, the spin coating time is 15-25 s, the rotation speed of spin coating the self-assembled monolayer (SAM) is 4500-5500 rpm, the spin coating time is 25-35 s, the annealing temperature is 90-110° C., and the annealing time is 5-15 min.

In a preferred embodiment of the present invention, the concentration of the nickel oxide nano-dispersion in step (2) is 8-12 mg/ml, the solvent is ultrapure water, and the SAM layer is Me-4PACz.

In a preferred embodiment of the present invention, the concentration of the perovskite solution in step (3) is 1.5-1.9M.

In a preferred embodiment of the present invention, in the step (3), the low spin coating speed is 900-1100 rpm, and the spin coating time is 10-20 s; the high spin coating speed is 4500-5500 rpm, and the high spin coating speed is maintained for 10-20 s to add anisole, the amount of anisole added determines the film quality of the perovskite, the annealing temperature is 90-110°C, and the annealing time is 10-20 min.

In a preferred embodiment of the present invention, in step (3), the passivating agent is PDAI, the spin coating speed is 3500-4500 rpm, the time is 25-35 s, the annealing temperature is 90-110° C., and the annealing time is 3-7 min.

In a preferred embodiment of the present invention, the vacuum degree in step (4) is 4×10 ^-4 -6×10 ^-4 Pa, and the thermal evaporation deposition rate is

In a preferred embodiment of the present invention, the thickness of the C ₆₀ film in step (4) is 15-25 nm.

In a preferred embodiment of the present invention, the sputtered buffer layer in step (5) is 15-25 nm.

In a preferred embodiment of the present invention, the thickness of the transparent electrode layer in step (5) is 70-80 nm, the RF power of the RF magnetron sputtering is 15-25 W, and the deposition rate is The chamber pressure was maintained at 0.18-0.22Pa.

In a preferred embodiment of the present invention, the thickness of the metal electrode layer in step (5) is 80-100 nm.

Compared with the prior art, the present invention has the following beneficial effects:

1. The present invention provides a sputtered buffer layer that can reduce contact resistance. The sputtered buffer layer is prepared by an economical and convenient electron beam evaporation method. The main component of the buffer layer is tin-doped indium oxide. With the difference in the amount of tin doping, the energy band structure of the buffer layer changes, thereby affecting the contact resistance between the sputtered transparent electrode and the sputtered transparent electrode;

2. The sputtered buffer layer of the present invention can effectively reduce the contact resistance of the perovskite/silicon tandem solar cell, thereby improving the performance and stability of the cell; by using this optimized buffer layer, the conversion efficiency of the cell is significantly improved;

3. The present invention provides new ideas and directions for the development of perovskite/silicon tandem solar cells, helps to further improve the conversion efficiency of solar cells, and contributes to the development of clean energy.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG1 is a schematic diagram of the structure of a perovskite/silicon tandem solar cell according to an embodiment of the present invention;

In the figure: 1-bottom cell, 1-1-N-type amorphous silicon film, 1-2-N-side intrinsic amorphous silicon film, 1-3-C-Si wafer, 1-4-P-side intrinsic amorphous silicon film, 1-5-P-type amorphous silicon film, 1-6-P-side ITO film, 1-7-P-side evaporated silver film, 2-top cell, 2-1-hole transport layer, 2-2-perovskite active layer, 2-3-electron transport layer, 2-4-sputtered buffer layer, 2-5-transparent electrode layer, 2-6-top silver electrode, 3-middle interconnect layer;

Fig. 2 is an I-V diagram of an embodiment of the present invention and a comparative example thin film;

FIG3 is the contact resistance between the embodiment of the present invention and the comparative example and the transparent electrode;

FIG4 is a diagram of the energy band structure of an embodiment of the present invention and a transparent electrode;

FIG5 is a diagram of the energy band structure of a comparative example of the present invention and a transparent electrode;

FIG6 is a J-V curve diagram of an embodiment of the present invention and a comparative example of a perovskite/silicon tandem solar cell.

Detailed ways

In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is described in more detail below in conjunction with the accompanying drawings and specific embodiments, but the protection scope of the present invention is not limited to these embodiments. The same reference numerals in the text always represent the same elements, and similar reference numerals represent similar elements.

In the description of the present invention, it is necessary to understand that the orientations or positional relationships indicated by terms such as “upper”, “lower”, “front”, “back”, “left”, “right”, “horizontal”, “vertical”, “top”, “bottom”, “inside” and “outside” are based on the orientations or positional relationships shown in the stereoscopic diagrams in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

Example

A sputtering buffer layer capable of reducing contact resistance is prepared by the following method: indium oxide and tin oxide are used as materials for electron beam evaporation in a mass ratio of (80-100):10, and an ITO film with a thickness of about 15-25 nm is prepared by electron beam evaporation. A perovskite/silicon stacked solar cell comprises a sputtering buffer layer capable of reducing contact resistance prepared in an embodiment, and its structure is shown in FIG1 , comprising a bottom cell 1, a top cell 2, and an intermediate interconnection layer 3 located therebetween, the bottom cell 1 being a HJT heterojunction silicon cell, and the bottom cell comprises, from top to bottom, an N-type amorphous silicon film 1-1, an N-side intrinsic amorphous silicon film 1-2, a C-Si sheet 1-3, a P-side intrinsic amorphous silicon film 1-4, a P-type amorphous silicon film 1-5, a P-side ITO film 1-6, and a P-side evaporated silver film 1-7. The top cell 2 includes, from the inside to the outside, a hole transport layer 2-1, a perovskite active layer 2-2, an electron transport layer 2-3, a sputtered buffer layer 2-4, and a transparent electrode layer 2-5; the hole transport layer 2-1 faces the side of the bottom cell 1. The bottom cell is a silicon cell. The thickness of the intrinsic amorphous silicon film on the P side is 8-12nm, the thickness of the P-type amorphous silicon film is 3-5nm, the thickness of the intrinsic amorphous silicon film on the N side is 8-12nm, and the thickness of the N-type amorphous silicon film is 8-12nm; the thickness of the ITO film on the N side is 15-25nm, and the thickness of the ITO film on the P side is 90-110nm. The thickness of the metal silver film on the P side is 80-100nm. The intermediate interconnection layer 3 is an ITO film, which is a transparent conductive layer with a thickness of 15-25nm; the hole transport layer 2-1 is a structure of self-assembled monolayer (SAM) stacked nickel oxide (NiO _x ), the thickness of nickel oxide is 8-12nm, and the thickness of the SAM layer is 4-6nm. The SAM layer uses Me-4PACz. The perovskite active layer is Cs _0.22 FA _0.78 Pb (I _0.85 Br _0.15 ) ₃ with a thickness of 450-550nm. The electron transport layer 2-3 is a C ₆₀ film with a thickness of 15-25nm. The transparent electrode layer 2-5 is an indium zinc oxide (IZO) film with a thickness of 70-80nm, and the IZO film is used as a transparent electrode. 2-6 is a silver metal electrode layer at the top to ensure test contact, with a thickness of 80-100nm.

A perovskite/silicon tandem solar cell is prepared by the following steps:

1. Preparation of silicon bottom cells and intermediate interconnection layers:

Double-sided polished n-type CZ 158.75mm×158.75mmC-Si wafers with a thickness of 200±10μm and a resistivity of 0.5-2Ω·cm were used.

(1) Pretreatment

A 50 nm thick Si ₃ N ₄ film was coated on one side of the C-Si wafer using PVD as the N side, and the other side without Si ₃ N ₄ film coating was used as the P side.

(2) Cleaning and velveting process:

SC1 (NH ₄ OH/H ₂ O ₂ /H ₂ O) pre-cleaning: remove particles on the surface of C-Si wafer after pre-treatment, pre-cleaning temperature 75℃,

Time: 600s;

Hot water cleaning: time 600s, temperature 70℃;

Concentrated alkali cleaning: remove the mechanical damage layer on the surface, clean with 20% wt. potassium hydroxide (KOH) solution for 150 s at 80°C;

Hot water cleaning: time 600s, temperature 70℃;

Texturing: forming a surface light trapping structure on the P surface; the N surface will not produce a surface light trapping structure because it is protected by the Si ₃ N ₄ film;

Hot water cleaning: time 600s, temperature 70℃;

Dry with nitrogen;

Surface rounding: HNO ₃ /HF solution, removing the pyramid tip structure and forming a rounded surface;

Hot water cleaning: time 600s, temperature 70℃;

SC2 cleaning: removal of metal ions, H ₂ O+HCl+H ₂ O ₂ (volume ratio of 5:1:1) solution, 2% HF, time 45 s;

Water cleaning: ultrapure water cleaning, time 600s;

SC1 cleaning: remove surface particles, NH ₄ OH/H ₂ O ₂ /H ₂ O solution (volume ratio of 1:4:25), temperature 75°C, time 600s;

Water cleaning: ultrapure water cleaning, time 600s;

Pickling: 8%-15% HCl for 180s, then water for 90s, then 10% HF for 180s to remove the surface oxide layer, metal ions and Si ₃ N ₄ film on the N side, time 450s;

Washing: Ultrapure water, 600s.

(3) Plasma enhanced CVD process (PECVD)

A multi-chamber PECVD deposition system is used to deposit intrinsic amorphous silicon film. A 10nm thick intrinsic amorphous silicon film is deposited on the N and P surfaces of the treated C-Si wafer respectively, and then a 4nm thick P-type amorphous silicon film is deposited on the P surface, and a 10nm thick N-type amorphous silicon film is deposited on the N surface.

(4) Physical vapor deposition (PVD)

A 9010 type ITO (mass ratio In ₂ O ₃ :SnO ₂ =90:10) film was prepared by magnetron sputtering. By controlling the time the C-Si sheet was in the chamber, a 20 nm thick ITO film was deposited on the treated N surface and a 100 nm thick ITO film was deposited on the P surface. Finally, a silver electrode was evaporated on the ITO film deposited on the P surface, the ITO film deposited on the N surface was used as an intermediate interconnection layer, and the ITO film deposited on the P surface and the evaporated silver were used together as the bottom electrode to complete the preparation of the bottom battery and the intermediate interconnection layer.

2. Preparation of perovskite top cells:

(1) Preparation of composite hole transport layer: The composite hole transport layer adopts a structure of self-assembled monolayer (SAM) stacked with nickel oxide (NiO _x ). First, the nickel oxide nano-dispersion liquid is statically spin-coated on the intermediate interconnection layer ITO film prepared above, with a rotation speed of 4000 rpm and a spin coating time of 20 s, followed by annealing at 100°C for 10 min in air. After the substrate is cooled to room temperature, it is transferred to a nitrogen glove box for static spin coating of the SAM layer. The SAM layer uses Me-4PACz, with a rotation speed of 5000 rpm and a spin coating time of 30 s, followed by annealing at 100°C for 10 min in a nitrogen glove box. After annealing, the composite hole transport layer is prepared.

(2) Preparation of wide bandgap perovskite active layer: The active layer was spin-coated using a one-step anti-solvent spin-coating method. In a nitrogen glove box, the perovskite solution was first evenly dropped onto the hole transport layer prepared above. A low speed was first used for thin film coverage (spin coating speed 1000 rpm, spin coating time 15 s), and then the speed was increased to 5000 rpm. 300 μL of anisole was quickly added 15 s after the speed was increased to extract the film. Then, 5 s were waited until the spin coating was completed. After the spin coating was completed, the film was immediately annealed at 100°C for 15 min to obtain a uniform and smooth perovskite film. PDAI passivating agent was used to perform dynamic spin coating on the perovskite film in a nitrogen glove box environment at a speed of 4000 rpm for 30 s. After the spin coating was completed, the film was annealed at 100°C for 5 min to complete the film passivation and obtain the perovskite active layer.

(3) Preparation of electron transport layer: C ₆₀ with a thickness of 15-25 nm was thermally evaporated on the above perovskite passivation film under high vacuum (5×10 ^–4 Pa) as an electron transport layer at a deposition rate of

(4) Preparation of sputtering buffer layer and transparent electrode layer: First, a 10 nm _SnO2 film was deposited on the electron transport layer as a sputtering buffer layer by ALD, and then 70-80 nm IZO was deposited by RF magnetron sputtering technology to form a transparent electrode, where the RF power was 20 W and the deposition rate was The chamber pressure was maintained at 0.18-0.22 Pa; finally, a silver electrode with a thickness of 80-100 nm was deposited on the edge of the device by thermal evaporation.

Comparative Example

A perovskite/silicon stacked solar cell, the preparation method is the same as that of the embodiment, except that the electron beam evaporation material selected in step (4) is pure indium oxide.

The perovskite/silicon tandem solar cells prepared in the examples and comparative examples were analyzed and tested, and the following results were obtained:

1. Analysis of contact resistance with transparent electrode

As shown in Figure 2, first, by measuring the I-V diagram of the sputtering buffer layer prepared by the embodiment and the comparative example, it can be seen that the slope of the embodiment is significantly greater than that of the comparative example, indicating that the sputtering buffer layer prepared by the embodiment has better conductivity. Furthermore, through the contact resistance test of Figure 3, it can be seen that the slope of the fitting line of the embodiment in the figure is smaller, which means that the contact resistance with the transparent electrode is smaller. Smaller contact resistance is conducive to the transmission of carriers and can significantly improve the performance of perovskite/silicon two-terminal stacked solar cells.

2. Analysis of energy level regulation

The energy band relationship between the embodiment and the comparative example and the transparent electrode was analyzed by combining the ultraviolet photoelectron spectrum and the ultraviolet absorption spectrum. As shown in FIG4, the energy level difference of electron transmission between the embodiment and the transparent electrode is 0.01 eV, but as shown in FIG5, the energy level difference of electron transmission between the comparative example and the transparent electrode is 0.16 eV. Obviously, the energy band structure of the embodiment and the transparent electrode is more matched, which is more conducive to the transmission of carriers.

3. Performance analysis of corresponding perovskite/silicon tandem solar cells

Since the contact resistance between the sputtering buffer layer prepared by tin oxide doped indium oxide and the transparent electrode in the embodiment is smaller and the energy band structure is more matched, the performance of the corresponding perovskite/silicon tandem solar cell is improved. As shown in FIG6 , the open circuit voltage of the corresponding perovskite/silicon tandem solar cell in the embodiment is 1.97V, the short circuit current density is 20.08mA cm ^-2 , the filling factor is 77.71%, and the photoelectric conversion efficiency is 30.82%; the open circuit voltage of the device corresponding to the comparative example is 1.93V, the short circuit current density is 20.09mA cm ^-2 , the filling factor is 72.44%, and the photoelectric conversion efficiency is 28.20%. The improvement of device performance may be due to the reduction of the contact resistance between the sputtering buffer layer and the transparent electrode, and the better matching of the energy band structure, which accelerates the transmission of carriers and improves the filling factor of the device, thereby improving the device performance.

The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some or all of the technical features thereof may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present invention.

Claims (10)

1. A sputtering buffer layer capable of reducing contact resistance, characterized in that the sputtering buffer layer material is tin-doped indium oxide, and the sputtering buffer layer is obtained by electron beam evaporating indium oxide and tin oxide in a mass ratio of (80-100):10 to obtain an ITO film with a thickness of 15-25 nm. 2. A perovskite/silicon tandem solar cell comprising the sputtered buffer layer of claim 1, characterized in that it comprises a bottom cell and a top cell on the bottom cell, wherein the top cell comprises, from the inside to the outside, a hole transport layer, a perovskite active layer, an electron transport layer, a sputtered buffer layer, a transparent electrode layer, and a metal electrode layer. 3. The perovskite/silicon tandem solar cell according to claim 2 is characterized in that the perovskite/silicon tandem solar cell also includes an intermediate interconnection layer, the intermediate interconnection layer is located between the bottom cell and the top cell, the intermediate interconnection layer is an ITO film with a thickness of 15-25 nm, and the intermediate interconnection layer is a transparent conductive layer. 4. The perovskite/silicon stacked solar cell according to claim 2 is characterized in that the hole transport layer is a structure of SAM stacked with NiO _x , SAM is Me-4PACz, the SAM layer thickness is 4-6nm, and the NiO _x layer thickness is 8-12nm; the perovskite active layer is Cs _0.22 FA _0.78 Pb(I _0.85 Br _0.15 ) ₃ with a thickness of 450-550nm, the electron transport layer is a C ₆₀ film with a thickness of 15-25nm; the transparent electrode layer is an IZO film with a thickness of 60-80nm; the metal electrode layer is a silver film with a thickness of 80-100nm. 5. A method for preparing a perovskite/silicon tandem solar cell according to any one of claims 1 to 4, characterized in that it comprises the following steps: (1) Preparation of bottom battery and middle interconnection layer: Si ₃ N ₄ film is plated on one side of double-sided polished C-Si wafer by PVD as N side, and the side without Si ₃ N ₄ film is plated as P side; after cleaning and texturing, Si ₃ N ₄ film on N side is removed, and then intrinsic amorphous silicon film is deposited on N side and P side respectively by PECVD process, and then N-type amorphous silicon film is deposited on N side, and P-type amorphous silicon film is deposited on P side; then ITO film is deposited on N side where N-type amorphous silicon film is deposited and on P side where P-type amorphous silicon film is deposited by PVD, and finally silver film is evaporated on ITO film deposited on P side, and ITO film deposited on P side and silver film are used together as bottom electrode, and ITO film deposited on N side is used as middle interconnection layer, thus completing the preparation of bottom battery and middle interconnection layer; (2) Preparation of hole transport layer: statically spin-coating the nickel oxide nano-dispersion on the N-side of the bottom cell prepared in step (1), annealing, cooling to room temperature, statically spin-coating SAM, and annealing in nitrogen to complete the preparation of the hole transport layer; (3) preparing a perovskite active layer: using a one-step anti-solvent spin coating method to uniformly drop a perovskite solution onto the hole transport layer prepared in step (2) under a nitrogen atmosphere, first using a low spin coating speed to perform thin film coverage, then adding anisole to extract the film at a high spin coating speed, and immediately annealing after the spin coating to obtain a uniform and flat perovskite film; using a passivating agent to perform dynamic spin coating on the perovskite film under a nitrogen environment, and annealing after the spin coating to complete the film passivation to obtain a perovskite active layer; (4) preparing an electron transport layer: vacuum thermally evaporating a C ₆₀ thin film on the perovskite active layer prepared in step (3) to form an electron transport layer; (5) Preparation of sputtering buffer layer, transparent electrode layer and metal electrode layer: Indium oxide and tin oxide particles are mixed in a mass ratio of (80-100):10 and used as the material for electron beam evaporation. The sputtering buffer layer is prepared by electron beam evaporation under vacuum conditions. IZO is then deposited by radio frequency magnetron sputtering to form a transparent electrode layer. Finally, a silver film is deposited on the edge of the device by thermal evaporation as a metal electrode layer. 6. The method for preparing a perovskite/silicon tandem solar cell according to claim 5, characterized in that in the step (1), the thickness of the C-Si sheet is 190-210 μm, the thickness of the P-side intrinsic amorphous silicon film is 8-12 nm, the thickness of the P-type amorphous silicon film is 3-5 nm, the thickness of the N-side intrinsic amorphous silicon film is 8-12 nm, and the thickness of the N-type amorphous silicon film is 8-12 nm; The thickness of the N-side ITO film is 15-25nm, the thickness of the P-side ITO film is 90-110nm, and the thickness of the P-side metal silver film is 80-100nm. 7. The method for preparing a perovskite/silicon tandem solar cell according to claim 5, characterized in that in the step (1) _, the mass ratio of _In2O3 to _SnO2 in ITO is (80-100):10. 8. The method for preparing a perovskite/silicon tandem solar cell according to claim 6, characterized in that the rotation speed of spin coating the nickel oxide nano-dispersion in step (2) is 3500-4500 rpm, the spin coating time is 15-25 s, the rotation speed of spin coating the SAM is 4500-5500 rpm, the spin coating time is 25-35 s, the annealing temperature is 90-110° C., and the annealing time is 5-15 min; The concentration of the nickel oxide nano-dispersion liquid is 8-12 mg/ml, the solvent is ultrapure water, and the SAM is Me-4PACz. 9. The method for preparing a perovskite/silicon tandem solar cell according to claim 6, characterized in that in the step (3), the concentration of the perovskite solution is 1.5-1.9 M, the medium-low spin coating speed is 900-1100 rpm, and the spin coating time is 10-20 s; The high spin coating speed is 4500-5500 rpm, and the high spin coating speed is maintained for 10-20 seconds to add anisole, the amount of anisole added determines the film quality of the perovskite, the annealing temperature is 90-110°C, and the annealing time is 10-20 minutes; the passivation agent uses PDAI, the spin coating speed is 3500-4500 rpm, the time is 25-35 seconds, the annealing temperature is 90-110°C, and the annealing time is 3-7 minutes. 10. The method for preparing a perovskite/silicon tandem solar cell according to claim 7, characterized in that the vacuum degree in step (4) is 4×10 _- ⁴ -6×10 _- ⁴ Pa, and the thermal evaporation deposition rate is The thickness of the C ₆₀ film is ^15-25nm ; the vacuum degree of the electron beam evaporation in step (5) is 4× _10-4-6 × ^10-4 Pa, the thickness of the sputtering buffer layer is _15-25nm ; the thickness of the transparent electrode layer is 70-80nm; the radio frequency power of the radio frequency magnetron sputtering is 15-25W, and the deposition rate is The chamber pressure is maintained at 0.18-0.22 Pa; the thickness of the metal electrode layer is 80-100 nm.