CN117935703A - Control circuit and control method of display panel, and display device - Google Patents

Abstract

The application discloses a control circuit and a control method of a display panel and a display device, wherein the control circuit comprises the following components: the first detection sub-circuit is used for detecting a first voltage value of the first voltage signal end and generating a first control signal based on a detection result; the second detection sub-circuit is used for detecting a second voltage value of the second voltage signal end and generating a second control signal based on a detection result; the public voltage detection sub-circuit is used for detecting the public voltage value of the public voltage signal end based on the first voltage value of the first voltage signal end and the second voltage value of the second voltage signal end, and generating a third control signal based on the detection result; and the first switch sub-circuit is used for controlling the output of the switch voltage based on the first control signal, the second control signal and the third control signal.

Description

Control circuit and control method of display panel, and display device

Technical Field

The present application generally relates to the field of display technology, and specifically relates to a control circuit and control method of a display panel, and a display device.

Background technique

As a display device, TFT-LCD (Thin Film Transistor Liquid Crystal Display) is increasingly used in the field of high-performance displays due to its small size, low power consumption, no radiation and relatively low production cost.

In the prior art, due to the layout of the connector and COF (chip on film) wiring on the display device, foreign matter in the production process, or ESD after the whole machine is assembled, the voltage amplitude of the GMA (gamma tie point voltage) and VCOM (common voltage) signals will change when a short circuit occurs with their side wiring, which will cause the display image to be abnormal when the panel is turned on, including full-screen whiteness, full-screen blackness, uneven gradient, noise in some grayscales, etc.

Summary of the invention

In view of the above-mentioned defects or deficiencies in the prior art, it is desirable to provide a control circuit and control method of a display panel, and a display device, which can improve the panel protection effect and prevent display defects.

In a first aspect, the present application provides a control circuit for a display panel, comprising:

a first detection subcircuit, the first detection subcircuit being used to detect a first voltage value of the first voltage signal terminal and generate a first control signal based on the detection result;

a second detection subcircuit, the second detection subcircuit being used to detect a second voltage value at the second voltage signal terminal and generate a second control signal based on the detection result;

a common voltage detection subcircuit, the common voltage detection subcircuit being used to detect a common voltage value of a common voltage signal terminal based on a first voltage value of the first voltage signal terminal and a second voltage value of the second voltage signal terminal, and to generate a third control signal based on a detection result;

A first switch subcircuit is configured to control the output of a switch voltage based on the first control signal, the second control signal, and the third control signal.

Optionally, the first voltage value is a positive polarity voltage, and the first detection subcircuit includes a first comparator, the positive input terminal of the first comparator is electrically connected to the first voltage signal terminal, the negative input terminal of the first comparator is electrically connected to the first comparison voltage terminal, the output terminal of the first comparator is electrically connected to the first switch subcircuit, the power supply terminal of the first comparator is electrically connected to the power supply signal terminal, and the ground terminal of the first comparator is grounded.

Optionally, the second voltage value is a negative polarity voltage, and the second detection subcircuit includes a second comparator, the negative input terminal of the second comparator is electrically connected to the second voltage signal terminal, the positive input terminal of the second comparator is electrically connected to the second comparison voltage terminal, the output terminal of the second comparator is electrically connected to the first switch subcircuit, the power supply terminal of the second comparator is electrically connected to the power supply signal terminal, and the ground terminal of the second comparator is grounded.

Optionally, the common voltage detection subcircuit includes a third comparator, the positive input terminal of the third comparator is electrically connected to the common voltage signal terminal, the negative input terminal of the third comparator is electrically connected to the first voltage signal terminal, the output terminal of the third comparator is electrically connected to the first switch subcircuit, the power supply terminal of the third comparator is electrically connected to the power supply signal terminal, and the ground terminal of the third comparator is grounded.

Optionally, the common voltage detection subcircuit includes a fourth comparator, the positive input terminal of the fourth comparator is electrically connected to the second voltage signal terminal, the negative input terminal of the fourth comparator is electrically connected to the common voltage signal terminal, the output terminal of the fourth comparator is electrically connected to the first switch subcircuit, the power supply terminal of the fourth comparator is electrically connected to the power supply signal terminal, and the ground terminal of the fourth comparator is grounded.

Optionally, the first switch subcircuit comprises a switch transistor, and a control terminal of the switch transistor is electrically connected to an output terminal of the first comparator, an output terminal of the second comparator, an output terminal of the third comparator, and an output terminal of the fourth comparator;

The first terminal of the switch transistor is electrically connected to the switch voltage terminal, and the second terminal of the switch transistor is grounded.

Optionally, the output end of the first comparator is electrically connected to the control end of the switching transistor through a first diode; the output end of the second comparator is electrically connected to the control end of the switching transistor through a second diode; the output end of the third comparator is electrically connected to the control end of the switching transistor through a third diode; and the output end of the fourth comparator is electrically connected to the control end of the switching transistor through a fourth diode.

Optionally, it also includes a timing controller and a drive controller, the timing controller and the drive controller are electrically connected through a second switch subcircuit, and the second switch subcircuit is used to control the conduction and disconnection between the timing controller and the drive controller based on the switch voltage provided by the switch voltage terminal.

In a second aspect, the present application provides a method for controlling a display panel, using any of the above control circuits for the display panel, the method comprising:

A first detection subcircuit detects a first voltage value of the first voltage signal terminal, and generates a first control signal based on the detection result;

The second detection subcircuit detects a second voltage value of the second voltage signal terminal, and generates a second control signal based on the detection result;

The common voltage detection subcircuit detects a common voltage value of the common voltage signal terminal based on a first voltage value of the first voltage signal terminal and a second voltage value of the second voltage signal terminal, and generates a third control signal based on the detection result;

The first switch subcircuit controls the output of the switch voltage based on the first control signal, the second control signal, and the third control signal.

In a third aspect, the present application provides a display device, comprising a control circuit of a display panel as described above.

The technical solution provided by the embodiments of the present application may have the following beneficial effects:

The display panel control circuit provided in the embodiment of the present application can detect positive polarity signals, negative polarity signals, and common voltage signals. When an abnormal signal occurs, the abnormal signal can be judged. When a signal causing display abnormality occurs, the first switch subcircuit is controlled to perform display panel protection, which can improve the panel protection effect and prevent poor display. The present application can also effectively avoid problems such as white lighting and abnormal screen jitter caused by abnormal VCOM voltage.

BRIEF DESCRIPTION OF THE DRAWINGS

Other features, objects and advantages of the present application will become more apparent by reading the detailed description of non-limiting embodiments made with reference to the following drawings:

FIG1 is a schematic diagram of a control circuit of a display panel provided in an embodiment of the present application;

FIG2 is a connection diagram of a control circuit of a display panel provided in an embodiment of the present application;

FIG3 is a connection diagram of a control circuit of a display panel provided in an embodiment of the present application;

FIG4 is a schematic diagram of the principle of a method for controlling a display panel provided in an embodiment of the present application;

FIG5 is a schematic diagram of a waveform of a first control signal output by a first detection subcircuit provided in an embodiment of the present application;

FIG6 is a schematic diagram of a waveform of a third control signal output by a common voltage detection subcircuit provided in an embodiment of the present application.

Detailed ways

The present application will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the relevant inventions, rather than to limit the inventions. It should also be noted that, for ease of description, only the parts related to the invention are shown in the accompanying drawings.

It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

Please refer to FIG1 for details. The present application provides a control circuit of a display panel, including:

A first detection subcircuit 100, the first detection subcircuit 100 is used to detect a first voltage value of the first voltage signal terminal VG1, and generate a first control signal based on the detection result;

A second detection subcircuit 200, the second detection subcircuit 200 is used to detect a second voltage value of the second voltage signal terminal VG2, and generate a second control signal based on the detection result;

a common voltage detection subcircuit 300, the common voltage detection subcircuit 300 being used to detect a common voltage value of a common voltage signal terminal VCOM based on a first voltage value of the first voltage signal terminal VG1 and a second voltage value of the second voltage signal terminal VG2, and to generate a third control signal based on the detection result;

The first switch sub-circuit 400 is used to control the output of the switch voltage LK based on the first control signal, the second control signal, and the third control signal.

In the embodiment of the present application, the type of the display panel is not limited, and the display panel may be a liquid crystal display panel (LCD), an organic light emitting display panel (OLED), an electronic paper display panel (E-paper), etc. Here, the LCD panel is used as an example for explanation, and other types of panels are similar.

The TFT-LCD driving circuit may include a power management chip, a timing control circuit (TCON), a grayscale circuit, a source driver IC, a gate driver IC, etc. The control circuit provided in the embodiment of the present application is applied to different driving circuits, and the present application does not limit this.

It should be noted that the signal types of the first voltage signal terminal VG1 and the second voltage signal terminal VG2 are not limited in the embodiments of the present application. The first voltage signal terminal VG1 and the second voltage signal terminal VG2 can both be binding point voltages, data voltages, etc., and are set according to application scenarios, etc. in different embodiments.

For example, the source driver also includes a gamma binding point voltage generating circuit and a data voltage generating circuit, the gamma binding point voltage generating circuit is used to generate multiple gamma binding point voltages; the data voltage generating circuit is electrically connected to the gamma binding point voltage generating circuit, and is used to obtain a data voltage corresponding to a predetermined gray scale according to the gamma binding point voltage, and provide the data voltage to the data voltage providing display panel.

The control circuit provided in the embodiment of the present application can be electrically connected to the gamma binding point voltage generating circuit for performing voltage detection on the gamma binding point voltage generated by the gamma binding point voltage generating circuit, and can also be electrically connected to the data voltage generating circuit for performing voltage detection on the data voltage generated by the data voltage generating circuit.

It should also be noted that the number of the first detection sub-circuit 100 and the second detection sub-circuit 200 is not limited in the embodiment of the present application, and can be adjusted according to the number of signal lines that need to be detected in different embodiments.

In order to improve the display effect of the display panel, the driving voltages of adjacent pixels are required to maintain opposite polarities. The driving modes that can achieve opposite polarities of adjacent pixels mainly include point inversion, 2H1V inversion, 1H2V inversion, column inversion, row inversion, etc. This is not limited in the embodiments of the present application and can be adjusted as needed in different embodiments.

For example, for the row inversion driving mode, in the current frame, when the polarity of the nth row and mth column data voltage corresponding to the nth row and mth column pixel circuit is different from the polarity of the n+1th row and mth column data voltage corresponding to the n+1th row and mth column pixel circuit.

In the embodiment of the present invention, the polarity of the data voltage may be positive or negative, and the data voltage may be a positive data voltage or a negative data voltage. When the data voltage is a positive data voltage, the voltage difference between the positive data voltage and the common electrode voltage Vcom is greater than 0, that is, the positive data voltage is greater than the common electrode voltage Vcom; when the data voltage is a negative data voltage, the voltage difference between the negative data voltage and the common electrode voltage Vcom is less than 0, that is, the negative data voltage is less than the common electrode voltage Vcom.

It should also be noted that the reference voltage values of the first comparison voltage terminal Vref1 and the second comparison voltage terminal Vref2 are not limited in the embodiments of the present application, and can be adjusted as needed in different embodiments. In different embodiments, the reference voltages of the first comparison voltage terminal Vref1 and the second comparison voltage terminal Vref2 can be provided by separately adding signal lines. In the present embodiment, the first comparison voltage terminal Vref1 and the second comparison voltage terminal Vref2 can also be set to the same source as the first voltage signal terminal VG1 and the second voltage signal terminal VG2.

Exemplarily, the gamma tie point voltage generating circuit is used to generate a plurality of gamma tie point voltages, and the plurality of gamma tie point voltages include signals GMA1, GMA2, GMA6, GMA7, GMA8, GMA9, GMA13, and GMA14. Among them, GMA1 and GMA2 are both positive polarities. Due to the wiring arrangement, GMA7 is easily interfered by other signals, and the GMA6 signal is relatively stable and not easily interfered. Among them, the first voltage signal terminal VG1 can be a GMA7 signal, and the first comparison voltage terminal Vref1 can be a GMA6 signal. The second voltage signal terminal VG2 can be a GMA8 signal, and the second comparison voltage terminal Vref2 can be a GMA9 signal.

In other embodiments, the first comparison voltage terminal Vref1 and the second comparison voltage terminal Vref2 may also be a normal voltage signal, for example, a HAVDD signal, so that when the positive polarity GMA voltage is lower than HAVDD, the HAVDD voltage is directly output, and when the negative polarity GMA voltage is higher than HAVDD, the HAVDD voltage is also output. This application is not limited to this.

In the embodiment of the present application, an example is taken in which the voltage of the first voltage signal terminal VG1 is positive and the voltage of the second voltage signal terminal VG2 is negative.

The first voltage value is a positive polarity voltage, and the first detection sub-circuit 100 includes a first comparator T1, a positive input terminal + of the first comparator T1 is electrically connected to the first voltage signal terminal VG1, a negative input terminal - of the first comparator T1 is electrically connected to the first comparison voltage terminal Vref1, an output terminal Vout of the first comparator T1 is electrically connected to the first switch sub-circuit 400, a power supply terminal of the first comparator T1 is electrically connected to the power supply signal terminal AVDD, and a ground terminal GND of the first comparator T1 is grounded.

The second voltage value is a negative polarity voltage, and the second detection sub-circuit 200 includes a second comparator T2, a negative input terminal - of the second comparator T2 is electrically connected to the second voltage signal terminal VG2, a positive input terminal + of the second comparator T2 is electrically connected to the second comparison voltage terminal Vref2, an output terminal Vout of the second comparator T2 is electrically connected to the first switch sub-circuit 400, a power supply terminal of the second comparator T2 is electrically connected to the power supply signal terminal AVDD, and a ground terminal GND of the second comparator T2 is grounded.

The common voltage detection sub-circuit 300 includes a third comparator T3, a positive input terminal + of the third comparator T3 is electrically connected to the common voltage signal terminal VCOM, a negative input terminal - of the third comparator T3 is electrically connected to the first voltage signal terminal VG1, an output terminal Vout of the third comparator T3 is electrically connected to the first switch sub-circuit 400, a power supply terminal of the third comparator T3 is electrically connected to the power supply signal terminal AVDD, and a ground terminal GND of the third comparator T3 is grounded.

The common voltage detection subcircuit 300 includes a fourth comparator T4, a positive input terminal + of the fourth comparator T4 is electrically connected to the second voltage signal terminal VG2, a negative input terminal - of the fourth comparator T4 is electrically connected to the common voltage signal terminal VCOM, an output terminal Vout of the fourth comparator T4 is electrically connected to the first switch subcircuit 400, a power supply terminal of the fourth comparator T4 is electrically connected to the power supply signal terminal AVDD, and a ground terminal GND of the fourth comparator T4 is grounded.

It should be noted that the power management chip PMIC is used to generate multiple analog reference voltages, such as an analog voltage for outputting the power signal terminal AVDD and an analog voltage for outputting the ground terminal GND. In the embodiment of the present application, the power supply terminal of each comparator can be connected to the power management chip and can be set as needed in different embodiments.

As shown in Figure 2, the first switch sub-circuit 400 includes a switch transistor DT, the control end of the switch transistor DT is electrically connected to the output end Vout of the first comparator T1, the output end Vout of the second comparator T2, the output end Vout of the third comparator T3, and the output end Vout of the fourth comparator T4; the first end of the switch transistor DT is electrically connected to the switch voltage LK end, and the second end of the switch transistor DT is grounded.

The output terminal Vout of the first comparator T1 is electrically connected to the control terminal of the switch transistor DT through the first diode D1 , and the power supply terminal of the first comparator T1 is electrically connected to the output terminal Vout through the first resistor R1 .

The "control end" specifically refers to the gate of the transistor, the "first end" specifically refers to the source of the transistor, and the "second end" specifically refers to the drain of the transistor. Of course, those skilled in the art should know that the "first end" and the "second end" can be interchanged, that is, the "first end" specifically refers to the drain of the transistor, and the "second end" specifically refers to the source of the transistor.

In the embodiment of the present application, the type of the switching transistor DT is not limited. For example, the switching transistor DT can be a triode, a thin film switching transistor DT, a field effect transistor or other devices with the same characteristics. According to the different semiconductor characteristics of the transistor, the transistor can be divided into an N-type transistor and a P-type transistor. Among them, when the transistor is used as a switching transistor DT, the N-type transistor is turned on by a high-level switch control signal and turned off by a low-level switch control signal; the P-type transistor is turned on by a low-level switch control signal and turned off by a high-level switch control signal.

Based on this, in the embodiment of the present application, the effective level of the first control signal, the second control signal, and the third control signal output can be a high level H or a low level L. Corresponding adjustments can be made based on different types of the switching transistor DT, and the present application does not limit this. In the embodiment of the present application, the switching transistor DT is an N-type transistor as an example for exemplary description.

In an embodiment of the present application, the control signal output by each detection sub-circuit (the effective signal of the switching transistor DT) can be a high level or a low level. For example, the switching transistor DT is an N-type switching transistor DT. When each control signal is a high level signal, the switching transistor DT is turned on to output the signal. When any of the control signals is a low level signal, the switching transistor DT is turned off to stop the signal output.

In addition, in the embodiment of the present application, the output terminal Vout of the second comparator T2 is electrically connected to the control terminal of the switch transistor DT through the second diode D2, and the power supply terminal of the second comparator T2 is electrically connected to the output terminal Vout through the second resistor R2.

The output terminal Vout of the third comparator T3 is electrically connected to the control terminal of the switch transistor DT through the third diode D3, and the power supply terminal of the third comparator T3 is electrically connected to the output terminal Vout through the third resistor R3.

The output terminal Vout of the fourth comparator T4 is electrically connected to the control terminal of the switch transistor DT through a fourth diode D4 , and the power supply terminal of the fourth comparator T4 is electrically connected to the output terminal Vout through a fourth resistor R4 .

The control end of the switch transistor DT is electrically connected to the ground end GND via a fifth resistor R5.

It should also be noted that in the embodiment of the present application, the third comparator T3 and the fourth comparator T4 can be replaced by a dual-limit comparator (window comparator). In the dual-limit comparator, the third diode D3 and the fourth diode D4 can share the same diode, and the third resistor R3 and the fourth resistor R4 can also share the same resistor and are arranged between the power signal terminal AVDD and the output terminal Vout. The present application does not limit this.

In this embodiment, by providing a diode between the output terminal Vout of each comparator and the control terminal of the switch transistor DT, current backflow can be prevented and detection accuracy can be improved.

As shown in Figure 3, in another embodiment of the present application, the control circuit also includes a timing controller 500 and a drive controller 600, and the timing controller 500 is electrically connected to the drive controller 600 through a second switch sub-circuit 700, and the second switch sub-circuit 700 is used to control the conduction and disconnection between the timing controller 500 and the drive controller 600 based on the switch voltage LK provided by the switch voltage LK end.

It should be noted that, in the embodiment of the present application, the driving controller 600 may be a source driver. The timing controller 500 is used to output a timing signal to the driving controller 600 to generate a gamma tie point voltage and a data voltage.

In the embodiment of the present application, the second switch subcircuit 700 is used to control the connection between the timing controller 500 and the drive controller 600, and the switch voltage LK is a handshake signal between the timing controller 500 and the drive controller 600. Of course, in other embodiments, the second switch subcircuit 700 can also be used to control the connection between the power management chip and the drive controller 600. The power management chip is used to provide a power signal to the drive controller 600, and is set as needed in different embodiments.

In other embodiments of the present application, according to the number of different detection voltage signals, the number of the first detection sub-circuit 100 and the second detection sub-circuit 200 may be multiple, and the control circuit further includes:

The fifth comparator T5 is used to detect the positive polarity voltage. The first detection sub-circuit 100 includes a fifth comparator T5, a positive input terminal + of the fifth comparator T5 is electrically connected to the fifth voltage signal terminal VG5, a negative input terminal - of the fifth comparator T5 is electrically connected to the fifth comparison voltage terminal Vref5, an output terminal Vout of the fifth comparator T5 is electrically connected to the fifth switch sub-circuit, a power supply terminal of the fifth comparator T5 is electrically connected to the power supply signal terminal AVDD, and a ground terminal GND of the fifth comparator T5 is grounded.

The sixth comparator T6 is used to detect the negative polarity voltage. The second detection sub-circuit 200 includes the sixth comparator T6. The negative input terminal - of the sixth comparator T6 is electrically connected to the sixth voltage signal terminal VG6, the positive input terminal + of the sixth comparator T6 is electrically connected to the sixth comparison voltage terminal Vref6, the output terminal Vout of the sixth comparator T6 is electrically connected to the first switch sub-circuit 400, the power supply terminal of the sixth comparator T6 is electrically connected to the power supply signal terminal AVDD, and the ground terminal GND of the sixth comparator T6 is grounded.

In different embodiments, the number of comparators can be increased or decreased according to the number of signal lines to be detected, and the present application does not limit this. For example, the fifth voltage signal terminal VG5 can be a GMA14 signal, the fifth comparison voltage terminal Vref5 can be a GMA13 signal, the sixth voltage signal terminal VG6 can be a GMA1 signal, and the fifth comparison voltage terminal Vref5 can be a GMA2 signal.

Based on the same inventive concept, as shown in FIGS. 4-6 , the present application provides a method for controlling a display panel, using a control circuit of a display panel as described above, the method comprising:

The first detection subcircuit 100 detects a first voltage value of the first voltage signal terminal VG1 and generates a first control signal based on the detection result;

The second detection subcircuit 200 detects a second voltage value of the second voltage signal terminal VG2, and generates a second control signal based on the detection result;

The common voltage detection subcircuit 300 detects a common voltage value of the common voltage signal terminal VCOM based on a first voltage value of the first voltage signal terminal VG1 and a second voltage value of the second voltage signal terminal VG2, and generates a third control signal based on the detection result;

The first switch sub-circuit 400 controls the output of the switch voltage LK based on the first control signal, the second control signal, and the third control signal.

During signal detection, the voltage of the first voltage signal terminal VG1 of the first comparator T1 is compared with the voltage of the first comparison voltage terminal Vref1 of the first comparator T1. When the voltage is lower than Vref1, the first comparator T1 outputs L, and when the voltage is higher than Vref1, the first comparator T1 outputs H; the second voltage signal terminal VG2 of the second comparator T2 is compared with the voltage of the second comparison voltage terminal Vref2 of the second comparator T2. When the voltage is higher than Vref2, the second comparator T2 outputs L, and when the voltage is lower than Vref2, the second comparator T2 outputs H; the first voltage signal terminal VG1 of the third comparator T3 is compared with the voltage of the common voltage signal terminal VCOM of the third comparator T3. When VCOM is lower than VG1, the fourth comparator T4 outputs L, and when VCOM is higher than VG1, the third comparator T3 outputs H; the second voltage signal terminal VG2 of the fourth comparator T4 is compared with the voltage of the common voltage signal terminal VCOM of the fourth comparator T4. When VCOM is higher than VG1, the fourth comparator T4 outputs L, and when VCOM is lower than VG1, the fourth comparator T4 outputs H.

It can be understood that in the embodiment of the present application, the high-level signal H output by each comparator is the voltage VAVDD of the power signal terminal AVDD, and the low-level signal L is the voltage 0V of the ground terminal GND. In different embodiments, other settings can be adopted as needed, and the present application does not limit this.

It should be noted that, in the embodiment of the present application, the first voltage signal of the first voltage signal terminal VG1 is a positive polarity voltage. When the first voltage signal terminal VG1 is abnormal to a voltage smaller than the normal voltage, the display will not be significantly affected and no obvious abnormality will occur; when the first voltage signal terminal VG1 is abnormal to a voltage larger than the normal voltage, obvious display brightness abnormalities, uneven gradients, noise and other problems will occur.

The second voltage signal of the second voltage signal terminal VG2 is a negative polarity voltage. When the second voltage signal terminal VG2 is abnormal to a voltage larger than the normal voltage, the display will not be significantly affected and no obvious abnormality will occur; when the second voltage signal terminal VG2 is abnormal to a voltage smaller than the normal voltage, obvious display brightness abnormality, uneven gradient, noise and other problems will occur.

The VCOM signal needs to compare the first voltage signal and the second voltage signal at the same time. It will be displayed normally only when VG1＞VCOM＞VG2, and the display effect will not be significantly affected. However, when other voltages are abnormal, obvious problems such as abnormal display brightness, uneven gradient, and noise will appear in the display.

In addition, in the embodiment of the present application, the output terminal Vout of each comparator is connected in parallel to the control terminal of the switching transistor DT. When the output terminal Vout of any comparator is at a high level H (that is, when the display is abnormal), the switching transistor DT is turned on, the switching voltage LK terminal is grounded, and the switching voltage LK output of the switching voltage LK terminal is a low level signal.

In the embodiment of the present application, when the display abnormality protection is performed, the second switch subcircuit 700 is set between the timing controller 500 and the drive controller 600. The second switch subcircuit 700 turns on the electrical connection between the timing controller 500 and the drive controller 600 based on the normal switch voltage LK (high level signal) provided by the switch voltage LK terminal, and the timing controller 500 normally provides the timing signal to the drive controller 600, and the display panel displays normally. The second switch subcircuit 700 disconnects the electrical connection between the timing controller 500 and the drive controller 600 based on the low level switch voltage LK provided by the switch voltage LK terminal, thereby shutting down the display operation of the display panel.

The present application also provides a display device, including a control circuit of any display panel as described above. The display device can be applied to any product or component with display function, such as mobile phones, tablet computers, televisions, monitors, laptop computers, digital photo frames, and navigators.

It should be understood that the terms "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

Unless otherwise defined, the technical and scientific terms used herein have the same meaning as those generally understood by those skilled in the art in the technical field of the present invention. The terms used herein are only for describing specific implementation purposes and are not intended to limit the present invention. Terms such as "setting" and the like appearing in this article can mean that one component is directly attached to another component, or that one component is attached to another component through an intermediate. Features described in one embodiment herein can be applied to another embodiment alone or in combination with other features, unless the feature is not applicable in the other embodiment or otherwise specified.

The present invention has been described through the above-mentioned embodiments, but it should be understood that the above-mentioned embodiments are only for the purpose of example and illustration, and are not intended to limit the present invention to the scope of the described embodiments. It can be understood by those skilled in the art that more variations and modifications can be made according to the teachings of the present invention, and these variations and modifications all fall within the scope of the protection claimed by the present invention.

Claims (10)

1. A control circuit of a display panel, comprising:

The first detection sub-circuit is used for detecting a first voltage value of the first voltage signal end and generating a first control signal based on a detection result;

The second detection sub-circuit is used for detecting a second voltage value of the second voltage signal end and generating a second control signal based on a detection result;

The public voltage detection sub-circuit is used for detecting the public voltage value of the public voltage signal end based on the first voltage value of the first voltage signal end and the second voltage value of the second voltage signal end, and generating a third control signal based on the detection result;

And the first switch sub-circuit is used for controlling the output of the switch voltage based on the first control signal, the second control signal and the third control signal.

2. The control circuit of claim 1, wherein the first voltage value is a positive polarity voltage, the first detection sub-circuit comprises a first comparator, a positive input terminal of the first comparator is electrically connected to the first voltage signal terminal, a negative input terminal of the first comparator is electrically connected to the first comparison voltage terminal, an output terminal of the first comparator is electrically connected to the first switching sub-circuit, a power supply terminal of the first comparator is electrically connected to the power supply signal terminal, and a ground terminal of the first comparator is grounded.

3. The control circuit of claim 2, wherein the second voltage value is a negative polarity voltage, the second detection sub-circuit includes a second comparator, a negative input terminal of the second comparator is electrically connected to the second voltage signal terminal, a positive input terminal of the second comparator is electrically connected to the second comparison voltage terminal, an output terminal of the second comparator is electrically connected to the first switching sub-circuit, a power supply terminal of the second comparator is electrically connected to the power supply signal terminal, and a ground terminal of the second comparator is grounded.

4. The control circuit of a display panel according to claim 3, wherein the common voltage detection sub-circuit includes a third comparator, a positive input terminal of the third comparator is electrically connected to the common voltage signal terminal, a negative input terminal of the third comparator is electrically connected to the first voltage signal terminal, an output terminal of the third comparator is electrically connected to the first switch sub-circuit, a power supply terminal of the third comparator is electrically connected to the power supply signal terminal, and a ground terminal of the third comparator is grounded.

5. The control circuit of a display panel according to claim 4, wherein the common voltage detection sub-circuit includes a fourth comparator, a positive input terminal of the fourth comparator is electrically connected to the second voltage signal terminal, a negative input terminal of the fourth comparator is electrically connected to the common voltage signal terminal, an output terminal of the fourth comparator is electrically connected to the first switch sub-circuit, a power supply terminal of the fourth comparator is electrically connected to the power supply signal terminal, and a ground terminal of the fourth comparator is grounded.

6. The control circuit of the display panel according to claim 5, wherein the first switching sub-circuit includes a switching transistor, and a control terminal of the switching transistor is electrically connected to an output terminal of the first comparator, an output terminal of the second comparator, an output terminal of the third comparator, and an output terminal of the fourth comparator;

the first end of the switching transistor is electrically connected with the switching voltage end, and the second end of the switching transistor is grounded.

7. The control circuit of the display panel according to claim 6, wherein an output terminal of the first comparator is electrically connected to a control terminal of the switching transistor through a first diode; the output end of the second comparator is electrically connected with the control end of the switching transistor through a second diode; the output end of the third comparator is electrically connected with the control end of the switching transistor through a third diode; the output end of the fourth comparator is electrically connected with the control end of the switching transistor through a fourth diode.

8. The control circuit of claim 6, further comprising a timing controller and a drive controller, the timing controller electrically connected to the drive controller through a second switch sub-circuit for controlling on and off between the timing controller and the drive controller based on the switching voltage provided by the switching voltage terminal.

9. A control method of a display panel, characterized in that a control circuit of a display panel according to any one of claims 1 to 8 is used, the method comprising:

the first detection sub-circuit detects a first voltage value of the first voltage signal end and generates a first control signal based on a detection result;

The second detection sub-circuit detects a second voltage value of the second voltage signal end and generates a second control signal based on a detection result;

The public voltage detection sub-circuit detects a public voltage value of the public voltage signal end based on a first voltage value of the first voltage signal end and a second voltage value of the second voltage signal end, and generates a third control signal based on a detection result;

The first switch sub-circuit controls the output of the switch voltage based on the first control signal, the second control signal and the third control signal.

10. A display device comprising a control circuit of a display panel according to any one of claims 1-8.