CN117220703A - A receiving DC correction method, device, computer equipment and storage medium - Google Patents
A receiving DC correction method, device, computer equipment and storage medium Download PDFInfo
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract
本申请公开了一种接收直流校正方法、装置、设备及介质。方法包括：当上电初始化时，根据接收链路增益档位构建查找表，查找表中包括每个接收链路增益档位及其对应的直流估计值；接收业务信号，根据当前接收链路增益档位从查找表中调用对应的直流估计值对业务信号进行直流对消，并对直流对消后的业务信号进行算术平均盲校正，算术平均完成后，再进行直流跟踪校正和/或陷波器零频陷波校正。本申请主要应用于基站，上电初始化根据接收链路增益档位构建查找表；当基站接收业务信号，对业务信号进行直流对消、算术平均盲校正、直流跟踪校正和/或陷波器零频陷波校正。通过多个环节的校正，能够较为理想地解决接收信号中的直流残留，保证校正效果。
This application discloses a receiving DC correction method, device, equipment and medium. The method includes: when powering on and initializing, construct a lookup table based on the receiving link gain gear. The lookup table includes each receiving link gain gear and its corresponding DC estimated value; receiving the service signal, based on the current receiving link gain The gear calls the corresponding DC estimated value from the lookup table to perform DC cancellation on the service signal, and performs arithmetic average blind correction on the service signal after DC cancellation. After the arithmetic average is completed, DC tracking correction and/or notching are performed. Zero frequency notch correction. This application is mainly used in base stations. During power-on initialization, a lookup table is constructed based on the gain level of the receiving link; when the base station receives a service signal, it performs DC cancellation, arithmetic mean blind correction, DC tracking correction and/or notch zeroing on the service signal. Frequency notch correction. Through the correction of multiple links, the DC residual in the received signal can be solved ideally and the correction effect can be guaranteed.
Description
Technical Field
The present application relates to the field of signal correction, and in particular, to a method and apparatus for receiving dc correction, a computer device, and a storage medium.
Background
With increasing demands for cell traffic signal bandwidths, wireless communication systems are required to employ higher spectral efficiency and wider bandwidths. As wireless mobile networks evolve toward the fifth generation, higher order signal modulations such as 256QAM/1024QAM and the like have become a trend, and OFDM (Orthogonal Frequency Division Multiplexing ) signals with a long term statistical characteristic average value of 0 are most widely used. Currently, zero intermediate frequency receiving architecture uses an in-phase (I)/quadrature (Q) modulation architecture to perform up-down conversion and channelization, and the architecture mixes down a spatially propagated useful signal to receive near an analog zero frequency through an LO (Local Oscillator) mixer, so that the sampling rate of back-end digital signal processing is greatly reduced, and digital processing of a high-frequency propagation signal becomes possible. The mixed analog zero intermediate frequency signal is firstly subjected to low-pass filtering by an analog low-pass filter to remove out-of-band spurious, and then is sampled and quantized into a digital signal by an ADC. It is well known that the LO signal in the mixer leaks into the signal link so that the signal is added with a dc offset that affects the EVM (Error Vector Magnitude, vector magnitude error) and upstream sensitivity demodulation. In addition, ADC sample quantization also introduces constants due to quantization imbalance, which also causes signal offset. Therefore, there is a need for a calibration method with good calibration effect.
Disclosure of Invention
In view of the foregoing, it is necessary to provide a received dc correction method, apparatus, computer device, and storage medium, which can preferably solve the dc residue in the received signal and ensure the correction effect.
In a first aspect, the present application provides a method of receiving dc correction, the method comprising:
when power-on initialization is performed, a lookup table is constructed according to the gain gear of the receiving link, wherein the lookup table comprises each gain gear of the receiving link and a corresponding direct current estimated value thereof;
and receiving a service signal, calling a corresponding direct current estimated value from the lookup table according to the current receiving link gain gear to perform direct current cancellation on the service signal, performing arithmetic average blind correction on the service signal after the direct current cancellation, and performing direct current tracking correction and/or trap zero frequency notch correction after the arithmetic average is finished.
In some embodiments, the constructing a lookup table according to the receive link gain range includes:
according to the interval range of the receiving link gain gears, calculating a direct current estimated value by using an arithmetic average blind correction algorithm every time when one receiving link gain gear is enabled, and correspondingly writing each receiving link gain gear and each calculated direct current estimated value into a lookup table.
In some embodiments, the correction algorithm employed to make the arithmetic mean blind correction is expressed as follows:
wherein,for inputting signals +.>For outputting signals +.>For input signal +.>Before starting to cancel>Time-estimated DC offset, +.>Is the accumulated length of the correction algorithm.
In some embodiments, the correction algorithm employed to make the dc tracking correction is expressed as follows:
wherein,z-transformation of the output time-domain signal for DC tracking correction>Correcting the Z-transformation of the input time-domain signal for DC tracking,/->Z-transformation for a DC tracking correction system function, < >>Is a correction factor.
In some embodiments, the expression of the correction algorithm employed for notch zero notch correction is as follows:
wherein,for outputting signals +.>R is a filter constant for the input signal.
In some embodiments, r has a value of 0.999.
In some embodiments, the method further comprises:
and when the current receiving link gain gear is changed, repeatedly executing the steps of carrying out direct current cancellation on the service signal according to the current receiving link gain gear and calling a corresponding direct current estimated value from the lookup table, carrying out arithmetic average blind correction on the service signal after the direct current cancellation, and carrying out direct current tracking correction and/or trap zero frequency trap correction after the arithmetic average is finished.
In a second aspect, the present application further provides a construction module, configured to construct a lookup table according to the gain gear of the receiving link when the power-on is initialized, where the lookup table includes each gain gear of the receiving link and a corresponding dc estimation value thereof;
and the correction module is used for receiving the service signal, calling a corresponding direct current estimated value from the lookup table according to the current receiving link gain gear to perform direct current cancellation on the service signal, performing arithmetic average blind correction on the service signal after the direct current cancellation, and performing direct current tracking correction and/or notch correction on a notch trap after the arithmetic average is finished.
In a third aspect, an embodiment of the present application further provides a computer device, including a memory and a processor, the memory storing a computer program, which when executed by the processor, causes the processor to perform the steps of the method for receiving dc correction according to any one of the first aspects.
In a fourth aspect, an embodiment of the present application further provides a computer readable storage medium storing a computer program, which when executed by a processor causes the processor to perform the steps of the method for receiving dc correction according to any one of the first aspects.
The embodiment of the application has at least the following beneficial effects:
the method for correcting the received direct current is mainly applied to the base station. When the base station is electrified and initialized, a lookup table is constructed according to the gain gear of the receiving link, wherein the lookup table comprises each gain gear of the receiving link and a corresponding direct current estimated value; when the base station receives the service signal, the corresponding direct current estimated value is called from the lookup table according to the current receiving link gain gear to carry out direct current cancellation on the service signal, and arithmetic average blind correction is carried out on the service signal after the direct current cancellation, and after the arithmetic average is finished, direct current tracking correction and/or zero frequency notch correction of the notch filter are carried out. The embodiment of the application can more ideally solve the direct current residue in the received signal through the correction of a plurality of links, and ensure the correction effect.
Drawings
In order to more clearly illustrate the embodiments of the application or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Wherein:
FIG. 1 is a flow chart of a method for receiving DC correction according to an embodiment of the application;
fig. 2 is an internal structural view of a computer device according to an embodiment of the present application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
With increasing demands for cell traffic signal bandwidths, wireless communication systems are required to employ higher spectral efficiency and wider bandwidths. As wireless mobile networks evolve toward the fifth generation, higher order signal modulations such as 256QAM/1024QAM and the like have become a trend, and OFDM (Orthogonal Frequency Division Multiplexing ) signals with a long term statistical characteristic average value of 0 are most widely used. Currently, zero intermediate frequency receiving architecture uses an in-phase (I)/quadrature (Q) modulation architecture to perform up-down conversion and channelization, and the architecture mixes down a spatially propagated useful signal to receive near an analog zero frequency through an LO (Local Oscillator) mixer, so that the sampling rate of back-end digital signal processing is greatly reduced, and digital processing of a high-frequency propagation signal becomes possible. The mixed analog zero intermediate frequency signal is firstly subjected to low-pass filtering by an analog low-pass filter to remove out-of-band spurious, and then is sampled and quantized into a digital signal by an ADC. It is well known that the LO signal in the mixer leaks into the signal link so that the signal is added with a dc offset that affects the EVM (Error Vector Magnitude, vector magnitude error) and upstream sensitivity demodulation. In addition, ADC sample quantization also introduces constants due to quantization imbalance, which also causes signal offset.
Based on the above problems, the embodiments of the present application provide a method, an apparatus, a computer device, and a storage medium for correcting a received direct current, which can solve the direct current residue in a received signal more ideally, and ensure a correction effect.
The technical scheme shown in the application is described in detail by specific examples. It should be noted that the following embodiments may exist alone or in combination with each other, and for the same or similar content, the description will not be repeated in different embodiments.
In a first aspect, an embodiment of the present application provides a method for receiving dc correction. Fig. 1 is a flowchart of a method for receiving dc correction according to an embodiment of the application. Referring to fig. 1, in some embodiments, the method for receiving dc correction includes:
s110: when power-on initialization is performed, a lookup table is constructed according to the receiving link gain gears, and the lookup table comprises each receiving link gain gear and a corresponding direct current estimated value thereof.
In some embodiments, the received dc correction method of the present application is mainly applied to a base station. When the mobile phone calls, electromagnetic waves are sent out, and the electromagnetic waves are received by the base station. After the base station receives the signal, the gain gear of the receiving link is adjusted according to the power of the signal received by the base station, for example, the received signal is amplified by 3dB (twice), and the amplified signal flows into the receiving link to be processed by direct current.
When the base station equipment is powered on and initialized, the base station constructs a lookup table according to the gain gear of the receiving link. For example, the gear may be set to 1 st gear, 2 nd gear. The gains corresponding to the gears 3, 4 and 5 can be set as A, B, C, D, E, namely the gain corresponding to the gear 1 is A, the gain corresponding to the gear 2 is B, the gain corresponding to the gear 3 is C, the gain corresponding to the gear 4 is D and the gain corresponding to the gear 5 is E. The gear and corresponding gain are typically fixed parameters of the base station.
The lookup table constructed by the base station comprises each receiving link gain gear and a corresponding direct current estimated value thereof. The DC estimated value is the DC offset when the base station receives the service signal. When the gear and gain are fixed, the corresponding dc estimation value is also typically a fixed value.
S120: and receiving the service signal, calling a corresponding direct current estimated value from a lookup table according to the current receiving link gain gear to perform direct current cancellation on the service signal, performing arithmetic average blind correction on the direct current cancelled service signal, and performing direct current tracking correction and/or trap zero frequency trap correction after the arithmetic average is finished.
When the base station receives service signals, namely when the mobile phone and the base station are in communication, the current receiving link gain gear is obtained. The current receive link gain range is already allocated when the handset and base station have communication.
And calling a corresponding direct current estimated value from the lookup table according to the current receiving link gain gear, and performing direct current cancellation on the service signal by using the direct current estimated value. Specifically, assuming that the service signal received by the base station is X and the direct current estimated value is D, the service signal actually received by the base station is X-D.
From a mathematical point of view, the dc offset is a constant superimposed on the signal, and since the OFDM signal has a random stationary characteristic, its long-term statistical average should be 0. By utilizing the characteristics, the application performs one-time arithmetic average blind correction on the business signals X-D after DC cancellation, namely, calculates the average value of the signals in a period of time, namely, the average value is the DC offset. And subtracting the DC offset from the traffic signal X-D after the DC offset cancellation to obtain the traffic signal after the arithmetic average blind correction.
In some embodiments, the correction algorithm employed to make the arithmetic mean blind correction is expressed as follows:
wherein,for inputting signals +.>For outputting signals +.>For input signal +.>Before starting to cancel>Time-estimated DC offset, +.>Is the accumulated length of the correction algorithm.
That is, the DC offset is subtracted from the DC-canceled traffic signal X-DAnd obtaining the business signal after the arithmetic average blind correction. The arithmetic average blind correction is performed to prevent the analog device from aging, heating and the like during long-time operation, and the direct current offset generated by drift of the physical characteristics of the gear gain device is caused. And (5) carrying out arithmetic average blind correction estimation supplement to improve correction accuracy.
However, in actual engineering, when the mean shift of the business signal after the arithmetic mean blind correction is continuously analyzed, a more obvious direct current shift is found. Therefore, after the arithmetic average is finished, the application carries out direct current tracking correction and/or zero frequency notch correction of the notch filter, and can more ideally solve the direct current residue in the received signal through correction of a plurality of links, thereby ensuring the correction effect. The specific procedure of dc tracking correction and/or trap zero notch correction will be described in detail in the following embodiments.
In some embodiments, the step S110 of constructing a look-up table according to the gain gear of the receiving link specifically includes:
according to the interval range of the receiving link gain gears, calculating a direct current estimated value by using an arithmetic average blind correction algorithm every time when one receiving link gain gear is enabled, and correspondingly writing each receiving link gain gear and each calculated direct current estimated value into a lookup table.
Specifically, during the power-on initialization process of the system, system software calculates a direct current estimated value once by using an arithmetic average blind correction part of logic design according to the interval range of the gain gears of the receiving link set by the loop, and correspondingly writes each gain gear of the receiving link and each calculated direct current estimated value into a lookup table. The arithmetic mean blind correction algorithm used in this process is identical to that above.
It should be noted that, in the process of executing step S110, the service signal cannot be accessed, and the purpose of the step is to build a table to quickly cope with the change of the gain gear of the receiving link, so that the corresponding dc estimation value can be directly called from the lookup table to complete the dc cancellation without restarting the arithmetic average blind correction.
In some embodiments, the expression of the correction algorithm employed for the dc-tracking correction in step S120 is as follows:
wherein,z-transformation of the output time-domain signal for DC tracking correction>Correcting the Z-transformation of the input time-domain signal for DC tracking,/->Correction for DC trackingZ-transformation of system functions->To correct the statistical factor.
The residual direct current in the signal is unstable due to the unstable factor interference caused by local oscillation leakage in the receiving link, and the residual direct current value is corrected by using a direct current tracking correction algorithm, so that the direct current correction effect is ensured.
In some embodiments, the correction algorithm employed for notch zero notch correction in step S120 is expressed as follows:
wherein,for outputting signals +.>R is a filter constant for the input signal. A typical value of r is 0.999, which determines the stop band and decay characteristics of the trap.
The main factor of the direct current generation is that the mixed local oscillation leaks into the receiving link, so that a direct current offset component is added to the signal, and the direct current offset component is supposed to be at zero frequency, but in practice, the noise energy of the receiving local oscillation is inversely proportional to the frequency f (namely 'flicker noise' or '1/f noise'), so that the effect of preventing direct current from being influenced by 'flicker noise' or '1/f noise' can be achieved by considering the use of a trap with a certain bandwidth resolution.
In some embodiments, the receiving dc correction method further comprises:
when the gain gear of the current receiving link changes, the steps of carrying out direct current cancellation on the service signal according to the gain gear of the current receiving link, calling the corresponding direct current estimated value from the lookup table, carrying out arithmetic average blind correction on the service signal after the direct current cancellation, and carrying out direct current tracking correction and/or notch correction on the zero frequency notch of the notch filter after the arithmetic average is finished are repeatedly executed.
That is, when the receiving link gain steps are changed, step S120 is repeated to achieve direct current correction of the respective gain steps.
The technical scheme of the application is described below with reference to a specific application example and the attached drawings.
In a specific application example, the test signal in the application is a single-tone signal with offset of-10M, the frequency point of the downlink local oscillator is 3.5G, the frequency point of the signal is 3.49GHz, the transmitter chip is Bai Ze, and the chip is a special radio frequency transmitter chip for TDD (Time Division Duplexing) and has zero intermediate frequency receiving architecture.
The implementation method of the application comprises the following steps:
s1: and initializing and powering up, inputting no signal externally, adjusting the RX receiving link gain ATT gear 32 by software operation logic, carrying out direct current offset estimation on each gear under the gear 32, and recording the estimated value into a lookup table.
S2: a single-tone signal of a 3.49GHz frequency point is externally input, the power is-10 dBm, the gain ATT gear is set to 13, the software calls a direct current estimated value under the gear to perform direct current cancellation, and then arithmetic average blind correction is triggered once.
S3: after software obtains that arithmetic mean blind correction is finished, starting direct current tracking correction and correction factorsSet to 1/32768.
S4: at S3 the trap correction is turned on simultaneously, the filter constant r=0.999.
The application can solve the direct current residue in the received signal more ideally, and can ensure stable performance when the direct current is deteriorated due to non-ideal analog devices, and the sensitivity demodulation quality of the received signal is not affected.
In a second aspect, an embodiment of the present application further provides a receiving dc correction device, including:
the construction module is used for constructing a lookup table according to the gain gear of the receiving link when the power-on is initialized, wherein the lookup table comprises each gain gear of the receiving link and a corresponding direct current estimated value;
and the correction module is used for receiving the service signal, calling a corresponding direct current estimated value from the lookup table according to the current receiving link gain gear to perform direct current cancellation on the service signal, performing arithmetic average blind correction on the direct current cancelled service signal, and performing direct current tracking correction and/or trap zero frequency notch correction after the arithmetic average is finished.
In a third aspect, an embodiment of the present application further provides a computer device, including a memory and a processor, where the memory stores a computer program, and the computer program when executed by the processor causes the processor to perform the steps of the method for receiving dc correction according to any one of the first aspect.
Fig. 2 is an internal structural view of a computer device according to an embodiment of the present application. Referring to FIG. 2, in some embodiments, the computer device includes a processor, memory, and a network interface connected by a system bus. The memory includes a nonvolatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and may also store a computer program which, when executed by a processor, causes the processor to implement the steps of any of the methods of receiving dc correction as described above. The internal memory may also have stored therein a computer program which, when executed by a processor, causes the processor to perform the steps of any of the methods of receiving dc correction as described above. It will be appreciated by persons skilled in the art that the architecture shown in fig. 2 is merely a block diagram of some of the architecture relevant to the present inventive arrangements and is not limiting as to the computer device to which the present inventive arrangements are applicable, and that a particular computer device may include more or fewer components than shown, or may combine some of the components, or have a different arrangement of components.
In a fourth aspect, an embodiment of the present application further provides a computer readable storage medium storing a computer program, which when executed by a processor, causes the processor to perform the steps of the method for receiving dc correction according to any one of the first aspects.
Those skilled in the art will appreciate that implementing all or part of the above-described methods in accordance with the embodiments may be accomplished by way of a computer program stored in a non-transitory computer readable storage medium, which when executed may comprise the steps of the embodiments of the methods described above. Any reference to memory, storage, database, or other medium used in embodiments provided herein may include non-volatile and/or volatile memory. The nonvolatile memory can include Read Only Memory (ROM), programmable ROM (PROM), electrically Programmable ROM (EPROM), electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double Data Rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous Link DRAM (SLDRAM), memory bus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), among others.
The technical features of the above embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The foregoing examples illustrate only a few embodiments of the application, which are described in detail and are not to be construed as limiting the scope of the application. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the application, which are all within the scope of the application. Accordingly, the scope of protection of the present application is to be determined by the appended claims.
Claims (9)
1. A method of receiving dc correction, the method comprising:
when power-on initialization is performed, a lookup table is constructed according to the gain gear of the receiving link, wherein the lookup table comprises each gain gear of the receiving link and a corresponding direct current estimated value thereof;
receiving service signals, calling corresponding direct current estimated values from the lookup table according to the current receiving link gain gear to perform direct current cancellation on the service signals, performing arithmetic average blind correction on the service signals after the direct current cancellation, and performing direct current tracking correction and/or trap zero frequency notch correction after the arithmetic average is finished;
the constructing a lookup table according to the gain gear of the receiving link comprises:
according to the interval range of the receiving link gain gears, calculating a direct current estimated value by using an arithmetic average blind correction algorithm every time when one receiving link gain gear is enabled, and correspondingly writing each receiving link gain gear and each calculated direct current estimated value into a lookup table.
2. The method of claim 1, wherein the correction algorithm used for performing the arithmetic mean blind correction is expressed as follows:
wherein,for inputting signals +.>For outputting signals +.>For input signal +.>Before starting to cancel>Time-estimated DC offset, +.>Is the accumulated length of the correction algorithm.
3. The method of claim 1, wherein the correction algorithm used for performing the dc tracking correction is expressed as follows:
wherein,z-transformation of the output time-domain signal for DC tracking correction>Correcting the Z-transformation of the input time-domain signal for DC tracking,/->Z-transformation for a DC tracking correction system function, < >>Is a correction factor.
4. The method of claim 1, wherein the correction algorithm used for notch zero notch correction is expressed as follows:
wherein,for outputting signals +.>R is a filter constant for the input signal.
5. The method of claim 4, wherein r has a value of 0.999.
6. The method of receiving dc correction according to claim 1, further comprising:
and when the current receiving link gain gear is changed, repeatedly executing the steps of carrying out direct current cancellation on the service signal according to the current receiving link gain gear and calling a corresponding direct current estimated value from the lookup table, carrying out arithmetic average blind correction on the service signal after the direct current cancellation, and carrying out direct current tracking correction and/or trap zero frequency trap correction after the arithmetic average is finished.
7. A receiving dc correction device, the device comprising:
the construction module is used for constructing a lookup table according to the gain gear of the receiving link when the power-on is initialized, wherein the lookup table comprises each gain gear of the receiving link and a corresponding direct current estimated value; the constructing a lookup table according to the gain gear of the receiving link comprises: according to the interval range of the gain gears of the receiving link, calculating a direct current estimated value by using an arithmetic average blind correction algorithm every time when one gain gear of the receiving link is enabled, and correspondingly writing each gain gear of the receiving link and the direct current estimated value calculated every time into a lookup table;
and the correction module is used for receiving the service signal, calling a corresponding direct current estimated value from the lookup table according to the current receiving link gain gear to perform direct current cancellation on the service signal, performing arithmetic average blind correction on the service signal after the direct current cancellation, and performing direct current tracking correction and/or notch correction on a notch trap after the arithmetic average is finished.
8. A computer device comprising a memory and a processor, the memory storing a computer program that, when executed by the processor, causes the processor to perform the steps of the received direct current correction method of any one of claims 1 to 6.
9. A computer-readable storage medium, characterized in that a computer program is stored, which, when being executed by a processor, causes the processor to perform the steps of the receiving direct current correction method according to any one of claims 1 to 6.
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