CN116977407A - Grain positioning method, device, equipment and readable storage medium - Google Patents
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Abstract
本发明提供一种晶粒定位方法、装置、设备及可读存储介质。该方法包括：对原始晶圆图像上的晶粒的形状以及灰度值进行校正，得到新的晶圆图像；从新的晶圆图像上选择待定位晶粒，根据所述待定位晶粒在所述新的晶圆图像上的坐标确定搜索范围；计算所述搜索范围内各个像素位置对应的第一图像与第二图像的灰度差值，确定最小灰度差值对应的目标像素位置，其中，第一图像为新的晶圆图像中像素位置处对应的预设尺寸的图像，第二图像为标准晶圆图像中像素位置处对应的预设尺寸的图像；根据所述目标像素位置得到所述待定位晶粒的定位信息。通过本发明，提高了晶粒定位速度，实现了晶粒实时定位的效果。
The invention provides a crystal grain positioning method, device, equipment and a readable storage medium. The method includes: correcting the shape and grayscale value of the grain on the original wafer image to obtain a new wafer image; selecting the grain to be positioned from the new wafer image, and positioning the grain according to the location of the grain to be positioned The coordinates on the new wafer image determine the search range; calculate the grayscale difference between the first image and the second image corresponding to each pixel position within the search range, and determine the target pixel position corresponding to the minimum grayscale difference, where , the first image is the image of the preset size corresponding to the pixel position in the new wafer image, and the second image is the image of the preset size corresponding to the pixel position in the standard wafer image; the obtained result is obtained according to the target pixel position. Describe the positioning information of the grain to be positioned. Through the present invention, the crystal grain positioning speed is improved and the effect of real-time positioning of the crystal grains is achieved.
Description
Technical Field
The present invention relates to the field of semiconductor appearance detection technologies, and in particular, to a method, an apparatus, a device, and a readable storage medium for locating a die.
Background
The traditional grain positioning mode adopts a mode of coarse positioning and fine positioning, and a target object is searched on an original picture in a mode of matching two template images. For example, after wavelet filtering decomposition is carried out on the original image, a first search is carried out on the low-resolution image to find the approximate position of the crystal grain; and finding out the accurate grain position on the original image through the second matching. The traditional grain positioning mode performs a large amount of computation (wavelet decomposition and convolution computation) on each image, so that the grain positioning speed is slower, and the effect of real-time positioning cannot be achieved.
Disclosure of Invention
The invention mainly aims to provide a grain positioning method, a device, equipment and a readable storage medium, which aim to solve the technical problem of slower grain positioning speed in the prior art.
In a first aspect, the present invention provides a die positioning method, including:
correcting the shapes and gray values of the crystal grains on the original wafer image to obtain a new wafer image;
selecting a crystal grain to be positioned from a new wafer image, and determining a search range according to the coordinates of the crystal grain to be positioned on the new wafer image;
calculating gray level difference values of a first image and a second image corresponding to each pixel position in the search range, and determining a target pixel position corresponding to the minimum gray level difference value, wherein the first image is an image with a preset size corresponding to the pixel position in a new wafer image, and the second image is an image with a preset size corresponding to the pixel position in a standard wafer image;
and obtaining the positioning information of the crystal grains to be positioned according to the target pixel positions.
Optionally, the step of determining the search range according to the coordinates of the die to be positioned on the new wafer image includes:
and diffusing by taking the coordinates of the crystal grains to be positioned on the new wafer image as a central point to obtain a search range, wherein the abscissa of the search range is larger than or equal to m-a and smaller than or equal to m+a, the ordinate of the search range is larger than or equal to n-b and smaller than or equal to n+b, the coordinates of the crystal grains to be positioned on the new wafer image are (m, n), and a and b are preset values respectively.
Optionally, a is a transverse motion precision error of the acquisition device, b is a longitudinal motion precision error of the acquisition device, and the acquisition device is used for acquiring the original wafer image.
Optionally, the step of obtaining the positioning information of the die to be positioned according to the target pixel position includes:
acquiring gray level difference values of at least four neighborhood pixel positions adjacent to the target pixel position;
and obtaining the sub-pixel level coordinates of the crystal grains to be positioned according to the target pixel positions and the gray level difference values of the at least four neighborhood pixel positions.
Optionally, the step of obtaining the sub-pixel level coordinates of the grain to be located according to the gray level difference values of the target pixel position and the at least four neighboring pixel positions includes:
fitting according to the gray level difference values of the target pixel position and the at least four neighborhood pixel positions to obtain a two-dimensional normal distribution function;
and obtaining the sub-pixel level coordinates of the crystal grains to be positioned according to the two-dimensional normal distribution function.
Optionally, the at least four neighborhood pixel locations are up, down, left, and right neighborhood pixel locations.
Optionally, the step of correcting the shape and gray value of the die on the original wafer image includes:
and carrying out distortion correction and flat field correction on the original wafer image.
In a second aspect, the present invention also provides a die positioning apparatus, including:
the correction module is used for correcting the shapes and gray values of the crystal grains on the original wafer image to obtain a new wafer image;
the range determining module is used for selecting a crystal grain to be positioned from a new wafer image and determining a searching range according to the coordinates of the crystal grain to be positioned on the new wafer image;
the calculation module is used for calculating gray level difference values of a first image and a second image corresponding to each pixel position in the search range and determining a target pixel position corresponding to the minimum gray level difference value, wherein the first image is an image with a preset size corresponding to the pixel position in a new wafer image, and the second image is an image with a preset size corresponding to the pixel position in a standard wafer image;
and the positioning module is used for obtaining the positioning information of the crystal grains to be positioned according to the target pixel positions.
In a third aspect, the present invention also provides a die positioning apparatus comprising a processor, a memory, and a die positioning program stored on the memory and executable by the processor, wherein the die positioning program, when executed by the processor, implements the steps of the die positioning method as described above.
In a fourth aspect, the present invention also provides a readable storage medium having stored thereon a die positioning program, wherein the die positioning program, when executed by a processor, implements the steps of the die positioning method as described above.
In the invention, the shapes and gray values of crystal grains on an original wafer image are corrected to obtain a new wafer image; selecting a crystal grain to be positioned from a new wafer image, and determining a search range according to the coordinates of the crystal grain to be positioned on the new wafer image; calculating gray level difference values of a first image and a second image corresponding to each pixel position in the search range, and determining a target pixel position corresponding to the minimum gray level difference value, wherein the first image is an image with a preset size corresponding to the pixel position in a new wafer image, and the second image is an image with a preset size corresponding to the pixel position in a standard wafer image; and obtaining the positioning information of the crystal grains to be positioned according to the target pixel positions. According to the invention, matching is not required in the whole image range, and only the gray level difference value of the first image and the second image corresponding to each pixel position is calculated in the determined search range, so that the positioning information of the crystal grain to be positioned is determined according to the calculation result, the calculation amount is reduced, the crystal grain positioning speed is improved, and the effect of real-time positioning of the crystal grain is realized.
Drawings
FIG. 1 is a flow chart of an embodiment of a die positioning method according to the present invention;
FIG. 2 is a schematic diagram of at least four neighboring pixel locations in an embodiment;
FIG. 3 is a functional block diagram of a die-positioning apparatus according to an embodiment of the present invention;
fig. 4 is a schematic hardware structure of a die positioning apparatus according to an embodiment of the present invention.
The achievement of the objects, functional features and advantages of the present invention will be further described with reference to the accompanying drawings, in conjunction with the embodiments.
Detailed Description
It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
In a first aspect, an embodiment of the present invention provides a method for positioning a die.
In an embodiment, referring to fig. 1, fig. 1 is a flow chart of an embodiment of a die positioning method according to the present invention. As shown in fig. 1, the die positioning method includes:
step S10, correcting the shapes and gray values of crystal grains on an original wafer image to obtain a new wafer image;
in this embodiment, the original wafer image is acquired by the acquisition device, and the acquired original wafer image may have distortion, so that the shape and gray value of the die on the original wafer image need to be corrected, thereby obtaining a new wafer image.
Further, in an embodiment, the step of correcting the shape and gray value of the die on the original wafer image includes:
and carrying out distortion correction and flat field correction on the original wafer image.
In this embodiment, the distortion correction and the flat field correction are performed on the original wafer image, so as to correct the shape and the gray value of the die on the original wafer image, thereby obtaining a new wafer image. The purpose is to restore the shape and gray values of all dies on the original wafer image to be as identical as possible to the standard dies.
Step S20, selecting a crystal grain to be positioned from a new wafer image, and determining a search range according to the coordinates of the crystal grain to be positioned on the new wafer image;
in this embodiment, a die to be positioned that is not positioned is selected from the new wafer image, and the search range is determined by the coordinates (m, n) of the die to be positioned on the new wafer image. For example, a range with (m, n) as the center and r as the radius is used as the search range, and the value of r is set according to the actual situation.
Further, in an embodiment, the step of determining the search range according to the coordinates of the die to be positioned on the new wafer image includes:
and diffusing by taking the coordinates of the crystal grains to be positioned on the new wafer image as a central point to obtain a search range, wherein the abscissa of the search range is larger than or equal to m-a and smaller than or equal to m+a, the ordinate of the search range is larger than or equal to n-b and smaller than or equal to n+b, the coordinates of the crystal grains to be positioned on the new wafer image are (m, n), and a and b are preset values respectively.
In this embodiment, the values of a and b are preset according to the actual situation. Optionally, a is a transverse motion precision error of the acquisition device, b is a longitudinal motion precision error of the acquisition device, and the acquisition device is used for acquiring the original wafer image. According to the embodiment, the search range is determined according to the motion precision error of the acquisition equipment, so that the whole-image matching calculation can be avoided, and the calculated amount is greatly reduced.
Step S30, calculating gray level difference values of a first image and a second image corresponding to each pixel position in the search range, and determining a target pixel position corresponding to the minimum gray level difference value, wherein the first image is an image with a preset size corresponding to the pixel position in a new wafer image, and the second image is an image with a preset size corresponding to the pixel position in a standard wafer image;
in this embodiment, after determining the search range, gray level differences of the first image and the second image corresponding to each pixel position in the search range are sequentially calculated, and the calculation process is presented as follows:
wherein w and h are respectively the width and height of a preset size, src (x+i, y+j) is the gray value at (x+i, y+j) in the standard wafer image, tmp (x+i, y+j) is the gray value at (x+i, y+j) in the new wafer image, and delta (i, j) is the gray difference value between the first image and the second image corresponding to a pixel position (i, j), wherein (i, j) is in the searching range.
The preset size can be standard grain size or set according to actual requirements.
After the gray difference value of the first image and the second image corresponding to each pixel position in the searching range is obtained, searching for the minimum gray difference value, and taking the pixel position corresponding to the minimum gray difference value as the target pixel position.
In this embodiment, compared with the conventional error calculation formula, which is a calculation region correlation, the error calculation formula of this embodiment adopts a mode of subtracting the gray values of the images, so that the calculated amount is very small, and the gray difference value calculation corresponding to each pixel position is mutually independent, so that the method is suitable for performing performance optimization on the FPGA or the GPU, and can further improve the instantaneity.
And step S40, positioning information of the crystal grains to be positioned is obtained according to the target pixel positions.
In this embodiment, after determining the target pixel position, the target pixel position may be directly used as the positioning information of the die to be positioned. Of course, the correlation calculation may be performed with the target pixel position and the adjacent pixel position, and the calculation result may be used as the positioning information of the die to be positioned.
The above steps S20 to S40 are repeated to obtain the positioning information of each die to be positioned selected from the new wafer image.
In this embodiment, the shapes and gray values of the grains on the original wafer image are corrected to obtain a new wafer image; selecting a crystal grain to be positioned from a new wafer image, and determining a search range according to the coordinates of the crystal grain to be positioned on the new wafer image; calculating gray level difference values of a first image and a second image corresponding to each pixel position in the search range, and determining a target pixel position corresponding to the minimum gray level difference value, wherein the first image is an image with a preset size corresponding to the pixel position in a new wafer image, and the second image is an image with a preset size corresponding to the pixel position in a standard wafer image; and obtaining the positioning information of the crystal grains to be positioned according to the target pixel positions. According to the embodiment, matching is not required in the whole image range, and only the gray level difference value of the first image and the second image corresponding to each pixel position is calculated in the determined searching range, so that the positioning information of the crystal grains to be positioned is determined according to the calculation result, the calculation amount is reduced, the crystal grain positioning speed is improved, and the effect of real-time positioning of the crystal grains is realized.
Further, in an embodiment, step S40 includes:
step S401, obtaining gray level difference values of at least four neighborhood pixel positions adjacent to the target pixel position;
in this embodiment, at least four neighboring pixel positions are selected according to practical situations, and referring to fig. 2, fig. 2 is a schematic diagram of at least four neighboring pixel positions in an embodiment. As shown in fig. 2, (p, q) is the target pixel location, and at least four neighborhood pixel locations are the up, down, left, and right neighborhood pixel locations, i.e., (p, q+1), (p, q-1), (p-1, q), and (p+1, q).
It should be noted that, here, only a schematic description of at least four neighboring pixel positions is provided, and no limitation is made to at least four neighboring pixel positions. It is readily understood that the at least four neighborhood pixel locations may also be up, down, left, right, upper left, upper right, lower left and lower right neighborhood pixel locations, and may also be upper left, upper right, lower left and lower right neighborhood pixel locations.
Step S402, obtaining the sub-pixel level coordinates of the grain to be positioned according to the target pixel position and the gray level difference values of the at least four neighboring pixel positions.
In this embodiment, gaussian interpolation is performed according to the target pixel position and the gray difference values of the at least four neighboring pixel positions, so as to obtain the sub-pixel level coordinates of the grains to be positioned.
Further, in an embodiment, step S402 includes:
fitting according to the gray level difference values of the target pixel position and the at least four neighborhood pixel positions to obtain a two-dimensional normal distribution function; and obtaining the sub-pixel level coordinates of the crystal grains to be positioned according to the two-dimensional normal distribution function.
In this embodiment, the two-dimensional normal distribution function expression is as follows:
wherein G (x, y) is the gray level difference of the neighborhood pixel position, (x) 0 ，y 0 ) For the target pixel position, σ is the standard deviation. And taking the gray level difference value of the target pixel position and one neighborhood pixel position as a group of values, substituting each group of values into a two-dimensional normal distribution function to obtain at least 4 equations, solving at least 4 equations to obtain (x, y) and sigma, and fitting to obtain the two-dimensional normal distribution function. And fitting to obtain the sub-pixel level coordinates of the (x, y) crystal grains to be positioned in the two-dimensional normal distribution function.
The sub-pixel level coordinates of the crystal grains to be positioned are obtained through the embodiment, and compared with the existing crystal grain positioning, the pixel level precision can be only achieved, and the crystal grain positioning precision is improved.
In a second aspect, an embodiment of the present invention further provides a device for positioning a die.
In an embodiment, referring to fig. 3, fig. 3 is a schematic functional block diagram of a die positioning apparatus according to an embodiment of the invention. The die positioning apparatus as shown in fig. 3 includes:
the correction module 10 is used for correcting the shapes and gray values of the crystal grains on the original wafer image to obtain a new wafer image;
a range determining module 20, configured to select a die to be located from a new wafer image, and determine a search range according to coordinates of the die to be located on the new wafer image;
the calculating module 30 is configured to calculate a gray level difference value between a first image and a second image corresponding to each pixel position in the search range, and determine a target pixel position corresponding to the minimum gray level difference value, where the first image is an image of a preset size corresponding to a pixel position in a new wafer image, and the second image is an image of a preset size corresponding to a pixel position in a standard wafer image;
and a positioning module 40, configured to obtain positioning information of the die to be positioned according to the target pixel position.
Further, in an embodiment, the range determining module 20 is configured to:
and diffusing by taking the coordinates of the crystal grains to be positioned on the new wafer image as a central point to obtain a search range, wherein the abscissa of the search range is larger than or equal to m-a and smaller than or equal to m+a, the ordinate of the search range is larger than or equal to n-b and smaller than or equal to n+b, the coordinates of the crystal grains to be positioned on the new wafer image are (m, n), and a and b are preset values respectively.
Further, in an embodiment, a is a transverse motion precision error of the collecting device, and b is a longitudinal motion precision error of the collecting device, where the collecting device is used for collecting the original wafer image.
Further, in an embodiment, the positioning module 40 is configured to:
acquiring gray level difference values of at least four neighborhood pixel positions adjacent to the target pixel position;
and obtaining the sub-pixel level coordinates of the crystal grains to be positioned according to the target pixel positions and the gray level difference values of the at least four neighborhood pixel positions.
Further, in an embodiment, the positioning module 40 is configured to:
fitting according to the gray level difference values of the target pixel position and the at least four neighborhood pixel positions to obtain a two-dimensional normal distribution function;
and obtaining the sub-pixel level coordinates of the crystal grains to be positioned according to the two-dimensional normal distribution function.
Further, in an embodiment, the at least four neighborhood pixel locations are up, down, left, and right neighborhood pixel locations.
Further, in an embodiment, the correction module is configured to:
and carrying out distortion correction and flat field correction on the original wafer image.
The function implementation of each module in the above-mentioned die positioning device corresponds to each step in the above-mentioned die positioning method embodiment, and the function and implementation process thereof are not described in detail herein.
In a third aspect, an embodiment of the present invention provides a die-positioning apparatus, which may be a personal computer (personal computer, PC), a notebook computer, a server, or the like, having a data processing function.
Referring to fig. 4, fig. 4 is a schematic hardware structure of a die positioning apparatus according to an embodiment of the present invention. In an embodiment of the present invention, the die positioning apparatus may include a processor 1001 (e.g., central processing unit Central Processing Unit, CPU), a communication bus 1002, a user interface 1003, a network interface 1004, and a memory 1005. Wherein the communication bus 1002 is used to enable connected communications between these components; the user interface 1003 may include a Display screen (Display), an input unit such as a Keyboard (Keyboard); the network interface 1004 may optionally include a standard wired interface, a WIreless interface (e.g., WIreless-FIdelity, WI-FI interface); the memory 1005 may be a high-speed random access memory (random access memory, RAM) or a stable memory (non-volatile memory), such as a disk memory, and the memory 1005 may alternatively be a storage device independent of the processor 1001. Those skilled in the art will appreciate that the hardware configuration shown in fig. 4 is not limiting of the invention and may include more or fewer components than shown, or may combine certain components, or a different arrangement of components.
With continued reference to fig. 4, an operating system, a network communication module, a user interface module, and a die positioning program may be included in memory 1005, fig. 4, which is a computer storage medium. The processor 1001 may call a die positioning program stored in the memory 1005, and execute the die positioning method provided in the embodiment of the present invention.
In a fourth aspect, embodiments of the present invention also provide a readable storage medium.
The readable storage medium of the present invention stores a die positioning program, wherein the die positioning program, when executed by a processor, implements the steps of the die positioning method as described above.
The method implemented when the die positioning procedure is executed may refer to various embodiments of the die positioning method of the present invention, and will not be described herein.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or system. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or system that comprises the element.
The foregoing embodiment numbers of the present invention are merely for the purpose of description, and do not represent the advantages or disadvantages of the embodiments.
From the above description of the embodiments, it will be clear to those skilled in the art that the above-described embodiment method may be implemented by means of software plus a necessary general hardware platform, but of course may also be implemented by means of hardware, but in many cases the former is a preferred embodiment. Based on such understanding, the technical solution of the present invention may be embodied essentially or in a part contributing to the prior art in the form of a software product stored in a storage medium (e.g. ROM/RAM, magnetic disk, optical disk) as described above, comprising several instructions for causing a terminal device to perform the method according to the embodiments of the present invention.
The foregoing description is only of the preferred embodiments of the present invention, and is not intended to limit the scope of the invention, but rather is intended to cover any equivalents of the structures or equivalent processes disclosed herein or in the alternative, which may be employed directly or indirectly in other related arts.
Claims (10)
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