CN116819503B

CN116819503B - Echo calibration method, device and equipment based on FPGA-TDC and storage medium

Info

Publication number: CN116819503B
Application number: CN202310811550.0A
Authority: CN
Inventors: 胡连逵; 陈鹏
Original assignee: Guangdong Xingsong Technology Co ltd
Current assignee: Guangdong Xingsong Technology Co ltd
Priority date: 2023-07-04
Filing date: 2023-07-04
Publication date: 2024-08-13
Anticipated expiration: 2043-07-04
Also published as: CN116819503A

Abstract

The application relates to an echo calibration method, device, equipment and storage medium based on FPGA-TDC, wherein the method comprises the steps of acquiring the signal rising edge of an input pulse signal in an idle state, and performing data processing on the signal rising edge to obtain signal combination data containing a fine count value and a corresponding coarse count value; performing echo screening processing on the signal combination data to obtain combination filtering data which enable the echoes of all signal channels to be in a mutually matched state; acquiring combined filtering data and a corresponding highest address in a measurement state, combining and storing the combined filtering data according to the highest address, and controlling calibration switching of combined echo data after combining and storing through the highest address; and respectively calculating the echo interval between each two echoes according to the switched combined echo data to obtain the calibration measurement time value of each echo. The application has the effect of improving the suitability of the measuring frequency of the laser radar and the TDC chip during complete calibration.

Description

Echo calibration method, device and equipment based on FPGA-TDC and storage medium

Technical Field

The invention relates to the technical field of time measurement calibration, in particular to an echo calibration method, device and equipment based on FPGA-TDC and a storage medium.

Background

At present, continuous time is converted into digital quantity through a TDC chip so as to realize the digitization of time measurement, the TDC chip is widely applied to the high-precision fields such as laser, radar, oscilloscopes and the like, but the echo detection effect is poor due to the fact that the echo measurement interval of the TDC chip is too long, and higher requirements are also put forward on the accurate calibration of the echo interval time of the TDC chip.

The existing TDC chip usually carries out echo calibration by selecting received echoes, calibrating the selected echoes based on DELAY LINE TDC chips, carrying out rapid time delay convergence on delayline time delay units in a digital mode, and improving the calibration efficiency of the TDC chip by calculating average difference values of continuous clock cycles in a plurality of clock cycles, but the calibration precision of the TDC chip based on DELAY LINE is easily affected by temperature and voltage changes, so that the calibration needs to be carried out rapidly, the once complete calibration time of the TDC chip time delay convergence is overlong, the high-frequency measurement frequency of the laser radar cannot meet the idle time required by the once calibration of the TDC chip, and in summary, the existing TDC chip echo calibration mode has the defect that the measurement idle time of the laser radar is not suitable for the complete calibration of the TDC chip.

Disclosure of Invention

In order to improve the suitability of the measuring frequency of the laser radar and the complete calibration of the TDC chip, the application provides an echo calibration method, device and equipment based on FPGA-TDC and a storage medium.

The first object of the present application is achieved by the following technical solutions:

an echo calibration method based on FPGA-TDC, the method comprising:

in an idle state, acquiring a signal rising edge of an input pulse signal, and performing data processing on the signal rising edge to obtain signal combination data containing a fine count value and a corresponding coarse count value;

performing echo screening processing on the signal combination data to obtain combination filtering data which enable the echoes of all signal channels to be in a mutually matched state;

Acquiring combined filtering data and a corresponding highest address in a measurement state, combining and storing the combined filtering data according to the highest address, and controlling calibration switching of combined echo data after combined storage through the highest address;

And respectively calculating the echo interval between each two echoes according to the switched combined echo data to obtain a calibration measurement time value of each echo.

By adopting the technical scheme, because the time delay time convergence of DELAY LINE is not ideal through the logic of the FPGA, the time delay time convergence is required to be calibrated quickly, but the working frequency of the laser radar is difficult to have enough idle time to complete one-time complete time delay time convergence calibration, therefore, the application meets the real-time calibration under the working frequency of the laser radar through the calibration mode of cutting the calibration time, the application processes the input pulse signals in the idle state of the laser radar, extracts the rising edge corresponding to the pulse signals, inputs the signal rising edge into a preset DELAY LINE delay chain for fine count measurement, obtains the corresponding fine count value, latches the total value according to the enabling condition of the signal rising edge, thus obtaining the corresponding coarse count value, synthesizes the fine count value corresponding to the signal rising edge and the coarse count value into a group of signal combination data, is beneficial to expanding the calculation dimension of time measurement, and according to the enabling state of each channel data, grabs the data of the corresponding channel to match the error value or invalid value which does not meet the requirement of the correct data combination enabling state, thereby obtaining the filtering error value according to the preset error value, filtering the error value of the error combination, filtering the filtering error value is controlled by the filtering error value, the filtering error value is controlled by the filtering the error value of the error node, the filtering error value is matched with the error value is more than the optimal filtering value, and the error value is matched with the error-filtered by the error correction data, the filtering node is stored when the error is matched with the error-filtered by the error value, and the error value is compared with the error-filtered by the error-filter data, according to the combined echo data switched to the calibration state, the echo interval between each two echoes is calculated respectively, and the echo idle time of the laser radar is judged according to the echo interval, so that the calibration measurement time value of each echo is obtained, accurate calculation is facilitated when the TDC chip of the laser radar is calibrated in the idle state, and the suitability of the measurement frequency of the laser radar and the TDC chip in the complete calibration is improved according to the calibration measurement time value of each echo and the corresponding calibration cutting time.

The present application may be further configured in a preferred example to: the method for obtaining the combined filtered data and the corresponding highest-order address in the measurement state, and combining and storing the combined filtered data and the data to be calibrated, wherein the method for controlling the calibration switching of the combined echo data after the combined and stored data is controlled by the highest-order address specifically comprises the following steps:

Acquiring combined filtering data in a measurement state, and carrying out data analysis on the combined filtering data to obtain a highest address corresponding to the current calibration state of the combined filtering data;

according to the highest address, carrying out data classification processing on the combined filtering data to obtain calibrated data and uncalibrated data which are matched with the current measurement state;

Combining and storing the calibrated data and the corresponding uncalibrated data to obtain combined and stored data subjected to calibration switching by using the highest bit address;

And when the measurement state is switched to the idle state, switching the calibrated data to the uncalibrated data according to the highest bit address to perform calibration work.

By adopting the technical scheme, when the laser radar is in a measurement state, the combined filtering data corresponding to the measurement state is obtained, the highest address of the combined filtering data in the current calibration state is obtained through bin width analysis, the control accuracy of the calibration cutting time is improved by judging the calibration switching time of the combined filtering data according to the highest address, the combined filtering data is classified into calibrated data and uncalibrated data according to the highest address, the integral calibration of the combined filtering data is facilitated according to different calibration states, the integrity of the data calibration is improved, the calibrated data of the same channel and the corresponding uncalibrated data are combined and stored in the same ram, the calibration switching is controlled through the highest address, the control convenience of the calibration switching is improved, when the laser radar is switched from the measurement state to the idle state, the calibrated data is controlled to the uncalibrated data according to the highest address in the ram, the calibrated data is switched to the uncalibrated data when the measurement state is used, the calibrated data is switched to the calibrated data according to the calibrated state, the calibrated data is not calibrated when the calibration state, the calibrated data is not calibrated, and the purpose of simultaneously, the calibration of the calibration data of the same channel is not calibrated is achieved when the measurement state is achieved.

The present application may be further configured in a preferred example to: when the measurement state is switched to the idle state, the calibrated data is switched to the uncalibrated data to perform calibration according to the most significant address, and the method further comprises the following steps:

When the idle state is switched to a measurement state, respectively controlling a calibration time node between calibrated data and uncalibrated data of each channel;

adjusting the signal calibration sequence of all channels according to the calibration time node to obtain the corresponding calibration priority of each channel;

And respectively controlling the corresponding channels to switch the input signals according to the calibration priority, and obtaining a control switching signal which is adaptive to the current calibration state.

By adopting the technical scheme, when the laser radar is switched from the idle state to the measurement state, the calibration time node of each channel is controlled to switch the calibrated data into the uncalibrated data, so that the selection of the calibration data responding according to the real-time working state of the laser radar is facilitated, the suitability between the switching of the calibration time node and the real-time working state of the laser radar is improved, the signal calibration sequence of all channels is adjusted according to the calibration time node of each channel, the sequential calibration of the calibrated data and the uncalibrated data of each channel is facilitated according to the obtained calibration priority, the invalid variation of related signals in the uncalibrated time is facilitated to be reduced, the calibration order is improved, the switching of the input signals is controlled according to the calibration priority, the control switching signals after the switching are matched with the current calibration state, and the suitability between the calibration state and the input signals is improved.

The present application may be further configured in a preferred example to: and respectively controlling the corresponding channels to switch input signals according to the calibration priority to obtain control switching signals adaptive to the current calibration state, and further comprising:

switching an input signal into a random signal according to the control switching signal, and performing fine counting calculation processing on the random signal to obtain a corresponding random fine counting value;

Establishing a corresponding bin wide lookup table according to the random fine count value, and storing the bin wide lookup table as an address sequence according to the corresponding random fine count value;

acquiring the calibration times in the current calibration state;

And when the calibration times reach a preset calibration stopping threshold, accumulating the intermediate value of each bin width lookup table to obtain a calibration bin width value corresponding to the current calibration state.

By adopting the technical scheme, during idle period, the input signal is switched into the random signal according to the control switching signal, a new round of calibration work is carried out, the random signal is subjected to fine count calculation processing to obtain a corresponding random fine count value, the fine count processing of each round is carried out on the random signal, the temperature and voltage change influence suffered by the TDC chip in each round of calibration work is controlled in real time, the calibration precision of the current calibration work of the TDC chip is improved, a corresponding bin width lookup table is established according to the random fine count value, the search of the bin width delay corresponding to the random signal at the drop point position on a delay chain is facilitated, the delay search convenience is improved, the corresponding random fine count value is stored as an address sequence, the random signal address after calibration is updated, the update timeliness of calibration data is improved, the suitability between the idle state and the calibration time of the laser radar is judged through the calibration times in the current calibration state, namely the idle state of the laser radar is stopped when the calibration times reach the preset calibration stop threshold, the idle state of the laser radar is switched to the measurement state, the corresponding bin width lookup table in the corresponding bin width position is calculated, the corresponding bin width lookup value in the current calibration state is calculated, the final calibration result is improved, and the final result is calculated.

The present application may be further configured in a preferred example to: and respectively calculating the echo interval between each echo according to the switched combined echo data to obtain a calibration measurement time value of each echo, wherein the method specifically comprises the following steps of:

In a measurement state, acquiring an asynchronous echo signal value of each signal channel according to the current calibration state of the combined echo data;

Respectively calculating echo distance and corresponding echo intensity between adjacent echoes according to the asynchronous echo signal values;

and calculating a calibration measurement time value of each echo in a measurement state according to the echo distance between each echo and the corresponding echo intensity.

By adopting the technical scheme, under the measurement state of the laser radar, the asynchronous echo signal value of each signal channel is obtained in real time according to the current calibration state of the combined echo data, the asynchronous processing order of the channel data is improved by being beneficial to carrying out corresponding echo configuration parameter selection according to the asynchronous echo signal value, the echo distance between adjacent echoes and the corresponding echo intensity are respectively calculated according to the fine count value and the coarse count value of each channel in the asynchronous echo signal value, the echo time required by the current echo of the laser radar is beneficial to judging the current echo intensity and the echo distance, and accordingly, the corresponding calibration measurement time value of each echo is calculated according to the echo distance between each echo and the corresponding echo intensity under the measurement state of the laser radar, so that the echo time measurement work of the TDC chip on the laser radar is completed, and the accuracy of the digital calculation of the echo time measurement is improved.

The present application may be further configured in a preferred example to: and performing echo screening processing on the signal combination data to obtain combination filtering data which enables the echoes of all signal channels to be in a mutually matched state, wherein the method specifically comprises the following steps:

respectively acquiring channel data and a corresponding enabling state of each channel in the signal combination data;

when the channel data of the first channel is in an enabling state, acquiring second channel data corresponding to the enabling state of the first channel;

When the second channel data is in an enabling state, acquiring third channel data corresponding to the enabling state of the second channel, and when the third channel is in the enabling state, carrying out latch processing on the second channel data to obtain screened combined filter data;

And when the measurement state is switched to the idle state, carrying out signal reset processing on the combined filtered data, and carrying out asynchronous storage on the reset combined reset data.

By adopting the technical scheme, when echo screening is carried out, channel data and corresponding enabling states of each channel in the signal combination data are respectively acquired, so that pulse width values required by echo pulse width calculation can be matched correctly, calculation accuracy of time measurement data is improved, when the channel data of a first channel are in the enabling states, second channel data in the enabling states of the first channel are acquired, when the second channel data in the enabling states are acquired, the third channel data are acquired, when the third channel is in the enabling states, the synchronously enabled second channel data are latched, invalid values or error values which do not meet matching requirements are screened out, a group of combined filter data after correct matching is obtained, when the measuring states of the laser radar are switched to idle states, signal resetting processing is carried out on the combined filter data according to stop measurement signals when the measuring states are switched, accurate control is carried out on time nodes matched with the channel data, asynchronous storage processing is carried out on the reset combined reset data, and signal transmission is carried out on the combined reset data after the combined reset data in a cross-clock domain mode.

The present application may be further configured in a preferred example to: when the measurement state is switched to the idle state, performing signal reset processing on the combined filtered data, and asynchronously storing the reset combined reset data, wherein the method specifically comprises the following steps:

When the measurement state is switched to the idle state, controlling the input signals of all channels to be switched to random signals;

according to the calibration state priority of all channels, carrying out signal reset processing on the random signal of each channel to obtain combined reset data corresponding to each channel;

acquiring a state switching node between the measurement state and the idle state;

and carrying out asynchronous storage processing on the combined reset data according to the state switching node to obtain asynchronous storage data corresponding to the current calibration state.

By adopting the technical scheme, when the laser radar is switched from the measurement state to the idle state, the input signals of all channels are controlled to be switched into random signals, so that real-time calibration work is conducted on uncalibrated data, the work switching instantaneity of data calibration is improved, reset processing is conducted on the random signals of each channel according to the calibration state priority of all channels, orderly independent reset processing is conducted on each channel, the reset ordering of each channel is improved, the calibration working time of each channel data is controlled according to the state switching node between the measurement state and the idle state of the laser radar, the aim of conducting calibration work according to the state switching node is fulfilled, asynchronous storage processing is conducted on combined reset data according to the state switching node, the asynchronous storage data after asynchronous storage are matched with the current calibration state of radar laser, the calibration time between echoes corresponds to the state switching node of radar laser, and the suitability between the echo calibration time and the state switching of radar laser is improved.

The second object of the present application is achieved by the following technical solutions:

An echo calibration device based on FPGA-TDC, comprising:

The edge discrimination module is used for acquiring the signal rising edge of the input pulse signal in an idle state, and carrying out data processing on the signal rising edge to obtain signal combination data containing a fine count value and a corresponding coarse count value;

the echo processing module is used for carrying out echo screening processing on the signal combination data to obtain combination filtering data which enable the echoes of all the signal channels to be in a mutually matched state;

the calibration module is used for acquiring the combined filtering data and the corresponding highest address in the measurement state, carrying out combined storage on the combined filtering data according to the highest address, and controlling the calibration switching of the combined echo data after combined storage through the highest address;

and the data processing module is used for respectively calculating the echo interval between each echo according to the combined echo data after switching to obtain the calibration measurement time value of each echo.

By adopting the technical scheme, the application processes the input pulse signal in the idle state of the laser radar, extracts the rising edge corresponding to the pulse signal, inputs the rising edge of the signal into a preset DELAY LINE delay chain for fine count measurement to obtain the corresponding fine count value, latches the total value according to the enabling condition of the rising edge of the signal to obtain the corresponding coarse count value, synthesizes a group of signal combination data by the fine count value corresponding to the rising edge of the signal and the coarse count value, facilitates the expansion of the calculation dimension of time measurement, and captures the data of the corresponding channel according to the enabling state of the data, performs data matching, filters the error value or the invalid value which does not meet the requirement of the correct data combination enabling state, thereby obtaining the combined filter data which is matched with the requirement of the preset data screening, facilitates the reduction of the error interference of the invalid value or the error value to the time measurement calculation result, combines and stores the combined filter data of the same channel according to the highest bit address of the combined filter data, facilitates the control of the calibration switching of the combined echo data, facilitates the calibration switching of the highest bit address, performs the calibration of the combined echo data, performs the calibration of the laser radar, performs the calibration of the echo data under the different time periods, and performs the calibration of the laser radar, and the calibration value is calculated according to the calibration interval between the calibration value and the idle state of the laser radar, and the laser radar has the calibration value, and the calibration time is calculated according to the calibration time interval when the calibration value is calculated and the calibration time is calculated, to improve the suitability of the measured frequency of the lidar for complete calibration of the TDC chip.

The third object of the present application is achieved by the following technical solutions:

A computer device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, the processor implementing the steps of the FPGA-TDC based echo calibration method described above when the computer program is executed.

The fourth object of the present application is achieved by the following technical solutions:

a computer readable storage medium storing a computer program which when executed by a processor implements the steps of the FPGA-TDC based echo calibration method described above.

In summary, the present application includes at least one of the following beneficial technical effects:

1. In the idle state of the laser radar, the application extracts the rising edge corresponding to the input pulse signal, and input into a preset DELAY LINE delay chain to carry out fine count measurement, latch the total value according to the enabling condition of the rising edge of the signal, thereby obtaining a corresponding coarse count value, combining a fine count value and a coarse count value corresponding to the rising edge of the signal into a group of signal combination data, contributing to enlarging the calculation dimension of time measurement, according to the enabling state of each channel data, capturing the data of the corresponding channel to perform data matching, filtering the error value or invalid value which does not meet the requirement of the enabling state of the correct data combination, thus obtaining the mutually matched combined filtered data according to the preset data screening requirement, being beneficial to reducing the error interference of invalid values or error values to time measurement calculation results, and the combined filter data of the same channel is merged and stored according to the highest bit address of the combined filter data, and the control limit of calibration switching of the combined echo data is controlled by the highest address, which is beneficial to time-division calibration of the echo data in different calibration states, improves the adaptability between the calibration cutting node and the idle state of the laser radar, according to the combined echo data switched to the calibration state, respectively calculating the echo interval between each echo, judging the echo idle time of the laser radar according to the echo interval, thereby obtaining the calibration measurement time value of each echo, being beneficial to accurately calculating the calibration time of the TDC chip of the laser radar in idle state, according to the calibration measurement time value of each echo and the corresponding calibration cutting time, the suitability of the measurement frequency of the laser radar and the complete calibration of the TDC chip is improved;

2. when the laser radar is in a measurement state, acquiring combined filtering data corresponding to the measurement state, obtaining the highest address of the combined filtering data in the current calibration state through bin width analysis, and being beneficial to judging the calibration switching time of the combined filtering data according to the highest address, improving the control accuracy of the calibration cutting time, classifying the combined filtering data according to the highest address, dividing the combined filtering data into calibrated data and uncalibrated data according to the calibration state, being beneficial to carrying out complete calibration on the combined filtering data according to different calibration states, improving the integrity of data calibration, and carrying out calibration switching on the calibrated data of the same channel and the corresponding uncalibrated data by combining the calibrated data of the same channel with the corresponding uncalibrated data into the same ram, and improving the control convenience of the calibration switching;

3. When the laser radar is switched from an idle state to a measurement state, the calibration time node of each channel is controlled to switch calibrated data into uncalibrated data, so that the selection of the calibration data responding to the real-time working state of the laser radar is facilitated, the suitability between the switching of the calibration time node and the real-time working state of the laser radar is improved, the signal calibration sequence of all channels is adjusted according to the calibration time node of each channel, the sequential calibration of the calibrated data and the uncalibrated data of each channel is facilitated according to the obtained calibration priority, the invalid variation of related signals in the uncalibrated time is facilitated to be reduced, the calibration order is improved, the switching of input signals is controlled according to the calibration priority, the control switching signals after the switching are matched with the current calibration state, and the suitability between the calibration state and the input signals is improved.

Drawings

Fig. 1 is a flowchart of an implementation of an echo calibration method based on FPGA-TDC according to this embodiment.

Fig. 2 is a flowchart showing an implementation of step S20 of the echo calibration method based on FPGA-TDC in this embodiment.

Fig. 3 is a flowchart showing an implementation of step S204 of the echo calibration method based on FPGA-TDC in this embodiment.

Fig. 4 is a flowchart showing an implementation of step S30 of the echo calibration method based on FPGA-TDC in this embodiment.

Fig. 5 is a flowchart of an implementation of the method for calibrating an ordered signal based on the echo calibration method of FPGA-TDC in this embodiment.

Fig. 6 is a flowchart of an implementation of convenient switching control of the echo calibration method based on FPGA-TDC in this embodiment.

Fig. 7 is a flowchart showing an implementation of step S40 of the echo calibration method based on FPGA-TDC in this embodiment.

Fig. 8 is a block diagram of an echo calibration device based on FPGA-TDC.

Fig. 9 is a schematic diagram of the internal structure of a computer device for implementing an FPGA-TDC based echo calibration method.

Fig. 10 is a signal diagram of the signal enable condition of the coarse count value of the echo calibration method based on FPGA-TDC.

Fig. 11 is a graph of channel data grabbing effects of an echo calibration method based on FPGA-TDC.

Detailed Description

The present application will be described in further detail with reference to the accompanying drawings.

The echo calibration method based on the FPGA-TDC in the embodiment is applied to a 360-degree laser radar system, the measurement function of the TDC can be realized through FPGA logic, the echo detection interval can be greatly shortened, the echo can be flexibly processed according to requirements, the measurement precision of a DELAY LINE-based TDC chip is easily affected by temperature and voltage changes, the FPGA-TDC is calibrated in a digital mode, but the convergence of the delay time of a DELAY LINE delay unit is not ideal through the FPGA logic, so that the calibration needs to be performed as soon as possible, and the idle time of the laser radar cannot meet the once complete binto bin calibration time due to the working frequency of the laser radar system, so that the bin to bin calibration method for cutting the calibration time is adopted in the application.

In an embodiment, as shown in fig. 1, the application discloses an echo calibration method based on FPGA-TDC, which specifically includes the following steps:

S10: and in the idle state, acquiring the signal rising edge of the input pulse signal, and performing data processing on the signal rising edge to obtain signal combination data containing a fine count value and a corresponding coarse count value.

Specifically, the idle state of the lidar is a working state where adjacent echo intervals are located, when the lidar is in the idle state, pulse signals input by the lidar are obtained, data processing is performed on the input pulse signals, signal rising edges corresponding to each pulse signal are extracted through a preset trig_out_reg register, the pulse signals in the embodiment are hit signals, reset signals and enabling signals corresponding to the hit signals are further arranged, the hit signals are used as clock ends of the D trigger, the data port in the embodiment is set to be 1 by default, and in order to reduce echo measurement intervals, after the preset register grabs the signal rising edges, the pulse signals are pulled up through the reset signals in the next clock cycle, so that the grabbed signal rising edges can be pulled down immediately when the next clock cycle is achieved.

In this embodiment, a delay chain is constructed by a logic unit CARRY CHAIN in the FPGA, at this time, the clock period is 200M, by splitting the time period by adopting 40 slices, when an input signal is received, a first trigger detects a reset signal, the detected reset signal is used to close all the triggers of the delay chain and output a time signal in the form of a thermometer code, the thermometer code is converted into a binary code by a binary search algorithm, if the thermometer code forms a trace of 1 of the input signal in the carry chain, normal data is 0, the input signal is gradually changed from low order to high order to 1, firstly, whether the current data is 1 is judged from the middle position of all the data, if 1 is the current data, then the current data is continuously judged, if 0 is the low order data, then the high order data is discarded, then the low order data is continuously judged, if the middle position of the data is again judged to be 1 in the reserved data, and so on, the position of each judgment point represents a binary bit, thus the binary data is combined into a binary count value form.

In this embodiment, the bit width is changed according to the difference of the measurement ranges, in the clock domain of 200M, the calculation of the coarse count value is started after the start signal is received, when the signal rising edges of the first data enable signal and the second data enable signal of the fine count value are received, the total value in the count is latched, so as to obtain the coarse count value, the coarse count value and the corresponding fine count value are combined into a group of signal combination data, the signal enabling situation of the coarse count value is shown in fig. 10, wherein clk represents the 200M clock, start represents the start measurement signal, the data enable signals of the fine count values obtained after the encoding are respectively represented by the start signal of the counter of the fine count value, and start is used as the start signal of the counter of the coarse count value, and the storage of the count value is performed when the signal rising edges of the first data enable signal and the second data enable signal arrive.

S20: and carrying out echo screening processing on the signal combination data to obtain combination filtering data which enable the echoes of all the signal channels to be in a mutually matched state.

Specifically, as shown in fig. 2, step S20 specifically includes the following steps:

S201: channel data and corresponding enabling states of each channel in the signal combination data are acquired respectively.

Specifically, in this embodiment, three channels are set for signal input, and since multiple echoes of the laser radar mainly occur multiple pulses in the received pulse signal, corresponding channel data are obtained according to the pulse of each channel, and echo states of each channel are matched one by constructing a state machine, so as to obtain an enabling state corresponding to each channel.

S202: and when the channel data of the first channel is in the enabling state, acquiring second channel data corresponding to the enabling state of the first channel.

Specifically, the enabling condition of the channel data of the first channel is obtained through a preset state machine, and when the state machine receives the enabling signal of the first channel, the state machine starts to intercept the channel data of the second channel, so that the second channel data corresponding to the enabling state of the first channel is obtained.

S203: and when the second channel data is in the enabling state, acquiring third channel data corresponding to the enabling state of the second channel, and when the third channel is in the enabling state, carrying out latch processing on the second channel data to obtain screened combined filter data.

Specifically, when the state machine captures an enabling signal of the second channel, it indicates that the second channel data is in an enabling state, channel data of the third channel is captured under the second channel enabling state, so that the third channel data corresponding to the second channel enabling state can be obtained, the third channel enabling signal is received by the state machine, when the third channel data is in an enabling pull-up state, the second channel data is also synchronously enabled to be pulled up, then latch processing is performed on the second channel data, the state machine remains unchanged, and a group of data which are correctly matched is obtained, a data capturing effect diagram of the first channel data, the second channel data and the third channel data is shown in fig. 11, clk is a clock signal, channel1_data_en is an enabling signal of the first channel data, channel2_data_en is an enabling signal of the second channel data, and channel3_data_en is an enabling signal of the third channel data.

S204: when the measurement state is switched to the idle state, the signal reset processing is carried out on the combined filtered data, and the reset combined reset data is asynchronously stored.

Specifically, after a group of data which is correctly matched is obtained, the data of the third channel is continuously grabbed to match a plurality of groups of data, and when the laser radar is switched from the measurement state to the idle state, a stop measurement signal is sent to reset the state machine and related signals, so that unnecessary invalid values or error values are filtered. And the clock period is reduced from 200M to 100M, and the reset combined reset data is asynchronously stored through an asynchronous FIFO.

Specifically, as shown in fig. 3, step S204 specifically includes the following steps:

s2041: when the measurement state is switched to the idle state, the input signals of all channels are controlled to be switched to random signals.

Specifically, after a group of data which is correctly matched is obtained, the data of the third channel is continuously grabbed to match a plurality of groups of data, a stop test signal is sent out when the laser radar is switched from a measurement state to an idle state, and the hit signal obtained after calibration is switched into an externally input random pulse signal according to the stop test signal control combination logic.

In this embodiment, when the glitch is detected during the process of controlling the switching signal by the combinational logic, in order to avoid introducing the error signal into the delay chain, the control signal needs to be purified, for example, a random pulse signal is registered by the D flip-flop and then output, so as to obtain a pure random signal.

S2042: and carrying out signal reset processing on the random signals of each channel according to the calibration state priority of all channels to obtain the combined reset data corresponding to each channel.

Specifically, determining the calibration state priority of all channels according to the storage time sequence or the echo generation sequence of the channel data of each channel, performing freezing control on a control machine of the calibration state of the relevant channel according to the calibration state priority of all channels so as to ensure that relevant signals are not changed in the measurement period, performing signal reset processing on random signals of each channel, including switching pulse signals input into delay chains of all channels into stop signals input from outside at the same time, and performing signal reset processing on the data of each channel through a trigger in the delay chains so as to obtain combined reset data corresponding to each channel.

S2043: a state switching node between a measurement state and an idle state is acquired.

Specifically, the state switching node corresponding to the laser radar is determined according to the stop signal generated between the echo interval switching of the laser radar, the laser radar is described to stop measuring and enter an idle state when the stop signal is generated, and the laser radar is described to enter a measuring state when the stop signal is switched to a random signal, so that the state switching node between the measuring state and the idle state of the laser radar is obtained, and in the embodiment, a main state machine is arranged to control the state switching node of the laser radar.

S2044: and carrying out asynchronous storage processing on the combined reset data according to the state switching node to obtain asynchronous storage data corresponding to the current calibration state.

Specifically, when the state switching node is switched to the measurement state, the laser radar enters the measurement period, and at the moment, asynchronous storage processing is performed on the combined reset data through the asynchronous FIFO, for example, according to the current calibration state of the laser radar, corresponding calibrated data is called to perform measurement work in the measurement period, the uncalibrated reset data is stored, and the calibration call of the next idle state is waited, so that asynchronous storage data corresponding to the current calibration state is obtained.

S30: and acquiring the combined filtered data and the corresponding highest-order address under the measurement state, combining and storing the combined filtered data according to the highest-order address, and controlling the calibration switching of the combined echo data after the combined and stored data are combined and stored through the highest-order address.

Specifically, as shown in fig. 4, step S30 specifically includes the following steps:

S301: and acquiring the combined filtering data in the measurement state, and carrying out data analysis on the combined filtering data to obtain the highest bit address corresponding to the current calibration state of the combined filtering data.

Specifically, in the measurement state of the laser radar, combined filtering data after echo screening is obtained, and according to the current calibration state of the combined filtering data of each channel, the highest address corresponding to binary channel data in each calibration state is obtained.

S302: and carrying out data classification processing on the combined filtered data according to the highest bit address to obtain calibrated data and uncalibrated data which are matched with the current measurement state.

Specifically, the highest address in the combined filtered data is used as a classification index, the combined filtered data is divided into calibrated data and uncalibrated data, the measurement state of the laser radar is associated with the calibrated data according to the current measurement state of the laser radar, and the idle state of the laser radar is associated with the uncalibrated data, so that the calibration switching of the calibrated data and the uncalibrated data is controlled through the highest address.

S303: and carrying out merging and storing treatment on the calibrated data and the corresponding uncalibrated data to obtain merging and storing data which is calibrated and switched by the highest bit address.

Specifically, since the idle state time of the 360 ° lidar is very short, there is not enough time to perform complete calibration, the time period for completing one complete calibration of the lidar is increased, and the calibrated bin value is needed during the measurement of the lidar, so 2 rams of one channel are needed to store the bin value being calibrated and the bin value being completed respectively, but in this embodiment, three channels are needed, and 6 rams are needed to meet the storage requirement, in order to control simplicity and reduce the storage resource, 2 rams of the same channel are combined into 1 ram, and the switching of the rams is controlled by the highest order address, and the calibrated data and the uncalibrated data are combined and stored in 1 ram, so as to obtain the combined storage data for performing calibration switching by the highest order address.

S304: when the measurement state is switched to the idle state, the calibrated data is switched to the uncalibrated data according to the highest bit address to perform calibration work.

Specifically, the bin value of calibrated data is used in the measurement state of the laser radar, when the laser radar is switched from the measurement state to the idle state, and after the bin value being calibrated is completed, the ram is switched according to the highest address of the combined stored data in the ram of the same channel, and a new round of calibration work is performed on the bin value of the uncalibrated data, so that the aim of real-time calibration without influencing the measurement work of the laser radar is fulfilled.

In one embodiment, in order to perform the signal calibration operation more orderly, as shown in fig. 5, step S304 further includes:

S305: when the idle state is switched to the measurement state, the calibrated time node between the calibrated data and the uncalibrated data of each channel is controlled respectively.

Specifically, the calibration state of the laser radar is controlled by switching a preset main state machine, when the laser radar is switched from an idle state to a measurement state, the slave state machine controlling the data calibration state of the channels is controlled, for example, the main state machine sends a control signal for stopping calibration or starting calibration, and the calibrated data and the uncalibrated data of each channel are respectively controlled by switching.

S306: and adjusting the signal calibration sequence of all the channels according to the calibration time node to obtain the corresponding calibration priority of each channel.

Specifically, the signal calibration sequence of each channel is adjusted according to the calibration time node of each channel, and the signal calibration sequence is adjusted according to the calibration importance of the channel data or the storage time sequence of the channel data, so that the corresponding calibration priority of each channel is obtained, the relevant signals are kept unchanged during the measurement of the laser radar, and when the laser radar is switched to an idle state, the calibration of the non-calibrated data can be orderly performed according to the calibration priority.

S307: and respectively controlling the corresponding channels to switch the input signals according to the calibration priority, and obtaining a control switching signal which is adaptive to the current calibration state.

Specifically, according to the calibration priority corresponding to each channel, the corresponding channels are respectively controlled to switch the input signals from random signals to externally input pulse signals, so that the calibration of the uncalibrated data of each channel is facilitated in time, or when the laser radar enters a measurement state, the corresponding channels are controlled to switch from random hit signals to stop signals, the calibrated data of the corresponding channels are timely called to measure, and the calibration work of the corresponding uncalibrated data is frozen, so that a control switching signal which is adaptive to the current calibration state of the laser radar is obtained.

In one embodiment, in order to improve the convenience of the calibration time switch control, as shown in fig. 6, step S307 further includes:

S501: and switching the input signal into a random signal according to the control switching signal, and performing fine count calculation processing on the random signal to obtain a corresponding random fine count value.

Specifically, under a clock cycle of 100M, the calibration enabling signal of the laser radar is pulled up to enter the calibration work according to the control switching signal, the input signal of the input carry chain is switched to be a random signal, the signal is reset through a trigger in the carry chain, the reset signal is input into the decoder to be decoded through the decoder, the decoded signal data in the form of thermometer codes is converted into binary codes, in the embodiment, the binary codes are converted by adopting a halving search algorithm, and the code conversion can be performed in modes of sequential search, accumulation method and the like, so that the corresponding random fine count value is obtained.

In this embodiment, due to the influence of factors such as instability of the D flip-flops or different delays from the clock routing to the clock end of each D flip-flop, and the fact that a large number of registers latch signals simultaneously under the clock, for example, "00010111" of the decoded signal data exists, bubble detection is added in the decoding process of the decoder, that is, the and gate is performed on every 2 or 3 pieces of original data to filter out the invalid codes in the decoded signal data, so that the decoded signal data in the form of a more accurate thermometer code is obtained.

The encoding and decoding modes in this embodiment are Wallace tree structure, fat tree structure, MUX structure, etc., and may be selected according to actual needs, and are not limited to one of the embodiments.

S502: and establishing a corresponding bin wide lookup table according to the random fine count value, and storing the bin wide lookup table as an address sequence according to the corresponding random fine count value.

Specifically, after the random fine count value is obtained, the random fine count value is calibrated across a clock domain, the random fine count value is calibrated according to the bin to bin code density principle, the bin width corresponding to each random fine count value is measured, the bin width lookup tables corresponding to the random fine count value are obtained through accumulation, the established bin width lookup tables are used as an address corresponding to the random fine count value, 1 is added to the address sequence of the random fine count value, and therefore the bin width lookup tables stored by taking the random fine count value as the address sequence are obtained.

In this embodiment, only enough random input signals are needed for measuring the width of a single bin, the input signals are periodic signals which do not repeat with the frequency of the system clock, the input signals in one clock period are assumed to be evenly distributed, that is, the sampled positions of the input signals on the carry chain are evenly distributed, the measurement time T of each bin is obtained by comprehensively calculating the system clock period T, the total input signal N and the number of points N hit to each bin position, and the calibration time T is obtained by calculating by a formula (1), wherein the formula (1) is as follows:

（1）

s503: and acquiring the calibration times in the current calibration state.

Specifically, the calibration times in the current calibration state are counted, and when the laser radar is switched from the idle state to the measurement state, the statistic value of the calibration times is obtained, so that the total calibration times in the current calibration state are obtained.

S504: and when the calibration times reach a preset calibration stopping threshold, accumulating the intermediate value of each bin width lookup table to obtain a calibration bin width value corresponding to the current calibration state.

Specifically, when the calibration times reach a preset calibration stopping threshold, that is, it is stated that the laser radar switches from an idle state to a measurement state, the times of stopping the input hit signal at the ith tap conform to binomial distribution, in this embodiment, in order to obtain a more accurate result when the master clock is 200M and the period is 5ns, the N value is 400 tens of thousands of times of input signals, and the time interval falls at each ith tap, because the measured value of the TDC chip takes i or i-1 as a larger measurement error, when the bin width lookup table is formed, the central value of each bin width is taken as a final result, therefore, the central value of each bin width lookup table is accumulated to construct a calibration bin width value corresponding to the current calibration state, and in this embodiment, the bin to bin calibration is performed by a multi-chain combination mode to reduce the calculated value of each bin width.

S40: and respectively calculating the echo interval between each two echoes according to the switched combined echo data to obtain the calibration measurement time value of each echo.

Specifically, as shown in fig. 7, step S40 specifically includes the following steps:

S401: and in the measurement state, acquiring an asynchronous echo signal value of each signal channel according to the current calibration state of the combined echo data.

Specifically, when the laser radar is in a measurement state, a slave state machine of each channel data is controlled by a master state machine to perform calibration and freezing, so that a current calibration state of combined echo data is obtained, when the laser radar measurement is finished, an asynchronous FIFO value corresponding to each channel is selected by controlling echo configuration parameters, a corresponding ram channel is transmitted to obtain a corresponding fine count value and a corresponding coarse count value, and an asynchronous echo signal value of each signal channel is obtained, wherein the asynchronous echo signal value comprises the coarse count value and the corresponding fine count value between adjacent echoes.

S402: and respectively calculating the echo distance and the corresponding echo intensity between the adjacent echoes according to the asynchronous echo signal values.

Specifically, the corresponding echo distance is calculated according to the coarse count value and the fine count value between the first echo and the second echo, the corresponding echo intensity is calculated according to the coarse count value and the fine count value between the second echo and the third echo, specifically, the echo distance is calculated by the formula (2), and the formula (2) is as follows:

（2）

wherein, 1 Represents an echo distance value,A coarse count value representing the second echo,A coarse count value representing the first echo,A fine count value representing the second echo,Representing a fine count value of the first echo.

The echo intensity is calculated by the formula (3), and the formula (3) is as follows:

（3）

wherein, The echo intensity value is represented by a value of the echo,A coarse count value representing the third echo,Representing a fine count value of the third echo.

S403: and calculating a calibration measurement time value of each echo in a measurement state according to the echo distance between each echo and the corresponding echo intensity.

Specifically, according to the difference value between the echo distance value between the first echo and the second echo and the echo intensity value between the second echo and the third echo, the echo time interval between the adjacent echoes in the measurement state is calculated, and the corresponding echo time interval is used as the calibration measurement time value in the laser radar idle state.

It should be understood that the sequence number of each step in the foregoing embodiment does not mean that the execution sequence of each process should be determined by the function and the internal logic, and should not limit the implementation process of the embodiment of the present application.

In an embodiment, an echo calibration device based on FPGA-TDC is provided, where the echo calibration device based on FPGA-TDC corresponds to the echo calibration method based on FPGA-TDC in the above embodiment one by one. As shown in fig. 8, the echo calibration device based on the FPGA-TDC includes an edge discrimination module, an echo processing module, a calibration module and a calibration module. The functional modules are described in detail as follows:

And the edge discrimination module is used for acquiring the signal rising edge of the input pulse signal in an idle state, and carrying out data processing on the signal rising edge to obtain signal combination data containing a fine count value and a corresponding coarse count value.

And the echo processing module is used for carrying out echo screening processing on the signal combination data to obtain combination filtering data which enable the echoes of all the signal channels to be in a mutually matched state.

And the calibration module is used for acquiring the combined filtered data and the corresponding highest bit address in the measurement state, carrying out combined storage on the combined filtered data according to the highest bit address, and controlling the calibration switching of the combined echo data after combined storage through the highest bit address.

And the data processing module is used for respectively calculating the echo interval between each echo according to the switched combined echo data to obtain the calibration measurement time value of each echo.

Preferably, the calibration module specifically includes:

And the data analysis sub-module is used for acquiring the combined filtering data in the measurement state, and carrying out data analysis on the combined filtering data to obtain the highest bit address corresponding to the current calibration state of the sub-combined filtering data.

And the data classification sub-module is used for carrying out data classification processing on the combined filtered data according to the highest bit address to obtain calibrated data and uncalibrated data which are matched with the current measurement state.

And the merging and storing sub-module is used for merging and storing the calibrated data and the corresponding uncalibrated data to obtain merging and storing data which is calibrated and switched by the highest bit address.

And the data switching sub-module is used for switching the calibrated data to the uncalibrated data to perform calibration work according to the highest bit address when the measurement state is switched to the idle state.

Preferably, the data switching sub-module further includes:

And the switching control unit is used for controlling the calibration time node between the calibrated data and the uncalibrated data of each channel respectively when the idle state is switched to the measurement state.

And the priority adjustment unit is used for adjusting the signal calibration sequence of all the channels according to the calibration time node to obtain the corresponding calibration priority of each channel.

And the signal switching unit is used for respectively controlling the corresponding channels to switch the input signals according to the calibration priority, so as to obtain a control switching signal which is adaptive to the current calibration state.

Preferably, the signal switching unit further includes:

and the fine count calculating subunit is used for switching the input signal into a random signal according to the control switching signal, and carrying out fine count calculating processing on the random signal to obtain a corresponding random fine count value.

And the bin width storage subunit is used for establishing a corresponding bin width lookup table according to the random fine count value and storing the bin width lookup table as an address sequence according to the corresponding random fine count value.

And the calibration data acquisition subunit is used for acquiring the calibration times in the current calibration state.

And the bin width value calculating subunit is used for accumulating the intermediate value of each bin width lookup table when the calibration times reach a preset calibration stopping threshold value to obtain a calibration bin width value corresponding to the current calibration state.

Preferably, the data processing module specifically includes:

and the data acquisition sub-module is used for acquiring an asynchronous echo signal value of each signal channel according to the current calibration state of the combined echo data in the measurement state.

And the data calculation sub-module is used for respectively calculating the echo distance between adjacent echoes and the corresponding echo intensity according to the asynchronous echo signal value.

And the time calculation sub-module is used for calculating a calibration measurement time value of each echo in a measurement state according to the echo distance between each echo and the corresponding echo intensity.

Preferably, the echo processing module specifically includes:

And the channel data acquisition sub-module is used for respectively acquiring the channel data and the corresponding enabling state of each channel in the signal combination data.

And the data matching sub-module is used for acquiring second channel data corresponding to the enabling state of the first channel when the channel data of the first channel is in the enabling state.

And the data screening sub-module is used for acquiring third channel data corresponding to the enabling state of the second channel when the second channel data is in the enabling state, and carrying out latching processing on the second channel data when the third channel is in the enabling state to obtain screened combined filtering data.

And the signal resetting sub-module is used for carrying out signal resetting processing on the combined filtered data when the measurement state is switched to the idle state, and carrying out asynchronous storage on the reset combined reset data.

Preferably, the signal resetting submodule specifically includes:

And the signal switching unit is used for controlling the input signals of all channels to be switched into random signals when the measurement state is switched into the idle state.

And the signal resetting unit is used for carrying out signal resetting processing on the random signal of each channel according to the calibration state priority of all the channels to obtain the combined reset data corresponding to each channel.

And the data acquisition unit is used for acquiring the state switching node between the measurement state and the idle state.

And the asynchronous storage unit is used for carrying out asynchronous storage processing on the combined reset data according to the state switching node to obtain asynchronous storage data corresponding to the current calibration state.

For specific limitations of the FPGA-TDC based echo calibration device, reference may be made to the above limitation of the FPGA-TDC based echo calibration method, and no further description is given here. The above-mentioned echo calibration device based on FPGA-TDC may be implemented in whole or in part by software, hardware, and combinations thereof. The above modules may be embedded in hardware or may be independent of a processor in the computer device, or may be stored in software in a memory in the computer device, so that the processor may call and execute operations corresponding to the above modules.

In one embodiment, a computer device is provided, which may be a server, and the internal structure of which may be as shown in fig. 9. The computer device includes a processor, a memory, a network interface, and a database connected by a system bus. Wherein the processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, computer programs, and a database. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The database of the computer equipment is used for storing data processed in a bin-to-bin calibration process of performing calibration time cutting by the FPGA-TDC. The network interface of the computer device is used for communicating with an external terminal through a network connection. The computer program, when executed by a processor, implements an FPGA-TDC based echo calibration method.

In one embodiment, a computer readable storage medium is provided having a computer program stored thereon, which when executed by a processor, implements the steps of an FPGA-TDC based echo calibration method described above.

Those skilled in the art will appreciate that implementing all or part of the above described methods may be accomplished by way of a computer program stored on a non-transitory computer readable storage medium, which when executed, may comprise the steps of the embodiments of the methods described above. Any reference to memory, storage, database, or other medium used in embodiments provided herein may include non-volatile and/or volatile memory. The nonvolatile memory can include Read Only Memory (ROM), programmable ROM (PROM), electrically Programmable ROM (EPROM), electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double Data Rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (SYNCHLINK) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), among others.

It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-described division of the functional units and modules is illustrated, and in practical application, the above-described functional distribution may be performed by different functional units and modules according to needs, i.e. the internal structure of the apparatus is divided into different functional units or modules to perform all or part of the above-described functions.

The above embodiments are only for illustrating the technical solution of the present application, and not for limiting the same; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application, and are intended to be included in the scope of the present application.

Claims

1. An echo calibration method based on FPGA-TDC, the method comprising:

2. The method for calibrating echo based on FPGA-TDC according to claim 1, wherein the acquiring the combined filtered data and the corresponding highest address in the measurement state, and storing the combined filtered data and the data to be calibrated, and controlling the calibration switching of the combined echo data after the combined storage by the highest address, specifically includes:

3. The FPGA-TDC-based echo calibration method according to claim 2, wherein when the measurement state is switched to an idle state, the calibrated data is switched to the uncalibrated data according to a most significant address to perform a calibration operation, further comprising:

4. The method for calibrating echo based on FPGA-TDC according to claim 3, wherein the step of controlling the corresponding channels to switch input signals according to the calibration priority to obtain control switching signals adapted to the current calibration state includes:

acquiring the calibration times in the current calibration state;

5. The method for calibrating echo based on FPGA-TDC according to claim 1, wherein the calculating the echo interval between each echo according to the combined echo data after switching to obtain the calibrated measurement time value of each echo specifically includes:

6. The method for calibrating echo based on FPGA-TDC according to claim 1, wherein the performing echo screening processing on the signal combination data to obtain combination filtered data for enabling echoes of all signal channels to be in a mutually matched state, specifically includes:

7. The method for calibrating echo based on FPGA-TDC according to claim 6, wherein when the measurement state is switched to the idle state, the signal resetting process is performed on the combined filtered data, and the reset combined reset data is asynchronously stored, specifically comprising:

8. An echo calibration device based on FPGA-TDC, comprising:

9. Computer device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that the processor implements the steps of the FPGA-TDC based echo calibration method according to any one of claims 1 to 7 when the computer program is executed.

10. A computer readable storage medium storing a computer program, characterized in that the computer program when executed by a processor implements the steps of the FPGA-TDC based echo calibration method according to any one of claims 1 to 7.