CN116719563A - Memory information acquisition method, device, equipment and storage medium - Google Patents
Memory information acquisition method, device, equipment and storage medium Download PDFInfo
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Abstract
Description
技术领域Technical field
本发明涉及计算机技术领域,特别涉及一种内存信息获取方法、装置、设备及存储介质。The present invention relates to the field of computer technology, and in particular to a memory information acquisition method, device, equipment and storage medium.
背景技术Background technique
基板管理控制器(Baseboard Management Controller,BMC)作为智能网卡的管理者,其负责监控整个系统包括设备在位、网络信息、温度、电源等信息,以此保证在系统出现故障时能够及时报错,减少损失,提高工作效率。此外,为了保证智能网卡的正常运行,BMC需要获取内存的相关信息,其中,串行存在检测(SerialPresence Detect,SPD)寄存器是内存模组上面的一个可擦写的电擦除可编程只读存储器(ElectricallyErasableProgrammabl e Read Only Memory,EEPROM),里面记录了许多重要的内存信息,也即SPD是一组关于内存模组的配置信息,包括诸如内存的芯片及模组厂商、工作频率、工作电压、速度、容量、电压、行地址、列地址带宽、各种主要操作时序等参数,因此,现有的技术中,CPU作为主设备,通过集成电路总线(Inter-Integrated Circuit,IIC)通道从内存SPD内读取内存信息,而后BMC再从CPU内读取内存信息,实现对内存状态的检测。As the manager of the smart network card, the Baseboard Management Controller (BMC) is responsible for monitoring the entire system including device presence, network information, temperature, power supply and other information to ensure that when the system fails, errors can be reported in a timely manner and reduce losses and improve work efficiency. In addition, in order to ensure the normal operation of the smart network card, the BMC needs to obtain memory-related information. Among them, the Serial Presence Detect (SPD) register is an erasable electrically erasable programmable read-only memory on the memory module. (Electrically Erasable Programmable Read Only Memory, EEPROM), which records a lot of important memory information, that is, SPD is a set of configuration information about the memory module, including such as memory chip and module manufacturer, operating frequency, operating voltage, speed , capacity, voltage, row address, column address bandwidth, various main operation timing and other parameters. Therefore, in the existing technology, the CPU is used as the main device to transfer data from the memory SPD through the integrated circuit bus (Inter-Integrated Circuit, IIC) channel. Read the memory information, and then the BMC reads the memory information from the CPU to detect the memory status.
然而,当CPU未启动时,BMC便获取不到内存的相关信息,无法对内存的状态进行监控,而且对BMC来说,通过CPU来获取内存信息,相当于增加了一个中转站,BMC无法准确迅速地获取内存信息,可能会降低信息读取的准确率,为问题定位和分析增加了一定难度。However, when the CPU is not started, the BMC cannot obtain memory-related information and cannot monitor the status of the memory. Moreover, for the BMC, obtaining memory information through the CPU is equivalent to adding a transfer station, and the BMC cannot accurately Acquiring memory information quickly may reduce the accuracy of information reading, making problem location and analysis more difficult.
发明内容Contents of the invention
本发明实施例的目的在于提供一种内存信息获取方法、装置、设备及存储介质,解决现有的BMC获取内存信息需要经过CPU中转,导致BMC无法准确迅速地获取内存信息,可能会降低信息读取的准确率,为问题定位和分析增加了一定难度的问题,具体技术方案如下:The purpose of the embodiments of the present invention is to provide a method, device, equipment and storage medium for obtaining memory information, so as to solve the problem that the existing BMC needs to pass through the CPU to obtain the memory information, resulting in the BMC being unable to obtain the memory information accurately and quickly, which may reduce the reading of information. The accuracy rate obtained adds a certain degree of difficulty to problem location and analysis. The specific technical solutions are as follows:
在本发明实施的第一方面,首先提供了一种内存信息获取方法,其特征在于,应用于基板管理控制器,所述方法包括:In a first aspect of implementation of the present invention, a memory information acquisition method is first provided, which is characterized in that it is applied to a baseboard management controller, and the method includes:
获取串行存在检测SPD寄存器的状态信息;Get the status information of the serial presence detection SPD register;
在确定所述SPD寄存器处于上电状态的情况下,从所述SPD寄存器中读取内存信息,所述上电状态是通过复杂可编程逻辑器件控制完成的。When it is determined that the SPD register is in a power-on state, memory information is read from the SPD register, and the power-on state is controlled by a complex programmable logic device.
可选的,所述在确定所述SPD寄存器处于上电状态的情况下,从所述SPD寄存器中读取内存信息之后,还包括:Optionally, after it is determined that the SPD register is in the power-on state, after reading the memory information from the SPD register, the method further includes:
接收中央处理器发送的内存信息获取请求;Receive the memory information acquisition request sent by the central processor;
根据所述内存信息获取请求将所述内存信息发送至所述中央处理器。Send the memory information to the central processor according to the memory information acquisition request.
可选的,所述在确定所述SPD寄存器处于上电状态的情况下,从所述SPD寄存器中读取内存信息,包括:Optionally, when it is determined that the SPD register is in the power-on state, reading memory information from the SPD register includes:
在确定所述SPD寄存器处于上电状态的情况下,通过I2C通道从所述SPD寄存器中读取内存信息。When it is determined that the SPD register is in the power-on state, memory information is read from the SPD register through the I2C channel.
可选的,所述在确定所述SPD寄存器处于上电状态的情况下,从所述SPD寄存器中读取内存信息之后,还包括:Optionally, after it is determined that the SPD register is in the power-on state, after reading the memory information from the SPD register, the method further includes:
在检测到所述内存信息存在异常信息的情况下,发送异常提示信息至目标显示屏。When abnormal information is detected in the memory information, abnormal prompt information is sent to the target display screen.
在本发明实施的第二方面,提供了一种内存信息获取方法,其特征在于,应用于串行存在检测SPD寄存器,所述方法包括:In a second aspect of implementation of the present invention, a memory information acquisition method is provided, which is characterized in that it is applied to the serial presence detection SPD register, and the method includes:
接收基板管理控制器发送的读取内存请求;Receive the read memory request sent by the baseboard management controller;
根据所述读取内存请求发送内存信息至基板管理控制器,所述内存信息是通过复杂可编程逻辑器件控制所述SPD寄存器进入上电状态后获取的。Memory information is sent to the baseboard management controller according to the read memory request, and the memory information is obtained after controlling the SPD register to enter a power-on state through a complex programmable logic device.
在本发明实施的第三方面,还提供了一种内存信息获取装置,其特征在于,应用于基板管理控制器,包括:In a third aspect of implementation of the present invention, a memory information acquisition device is also provided, which is characterized in that it is applied to a baseboard management controller and includes:
第一获取模块,用于获取串行存在检测SPD寄存器的状态信息;The first acquisition module is used to acquire the status information of the serial presence detection SPD register;
第一读取模块,用于在确定所述SPD寄存器处于上电状态的情况下,从所述SPD寄存器中读取内存信息,所述上电状态是通过复杂可编程逻辑器件控制完成的。The first reading module is used to read memory information from the SPD register when it is determined that the SPD register is in a power-on state. The power-on state is controlled by a complex programmable logic device.
可选的,所述内存信息获取装置还包括:Optionally, the memory information acquisition device also includes:
第一接收模块,用于接收中央处理器发送的内存信息获取请求;The first receiving module is used to receive the memory information acquisition request sent by the central processor;
第一发送模块,用于根据所述内存信息获取请求将所述内存信息发送至所述中央处理器。A first sending module, configured to send the memory information to the central processor according to the memory information acquisition request.
可选的,所述第一读取模块,还包括:Optionally, the first reading module also includes:
读取子模块,用于在确定所述SPD寄存器处于上电状态的情况下,通过I2C通道从所述SPD寄存器中读取内存信息。A reading submodule is used to read memory information from the SPD register through the I2C channel when it is determined that the SPD register is in a power-on state.
可选的,所述内存信息获取装置还包括:Optionally, the memory information acquisition device also includes:
异常提示模块,用于在检测到所述内存信息存在异常信息的情况下,发送异常提示信息至目标显示屏。An exception prompt module is used to send abnormal prompt information to the target display screen when abnormal information is detected in the memory information.
在本发明实施的第四方面,还提供了一种内存信息获取装置,其特征在于,应用于串行存在检测SPD寄存器,包括:In a fourth aspect of implementation of the present invention, a memory information acquisition device is also provided, which is characterized in that it is applied to the serial presence detection SPD register and includes:
接收请求模块,用于接收基板管理控制器发送的读取内存请求;A receiving request module is used to receive a read memory request sent by the baseboard management controller;
发送内存信息模块,用于根据所述读取内存请求发送内存信息至基板管理控制器,所述内存信息是通过复杂可编程逻辑器件控制所述SPD寄存器进入上电状态后获取的。A module for sending memory information, configured to send memory information to the baseboard management controller according to the read memory request, where the memory information is obtained after the complex programmable logic device controls the SPD register to enter a power-on state.
在本发明实施的第五方面,还提供了一种内存信息获取系统,包括基板管理控制器,SPD寄存器,复杂可编程逻辑器件;In a fifth aspect of implementation of the present invention, a memory information acquisition system is also provided, including a baseboard management controller, an SPD register, and a complex programmable logic device;
所述基板管理控制器,用于获取串行存在检测SPD寄存器的状态信息;在确定所述SPD寄存器处于上电状态的情况下,从所述SPD寄存器中读取内存信息,所述上电状态是通过复杂可编程逻辑器件控制完成的;The baseboard management controller is used to obtain the status information of the serial presence detection SPD register; when it is determined that the SPD register is in the power-on state, read memory information from the SPD register, and the power-on state It is controlled by complex programmable logic devices;
所述SPD寄存器,用于接收基板管理控制器发送的读取内存请求;根据所述读取内存请求发送内存信息至基板管理控制器,所述内存信息是通过复杂可编程逻辑器件控制所述SPD寄存器处于上电状态的情况下获取的;The SPD register is used to receive a read memory request sent by the baseboard management controller; send memory information to the baseboard management controller according to the read memory request, and the memory information is controlled by a complex programmable logic device. The register is obtained when the register is in the power-on state;
所述复杂可编程逻辑器件,用于控制所述SPD寄存器进入上电状态。The complex programmable logic device is used to control the SPD register to enter the power-on state.
在本发明实施的第六方面,提供一种通信设备,包括处理器、通信接口、存储器和通信总线,其中,处理器,通信接口,存储器通过通信总线完成相互间的通信;In a sixth aspect of implementation of the present invention, a communication device is provided, including a processor, a communication interface, a memory, and a communication bus, wherein the processor, the communication interface, and the memory complete communication with each other through the communication bus;
存储器,用于存放计算机程序;Memory, used to store computer programs;
处理器,用于执行存储器上所存放的程序时,实现上述第一方面任一项内存信息获取方法,或实现上述第二方面内存信息获取方法。The processor is used to implement any of the memory information acquisition methods of the first aspect above, or implement the memory information acquisition method of the second aspect when executing a program stored in the memory.
在本发明实施的第七方面,提供一种计算机可读存储介质,所述计算机可读存储介质上存储计算机程序,所述计算机程序被处理器执行时实现上述第一方面任一项内存信息获取方法,或实现上述第二方面内存信息获取方法。In a seventh aspect of implementation of the present invention, a computer-readable storage medium is provided. A computer program is stored on the computer-readable storage medium. When the computer program is executed by a processor, the memory information acquisition of any one of the above-mentioned first aspects is realized. method, or implement the above second aspect of memory information acquisition method.
本发明实施例提供的内存信息获取方法,应用于基板管理控制器,通过获取串行存在检测SPD寄存器的状态信息;在确定所述SPD寄存器处于上电状态的情况下,从所述SPD寄存器中读取内存信息,所述上电状态是通过复杂可编程逻辑器件控制完成的。本发明实施例通过基板管理控制器直接访问SPD寄存器,避免了通过CPU来获取内存信息,使得BMC无法准确迅速地获取内存信息,降低信息读取的准确率,为问题定位和分析增加了一定难度的问题,从而实现能够更加迅速准确地获取内存信息,对内存进行更加精准的监控,从而提高系统运行的可靠性的目的。The memory information acquisition method provided by the embodiment of the present invention is applied to the baseboard management controller by obtaining the status information of the serial presence detection SPD register; when it is determined that the SPD register is in the power-on state, from the SPD register Read memory information, and the power-on state is controlled by complex programmable logic devices. The embodiment of the present invention directly accesses the SPD register through the baseboard management controller, avoiding obtaining memory information through the CPU, making it impossible for the BMC to obtain memory information accurately and quickly, reducing the accuracy of information reading, and adding a certain degree of difficulty to problem location and analysis. problem, so as to achieve the purpose of obtaining memory information more quickly and accurately, monitoring the memory more accurately, and thereby improving the reliability of system operation.
附图说明Description of the drawings
为了更清楚地说明本发明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单的介绍。In order to more clearly explain the embodiments of the present invention or the technical solutions in the prior art, the following will briefly introduce the drawings needed to describe the embodiments or the prior art.
图1为本发明实施例提供的一种内存信息获取方法的步骤流程图;Figure 1 is a step flow chart of a method for obtaining memory information provided by an embodiment of the present invention;
图2为本发明实施例提供的另一种内存信息获取方法的步骤流程图;Figure 2 is a step flow chart of another method for obtaining memory information provided by an embodiment of the present invention;
图3为本发明实施例提供的一种内存信息获取系统的示意图;Figure 3 is a schematic diagram of a memory information acquisition system provided by an embodiment of the present invention;
图4为本发明实施例提供的另一种内存信息获取系统的示意图;Figure 4 is a schematic diagram of another memory information acquisition system provided by an embodiment of the present invention;
图5为本发明实施例提供的另一种内存信息获取系统的示意图;Figure 5 is a schematic diagram of another memory information acquisition system provided by an embodiment of the present invention;
图6是本发明实施例提供的一种内存信息获取装置的结构示意图;Figure 6 is a schematic structural diagram of a memory information acquisition device provided by an embodiment of the present invention;
图7是本发明实施例提供的另一种内存信息获取装置的结构示意图;Figure 7 is a schematic structural diagram of another memory information acquisition device provided by an embodiment of the present invention;
图8是本发明实施例提供的一种通信设备的结构示意图;Figure 8 is a schematic structural diagram of a communication device provided by an embodiment of the present invention;
图9是本发明实施例提供的另一种通信设备的结构示意图。Figure 9 is a schematic structural diagram of another communication device provided by an embodiment of the present invention.
具体实施方式Detailed ways
下面将参照附图更详细地描述本申请的示例性实施例。虽然附图中显示了本申请的示例性实施例,然而应当理解,可以以各种形式实现本申请而不应被这里阐述的实施例所限制。相反,提供这些实施例是为了能够更透彻地理解本申请,并且能够将本申请的范围完整地传达给本领域的技术人员。Exemplary embodiments of the present application will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present application are shown in the drawings, it should be understood that the present application may be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that a thorough understanding of the present application will be provided, and the scope of the present application will be fully conveyed to those skilled in the art.
本申请的说明书和权利要求书中的术语“第一”“第二”等是用于区别类似的对象,而不用于描述特定的顺序或先后次序。应该理解这样使用的数据在适当情况下可以互换,以便本申请的实施例能够以除了在这里图示或描述的那些以外的顺序实施,且“第一”“第二”等所区分的对象通常为一类,并不限定对象的个数,例如第一对象可以是一个,也可以是多个。此外,说明书以及权利要求中“和/或”表示所连接对象的至少其中之一,字符“/”,一般表示前后关联对象是一种“或”的关系。The terms "first", "second", etc. in the description and claims of this application are used to distinguish similar objects and are not used to describe a specific order or sequence. It is to be understood that data so used are interchangeable under appropriate circumstances so that the embodiments of the present application can be practiced in orders other than those illustrated or described herein, and that "first", "second", etc. are distinguished objects It is usually one type, and the number of objects is not limited. For example, the first object can be one or multiple. In addition, "and/or" in the description and claims indicates at least one of the connected objects, and the character "/" generally indicates that the related objects are in an "or" relationship.
为解决上述现有技术中存在的问题,本发明的发明人对现有内存信息获取方法进行深入了解,参照图4,现有技术中内存信息获取系统的结构示意图,其中内存信息是存储在串行存在检测(Serial Presence Detect,SPD)寄存器内,基板管理控制器获取内存信息需要通过中央处理器的操作系统,具体步骤包括:AC上电后,基板管理控制器先启动,一段时间后CPU再启动,当CPU启动后,CPU作为主设备,通过IIC通道从串行存在检测寄存器内读取内存信息,而后基板管理控制器再从CPU中获取内存信息,实现对内存状态的检测。In order to solve the problems existing in the above-mentioned prior art, the inventor of the present invention has an in-depth understanding of the existing memory information acquisition method. Refer to Figure 4, which is a structural schematic diagram of the memory information acquisition system in the prior art, in which the memory information is stored in a string. In the Serial Presence Detect (SPD) register, the baseboard management controller needs to obtain memory information through the operating system of the central processor. The specific steps include: after the AC is powered on, the baseboard management controller starts first, and after a period of time, the CPU Startup, when the CPU starts, the CPU, as the master device, reads the memory information from the serial presence detection register through the IIC channel, and then the baseboard management controller obtains the memory information from the CPU to detect the memory status.
但是,如果这种方式获取的内存信息存在一定的时延,即基板管理控制器从CPU获取的内存信息不是当前时刻的,是CPU从串行存在检测寄存器内获取的上一时刻的内存信息,降低了信息读取的准确率。However, if there is a certain delay in the memory information obtained in this way, that is, the memory information obtained by the baseboard management controller from the CPU is not the current moment, but the memory information of the previous moment obtained by the CPU from the serial presence detection register. Reduced the accuracy of information reading.
在此基础上,发明人结合基板管理控制器的工作原理,设计了新的内存信息获取方法,下面结合附图,通过具体的实施例及其应用场景对本申请实施例提供的内存信息获取方法、装置、系统、电子设备及存储介质进行详细地说明。On this basis, the inventor designed a new memory information acquisition method based on the working principle of the baseboard management controller. The following is a description of the memory information acquisition method provided by the embodiments of the present application through specific embodiments and application scenarios in conjunction with the accompanying drawings. Devices, systems, electronic equipment and storage media are described in detail.
参照图5,内存信息获取系统包括基板管理控制器,串行存在检测寄存器,复杂可编程逻辑器件,其中基板管理控制器与复杂可编程逻辑器件相连,复杂可编程逻辑器件与串行存在检测寄存器相连,基板管理控制器与串行存在检测寄存器相连,复杂可编程逻辑器件负责在检测到基板管理控制器启动后,控制串行存在检测寄存器上电,在确定串行存在检测寄存器处于上电状态的情况下,基板管理控制器从串行存在检测寄存器中直接读取内存信息。Referring to Figure 5, the memory information acquisition system includes a baseboard management controller, a serial presence detection register, and a complex programmable logic device. The baseboard management controller is connected to the complex programmable logic device, and the complex programmable logic device is connected to the serial presence detection register. Connected, the baseboard management controller is connected to the serial presence detection register. The complex programmable logic device is responsible for controlling the power on of the serial presence detection register after detecting that the baseboard management controller is started. After determining that the serial presence detection register is in the power-on state In this case, the baseboard management controller reads the memory information directly from the serial presence detection register.
需要说明的是,复杂可编程逻辑器件CPLD是一种用户根据各自需要而自行构造逻辑功能的数字集成电路。其基本设计方法是借助集成开发软件平台,用原理图、硬件描述语言等方法,生成相应的目标文件,通过下载电缆(“在系统”编程)将代码传送到目标芯片中,实现设计的数字系统;It should be noted that the complex programmable logic device CPLD is a digital integrated circuit that allows users to construct logic functions according to their own needs. The basic design method is to use an integrated development software platform to generate corresponding target files using schematic diagrams, hardware description languages and other methods, and then transfer the code to the target chip through a download cable ("in-system" programming) to realize the designed digital system. ;
基板管理控制器BMC是一个独立的系统,它不依赖于系统上的其他硬件(比如CPU、内存等),也不依赖于BIOS、OS等(但是BMC可以与BIOS和OS交互),BMC是整个智能网卡单板的大管家。从一款智能网卡(交换机/服务器)上电时刻,它的所有部件都归BMC来负责和管理。BMC是一个独立于智能网卡系统的小型操作系统。作用是方便智能网卡远程管理、监控、安装、重启等。此外,它还是一款智能网卡AC上电起始即运行的软件,运行在智能网卡上一款单独的ARM芯片上,这个ARM芯片就是BMC软件的CPU,同时会芯片外围会配置自己的RAM、Flash等器件,只要智能网卡插上电源线,BMC软件便快速运行起来,此时有可能我们通常意义上的智能网卡侧的OS都还没有上电启动。BMC是整个服务器的大管家,主要用于服务器各个部件(CPU、内存、硬盘、风扇、机框等)的温度、电压等健康状态进行检测,同时根据各个温度采集点情况实时调整风扇转速保证智能网卡不产生过温,而且控制总体功耗又不能过高,如果单板部件出现任何异常则通过SNMP协议、SMTP协议、Redfish协议等多种业界通用规范将信息及时上报给上层网管,以便运维人员及时处理,保证业务无损;Baseboard management controller BMC is an independent system. It does not depend on other hardware on the system (such as CPU, memory, etc.), nor does it depend on BIOS, OS, etc. (but BMC can interact with BIOS and OS). BMC is the entire The great manager of smart network card boards. From the moment a smart network card (switch/server) is powered on, all its components are responsible and managed by the BMC. BMC is a small operating system independent of the intelligent network card system. The function is to facilitate remote management, monitoring, installation, restart, etc. of the smart network card. In addition, it is also a software that runs as soon as the smart network card AC is powered on. It runs on a separate ARM chip on the smart network card. This ARM chip is the CPU of the BMC software. At the same time, the chip periphery is configured with its own RAM, For Flash and other devices, as long as the smart network card is plugged in to the power cord, the BMC software will run quickly. At this time, it is possible that the OS on the smart network card side has not yet been powered on and started. BMC is the big housekeeper of the entire server. It is mainly used to detect the health status of the temperature, voltage and other components of the server (CPU, memory, hard disk, fan, chassis, etc.). At the same time, it adjusts the fan speed in real time according to the conditions of each temperature collection point to ensure intelligence. The network card will not overheat, and the overall power consumption will not be too high. If there is any abnormality in the single board components, the information will be reported to the upper network management in a timely manner through various industry common specifications such as SNMP protocol, SMTP protocol, Redfish protocol, etc. for operation and maintenance. Personnel handles it in a timely manner to ensure that business is not damaged;
串行存在检测寄存器是一种访问内存模块有关信息的标准化方式的寄存器,内存模块制造商会将SPD信息写入容量为256字节的EEPROM芯片中,SPD EEPROM采用SMBus访问,这是IIC协议的一个变种。这将模块上的通信引脚数量减少到两个:时钟信号和数据信号。EEPROM与RAM共享接地引脚,有自己的电源引脚,并有三个额外引脚(SA0-2)来标识该槽,用于将EEPROM分配到0x50-0x57范围内的唯一地址。通信线路不仅可以在8个内存模块之间共享,同一SMBus通常也用于主板上的系统健康监控任务,例如读取电源电压、CPU温度和风扇速度。是内存模组上面的一个可擦写的EEPROM(ElectricallyErasable ProgrammableRead Only Memory,电擦除可编程只读存储器),里面记录了该内存的许多重要信息,也即SPD是一组关于内存模组的配置信息,诸如内存的芯片及模组厂商、工作频率、工作电压、速度、容量、电压、行地址、列地址带宽、各种主要操作时序等参数。The serial presence detection register is a register that is a standardized way to access information about the memory module. The memory module manufacturer will write the SPD information into the EEPROM chip with a capacity of 256 bytes. The SPD EEPROM uses SMBus access, which is a part of the IIC protocol. variant. This reduces the number of communication pins on the module to two: clock signal and data signal. The EEPROM shares the ground pin with the RAM, has its own power pin, and has three extra pins (SA0-2) to identify the slot and are used to assign the EEPROM to a unique address in the range 0x50-0x57. Not only can the communication lines be shared between the eight memory modules, the same SMBus is often used for system health monitoring tasks on the motherboard, such as reading supply voltage, CPU temperature, and fan speed. It is an erasable EEPROM (Electrically Erasable Programmable Read Only Memory) on the memory module, which records a lot of important information about the memory. That is, SPD is a set of configurations about the memory module. Information, such as memory chip and module manufacturers, operating frequency, operating voltage, speed, capacity, voltage, row address, column address bandwidth, various main operation timings and other parameters.
参照图1,示出了本发明实施例提供的一种内存信息获取方法的步骤流程图,所述方法可以包括:Referring to Figure 1, a flow chart of steps of a method for obtaining memory information provided by an embodiment of the present invention is shown. The method may include:
步骤101,获取串行存在检测SPD寄存器的状态信息。Step 101: Obtain the status information of the serial presence detection SPD register.
本发明实施例中在智能网卡的系统开机过程中,内存需要上电才能正常工作,所以智能网卡的AC上电,基板管理控制器启动后,为了获取串行存在检测SPD寄存器中存储的内存信息需要先获取串行存在检测SPD寄存器的状态,根据串行存在检测SPD寄存器的状态来确定此时串行存在检测SP D寄存器是否上电,SPD寄存器是否开始正常工作,即存储内存信息。In the embodiment of the present invention, during the system startup process of the smart network card, the memory needs to be powered on to operate normally. Therefore, after the AC of the smart network card is powered on and the baseboard management controller is started, in order to obtain the memory information stored in the serial presence detection SPD register It is necessary to first obtain the status of the serial presence detection SPD register. According to the status of the serial presence detection SPD register, it is determined whether the serial presence detection SP D register is powered on at this time and whether the SPD register starts to work normally, that is, to store memory information.
步骤102,在确定SPD寄存器处于上电状态的情况下,从SPD寄存器中读取内存信息,上电状态是通过复杂可编程逻辑器件控制完成的。Step 102: When it is determined that the SPD register is in a power-on state, memory information is read from the SPD register. The power-on state is controlled by a complex programmable logic device.
本发明实施例中在确定串行存在检测SPD寄存器已经处于上电状态,此时串行存在检测SPD寄存器已经在记录内存信息,此时可以使得基板管理控制器从中读取内存信息。其中,基板管理控制器是通过I2C通道从SP D寄存器中读取内存信息。在硬件上,I2C总线只需要一根数据线和一根时钟线两根线,总线接口已经集成在芯片内部,不需要特殊的接口电路,而且片上接口电路的滤波器可以滤去总线数据上的毛刺。因此I2C总线简化了硬件电路PCB布线,降低了系统成本,提高了系统可靠性,I2C总线是一个真正的多主机总线,如果两个或多个主机同时初始化数据传输,可以通过冲突检测和仲裁防止数据破坏,每个连接到总线上的器件都有唯一的地址,任何器件既可以作为主机也可以作为从机,但同一时刻只允许有一个主机,所以在基板管理控制器通过I2C通道从SPD寄存器中读取内存信息时,基板管理控制器就是当前的主设备。其中,SPD是一组关于内存模组的配置信息,包括诸如内存的芯片及模组厂商、工作频率、工作电压、速度、容量、电压、行地址、列地址带宽、各种主要操作时序等参数。In the embodiment of the present invention, it is determined that the serial presence detection SPD register is already in the power-on state. At this time, the serial presence detection SPD register is already recording memory information. At this time, the baseboard management controller can read the memory information from it. Among them, the baseboard management controller reads memory information from the SP D register through the I2C channel. In terms of hardware, the I2C bus only requires one data line and one clock line. The bus interface has been integrated inside the chip and does not require a special interface circuit. Moreover, the filter of the on-chip interface circuit can filter out the bus data. glitch. Therefore, the I2C bus simplifies the hardware circuit PCB wiring, reduces the system cost, and improves the system reliability. The I2C bus is a true multi-host bus. If two or more hosts initialize data transmission at the same time, it can be prevented through conflict detection and arbitration. Data corruption, each device connected to the bus has a unique address, any device can be used as either a master or a slave, but only one master is allowed at the same time, so the baseboard management controller reads from the SPD register through the I2C channel When reading memory information, the baseboard management controller is the current master device. Among them, SPD is a set of configuration information about the memory module, including parameters such as memory chip and module manufacturers, operating frequency, operating voltage, speed, capacity, voltage, row address, column address bandwidth, various main operation timings, etc. .
除此之外,因为对内存信息的获取是为了实现对内存状态的监测,所以在检测到内存信息存在异常信息的情况下,发送异常提示信息至目标显示屏。In addition, because the acquisition of memory information is to monitor the memory status, when abnormal information is detected in the memory information, abnormal prompt information is sent to the target display screen.
其中,BMC采集单个服务器上各种信息提供给上层运维网管软件,主要有两种手段,第一种BMC会提供各种各样的接口供上层网管查询,如we b、命令行等人机接口、SNMP、IPMI、Restful等接口;第二种是主动上报,当检测到有故障产生时,BMC可以通过SNMP trap消息、SMTP邮件消息、Redfish http json报文等手段上报给上层网管软件的服务端,以便运维人员及时识别处理故障。一般情况下,BMC软件上报的消息中都会明确地明确地指明具体是哪个部件产生了故障、处理建议是怎样的等等。简单网络管理协议(SNMP)是专门设计用于在IP网络管理网络节点(服务器、工作站、路由器、交换机及HUBS等)的一种标准协议,它是一种应用层协议。SN MP使网络管理员能够管理网络效能,发现并解决网络问题以及规划网络增长。通过SNMP接收随机消息(及事件报告)网络管理系统获知网络出现问题,Restful是一种网络应用程序的设计风格和开发方式,基于HTTP,可以使用XML格式定义或JSON格式定义。RESTFUL适用于移动互联网厂商作为业务使能接口的场景,实现第三方OTT调用移动网络资源的功能,动作类型为新增、变更、删除所调用资源。Among them, BMC collects various information on a single server and provides it to the upper-layer operation and maintenance network management software. There are two main methods. The first BMC will provide various interfaces for upper-layer network management to query, such as web, command line and other human-machine interface, SNMP, IPMI, Restful and other interfaces; the second is active reporting. When a fault is detected, BMC can report it to the upper-layer network management software through SNMP trap messages, SMTP email messages, Redfish http json messages, etc. end so that operation and maintenance personnel can identify and handle faults in a timely manner. Under normal circumstances, the message reported by the BMC software will clearly indicate which component has failed, what are the handling suggestions, etc. Simple Network Management Protocol (SNMP) is a standard protocol specially designed for managing network nodes (servers, workstations, routers, switches, HUBS, etc.) in IP networks. It is an application layer protocol. SN MP enables network administrators to manage network performance, identify and resolve network problems, and plan for network growth. The network management system is informed of network problems by receiving random messages (and event reports) through SNMP. Restful is a design style and development method for network applications. It is based on HTTP and can be defined using XML format or JSON format. RESTFUL is suitable for scenarios where mobile Internet manufacturers serve as business enablement interfaces to implement the function of third-party OTTs calling mobile network resources. The action types are adding, changing, and deleting the called resources.
BMC通过不同的接口与系统中的其它组件连接。在IPMB(Intelligent PlatformManagement Bus)总线上连接着各个管理控制器,分别执行不同功能。IPMB总线上还连接着一些I2C器件,用来作为传感器的接口,让系统管理软件能够通过IPMB来读取传感器的数据。同时,这些传感器的具体配置信息,如告警门限、事件触发是否允许等配置都保存在一组名为SDR(Sensor Data Record)的数据里面。而传感器产生的告警事件则保存在一组叫做SEL(Sensor Event Log)的数据里面。在IPMB总线上,连接着一个IC MB(IntelligentChassis Management Bus)桥,通过ICMB可以和远程的另一个管理平台通信。此外,在IPMB总线上,还可以外接其他的用户板,用来扩展IPMI管理平台的功能。BMC is connected to other components in the system through different interfaces. Various management controllers are connected to the IPMB (Intelligent Platform Management Bus) and perform different functions respectively. There are also some I2C devices connected to the IPMB bus, which are used as sensor interfaces so that system management software can read sensor data through IPMB. At the same time, the specific configuration information of these sensors, such as alarm thresholds and whether event triggering is allowed, is stored in a set of data called SDR (Sensor Data Record). The alarm events generated by the sensor are stored in a set of data called SEL (Sensor Event Log). On the IPMB bus, an IC MB (Intelligent Chassis Management Bus) bridge is connected, through which ICMB can communicate with another remote management platform. In addition, other user boards can be connected to the IPMB bus to expand the functions of the IPMI management platform.
因此,基板管理控制器在获取到内存信息后,将内存信息与预先设置的正常内存信息进行比对,从而根据比对结果来监控此时智能网卡的内存状态,若误差超过设置的目标阈值则会根据误差较大的内存信息发送异常提示信息至智能网卡对应的显示屏幕,以使工作人员及时处理。Therefore, after obtaining the memory information, the baseboard management controller compares the memory information with the preset normal memory information, and monitors the memory status of the smart network card at this time based on the comparison results. If the error exceeds the set target threshold, Abnormal prompt information will be sent to the display screen corresponding to the smart network card based on the memory information with large errors, so that the staff can handle it in time.
需要说明的是,参照图3所示的内存信息获取系统的结构示意图,本发明实施例中基板管理控制器不需要经过中央处理器获取内存信息,反而是基板管理控制器获取内存信息后,将内存信息发送至中央处理器中,步骤包括:It should be noted that, with reference to the schematic structural diagram of the memory information acquisition system shown in Figure 3, in the embodiment of the present invention, the baseboard management controller does not need to obtain the memory information through the central processor. Instead, after the baseboard management controller obtains the memory information, it The memory information is sent to the central processor. The steps include:
接收中央处理器发送的内存信息获取请求;Receive the memory information acquisition request sent by the central processor;
根据内存信息获取请求将内存信息发送至中央处理器。Send memory information to the central processor according to the memory information acquisition request.
本发明实施例提供的内存信息获取方法,应用于基板管理控制器,通过获取串行存在检测SPD寄存器的状态信息;在确定所述SPD寄存器处于上电状态的情况下,从所述SPD寄存器中读取内存信息,所述上电状态是通过复杂可编程逻辑器件控制完成的。本发明实施例通过基板管理控制器直接访问SPD寄存器,避免了通过CPU来获取内存信息,使得BMC无法准确迅速地获取内存信息,降低信息读取的准确率,为问题定位和分析增加了一定难度的问题,从而实现能够更加迅速准确地获取内存信息,对内存进行更加精准的监控,从而提高系统运行的可靠性的目的。The memory information acquisition method provided by the embodiment of the present invention is applied to the baseboard management controller by obtaining the status information of the serial presence detection SPD register; when it is determined that the SPD register is in the power-on state, from the SPD register Read memory information, and the power-on state is controlled by complex programmable logic devices. The embodiment of the present invention directly accesses the SPD register through the baseboard management controller, avoiding obtaining memory information through the CPU, making it impossible for the BMC to obtain memory information accurately and quickly, reducing the accuracy of information reading, and adding a certain degree of difficulty to problem location and analysis. problem, so as to achieve the purpose of obtaining memory information more quickly and accurately, monitoring the memory more accurately, and thereby improving the reliability of system operation.
参照图2,示出了本发明实施例提供的另一种内存信息获取方法的步骤流程图,所述方法可以包括:Referring to Figure 2, a flow chart of another method for obtaining memory information provided by an embodiment of the present invention is shown. The method may include:
步骤201,接收基板管理控制器发送的读取内存请求。Step 201: Receive a memory read request sent by the baseboard management controller.
本发明实施例应用于内存信息获取系统的SPD寄存器,因为此时SPD寄存器与基板管理控制器直接建立通信连接,所以SPD寄存器可以直接接收到基板管理控制器发送的读取内存请求。The embodiment of the present invention is applied to the SPD register of the memory information acquisition system. Because the SPD register directly establishes a communication connection with the baseboard management controller at this time, the SPD register can directly receive the memory read request sent by the baseboard management controller.
步骤202,根据读取内存请求发送内存信息至基板管理控制器,内存信息是通过复杂可编程逻辑器件控制SPD寄存器进入上电状态后获取的。Step 202: Send memory information to the baseboard management controller according to the memory read request. The memory information is obtained after the complex programmable logic device controls the SPD register to enter the power-on state.
本发明实施例中SPD寄存器根据接收到的请求将内部存储的内存信息发送至基板管理控制器,但是因为SPD寄存器只有上电后才能正常工作,所以内存信息是复杂可编程逻辑器件控制SPD寄存器进入上电状态后获取的。In the embodiment of the present invention, the SPD register sends the internally stored memory information to the baseboard management controller according to the received request. However, because the SPD register can only work normally after being powered on, the memory information is controlled by the complex programmable logic device and enters the SPD register. Obtained after power-on status.
本发明实施例提供的内存信息获取方法,应用于SPD寄存器,通过接收基板管理控制器发送的读取内存请求,根据所述读取内存请求发送内存信息至基板管理控制器,所述内存信息是通过复杂可编程逻辑器件控制所述SPD寄存器进入上电状态后获取的。本发明实施例通过基板管理控制器直接访问SPD寄存器,避免了通过CPU来获取内存信息,使得BMC无法准确迅速地获取内存信息,降低信息读取的准确率,为问题定位和分析增加了一定难度的问题,从而实现能够更加迅速准确地获取内存信息,对内存进行更加精准的监控,从而提高系统运行的可靠性的目的。The memory information acquisition method provided by the embodiment of the present invention is applied to the SPD register. By receiving a read memory request sent by the baseboard management controller, the memory information is sent to the baseboard management controller according to the read memory request. The memory information is It is obtained after the complex programmable logic device controls the SPD register to enter the power-on state. The embodiment of the present invention directly accesses the SPD register through the baseboard management controller, avoiding obtaining memory information through the CPU, making it impossible for the BMC to obtain memory information accurately and quickly, reducing the accuracy of information reading, and adding a certain degree of difficulty to problem location and analysis. problem, so as to achieve the purpose of obtaining memory information more quickly and accurately, monitoring the memory more accurately, and thereby improving the reliability of system operation.
参照图6,示出了本发明实施例提供的一种内存信息获取装置的结构示意图,应用于基板管理控制器,如图6所示,该装置可以包括:Referring to Figure 6, a schematic structural diagram of a memory information acquisition device provided by an embodiment of the present invention is shown, which is applied to a baseboard management controller. As shown in Figure 6, the device may include:
第一获取模块301,用于获取串行存在检测SPD寄存器的状态信息。The first acquisition module 301 is used to acquire the status information of the serial presence detection SPD register.
第一读取模块302,用于在确定所述SPD寄存器处于上电状态的情况下,从所述SPD寄存器中读取内存信息,所述上电状态是通过复杂可编程逻辑器件控制完成的。The first reading module 302 is configured to read memory information from the SPD register when it is determined that the SPD register is in a power-on state. The power-on state is controlled by a complex programmable logic device.
可选的,所述内存信息获取装置还包括:Optionally, the memory information acquisition device also includes:
第一接收模块,用于接收中央处理器发送的内存信息获取请求。The first receiving module is used to receive the memory information acquisition request sent by the central processor.
第一发送模块,用于根据所述内存信息获取请求将所述内存信息发送至所述中央处理器。A first sending module, configured to send the memory information to the central processor according to the memory information acquisition request.
可选的,所述第一读取模块302,还包括:Optionally, the first reading module 302 also includes:
读取子模块,用于在确定所述SPD寄存器处于上电状态的情况下,通过I2C通道从所述SPD寄存器中读取内存信息。A reading submodule is used to read memory information from the SPD register through the I2C channel when it is determined that the SPD register is in a power-on state.
可选的,所述内存信息获取装置还包括:Optionally, the memory information acquisition device also includes:
异常提示模块,用于在检测到所述内存信息存在异常信息的情况下,发送异常提示信息至目标显示屏。An exception prompt module is used to send abnormal prompt information to the target display screen when abnormal information is detected in the memory information.
本发明实施例提供的内存信息获取方法,应用于基板管理控制器,通过获取串行存在检测SPD寄存器的状态信息。在确定所述SPD寄存器处于上电状态的情况下,从所述SPD寄存器中读取内存信息,所述上电状态是通过复杂可编程逻辑器件控制完成的。本发明实施例通过基板管理控制器直接访问SPD寄存器,避免了通过CPU来获取内存信息,使得BMC无法准确迅速地获取内存信息,降低信息读取的准确率,为问题定位和分析增加了一定难度的问题,从而实现能够更加迅速准确地获取内存信息,对内存进行更加精准的监控,从而提高系统运行的可靠性的目的。The memory information acquisition method provided by the embodiment of the present invention is applied to the baseboard management controller and obtains the status information of the serial presence detection SPD register. When it is determined that the SPD register is in a power-on state, memory information is read from the SPD register, and the power-on state is controlled by a complex programmable logic device. The embodiment of the present invention directly accesses the SPD register through the baseboard management controller, avoiding obtaining memory information through the CPU, making it impossible for the BMC to obtain memory information accurately and quickly, reducing the accuracy of information reading, and adding a certain degree of difficulty to problem location and analysis. problem, so as to achieve the purpose of obtaining memory information more quickly and accurately, monitoring the memory more accurately, and thereby improving the reliability of system operation.
参照图7,示出了本发明实施例提供的另一种内存信息获取装置的结构示意图,应用于串行存在检测SPD寄存器,如图7所示,该装置可以包括:Referring to Figure 7, a schematic structural diagram of another memory information acquisition device provided by an embodiment of the present invention is shown, which is applied to the serial presence detection SPD register. As shown in Figure 7, the device may include:
接收请求模块401,用于接收基板管理控制器发送的读取内存请求。The receiving request module 401 is used to receive a memory read request sent by the baseboard management controller.
发送内存信息模块402,用于根据所述读取内存请求发送内存信息至基板管理控制器,所述内存信息是通过复杂可编程逻辑器件控制所述SPD寄存器进入上电状态后获取的。The memory information sending module 402 is configured to send memory information to the baseboard management controller according to the read memory request. The memory information is obtained after the complex programmable logic device controls the SPD register to enter the power-on state.
本发明实施例提供的内存信息获取方法,应用于SPD寄存器,通过接收基板管理控制器发送的读取内存请求,根据所述读取内存请求发送内存信息至基板管理控制器,所述内存信息是通过复杂可编程逻辑器件控制所述SPD寄存器进入上电状态后获取的。本发明实施例通过基板管理控制器直接访问SPD寄存器,避免了通过CPU来获取内存信息,使得BMC无法准确迅速地获取内存信息,降低信息读取的准确率,为问题定位和分析增加了一定难度的问题,从而实现能够更加迅速准确地获取内存信息,对内存进行更加精准的监控,从而提高系统运行的可靠性的目的。The memory information acquisition method provided by the embodiment of the present invention is applied to the SPD register. By receiving a read memory request sent by the baseboard management controller, the memory information is sent to the baseboard management controller according to the read memory request. The memory information is It is obtained after the complex programmable logic device controls the SPD register to enter the power-on state. The embodiment of the present invention directly accesses the SPD register through the baseboard management controller, avoiding obtaining memory information through the CPU, making it impossible for the BMC to obtain memory information accurately and quickly, reducing the accuracy of information reading, and adding a certain degree of difficulty to problem location and analysis. problem, so as to achieve the purpose of obtaining memory information more quickly and accurately, monitoring the memory more accurately, and thereby improving the reliability of system operation.
本发明实施例还提供了一种通信设备,如图8所示,包括处理器501、通信接口502、存储器503和通信总线504,其中,处理器501,通信接口502,存储器503通过通信总线504完成相互间的通信,The embodiment of the present invention also provides a communication device, as shown in Figure 8, including a processor 501, a communication interface 502, a memory 503, and a communication bus 504. The processor 501, the communication interface 502, and the memory 503 communicate through the communication bus 504. complete mutual communication,
存储器503,用于存放计算机程序;Memory 503, used to store computer programs;
处理器501,用于执行存储器503上所存放的程序时,实现如下步骤:The processor 501 is used to execute the program stored on the memory 503 to implement the following steps:
获取串行存在检测SPD寄存器的状态信息;Get the status information of the serial presence detection SPD register;
在确定所述SPD寄存器处于上电状态的情况下,从所述SPD寄存器中读取内存信息,所述上电状态是通过复杂可编程逻辑器件控制完成的。When it is determined that the SPD register is in a power-on state, memory information is read from the SPD register, and the power-on state is controlled by a complex programmable logic device.
本发明实施例还提供了另一种通信设备,如图9所示,包括处理器601、通信接口602、存储器603和通信总线604,其中,处理器601,通信接口602,存储器603通过通信总线604完成相互间的通信,The embodiment of the present invention also provides another communication device, as shown in Figure 9, including a processor 601, a communication interface 602, a memory 603, and a communication bus 604. The processor 601, the communication interface 602, and the memory 603 communicate through the communication bus. 604 completes mutual communication,
存储器603,用于存放计算机程序;Memory 603, used to store computer programs;
处理器601,用于执行存储器603上所存放的程序时,实现如下步骤:The processor 601 is used to execute the program stored in the memory 603 to implement the following steps:
接收基板管理控制器发送的读取内存请求;Receive the read memory request sent by the baseboard management controller;
根据所述读取内存请求发送内存信息至基板管理控制器,所述内存信息是通过复杂可编程逻辑器件控制所述SPD寄存器进入上电状态后获取的。Memory information is sent to the baseboard management controller according to the read memory request, and the memory information is obtained after controlling the SPD register to enter a power-on state through a complex programmable logic device.
上述终端提到的通信总线可以是外设部件互连标准(Peripheral ComponentInterconnect,简称PCI)总线或扩展工业标准结构(Extended Industry StandardArchitecture,简称EISA)总线等。该通信总线可以分为地址总线、数据总线、控制总线等。为便于表示,图中仅用一条粗线表示,但并不表示仅有一根总线或一种类型的总线。The communication bus mentioned in the above terminal may be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus. The communication bus can be divided into address bus, data bus, control bus, etc. For ease of presentation, only one thick line is used in the figure, but it does not mean that there is only one bus or one type of bus.
通信接口用于上述终端与其他设备之间的通信。The communication interface is used for communication between the above terminal and other devices.
存储器可以包括随机存取存储器(Random Access Memory,简称RAM),也可以包括非易失性存储器(non-volatile memory),例如至少一个磁盘存储器。可选的,存储器还可以是至少一个位于远离前述处理器的存储装置。The memory may include random access memory (RAM) or non-volatile memory (non-volatile memory), such as at least one disk memory. Optionally, the memory may also be at least one storage device located far away from the aforementioned processor.
上述的处理器可以是通用处理器,包括中央处理器(Central Processing Unit,简称CPU)、网络处理器(Network Processor,简称NP)等;还可以是数字信号处理器(Digital Signal Processing,简称DSP)、专用集成电路(Application SpecificIntegrated Circuit,简称ASIC)、现场可编程门阵列(Field-Programmable Gate Array,简称FPGA)或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件。The above-mentioned processor can be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it can also be a digital signal processor (Digital Signal Processing, DSP). , Application Specific Integrated Circuit (ASIC for short), Field-Programmable Gate Array (FPGA for short) or other programmable logic devices, discrete gate or transistor logic devices, and discrete hardware components.
本发明还提供了一种可读存储介质,当所述存储介质中的指令由通信设备的处理器执行时,使得通信设备能够执行前述任一实施例的内存信息获取方法。The present invention also provides a readable storage medium. When the instructions in the storage medium are executed by the processor of the communication device, the communication device can execute the memory information acquisition method of any of the foregoing embodiments.
对于装置实施例而言,由于其与方法实施例基本相似,所以描述的比较简单,相关之处参见方法实施例的部分说明即可。As for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple. For relevant details, please refer to the partial description of the method embodiment.
在此提供的算法和显示不与任何特定计算机、虚拟系统或者其他设备固有相关。根据上面的描述,构造这类系统所要求的结构是显而易见的。此外,本发明也不针对任何特定编程语言。应当明白,可以利用各种编程语言实现在此描述的本发明的内容,并且上面对特定语言所做的描述是为了披露本发明的最佳实施方式。The algorithms and displays provided herein are not inherently associated with any particular computer, virtual system, or other device. From the above description, the structure required to construct such a system is obvious. Furthermore, this invention is not specific to any specific programming language. It should be understood that a variety of programming languages may be utilized to implement the invention described herein, and that the above descriptions of specific languages are intended to disclose the best mode of carrying out the invention.
在此处所提供的说明书中,说明了大量具体细节。然而,能够理解,本发明的实施例可以在没有这些具体细节的情况下实践。在一些实例中,并未详细示出公知的方法、结构和技术,以便不模糊对本说明书的理解。In the instructions provided here, a number of specific details are described. However, it is understood that embodiments of the invention may be practiced without these specific details. In some instances, well-known methods, structures, and techniques have not been shown in detail so as not to obscure the understanding of this description.
类似地,应当理解,为了精简本发明并帮助理解各个发明方面中的一个或多个,在上面对本发明的示例性实施例的描述中,本发明的各个特征有时被一起分组到单个实施例、图,或者对其的描述中。然而,并不应将该公开的方法解释成反映如下意图:即所要求保护的本发明要求比在每个权利要求中所明确记载的特征更多的特征。更确切地说,如下面的权利要求书所反映的那样,发明方面在于少于前面公开的单个实施例的所有特征。因此,遵循具体实施方式的权利要求书由此明确地并入该具体实施方式,其中每个权利要求本身都作为本发明的单独实施例。Similarly, it is to be understood that in the above description of exemplary embodiments of the invention, various features of the invention are sometimes grouped together into a single embodiment, in order to streamline the invention and aid in the understanding of one or more of the various inventive aspects. Figure, or its description. This method of disclosure, however, is not to be interpreted as reflecting an intention that the claimed invention requires more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive aspects lie in less than all features of a single foregoing disclosed embodiment. Thus, the claims following the Detailed Description are hereby expressly incorporated into this Detailed Description, with each claim standing on its own as a separate embodiment of this invention.
本领域那些技术人员可以理解,可以对实施例中的设备中的模块进行自适应性地改变并且把它们设置在与该实施例不同的一个或多个设备中。可以把实施例中的模块或单元或组件组合成一个模块或单元或组件,以及此外可以把它们分成多个子模块或子单元或子组件。除了这样的特征和/或过程或者单元中的至少一些是相互排斥之外,可以采用任何组合对本说明书(包括伴随的权利要求、摘要和附图)中公开的所有特征以及如此公开的任何方法或者设备的所有过程或单元进行组合。除非另外明确陈述,本说明书(包括伴随的权利要求、摘要和附图)中公开的每个特征可以由提供相同、等同或相似目的的替代特征来代替。Those skilled in the art will understand that modules in the devices in the embodiment can be adaptively changed and arranged in one or more devices different from that in the embodiment. The modules or units or components in the embodiments may be combined into one module or unit or component, and furthermore they may be divided into a plurality of sub-modules or sub-units or sub-components. All features disclosed in this specification (including accompanying claims, abstract and drawings) and any method so disclosed may be employed in any combination, except that at least some of such features and/or processes or units are mutually exclusive. All processes or units of the equipment are combined. Each feature disclosed in this specification (including accompanying claims, abstract and drawings) may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise.
本发明的各个部件实施例可以以硬件实现,或者以在一个或者多个处理器上运行的软件模块实现,或者以它们的组合实现。本领域的技术人员应当理解,可以在实践中使用微处理器或者数字信号处理器(DSP)来实现根据本发明的排序设备中的一些或者全部部件的一些或者全部功能。本发明还可以实现为用于执行这里所描述的方法的一部分或者全部的设备或者装置程序。这样的实现本发明的程序可以存储在计算机可读介质上,或者可以具有一个或者多个信号的形式。这样的信号可以从因特网网站上下载得到,或者在载体信号上提供,或者以任何其他形式提供。Various component embodiments of the present invention may be implemented in hardware, or in software modules running on one or more processors, or in a combination thereof. Those skilled in the art will understand that a microprocessor or a digital signal processor (DSP) may be used in practice to implement some or all functions of some or all components in the sorting device according to the present invention. The present invention may also be implemented as a device or device program for performing part or all of the methods described herein. Such a program implementing the present invention may be stored on a computer-readable medium, or may be in the form of one or more signals. Such signals may be downloaded from an Internet website, or provided on a carrier signal, or in any other form.
应该注意的是上述实施例对本发明进行说明而不是对本发明进行限制,并且本领域技术人员在不脱离所附权利要求的范围的情况下可设计出替换实施例。在权利要求中,不应将位于括号之间的任何参考符号构造成对权利要求的限制。单词“包含”不排除存在未列在权利要求中的元件或步骤。位于元件之前的单词“一”或“一个”不排除存在多个这样的元件。本发明可以借助于包括有若干不同元件的硬件以及借助于适当编程的计算机来实现。在列举了若干装置的单元权利要求中,这些装置中的若干个可以是通过同一个硬件项来具体体现。单词第一、第二,以及第三等的使用不表示任何顺序。可将这些单词解释为名称。It should be noted that the above-mentioned embodiments illustrate rather than limit the invention, and that those skilled in the art will be able to design alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The word "comprising" does not exclude the presence of elements or steps not listed in a claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The invention may be implemented by means of hardware comprising several different elements and by means of a suitably programmed computer. In the element claim enumerating several means, several of these means may be embodied by the same item of hardware. The use of the words first, second, third, etc. does not indicate any order. These words can be interpreted as names.
所属领域的技术人员可以清楚地了解到,为描述的方便和简洁,上述描述的系统、装置和单元的具体工作过程,可以参考前述方法实施例中的对应过程,在此不再赘述。Those skilled in the art can clearly understand that for the convenience and simplicity of description, the specific working processes of the systems, devices and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be described again here.
以上所述仅为本发明的较佳实施例而已,并不用以限制本发明,凡在本发明的精神和原则之内所做的任何修改、等同替换和改进等,均应包含在本发明的保护范围之内。The above descriptions are only preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention shall be included in the scope of the present invention. within the scope of protection.
以上所述,仅为本发明的具体实施方式,但本发明的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本发明揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本发明的保护范围之内。因此,本发明的保护范围应以权利要求的保护范围为准。The above are only specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto. Any person familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed by the present invention. should be covered by the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.
需要说明的是,本申请实施例中获取各种数据相关过程,都是在遵照所在地国家相应的数据保护法规政策的前提下,并获得由相应装置所有者给予授权的情况下进行的。It should be noted that the processes related to obtaining various data in the embodiments of this application are all carried out under the premise of complying with the corresponding data protection regulations and policies of the country where the location is located, and with the authorization granted by the owner of the corresponding device.
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Country or region after: China Address after: 215000 Building 9, No.1 guanpu Road, Guoxiang street, Wuzhong Economic Development Zone, Suzhou City, Jiangsu Province Applicant after: Suzhou Yuannao Intelligent Technology Co.,Ltd. Address before: 215000 Building 9, No.1 guanpu Road, Guoxiang street, Wuzhong Economic Development Zone, Suzhou City, Jiangsu Province Applicant before: SUZHOU LANGCHAO INTELLIGENT TECHNOLOGY Co.,Ltd. Country or region before: China |