CN116566332A - Low-power-consumption broadband low-noise amplifier - Google Patents

Abstract

The invention discloses a low-power-consumption broadband low-noise amplifier, which comprises a bias circuit, an input stage amplifier and an output stage buffer amplifier, wherein the bias circuit is connected with the input stage amplifier; the bias circuit is composed of a current mirror; the input stage amplifier consists of a current multiplexing structure, a current splitting and transconductance enhancing structure and a parallel resistor negative feedback structure; the output stage buffer amplifying circuit consists of a common source buffer structure, a current multiplexing structure and a noise cancellation structure. The invention provides two-path current multiplexing and two-path noise cancellation, and adopts inter-capacitor cancellation. Through the mode, the use efficiency of each circuit current can be improved, the performances of circuit gain, noise and the like can be effectively improved under the condition that no additional current is added, on the other hand, the feedback branch is optimized, the gain flatness is improved, and the bandwidth is expanded.

Description

A Low Power Broadband Low Noise Amplifier

technical field

The invention relates to the technical field of integrated circuit design, in particular to a low-power broadband low-noise amplifier.

Background technique

With the rapid development of applications such as high-speed wireless communication technology, IoT sensor network, and radar communication, the portability, low power consumption, low cost, and high performance of wireless communication equipment have become research hotspots. The application of highly integrated radio frequency transceiver chips has greatly improved the performance of mobile communication equipment. As one of the high power consumption modules in the communication system, the key module of the front end of the radio frequency receiver, reducing its power consumption is the key to realize the low power consumption of the whole communication system. In order to cope with the rapid development of high-speed wireless communication technology, IoT sensor network and radar communication, global positioning system, WIFI, satellite link and other applications, the RF receiving front-end chip is required to have the characteristics of wide bandwidth, low power consumption and low noise.

As the first-stage active module of the RF receiver, the low-noise amplifier's circuit performance can often affect the quality of the entire system. The low-noise amplifier amplifies the input signal, and can effectively reduce its noise figure and improve linear performance while amplifying useful radio frequency signals, so that further signal processing is no longer sensitive to noise. Key to its performance is the ability to deliver an undistorted amplified signal to the signal processing unit without adding additional noise. In addition, low power consumption is also an important indicator for low-noise amplifiers. Low power consumption is mainly manifested in low current and low voltage, but reducing circuit power consumption will deteriorate circuit gain and noise figure performance to varying degrees.

The low power consumption of the low noise amplifier is mainly achieved by reducing the operating voltage and reducing the use of the operating current. The technologies included include threshold voltage reduction technology, current multiplexing technology, and gate-controlled power supply technology. The threshold voltage reduction is mainly through the forward substrate bias to increase the voltage difference between the substrate and the source, thereby reducing the threshold voltage of the transistor. effect, but this will make the performance of the circuit such as gain and noise figure worse; current multiplexing can realize the operation of multiple circuits with one current, and its core idea is to reduce the circuit utilization rate of the circuit while keeping the equivalent transconductance unchanged. , enabling low-power designs without sacrificing performance such as gain and noise figure. However, this will reduce the isolation between circuit modules, and there may be problems such as crosstalk and signal coupling.

Commonly used LNA structures include a common-source amplifier structure and a common-gate amplifier structure. The common source amplifier is characterized by high input impedance, which requires a high-order matching network to expand the bandwidth from the signal source to the common source input, but the introduction of a high-order matching network will increase the use of active devices and increase the circuit noise figure and chip area. The common gate amplifier structure is a circuit with low input impedance and high output impedance, but the noise of this structure is large and the gain is low. For applications such as wireless network communication and satellite link communication, the design of a low-power low-noise amplifier is the key to realizing a low-power RF transceiver system, but the performance of power consumption, gain, linearity, and noise figure is often not perfect. There is a certain compromise between low power consumption, low noise, high linearity and other high performance indicators. Therefore, it is necessary to study how to realize an amplifier with high gain, low noise figure and wide bandwidth under the condition of low supply voltage.

Contents of the invention

The purpose of the present invention is to provide a low-power broadband low-noise amplifier, which can improve the use efficiency of each circuit current, and effectively improve the performance of the circuit gain and noise without adding additional current. On the other hand, optimize Feedback branch improves gain flatness and expands bandwidth.

For prior art and above-mentioned weak point, the present invention realizes by following design scheme:

A low-power broadband low-noise amplifier, comprising a bias circuit, an input-stage amplifier and an output-stage buffer amplifier; the bias circuit includes a current generating structure composed of a first transistor and a second transistor, and a first resistor and a second transistor A current buffer structure composed of two resistors; the input-stage amplifying circuit includes a cascode current multiplexing amplifying circuit structure composed of the third transistor and the fourth transistor, on this basis, the fifth transistor and the third transistor are added Complementary common source amplification structure is formed, the input matching network is composed of the first inductor, the first capacitor and the second capacitor, the second inductor is used as the load of the input stage amplifier circuit and the output matching network is composed of the third inductor, and the third capacitor and the third resistor form a circuit parallel negative feedback structure; the output stage buffer amplifier is composed of the sixth transistor of the common source amplification structure of the current source connection method and the seventh transistor of the common drain buffer to form an amplified buffer circuit structure, composed of the fourth The matching between the sixth transistor and the seventh transistor formed by the inductance, the capacitor offset feedback structure formed by the fourth capacitor, and the isolated DC signal structure formed by the fifth capacitor. The direct currents of the third transistor, the fourth transistor, and the fifth transistor are multiplexed; the direct currents of the sixth transistor and the seventh transistor are multiplexed.

Further, in the input-stage amplifying circuit, the connecting end of the first inductor and the first capacitor is connected to one end of the second resistor, and one end of the third inductor is connected to one end of the third resistor and connected to the seventh transistor. The gate is connected, the gate of the third transistor is connected with the gate of the sixth transistor; one end of the fourth capacitor in the output stage buffer amplifier is connected with the drain of the third transistor; the bias The circuit provides bias voltages to the gates of the third transistor and the sixth transistor.

Further, the first transistor in the bias circuit is connected with the drain and the gate, and is connected with the other end of the second resistor at the same time; the second transistor is connected with a current source, and the second transistor The drain is connected to the drain and the gate of the first transistor, one end of the first resistor is connected to the gate of the second transistor, and the other end of the first resistor is connected to the external voltage Vpb1.

Further, the third transistor and the fourth transistor in the input stage amplifying circuit form a cascode structure circuit, and the drain of the third transistor is connected to the source of the fourth transistor and connected to the drain of the fifth transistor The other end of the first inductance is connected to the gate of the third transistor, the drain of the fourth transistor is connected to one end of the second inductance and then connected to the other end of the third inductance, and one end of the third capacitor is connected to the first end of the third inductance. The other ends of the three resistors are connected, and the other end is connected to the connecting end of the first inductor and the first capacitor, and one end of the second capacitor is connected to the other end of the first capacitor and then connected to the signal input end, and the other end is connected to the fifth The gates of the transistors are connected, one end of the fourth resistor is connected to the gate of the second transistor, and the other end is connected to the external voltage Vpb2.

Further, the fourth inductance in the buffer amplifier of the output stage forms the inter-electrode matching between the sixth transistor and the seventh transistor, one end of the fourth inductance is connected to the drain of the sixth transistor, and the other end is connected to the drain of the seventh transistor. connected to the source of the fourth capacitor, one end of the fourth capacitor is connected to the drain of the third transistor, the other end is connected to the source of the seventh transistor, one end of the fifth capacitor is connected to the source of the seventh transistor, and the other end Connect to the signal output terminal.

Further, the substrates and sources of the first transistor, the third transistor and the sixth transistor are connected to the ground signal terminal, and the substrates and sources of the second transistor and the fifth transistor are connected to the power signal terminal. terminal, the substrate of the fourth transistor is connected to the ground signal terminal, and the substrate of the seventh transistor is connected to the source.

The beneficial effects of the present invention are: a low-power broadband low-noise amplifier of the present invention has the following advantages: first, the present invention proposes a current multiplexing structure, and the current multiplexing technology is used twice in the circuit. Improve the circuit gain and reduce the circuit noise figure without adding additional current; second, the present invention proposes a parallel current shunt circuit structure, which reduces the load voltage difference of the amplifying circuit, realizes signal amplification and improves the equivalent input of the circuit at the same time Transconductance; Third, the present invention proposes a parasitic capacitance offset structure, which reduces the influence of parasitic capacitance on the circuit, effectively reduces the input reflection coefficient, and innovatively adopts parallel feedback technology in the cascode circuit to reduce the equivalent input impedance and improve Circuit gain flatness, circuit gain flatness is ±0.19dB, combined with current multiplexing technology to achieve noise cancellation technology, effectively reducing noise, the circuit noise within the frequency band is less than 1.2dB.

Description of drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings that need to be used in the description of the embodiments or the prior art. For some embodiments recorded, those skilled in the art can also obtain other drawings based on these drawings without any creative work.

Fig. 1 is the schematic diagram of the circuit structure of a kind of low power consumption broadband low noise amplifier of the present invention;

Fig. 2 is the simulation result of the part S parameter of a kind of low power consumption broadband low noise amplifier of the present invention;

Fig. 3 is the simulation result of the gain of a kind of low power consumption broadband low noise amplifier of the present invention;

Fig. 4 is the simulation result of the noise figure of a kind of low power consumption broadband low noise amplifier of the present invention;

FIG. 5 is a simulation result of the stability of a low-power broadband low-noise amplifier of the present invention.

Detailed ways

In order to make the object, technical solution and advantages of the present invention clearer, the specific embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings. Examples of these preferred embodiments are illustrated in the accompanying drawings. The embodiments of the invention shown in the figures and described with reference to the figures are only exemplary and are not limited to these embodiments.

In addition, it should be noted that, in order to avoid obscuring the present invention due to unnecessary details, only the structures and/or processing steps that are closely related to the solution according to the present invention are shown in the drawings, and the steps related to the present invention are omitted. Invent other details that don't really matter.

And, in the description of the present invention, the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer" etc. indicate orientation Or the positional relationship is based on the orientation or positional relationship shown in the drawings, which is only for the convenience of describing the present invention and simplifying the description, and does not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation , and therefore cannot be construed as a limitation of the present invention. In addition, the terms "first" and "second" are used for descriptive purposes only, and should not be understood as indicating or implying relative importance.

Please refer to Fig. 1 to Fig. 5, the embodiment of the present invention comprises:

As shown in FIG. 1 , the embodiment of the present invention includes: a low-power broadband low-noise amplifier provided by the present invention includes a bias circuit 100 , an input-stage amplifying circuit 200 and an output-stage buffer amplifier 300 .

The present invention consists of two-stage amplifiers, wherein the input-stage amplifying circuit 200 is a cascode amplifier combined with a complementary common-source structure. The output-stage buffer amplifier 300 is an amplifier in which an output buffer of a common-drain amplifier structure is combined with a common-source amplifier. The input-stage amplifying circuit 200 and the output-stage buffer amplifier 300 share the DC bias voltage provided by the bias circuit 100 .

The bias circuit 100 of the present invention is a bias circuit with a current mirror structure. Based on the current source connection method, 102 is composed of the first transistor (101) of the current replication transistor, and the 103 and the second resistor (104) are resistors with a large resistance value, so as to reduce the influence of the impedance of the current mirror circuit on the input impedance and reduce the input impedance caused by the current additional noise introduced by the mirror.

The input stage amplifying circuit 200 of the present invention is a cascode amplifier, which adopts a cascode structure combined with a complementary cascode structure. The cascode amplifier structure is a current multiplexing structure, which achieves high gain and good isolation performance without increasing the current path, and reduces the influence of the subsequent stage circuit on the front stage circuit. In the cascode structure, Combining the complementary common source structure, that is, the fourth transistor (202) of the common gate transistor (202) on the cascode structure is connected in parallel with the fifth transistor (203) of the P-type common source structure, so as to realize the parallel shunt effect and reduce the load second inductance (205 ), the addition of the fifth transistor (203) also achieves the effect of increasing the input equivalent transconductance and increasing the circuit gain. The input signal flows into the third transistor (201) and the fifth transistor (203) for amplification through the first capacitor (207) and the second capacitor (208), and then is input to the fourth transistor (202) by the source of the fourth transistor (202). ) to realize the amplification of the common gate structure. The first inductance (204) and the third inductance (206) are mainly used to improve the performance of the matching network, which is beneficial to increase the circuit bandwidth. The first capacitor (207) and the second capacitor (208) are mainly used to isolate the influence of the DC voltage on the input signal, and at the same time form an input matching network with the first inductor (204). The second inductance (205) serves as the load of the input stage amplifier and the peaking inductance of the circuit, and introduces zero point and pole offset, which is beneficial to suppress gain roll-off at high frequencies and realize the effect of expanding circuit bandwidth. The third capacitor (209) and the third resistor (210) form a parallel resistor-capacitor negative feedback, and the parallel feedback adjusts the stability of the circuit by introducing a resistor to increase the real part of the input impedance, broadens the bandwidth, and makes the gain in the working frequency band more flat, and at the same time The current noise of the third transistor (201) is amplified in reverse phase to achieve a noise cancellation effect at the output end, thereby reducing the noise factor.

The input stage amplifying circuit 300 of the present invention is an output buffer amplifier, which is composed of a common source stage amplifier and an output buffer buffer, and is composed of a sixth transistor (301) and a seventh transistor (302). Wherein the sixth transistor (301) is a common-source amplifier structure, the seventh transistor (302) is a common-drain amplifier structure, and the drain of the sixth transistor (301) passes through the fourth inductance (303) and the seventh transistor (302) The source is connected, the source of the sixth transistor (301) is connected to the gate of the third transistor (201), and the input signal flows into the sixth transistor (301) after passing through the first capacitor (207) and the first inductor (204) At the same time, the reverse current noise of the third transistor (201) fed back by the parallel feedback resistor-capacitor structure is reversed again through the sixth transistor (301), and the reverse noise signal is at the output terminal with the original first The current noise of the three transistors (201) is superimposed to realize the effect of noise cancellation. The fourth inductance (303) is used as a peaking inductance to expand the circuit bandwidth, one end of the fourth capacitor (304) is connected to the drain of the third transistor (201), and the other end is connected to the source of the seventh transistor (302). Connected to offset the inherent parasitic capacitance of the transistor and effectively reduce the input reflection coefficient. The fifth capacitor (305) is used as a part of the output matching network to realize the effect of isolating the DC power supply and reduce the impact on the next stage circuit.

The embodiment of the present invention is used for WIFI-6 (5G frequency band and 6G frequency band), and the working frequency band is 4.98GHz-7.58GHz. It should be noted that the working frequency band in the embodiment is only an example, and is not limited to a specific working frequency. In actual design, the present invention can be applied to different frequency bands.

The application fields of the low-power broadband low-noise amplifier of the present invention include: wireless communication technology, Internet of Things sensor network and radar communication, global positioning system, WIFI, satellite link, etc. The present invention proposes a current multiplexing structure, which uses the current multiplexing technology twice in the circuit to increase the circuit gain and reduce the circuit noise figure without adding additional current; the present invention proposes a parallel current shunt circuit structure , reduce the load voltage difference of the amplifying circuit, realize signal amplification and increase the equivalent input transconductance of the circuit at the same time; the present invention proposes a parasitic capacitance offset structure, reduces the influence of parasitic capacitance on the circuit, effectively reduces the input reflection coefficient, and at the same time innovates in In the cascode circuit, the parallel feedback technology is used to reduce the equivalent input impedance and improve the flatness of the circuit gain. The flatness of the circuit gain is ±0.05dB. Combined with the current multiplexing technology to realize the noise cancellation technology, the noise is effectively reduced, and the circuit noise in the frequency band is less than 1.2dB. Based on the technology proposed above, the present invention finally realizes a low noise amplifier with low power consumption, low noise figure, high gain and wide bandwidth.

The low-power broadband LNA operates from a 1V supply voltage and dissipates 4.8mW of power.

Fig. 2 is the simulation result of some S parameters of the low power consumption broadband low noise amplifier. The input reflection coefficient S11 of the low noise amplifier is less than -10dB in the range of 4.812GHz-8.129GHz, the output reflection coefficient S22 is less than -10dB in the range of 2.485GHz-7.886GHz, and the maximum value of S12 in the whole frequency band is -26.17dB.

Fig. 3 is the simulation result of the gain of the low-power wideband low-noise amplifier. The gain S21 of the low noise amplifier has a maximum value of 21.76dB in the frequency band of 4.98HGHz-7.58GHz, and the flatness in the frequency band is ±0.19dB.

Fig. 4 is the simulation result of the noise figure of the low power consumption broadband LNA. The noise figure NF of the low noise amplifier is less than 1.2dB in the frequency band of 4.98HGHz-7.58GHz, the minimum value of the noise figure in the frequency band is 1.13dB, and the minimum value of the minimum noise figure in the frequency band is 1.03dB.

Figure 5 shows the stability simulation results for a low-power broadband LNA. The stability factor KF of the low noise amplifier is greater than 1 in the 4.98HGHz-7.58GHz frequency band, indicating that the system is stable.

A low-power broadband low-noise amplifier of the present invention has the following advantages:

First, the present invention proposes a current multiplexing structure, which uses the current multiplexing technology twice in the circuit to increase the circuit gain and reduce the circuit noise figure without adding additional current;

Second, the present invention proposes a parallel current shunt circuit structure, which reduces the load voltage difference of the amplifying circuit, simultaneously realizes signal amplification and improves the equivalent input transconductance of the circuit;

Third, the present invention proposes a parasitic capacitance offset structure, which reduces the influence of parasitic capacitance on the circuit and effectively reduces the input reflection coefficient. At the same time, it innovatively adopts parallel feedback technology in the cascode circuit to reduce the equivalent input impedance and improve the flatness of the circuit gain. Degree, the circuit gain flatness is ±0.19dB, combined with current multiplexing technology to achieve noise cancellation technology, effectively reduce noise, the circuit noise within the frequency band is less than 1.2dB.

In addition, it should be noted that in this specification, "comprises", "comprises" or any other variant thereof is intended to cover a non-exclusive inclusion, so that a process, method, article or device that includes a series of elements not only includes those elements, but also other elements not expressly listed, or elements inherent in the process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article or apparatus comprising said element.

It should be understood that although this description is described according to implementation modes, not each implementation mode only contains an independent technical solution, and this description in the description is only for clarity, and those skilled in the art should take the description as a whole, and each The technical solutions in the embodiments can also be properly combined to form other implementations that can be understood by those skilled in the art.

Claims (5)

1. a low-power consumption broadband low-noise amplifier is characterized in that comprising bias circuit (100), input stage amplifying circuit (200) and output stage buffer amplifier (300); Described bias circuit (100) comprises first A current generating structure composed of a transistor (101) and a second transistor (102), and a current buffer structure composed of a first resistor (103) and a second resistor (104); the input stage amplifier circuit (200) includes The third transistor (201) and the fourth transistor (202) are composed of a cascode current multiplexing amplifier circuit structure, on this basis, the fifth transistor (203) and the third transistor (201) are added to form a complementary common source The amplification structure is composed of the first inductor (204), the first capacitor (207) and the second capacitor (208) to form an input matching network, and the second inductor (205) is used as the load of the input stage amplifier circuit (200) and the third inductor (206) form output matching network, and form circuit parallel negative feedback structure by the 3rd electric capacity (209) and the 3rd resistance (210); Described output stage buffer amplifier (300) is by the common source amplifying structure of current source connection method The sixth transistor (301) and the common drain buffer seventh transistor (302) form a buffer circuit structure with amplification, and the matching between the sixth transistor (301) and the seventh transistor (302) formed by the fourth inductance (303) , a capacitive cancellation feedback structure composed of the fourth capacitor (304), and an isolated DC signal structure composed of the fifth capacitor (305). The direct current of the third transistor (201) is multiplexed with the fourth transistor (202) and the fifth transistor (203); the direct current of the sixth transistor (301) and the seventh transistor (302) is multiplexed ; The connection end of the first inductance (204) and the first capacitor (207) in the described input stage amplifying circuit (200) is connected with one end of the second resistor (104), and one end of the third inductance (206) is connected with the first end of the first capacitor (207). One end of the three resistors (210) is connected to the gate of the seventh transistor (302), and the gate of the third transistor (201) is connected to the gate of the sixth transistor (301); the output stage buffer One end of the fourth capacitor (304) in the amplifier (300) is connected to the drain of the third transistor (201); the bias circuit (100) is the third transistor (201) and the sixth transistor (301) The gate provides bias voltage. 2. The low-power broadband low-noise amplifier according to claim 1, characterized in that: the first transistor (101) in the bias circuit (100) is connected to the drain and the gate, and is connected to the first transistor simultaneously. The other ends of the two resistors (104) are connected; the second transistor (102) adopts a current source connection method, and the drain of the second transistor (102) is connected with the drain and the gate of the first transistor (101), One end of the first resistor (103) is connected to the gate of the second transistor (102), and the other end of the first resistor (103) is connected to the external voltage Vpb1. 3. The low-power broadband low-noise amplifier according to claim 1, characterized in that: the third transistor (201) and the fourth transistor (202) in the input stage amplifier circuit (200) form a common source common In a gate structure circuit, the drain of the third transistor (201) is connected to the source of the fourth transistor (202) and then connected to the drain of the fifth transistor (203), and the other end of the first inductor (204) is connected to the third The gate of the transistor (201) is connected, the drain of the fourth transistor (202) is connected with one end of the second inductance (205) and then connected with the other end of the third inductance (206), and the third capacitor (209) One end is connected with the other end of the third resistor (210), the other end is connected with the connecting end of the first inductance (204) and the first capacitor (207), and one end of the second capacitor (208) is connected with the first capacitor (207). ) is connected to the signal input terminal after the other end is connected, the other end is connected to the grid of the fifth transistor (203), one end of the fourth resistor (211) is connected to the grid of the second transistor (102), and the other end is connected to the grid of the second transistor (102). One end is connected to the external voltage Vpb2. 4. low power consumption wideband low noise amplifier according to claim 1 is characterized in that: the 4th inductance (303) in the described output stage buffer amplifier (300) forms the 6th transistor (301) and the 7th transistor (302) pole-to-pole matching, one end of the fourth inductance (303) is connected with the drain of the sixth transistor (301), the other end is connected with the source of the seventh transistor (302), and the fourth capacitor (304) One end of the capacitor is connected to the drain of the third transistor (201), the other end is connected to the source of the seventh transistor (302), and one end of the fifth capacitor (305) is connected to the source of the seventh transistor (302). , and the other end is connected to the signal output end. 5. low power consumption broadband low noise amplifier according to claim 1, is characterized in that: the substrate pole and source of described first transistor (101), the 3rd transistor (201) and the 6th transistor (301) pole is connected to the ground signal terminal, the substrate pole and source pole of the second transistor (102) and the fifth transistor (203) are connected to the power signal terminal, and the substrate pole of the fourth transistor (202) is connected to the ground signal terminal , the substrate electrode of the seventh transistor (302) is connected to the source electrode.