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CN116169216B - Light-emitting diode epitaxial wafer and preparation method thereof, and light-emitting diode - Google Patents

Light-emitting diode epitaxial wafer and preparation method thereof, and light-emitting diode

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Publication number
CN116169216B
CN116169216B CN202310232249.4A CN202310232249A CN116169216B CN 116169216 B CN116169216 B CN 116169216B CN 202310232249 A CN202310232249 A CN 202310232249A CN 116169216 B CN116169216 B CN 116169216B
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layer
source
sub
emitting diode
light
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CN116169216A (en
Inventor
张彩霞
印从飞
程金连
刘春杨
胡加辉
金从龙
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Jiangxi Zhao Chi Semiconductor Co Ltd
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Jiangxi Zhao Chi Semiconductor Co Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/81—Bodies
    • H10H20/811—Bodies having quantum effect structures or superlattices, e.g. tunnel junctions
    • H10H20/812—Bodies having quantum effect structures or superlattices, e.g. tunnel junctions within the light-emitting regions, e.g. having quantum confinement structures
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/0641—Nitrides
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
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    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/06—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material
    • C23C16/18—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material from metallo-organic compounds
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/34—Nitrides
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/455—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for introducing gases into reaction chamber or for modifying gas flows in reaction chamber
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01—Manufacture or treatment
    • H10H20/011—Manufacture or treatment of bodies, e.g. forming semiconductor layers
    • H10H20/013—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials
    • H10H20/0133—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials with a substrate not being Group III-V materials
    • H10H20/01335—Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials with a substrate not being Group III-V materials the light-emitting regions comprising nitride materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/81—Bodies
    • H10H20/816—Bodies having carrier transport control structures, e.g. highly-doped semiconductor layers or current-blocking structures
    • H10H20/8162—Current-blocking structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80—Constructional details
    • H10H20/81—Bodies
    • H10H20/822—Materials of the light-emitting regions
    • H10H20/824—Materials of the light-emitting regions comprising only Group III-V materials, e.g. GaP
    • H10H20/825—Materials of the light-emitting regions comprising only Group III-V materials, e.g. GaP containing nitrogen, e.g. GaN
    • H10H20/8252—Materials of the light-emitting regions comprising only Group III-V materials, e.g. GaP containing nitrogen, e.g. GaN characterised by the dopants
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

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  • Chemical & Material Sciences (AREA)
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  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Led Devices (AREA)

Abstract

The invention discloses a light-emitting diode epitaxial wafer, a preparation method thereof and a light-emitting diode, and relates to the field of semiconductor photoelectric devices. The light-emitting diode epitaxial wafer comprises a substrate, and a nucleation layer, an intrinsic GaN layer, an N-type semiconductor layer, a multiple quantum well layer, an electron blocking layer and a P-type semiconductor layer which are sequentially arranged on the substrate, wherein the electron blocking layer comprises a first sub-layer and a second sub-layer which are sequentially stacked, the first sub-layer is MgInGaN layers, and the second sub-layer comprises a Ga 2O3 layer and a MgGaN layer which are sequentially stacked. By implementing the invention, the luminous efficiency of the light-emitting diode can be improved, and the working voltage can be reduced.

Description

Light-emitting diode epitaxial wafer, preparation method thereof and light-emitting diode
Technical Field
The invention relates to the field of semiconductor photoelectric devices, in particular to a light-emitting diode epitaxial wafer, a preparation method thereof and a light-emitting diode.
Background
Currently, gaN-based light emitting diodes have been widely used in the field of solid state lighting as well as in the field of display, attracting more and more attention. The epitaxial structure has a great influence on the photoelectric performance of the light emitting diode. The conventional light-emitting diode epitaxial wafer comprises a substrate, and a nucleation layer, an intrinsic GaN layer, an N-type semiconductor layer, a multiple quantum well layer, an electron blocking layer and a P-type semiconductor layer which are sequentially grown on the substrate. Because the electron mobility is high, the AlGaN material or AlGaN/InGaN superlattice material doped with high Al is adopted as the electron blocking layer at the present stage, but the high Al component can bring high working voltage and has a certain negative effect of blocking holes, and the phenomenon of electron overflow is caused due to the fact that the mobility of Al atoms is low, the viscous effect is high, the distribution of Al atoms is uneven, the electron blocking is influenced, and the luminous efficiency is reduced.
Disclosure of Invention
The invention aims to solve the technical problem of providing a light-emitting diode epitaxial wafer and a preparation method thereof, which can reduce the working voltage of a light-emitting diode and improve the light-emitting efficiency.
The invention also solves the technical problem of providing a light-emitting diode which has high luminous efficiency and low working voltage.
In order to solve the problems, the invention discloses a light-emitting diode epitaxial wafer which comprises a substrate, a nucleation layer, an intrinsic GaN layer, an N-type semiconductor layer, a multiple quantum well layer, an electron blocking layer and a P-type semiconductor layer, wherein the nucleation layer, the intrinsic GaN layer, the N-type semiconductor layer, the multiple quantum well layer, the electron blocking layer and the P-type semiconductor layer are sequentially arranged on the substrate;
Wherein the first sub-layer is MgInGaN layers;
The second sub-layer comprises a Ga 2O3 layer and a MgGaN layer which are sequentially stacked.
As an improvement of the above technical solution, the In component In the MgInGaN layers gradually decreases from 0.2 to 0.4 to 0 along the epitaxy direction.
As an improvement of the technical scheme, the doping concentration of Mg in the MgInGaN layers is 1 multiplied by 10 15cm-3-1×1016cm-3, and the thickness of the MgInGaN layers is 5nm-50nm.
As an improvement of the above technical scheme, the In source In the MgInGaN layers is intermittently introduced, wherein the interruption time is 1s-5s, and the introduction time is 5s-10s;
the Ga source In the MgInGaN layers is intermittently introduced, when the In source is interrupted, the Ga source is introduced, the Ga source introduction time is the same as the In source interruption time, and when the In source is introduced, the Ga source is interrupted, and the Ga source interruption time is the same as the In source introduction time.
As an improvement of the technical scheme, the thickness of the Ga 2O3 layer is 15nm-200nm;
the MgGaN layers have a thickness of 3nm to 50nm and a doping concentration of 1×10 17cm-3-1×1018cm-3 of mg.
As an improvement of the technical scheme, the second sub-layer is of a periodic structure, and the period number is 3-10;
Wherein the thickness of each Ga 2O3 layer is 5nm-20nm;
the thickness of each MgGaN layers is 1nm-5nm.
Correspondingly, the invention also discloses a preparation method of the light-emitting diode epitaxial wafer, which is used for preparing the light-emitting diode epitaxial wafer and comprises the following steps:
providing a substrate, and sequentially growing a nucleation layer, an intrinsic GaN layer, an N-type semiconductor layer, a multiple quantum well layer, an electron blocking layer and a P-type semiconductor layer on the substrate, wherein the electron blocking layer comprises a first sub-layer and a second sub-layer which are sequentially laminated;
Wherein the first sub-layer is MgInGaN layers;
The second sub-layer comprises a Ga 2O3 layer and a MgGaN layer which are sequentially stacked.
As an improvement of the technical scheme, the growth temperature of the first sub-layer is gradually increased from 750 ℃ to 800 ℃ to 850 ℃ to 900 ℃ and the growth pressure is 100torr to 300torr;
The growth temperature of the second sub-layer is 950-1000 ℃ and the growth pressure is 100-300 torr.
As an improvement of the above technical solution, the carrier gas used in the growth of the first and second sublayers is N 2.
Correspondingly, the invention also discloses a light-emitting diode, which comprises the light-emitting diode epitaxial wafer.
The implementation of the invention has the following beneficial effects:
1. In the light-emitting diode epitaxial wafer, the electron blocking layer comprises a first sublayer and a second sublayer which are sequentially laminated, wherein the first sublayer is MgInGaN layers. Firstly, mg doping in MgInGaN layers can generate partial holes, consume partial electrons, reduce electron overflow, increase electron hole pairs and improve luminous efficiency, secondly, the first sub-layer is connected with the multiple quantum well layers, and adopts materials similar to the multiple quantum well layers, so that lattice mismatch with the multiple quantum well layers can be reduced, the lattice quality is improved, and energy band peaks caused by overlarge energy band changes between the traditional electron blocking layers and the multiple quantum well layers are reduced, thereby avoiding influencing hole injection and improving luminous efficiency.
Wherein, the second sublayer comprises Ga 2O3 layers and MgGaN layers which are sequentially stacked. Firstly, ga 2O3 material has a large forbidden bandwidth, has a good electron blocking effect and low on-resistance, so that compared with the traditional method of adopting a high Al doped AlGaN material or AlGaN/InGaN material as an electron blocking layer, ga 2O3 can block electron from entering and cannot cause working voltage to rise, secondly, mgGaN layer can increase hole concentration, further increase hole concentration entering a multi-quantum well layer and improve luminous efficiency, and finally, carrier mobility in Ga 2O3 material is higher, holes generated by MgGaN layer enter the multi-quantum well layer through Ga 2O3 layer, so that hole injection of the multi-quantum well layer is further increased, and luminous efficiency is improved.
2. In the LED epitaxial wafer, the proportion of the In component In the MgInGaN layer is gradually reduced from 0.2 to 0.4 to 0 along the epitaxial growth direction, so that the energy level between the electron blocking layer and the multiple quantum well layer and between the electron blocking layer and the P-type semiconductor layer is In smooth transition, the injection of holes In the multiple quantum well layer is increased, and the luminous efficiency is improved.
3. In the LED epitaxial wafer, an In source and a Ga source In MgInGaN layers are intermittently introduced, when the In source is interrupted, the Ga source is introduced, and when the In source is introduced, the Ga source is interrupted. The growth method that the In source and the Ga source are intermittently introduced and the N source is continuously supplied without interruption is beneficial to eliminating defects such as In clusters, in drops and the like formed on the surface of the material, improving the lattice quality, avoiding the defects from becoming non-radiative recombination centers and improving the luminous efficiency.
4. In the light-emitting diode epitaxial wafer, the second sub-layer is of a periodic structure. The periodic lamination can generate a stronger built-in electric field, so that the acceptor energy level can be reduced, two-dimensional hole gas is generated, the mobility of holes is increased, the concentration of holes entering the multi-quantum well layer is increased, and the luminous efficiency is improved.
Drawings
Fig. 1 is a schematic structural diagram of an led epitaxial wafer according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of an electron blocking layer according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a first sub-layer according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a second sub-layer according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of a second sub-layer according to another embodiment of the present invention;
Fig. 6 is a flowchart of a method for manufacturing an led epitaxial wafer according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail below in order to make the objects, technical solutions and advantages of the present invention more apparent.
Referring to fig. 1-4, the invention discloses a light-emitting diode epitaxial wafer, which comprises a substrate 1, and a nucleation layer 2, an intrinsic GaN layer 3, an N-type semiconductor layer 4, a multiple quantum well layer 5, an electron blocking layer 6 and a P-type semiconductor layer 7 which are sequentially arranged on the substrate 1, wherein the electron blocking layer 6 comprises a first sub-layer 61 and a second sub-layer 62 which are sequentially laminated. Wherein the first sub-layer 61 is MgInGaN layers 611. Firstly, mg doping in MgInGaN layers 611 can generate partial holes, consume partial electrons, reduce electron overflow, increase electron hole pairs and improve luminous efficiency, secondly, the first sub-layer 61 is connected with the multiple quantum well layers 5, and adopts materials similar to the multiple quantum well layers 5, so that lattice mismatch with the multiple quantum well layers 5 can be reduced, lattice quality is improved, energy band peaks caused by overlarge energy band changes between the traditional electron blocking layers and the multiple quantum well layers are reduced, hole injection is avoided, and luminous efficiency is improved.
Preferably, in one embodiment of the present invention, the In component In MgInGaN layer 611 gradually decreases from 0.2 to 0.4 to 0 along the epitaxial growth direction, so that the energy level between electron blocking layer 6 and multiple quantum well layer 5 and P-type semiconductor layer 7 is smoothly transited, the injection of holes In multiple quantum well layer 5 is increased, and the light emitting efficiency is improved.
Wherein, the doping concentration of Mg in MgInGaN layer 611 is 5×10 14cm-3-5×1016cm-3, it is difficult to provide enough holes when the doping concentration is <5×10 14cm-3, and excessive defects are caused when the doping concentration is >5×10 16cm-3. Preferably, the doping concentration of Mg in MgInGaN layer 611 is 1×10 15cm-3-1×1016cm-3, and exemplary is 2×1015cm-3、3×1015cm-3、4×1015cm-3、5×1015cm-3、6×1015cm-3、7×1015cm-3、8×1015cm-3 or 9×10 15cm-3, but is not limited thereto.
MgInGaN layer 611 has a thickness of 3nm to 60nm, and when it is <3nm thick, it is difficult to provide enough holes, and when it is >60nm thick, it may cause excessive defects. Preferably, mgInGaN layers 611 have a thickness of 5nm to 50nm, and exemplary are 10nm, 15nm, 20nm, 25nm, 30nm, 35nm, 40nm, or 45nm, but are not limited thereto.
Preferably, in another embodiment of the present invention, the In source In MgInGaN layers 611 is intermittently turned on, where the interruption time is 1s-5s, the turn-on time is 5s-10s, the Ga source In mgingan layers is intermittently turned on, when the In source is interrupted, the Ga source is turned on, the Ga source turn-on time is the same as the In source turn-on time, and when the In source is turned on, the Ga source is turned off, and the Ga source turn-off time is the same as the In source turn-on time. The growth method that the In source and the Ga source are intermittently introduced and the N source is continuously supplied without interruption is beneficial to eliminating defects such as In clusters, in drops and the like formed on the surface of the material, improving the lattice quality, avoiding the defects from becoming non-radiative recombination centers and improving the luminous efficiency.
Wherein the second sub-layer 62 comprises a Ga 2O3 layer 621 and a MgGaN layer 622, which are stacked in sequence. Firstly, the Ga 2O3 material has a large forbidden bandwidth, has a good electron blocking effect and has low on-resistance, so compared with the traditional method of adopting a high Al doped AlGaN material or AlGaN/InGaN material as an electron blocking layer, ga 2O3 can not only block electron from entering and can not cause the increase of working voltage, secondly, the MgGaN layer 622 can increase hole concentration, further increase hole concentration entering the multi-quantum well layer 5 and improve luminous efficiency, and finally, the mobility of carriers in the Ga 2O3 material is higher, holes generated by the MgGaN layer 622 enter the multi-quantum well layer 5 through the Ga 2O3 layer 621, so that the injection of holes of the multi-quantum well layer 5 is further increased, and the luminous efficiency is improved.
Specifically, the thickness of Ga 2O3 layer 621 is 10nm-220nm. When the thickness is less than 10nm, the electron blocking effect is difficult to effectively play, and when the thickness is more than 220nm, the preparation efficiency is too low. Preferably, the thickness of the Ga 2O3 layer 621 is 15nm-200nm, and exemplary is 20nm, 30nm, 50nm, 80nm, 100nm, 120nm, 150nm, 170nm, or 180nm, but is not limited thereto.
MgGaN layer 622 has a thickness of 2nm to 60nm, which is difficult to increase hole concentration effectively when its thickness is <2nm, and which causes excessive defects when its thickness is >60 nm. Preferably, mgGaN layers 622 have a thickness of 3nm to 50nm, and exemplary are 5nm, 10nm, 15nm, 20nm, 25nm, 30nm, 35nm, 40nm, or 45nm, but are not limited thereto.
The Mg doping concentration in MgGaN layer 622 was 5 x 10 16cm-3-5×1018cm-3. When the doping concentration of Mg is <5×10 16cm-3, it is difficult to effectively increase the hole concentration, and when the doping concentration of Mg is >5×10 18cm-3, excessive defects are brought about. Preferably, the Mg doping concentration is 1×10 17cm-3-1×1018cm-3, and exemplary is 2×1017cm-3、3×1017cm-3、4×1017cm-3、5×1017cm-3、6×1017cm-3、7×1017cm-3、8×1017cm-3 or 9×10 17cm-3, but not limited thereto.
Preferably, in another embodiment of the present invention, referring to fig. 5, the second sub-layer 62 is of a periodic structure with a period of 3-10, illustratively 4,5, 6,7,8 or 9, but is not limited thereto. The periodic lamination can generate a stronger built-in electric field, so that the acceptor energy level can be reduced, two-dimensional hole gas is generated, the mobility of holes is increased, the concentration of holes entering the multi-quantum well layer 5 is increased, and the luminous efficiency is improved.
Specifically, the thickness of the single Ga 2O3 layer 621 is 5nm to 20nm, and is exemplified by 8nm, 10nm, 12nm, 14nm, 16nm, or 18nm, but not limited thereto.
The thickness of the single MgGaN layer 622 is 1nm-5nm, and is exemplified by, but not limited to, 2nm, 2.5nm, 3nm, 3.5nm, 4nm, or 4.5 nm.
Among them, the substrate 1 may be a sapphire substrate, a silicon carbide substrate, but is not limited thereto.
The nucleation layer 2 may be an AlN layer and/or an AlGaN layer, but is not limited thereto. The thickness of the nucleation layer 2 is 20nm to 100nm, and is exemplified by 30nm, 40nm, 50nm, 60nm, 70nm, 80nm or 90nm, but not limited thereto.
Among them, the intrinsic GaN layer 3 has a thickness of 300nm to 800nm, and exemplary are 350nm, 400nm, 450nm, 500nm, 550nm, 600nm, 650nm, 700nm, or 750nm, but not limited thereto.
The doping element of the N-type semiconductor layer 4 is Si, but is not limited thereto. The N-type semiconductor layer 4 has a doping concentration of 5×10 18cm-3-1×1019cm-3 and a thickness of 1 μm to 3 μm.
The multiple quantum well layer 5 is an InGaN quantum well layer and a GaN quantum barrier layer which are alternately stacked, and the stacking period number is 3-15. The thickness of the single InGaN quantum well layer is 2nm-5nm, and the thickness of the single GaN quantum barrier layer is 6nm-15nm.
The doping element in the P-type semiconductor layer 7 is Mg, but is not limited thereto. The doping concentration of Mg in the P-type semiconductor layer 7 is 5×10 17cm-3-1×1020cm-3. The thickness of the P-type semiconductor layer 7 is 6nm to 60nm.
Correspondingly, referring to fig. 6, the invention also discloses a preparation method of the light-emitting diode epitaxial wafer, which is used for preparing the light-emitting diode epitaxial wafer and comprises the following steps:
S100, providing a substrate;
Specifically, the substrate is a sapphire substrate, a silicon carbide substrate, but is not limited thereto. A sapphire substrate is preferred.
Preferably, in one embodiment of the present invention, the substrate is loaded into MOCVD and annealed at 1000-1200 ℃, 200-600 torr, hydrogen atmosphere for 5-8 min to remove impurities such as particles, oxides, etc. on the substrate surface.
S200, growing a nucleation layer on a substrate;
Specifically, the MOCVD grown AlGaN layer may be used as the nucleation layer, or the PVD grown AlN layer may be used as the nucleation layer, but is not limited thereto. Preferably, the AlGaN layer is grown by MOCVD at a growth temperature of 500 ℃ to 700 ℃ and a growth pressure of 200torr to 400torr. During growth, NH 3 is introduced into the MOCVD reaction chamber as an N source, H 2 and N 2 are used as carrier gases, TMAL is introduced as an Al source, and TMGa is introduced as a Ga source.
S300, growing an intrinsic GaN layer on the nucleation layer;
Specifically, the intrinsic GaN layer is grown in MOCVD at 1100-1150 deg.C and 100-500 torr. During growth, NH 3 is introduced into the MOCVD reaction chamber as an N source, H 2 and N 2 are used as carrier gases, and TMGa is introduced as a Ga source.
S400, growing an N-type semiconductor layer on the intrinsic GaN layer;
Specifically, an N-type semiconductor layer is grown in MOCVD at 1100-1150 deg.C under 100-500 torr. During growth, NH 3 is introduced into the MOCVD reaction chamber as an N source, siH 4 is introduced into the MOCVD reaction chamber as an N-type doping source, H 2 and N 2 are used as carrier gases, and TMGa is introduced into the MOCVD reaction chamber as a Ga source.
S500, growing a multi-quantum well layer on the N-type semiconductor layer;
Specifically, a quantum well layer and a quantum barrier layer are periodically grown in MOCVD to form a multi-quantum well layer. The growth temperature of the quantum well layer is 700-800 ℃, the growth pressure is 100-500 torr, NH 3 is introduced into the MOCVD reaction chamber as N source, N 2 is used as carrier gas, TEGa is introduced as Ga source, and TMIn is introduced as In source during growth. The growth temperature of the quantum barrier layer is 800-900 ℃, the growth pressure is 100-500 torr, NH 3 is introduced into the MOCVD reaction chamber as N source, H 2 and N 2 are used as carrier gas, and TEGa is introduced as Ga source during growth.
S600, growing an electron blocking layer on the multiple quantum well layer;
Specifically, in one embodiment of the present invention, S600 includes:
s610, growing a first sub-layer on the multi-quantum well layer;
Specifically, mgInGaN layers were grown in MOCVD as a first sub-layer, the first sub-layer grown under the same conditions as those of MgInGaN layers common in the art. Preferably, in one embodiment of the present invention, the growth temperature of the first sub-layer is gradually increased from 750 ℃ to 800 ℃ to 850 ℃ to 900 ℃, the growth pressure is 100torr to 300torr, NH 3 is introduced as an N source, CP 2 Mg is introduced as an Mg source, TMIn is introduced as an In source, TEGa is introduced as a Ga source, and the carrier gas used In the growth is N 2. N 2 is used as carrier gas, which is beneficial to the incorporation of In components. The lower growth temperature is adopted first, the low temperature is favorable for the incorporation of the In component, and the In component gradually decreases along the epitaxial direction, so that the growth temperature gradually increases, and the improvement of the lattice quality is favorable.
Preferably, in another embodiment of the present invention, the In source and the Ga source are intermittently turned on, and when the In source is turned off, the Ga source is turned on, and the Ga source turn-on time is the same as the In source turn-off time, and when the In source is turned on, the Ga source is turned off, and the Ga source turn-off time is the same as the In source turn-on time. The growth method that the In source and the Ga source are intermittently introduced and the N source is continuously supplied without interruption is beneficial to eliminating defects such as In clusters, in drops and the like formed on the surface of the material, improving the lattice quality, avoiding the defects from becoming non-radiative recombination centers and improving the luminous efficiency.
S620, growing a second sub-layer on the first sub-layer;
Specifically, a Ga 2O3 layer and a MgGaN layer were sequentially grown in layers in MOCVD as the second sub-layer. Preferably, in one embodiment of the present invention, the Ga 2O3 layer and the MgGaN layer are grown periodically as a second sub-layer in MOCVD. The growth temperature of the second sub-layer is 950-1000 ℃ and the growth pressure is 100-300 torr. Specifically, when growing the Ga 2O3 layer, O 2 is introduced as an O source, TEGa is introduced as a Ga source, and N 2 is used as a carrier gas during growth. When MgGaN layers are grown, NH 3 is introduced as an N source, CP 2 Mg is introduced as an Mg source, TEGa is introduced as a Ga source, and carrier gas adopted during growth is N 2.
The carrier gas adopted in the growth of the Ga 2O3 layer is N 2, so that the excessive H 2 O formed by taking H 2 as the carrier gas is avoided, and the generation of Ga 2O3 is influenced. The carrier gas used in growing MgGaN layers is N 2, which prevents the formation of Mg-H complexes and affects the activation of Mg.
S700, growing a P-type semiconductor layer on the electron blocking layer;
Specifically, the P-type semiconductor layer is grown in MOCVD at 800-1000 deg.C under 100-300 torr. During growth, NH 3 is introduced into the MOCVD reaction chamber as an N source, cp 2 Mg is introduced into the MOCVD reaction chamber as a P-type doping source, H 2 and N 2 are used as carrier gases, and TMGa is introduced into the MOCVD reaction chamber as a Ga source.
The invention is further illustrated by the following examples:
example 1
The embodiment provides a light emitting diode epitaxial wafer, referring to fig. 1-4, which comprises a substrate 1, and a nucleation layer 2, an intrinsic GaN layer 3, an N-type semiconductor layer 4, a multiple quantum well layer 5, an electron blocking layer 6 and a P-type semiconductor layer 7 which are sequentially arranged on the substrate 1.
Wherein the substrate 1 is a sapphire substrate, the nucleation layer 2 is an AlGaN layer with a thickness of 30nm, the intrinsic GaN layer 3 has a thickness of 400nm, and the N-type semiconductor layer 4 has a doping concentration of Si of 7×10 18cm-3 and a thickness of 2 μm. The multi-quantum well layer 5 is an InGaN quantum well layer and a GaN quantum barrier layer which are alternately stacked, the stacking cycle number is 10, the thickness of a single InGaN quantum well layer is 3nm, and the thickness of a single GaN quantum barrier layer is 10nm.
Wherein the electron blocking layer 6 comprises a first sub-layer 61 and a second sub-layer 62, which are laminated in sequence. Wherein the first sub-layer 61 is MgInGaN layers 611. The In component of MgInGaN layer 611 had a duty ratio of 0.3, and mg doping concentration of 5×10 15cm-3, and a thickness of 15nm.
Wherein the second sub-layer 62 comprises a Ga 2O3 layer 621 and a MgGaN layer 622, which are stacked in sequence. Wherein the thickness of Ga 2O3 layer 621 is 50nm. The doping concentration of Mg in MgGaN layer 622 was 5×10 17cm-3, which was 20nm thick.
The doping element of the P-type semiconductor layer 7 is Mg, the doping concentration is 3.5X10 19cm-3, and the thickness is 10nm.
The preparation method of the light-emitting diode epitaxial wafer in the embodiment comprises the following steps:
(1) And loading the substrate into MOCVD, and annealing for 6min at 1120 ℃ under 400torr and under a hydrogen atmosphere.
(2) Growing a nucleation layer on the substrate;
Specifically, the AlGaN layer is grown by MOCVD, the growth temperature is 620 ℃, and the growth pressure is 250torr. During growth, NH 3 is introduced into the MOCVD reaction chamber as an N source, H 2 and N 2 are used as carrier gases, TMAL is introduced as an Al source, and TMGa is introduced as a Ga source.
(3) Growing an intrinsic GaN layer on the nucleation layer;
Specifically, MOCVD is adopted to grow an intrinsic GaN layer, the growth temperature is 1100 ℃, the growth pressure is 250torr, NH 3 is introduced into a MOCVD reaction chamber to serve as an N source during growth, H 2 and N 2 serve as carrier gases, and TMGa is introduced into the MOCVD reaction chamber to serve as a Ga source.
(4) Growing an N-type semiconductor layer on the intrinsic GaN layer;
the method comprises the steps of adopting MOCVD to grow an N-type semiconductor layer, wherein the growth temperature is 1120 ℃, the growth pressure is 150torr, NH 3 is introduced into a MOCVD reaction chamber to serve as an N source, siH 4 is introduced into the MOCVD reaction chamber to serve as an N-type doping source, H 2 and N 2 are used as carrier gases, and TMGa is introduced into the MOCVD reaction chamber to serve as a Ga source.
(5) Growing a multi-quantum well layer on the N-type semiconductor layer;
Specifically, periodically growing a quantum well layer and a quantum barrier layer in MOCVD to obtain a multi-quantum well layer;
The growth temperature of the quantum well layer is 750 ℃, the growth pressure is 300torr, NH 3 is introduced into the MOCVD reaction chamber to serve as an N source, N 2 is used as a carrier gas, TEGa is introduced into the MOCVD reaction chamber to serve as a Ga source, TMIn is introduced into the MOCVD reaction chamber to serve as an In source, the growth temperature of the quantum barrier layer is 820 ℃, the growth pressure is 300torr, NH 3 is introduced into the MOCVD reaction chamber to serve as an N source, H 2 and N 2 are used as carrier gases, and TEGa is introduced into the MOCVD reaction chamber to serve as a Ga source.
(6) Growing an electron blocking layer on the multiple quantum well layer;
specifically, the preparation method of each electron blocking layer comprises the following steps:
(I) Growing a first sub-layer on the multiple quantum well layer;
Specifically, mgInGaN layers were grown in MOCVD as the first sub-layer. The growth temperature of the first sub-layer is 780 ℃, the growth pressure is 200torr, NH 3 is introduced as an N source, CP 2 Mg is introduced as an Mg source, TMIn is introduced as an In source, TEGa is introduced as a Ga source, and carrier gas adopted during growth is N 2.
(II) growing a second sub-layer on the first sub-layer;
Specifically, a Ga 2O3 layer and a MgGaN layer were sequentially grown in layers in MOCVD as the second sub-layer. The growth temperature of the second sub-layer was 980 ℃ and the growth pressure was 200torr. Specifically, when growing the Ga 2O3 layer, O 2 is introduced as an O source, TEGa is introduced as a Ga source, and N 2 is used as a carrier gas during growth. When MgGaN layers are grown, NH 3 is introduced as an N source, CP 2 Mg is introduced as an Mg source, TEGa is introduced as a Ga source, and carrier gas adopted during growth is N 2.
(7) Growing a P-type semiconductor layer on the electron blocking layer;
Specifically, the P-type semiconductor layer is grown in MOCVD at a growth temperature of 900 ℃ and a growth pressure of 200torr. During growth, NH 3 is introduced into the MOCVD reaction chamber as an N source, cp 2 Mg is introduced into the MOCVD reaction chamber as a P-type doping source, H 2 and N 2 are used as carrier gases, and TMGa is introduced into the MOCVD reaction chamber as a Ga source.
Example 2
The embodiment provides a light emitting diode epitaxial wafer, referring to fig. 1-4, which comprises a substrate 1, and a nucleation layer 2, an intrinsic GaN layer 3, an N-type semiconductor layer 4, a multiple quantum well layer 5, an electron blocking layer 6 and a P-type semiconductor layer 7 which are sequentially arranged on the substrate 1.
Wherein the substrate 1 is a sapphire substrate, the nucleation layer 2 is an AlGaN layer with a thickness of 30nm, the intrinsic GaN layer 3 has a thickness of 400nm, and the N-type semiconductor layer 4 has a doping concentration of Si of 7×10 18cm-3 and a thickness of 2 μm. The multi-quantum well layer 5 is an InGaN quantum well layer and a GaN quantum barrier layer which are alternately stacked, the stacking cycle number is 10, the thickness of a single InGaN quantum well layer is 3nm, and the thickness of a single GaN quantum barrier layer is 10nm.
Wherein the electron blocking layer 6 comprises a first sub-layer 61 and a second sub-layer 62, which are laminated in sequence. Wherein the first sub-layer 61 is MgInGaN layers 611. The In component of MgInGaN layer 611 gradually decreases from 0.3 to 0 In the epitaxial growth direction, and the mg doping concentration is 5×10 15cm-3 and the thickness is 15nm.
Wherein the second sub-layer 62 comprises a Ga 2O3 layer 621 and a MgGaN layer 622, which are stacked in sequence. Wherein the thickness of Ga 2O3 layer 621 is 50nm. The doping concentration of Mg in MgGaN layer 622 was 5×10 17cm-3, which was 20nm thick.
The doping element of the P-type semiconductor layer 7 is Mg, the doping concentration is 3.5X10 19cm-3, and the thickness is 10nm.
The preparation method of the light-emitting diode epitaxial wafer in the embodiment comprises the following steps:
(1) And loading the substrate into MOCVD, and annealing for 6min at 1120 ℃ under 400torr and under a hydrogen atmosphere.
(2) Growing a nucleation layer on the substrate;
Specifically, the AlGaN layer is grown by MOCVD, the growth temperature is 620 ℃, and the growth pressure is 250torr. During growth, NH 3 is introduced into the MOCVD reaction chamber as an N source, H 2 and N 2 are used as carrier gases, TMAL is introduced as an Al source, and TMGa is introduced as a Ga source.
(3) Growing an intrinsic GaN layer on the nucleation layer;
Specifically, MOCVD is adopted to grow an intrinsic GaN layer, the growth temperature is 1100 ℃, the growth pressure is 250torr, NH 3 is introduced into a MOCVD reaction chamber to serve as an N source during growth, H 2 and N 2 serve as carrier gases, and TMGa is introduced into the MOCVD reaction chamber to serve as a Ga source.
(4) Growing an N-type semiconductor layer on the intrinsic GaN layer;
the method comprises the steps of adopting MOCVD to grow an N-type semiconductor layer, wherein the growth temperature is 1120 ℃, the growth pressure is 150torr, NH 3 is introduced into a MOCVD reaction chamber to serve as an N source, siH 4 is introduced into the MOCVD reaction chamber to serve as an N-type doping source, H 2 and N 2 are used as carrier gases, and TMGa is introduced into the MOCVD reaction chamber to serve as a Ga source.
(5) Growing a multi-quantum well layer on the N-type semiconductor layer;
Specifically, periodically growing a quantum well layer and a quantum barrier layer in MOCVD to obtain a multi-quantum well layer;
The growth temperature of the quantum well layer is 750 ℃, the growth pressure is 300torr, NH 3 is introduced into the MOCVD reaction chamber to serve as an N source, N 2 is used as a carrier gas, TEGa is introduced into the MOCVD reaction chamber to serve as a Ga source, TMIn is introduced into the MOCVD reaction chamber to serve as an In source, the growth temperature of the quantum barrier layer is 820 ℃, the growth pressure is 300torr, NH 3 is introduced into the MOCVD reaction chamber to serve as an N source, H 2 and N 2 are used as carrier gases, and TEGa is introduced into the MOCVD reaction chamber to serve as a Ga source.
(6) Growing an electron blocking layer on the multiple quantum well layer;
specifically, the preparation method of each electron blocking layer comprises the following steps:
(I) Growing a first sub-layer on the multiple quantum well layer;
Specifically, mgInGaN layers were grown in MOCVD as the first sub-layer. The growth temperature of the first sub-layer is gradually increased from 780 ℃ to 880 ℃, the growth pressure is 200torr, NH 3 is introduced as an N source, CP 2 Mg is introduced as an Mg source, TMIn is introduced as an In source, TEGa is introduced as a Ga source, and carrier gas adopted during growth is N 2.
(II) growing a second sub-layer on the first sub-layer;
Specifically, a Ga 2O3 layer and a MgGaN layer were sequentially grown in layers in MOCVD as the second sub-layer. The growth temperature of the second sub-layer was 980 ℃ and the growth pressure was 200torr. Specifically, when growing the Ga 2O3 layer, O 2 is introduced as an O source, TEGa is introduced as a Ga source, and N 2 is used as a carrier gas during growth. When MgGaN layers are grown, NH 3 is introduced as an N source, CP 2 Mg is introduced as an Mg source, TEGa is introduced as a Ga source, and carrier gas adopted during growth is N 2.
(7) Growing a P-type semiconductor layer on the electron blocking layer;
Specifically, the P-type semiconductor layer is grown in MOCVD at a growth temperature of 900 ℃ and a growth pressure of 200torr. During growth, NH 3 is introduced into the MOCVD reaction chamber as an N source, cp 2 Mg is introduced into the MOCVD reaction chamber as a P-type doping source, H 2 and N 2 are used as carrier gases, and TMGa is introduced into the MOCVD reaction chamber as a Ga source.
Example 3
The embodiment provides a light emitting diode epitaxial wafer, referring to fig. 1-4, which comprises a substrate 1, and a nucleation layer 2, an intrinsic GaN layer 3, an N-type semiconductor layer 4, a multiple quantum well layer 5, an electron blocking layer 6 and a P-type semiconductor layer 7 which are sequentially arranged on the substrate 1.
Wherein the substrate 1 is a sapphire substrate, the nucleation layer 2 is an AlGaN layer with a thickness of 30nm, the intrinsic GaN layer 3 has a thickness of 400nm, and the N-type semiconductor layer 4 has a doping concentration of Si of 7×10 18cm-3 and a thickness of 2 μm. The multi-quantum well layer 5 is an InGaN quantum well layer and a GaN quantum barrier layer which are alternately stacked, the stacking cycle number is 10, the thickness of a single InGaN quantum well layer is 3nm, and the thickness of a single GaN quantum barrier layer is 10nm.
Wherein the electron blocking layer 6 comprises a first sub-layer 61 and a second sub-layer 62, which are laminated in sequence. Wherein the first sub-layer 61 is MgInGaN layers 611. The In component of MgInGaN layer 611 gradually decreases from 0.3 to 0 In the epitaxial growth direction, and the mg doping concentration is 5×10 15cm-3 and the thickness is 15nm. The In source In MgInGaN layer 611 is intermittently introduced, wherein the interruption time is 3s, the introduction time is 8s, the Ga source In MgInGaN layer is intermittently introduced, the Ga source is introduced when the In source is interrupted, the Ga source introduction time is 3s, and the Ga source is interrupted when the In source is introduced, and the Ga source interruption time is 8s.
Wherein the second sub-layer 62 comprises a Ga 2O3 layer 621 and a MgGaN layer 622, which are stacked in sequence. Wherein the thickness of Ga 2O3 layer 621 is 50nm. The doping concentration of Mg in MgGaN layer 622 was 5×10 17cm-3, which was 20nm thick.
The doping element of the P-type semiconductor layer 7 is Mg, the doping concentration is 3.5X10 19cm-3, and the thickness is 10nm.
The preparation method of the light-emitting diode epitaxial wafer in the embodiment comprises the following steps:
(1) And loading the substrate into MOCVD, and annealing for 6min at 1120 ℃ under 400torr and under a hydrogen atmosphere.
(2) Growing a nucleation layer on the substrate;
Specifically, the AlGaN layer is grown by MOCVD, the growth temperature is 620 ℃, and the growth pressure is 250torr. During growth, NH 3 is introduced into the MOCVD reaction chamber as an N source, H 2 and N 2 are used as carrier gases, TMAL is introduced as an Al source, and TMGa is introduced as a Ga source.
(3) Growing an intrinsic GaN layer on the nucleation layer;
Specifically, MOCVD is adopted to grow an intrinsic GaN layer, the growth temperature is 1100 ℃, the growth pressure is 250torr, NH 3 is introduced into a MOCVD reaction chamber to serve as an N source during growth, H 2 and N 2 serve as carrier gases, and TMGa is introduced into the MOCVD reaction chamber to serve as a Ga source.
(4) Growing an N-type semiconductor layer on the intrinsic GaN layer;
the method comprises the steps of adopting MOCVD to grow an N-type semiconductor layer, wherein the growth temperature is 1120 ℃, the growth pressure is 150torr, NH 3 is introduced into a MOCVD reaction chamber to serve as an N source, siH 4 is introduced into the MOCVD reaction chamber to serve as an N-type doping source, H 2 and N 2 are used as carrier gases, and TMGa is introduced into the MOCVD reaction chamber to serve as a Ga source.
(5) Growing a multi-quantum well layer on the N-type semiconductor layer;
Specifically, periodically growing a quantum well layer and a quantum barrier layer in MOCVD to obtain a multi-quantum well layer;
The growth temperature of the quantum well layer is 750 ℃, the growth pressure is 300torr, NH 3 is introduced into the MOCVD reaction chamber to serve as an N source, N 2 is used as a carrier gas, TEGa is introduced into the MOCVD reaction chamber to serve as a Ga source, TMIn is introduced into the MOCVD reaction chamber to serve as an In source, the growth temperature of the quantum barrier layer is 820 ℃, the growth pressure is 300torr, NH 3 is introduced into the MOCVD reaction chamber to serve as an N source, H 2 and N 2 are used as carrier gases, and TEGa is introduced into the MOCVD reaction chamber to serve as a Ga source.
(6) Growing an electron blocking layer on the multiple quantum well layer;
specifically, the preparation method of each electron blocking layer comprises the following steps:
(I) Growing a first sub-layer on the multiple quantum well layer;
Specifically, mgInGaN layers were grown in MOCVD as the first sub-layer. The growth temperature of the first sub-layer is gradually increased from 780 ℃ to 880 ℃, the growth pressure is 200torr, NH 3 is introduced as an N source, CP 2 Mg is introduced as an Mg source, TMIn is introduced as an In source, TEGa is introduced as a Ga source, and carrier gas adopted during growth is N 2. The In source and the Ga source are intermittently introduced, when the In source is interrupted, the Ga source is introduced, the Ga source introduction time is the same as the In source interruption time, and when the In source is introduced, the Ga source is interrupted, and the Ga source interruption time is the same as the In source introduction time.
(II) growing a second sub-layer on the first sub-layer;
Specifically, a Ga 2O3 layer and a MgGaN layer were sequentially grown in layers in MOCVD as the second sub-layer. The growth temperature of the second sub-layer was 980 ℃ and the growth pressure was 200torr. Specifically, when growing the Ga 2O3 layer, O 2 is introduced as an O source, TEGa is introduced as a Ga source, and N 2 is used as a carrier gas during growth. When MgGaN layers are grown, NH 3 is introduced as an N source, CP 2 Mg is introduced as an Mg source, TEGa is introduced as a Ga source, and carrier gas adopted during growth is N 2.
(7) Growing a P-type semiconductor layer on the electron blocking layer;
Specifically, the P-type semiconductor layer is grown in MOCVD at a growth temperature of 900 ℃ and a growth pressure of 200torr. During growth, NH 3 is introduced into the MOCVD reaction chamber as an N source, cp 2 Mg is introduced into the MOCVD reaction chamber as a P-type doping source, H 2 and N 2 are used as carrier gases, and TMGa is introduced into the MOCVD reaction chamber as a Ga source.
Example 4
The present embodiment provides a light emitting diode epitaxial wafer, referring to fig. 1, 2, 3, and 5, which includes a substrate 1, and a nucleation layer 2, an intrinsic GaN layer 3, an N-type semiconductor layer 4, a multiple quantum well layer 5, an electron blocking layer 6, and a P-type semiconductor layer 7 sequentially disposed on the substrate 1.
Wherein the substrate 1 is a sapphire substrate, the nucleation layer 2 is an AlGaN layer with a thickness of 30nm, the intrinsic GaN layer 3 has a thickness of 400nm, and the N-type semiconductor layer 4 has a doping concentration of Si of 7×10 18cm-3 and a thickness of 2 μm. The multi-quantum well layer 5 is an InGaN quantum well layer and a GaN quantum barrier layer which are alternately stacked, the stacking cycle number is 10, the thickness of a single InGaN quantum well layer is 3nm, and the thickness of a single GaN quantum barrier layer is 10nm.
Wherein the electron blocking layer 6 comprises a first sub-layer 61 and a second sub-layer 62, which are laminated in sequence. Wherein the first sub-layer 61 is MgInGaN layers 611. The In component of MgInGaN layer 611 gradually decreases from 0.3 to 0 In the epitaxial growth direction, and the mg doping concentration is 5×10 15cm-3 and the thickness is 15nm. The In source In MgInGaN layer 611 is intermittently introduced, wherein the interruption time is 3s, the introduction time is 8s, the Ga source In MgInGaN layer is intermittently introduced, the Ga source is introduced when the In source is interrupted, the Ga source introduction time is 3s, and the Ga source is interrupted when the In source is introduced, and the Ga source interruption time is 8s.
The second sublayer 62 includes a Ga 2O3 layer 621 and a MgGaN layer 622 which are sequentially stacked periodically, and the number of periods is 6. Wherein the thickness of the single Ga 2O3 layer 621 is 10nm. The thickness of the single MgGaN layer 622 was 5nm and the mg doping concentration was 5 x 10 17cm-3.
The doping element of the P-type semiconductor layer 7 is Mg, the doping concentration is 3.5X10 19cm-3, and the thickness is 10nm.
The preparation method of the light-emitting diode epitaxial wafer in the embodiment comprises the following steps:
(1) And loading the substrate into MOCVD, and annealing for 6min at 1120 ℃ under 400torr and under a hydrogen atmosphere.
(2) Growing a nucleation layer on the substrate;
Specifically, the AlGaN layer is grown by MOCVD, the growth temperature is 620 ℃, and the growth pressure is 250torr. During growth, NH 3 is introduced into the MOCVD reaction chamber as an N source, H 2 and N 2 are used as carrier gases, TMAL is introduced as an Al source, and TMGa is introduced as a Ga source.
(3) Growing an intrinsic GaN layer on the nucleation layer;
Specifically, MOCVD is adopted to grow an intrinsic GaN layer, the growth temperature is 1100 ℃, the growth pressure is 250torr, NH 3 is introduced into a MOCVD reaction chamber to serve as an N source during growth, H 2 and N 2 serve as carrier gases, and TMGa is introduced into the MOCVD reaction chamber to serve as a Ga source.
(4) Growing an N-type semiconductor layer on the intrinsic GaN layer;
the method comprises the steps of adopting MOCVD to grow an N-type semiconductor layer, wherein the growth temperature is 1120 ℃, the growth pressure is 150torr, NH 3 is introduced into a MOCVD reaction chamber to serve as an N source, siH 4 is introduced into the MOCVD reaction chamber to serve as an N-type doping source, H 2 and N 2 are used as carrier gases, and TMGa is introduced into the MOCVD reaction chamber to serve as a Ga source.
(5) Growing a multi-quantum well layer on the N-type semiconductor layer;
Specifically, periodically growing a quantum well layer and a quantum barrier layer in MOCVD to obtain a multi-quantum well layer;
The growth temperature of the quantum well layer is 750 ℃, the growth pressure is 300torr, NH 3 is introduced into the MOCVD reaction chamber to serve as an N source, N 2 is used as a carrier gas, TEGa is introduced into the MOCVD reaction chamber to serve as a Ga source, TMIn is introduced into the MOCVD reaction chamber to serve as an In source, the growth temperature of the quantum barrier layer is 820 ℃, the growth pressure is 300torr, NH 3 is introduced into the MOCVD reaction chamber to serve as an N source, H 2 and N 2 are used as carrier gases, and TEGa is introduced into the MOCVD reaction chamber to serve as a Ga source.
(6) Growing an electron blocking layer on the multiple quantum well layer;
specifically, the preparation method of each electron blocking layer comprises the following steps:
(I) Growing a first sub-layer on the multiple quantum well layer;
Specifically, mgInGaN layers were grown in MOCVD as the first sub-layer. The growth temperature of the first sub-layer is gradually increased from 780 ℃ to 880 ℃, the growth pressure is 200torr, NH 3 is introduced as an N source, CP 2 Mg is introduced as an Mg source, TMIn is introduced as an In source, TEGa is introduced as a Ga source, and carrier gas adopted during growth is N 2. The In source and the Ga source are intermittently introduced, when the In source is interrupted, the Ga source is introduced, the Ga source introduction time is the same as the In source interruption time, and when the In source is introduced, the Ga source is interrupted, and the Ga source interruption time is the same as the In source introduction time.
(II) growing a second sub-layer on the first sub-layer;
Specifically, the Ga 2O3 layer and the MgGaN layer were grown periodically in layers in MOCVD as the second sub-layer. The growth temperature of the second sub-layer was 980 ℃ and the growth pressure was 200torr. Specifically, when growing the Ga 2O3 layer, O 2 is introduced as an O source, TEGa is introduced as a Ga source, and N 2 is used as a carrier gas during growth. When MgGaN layers are grown, NH 3 is introduced as an N source, CP 2 Mg is introduced as an Mg source, TEGa is introduced as a Ga source, and carrier gas adopted during growth is N 2.
(7) Growing a P-type semiconductor layer on the electron blocking layer;
Specifically, the P-type semiconductor layer is grown in MOCVD at a growth temperature of 900 ℃ and a growth pressure of 200torr. During growth, NH 3 is introduced into the MOCVD reaction chamber as an N source, cp 2 Mg is introduced into the MOCVD reaction chamber as a P-type doping source, H 2 and N 2 are used as carrier gases, and TMGa is introduced into the MOCVD reaction chamber as a Ga source.
Comparative example 1
This comparative example provides a light emitting diode epitaxial wafer which is different from example 1 in that the electron blocking layer 6 in the epitaxial wafer is an AlGaN layer, the Al component in the AlGaN layer is 0.6 in proportion, and the thickness thereof is 50nm. Accordingly, in the production method, the growth temperature of the AlGaN layer was 980℃and the growth pressure was 200torr, and the rest was the same as in example 1.
Comparative example 2
This comparative example provides a light emitting diode epitaxial wafer differing from example 1 In that the electron blocking layer 6 In the epitaxial wafer is a periodic structure In which Al aGa1-a N layers (a=0.12) and In bGa1-b N layers (b=0.3) are alternately grown, the number of periods is 8, the thickness of a single Al aGa1-a N layer is 5nm, the thickness of a single In bGa1-b N layer is 1nm, and accordingly, in the production method, the growth temperature of the electron blocking layer 6 is 980 ℃, the growth pressure is 200torr, and the rest is the same as In example 1.
Comparative example 3
This comparative example provides a light emitting diode epitaxial wafer, which is different from embodiment 1 in that the second sub-layer 62 is not included in the electron blocking layer 6. Accordingly, the preparation step of this layer was not provided in the preparation method, and the rest was the same as in example 1.
Comparative example 4
This comparative example provides a light emitting diode epitaxial wafer, which is different from embodiment 1 in that the first sub-layer 61 is not included in the electron blocking layer 6. Accordingly, the preparation step of this layer was not provided in the preparation method, and the rest was the same as in example 1.
Comparative example 5
This comparative example provides a light emitting diode epitaxial wafer, which is different from embodiment 1 in that the Ga 2O3 layer 621 is not included in the electron blocking layer 6. Accordingly, the preparation step of this layer was not provided in the preparation method, and the rest was the same as in example 1.
The light emitting diode epitaxial wafers obtained in examples 1 to 4 and comparative examples 1 to 5 were subjected to brightness and operating voltage tests, and the specific test methods were as follows:
(1) Preparing the epitaxial wafer into a chip with a vertical structure of 10mil multiplied by 24mil, and testing the luminous brightness of the chip;
(2) Operating voltage testing was performed using a Keithley2450 digital source meter.
The specific results are as follows:
Brightness (mW) Working voltage (V)
Example 1 194.3 3.14
Example 2 195.1 3.13
Example 3 195.5 3.11
Example 4 196.8 3.09
Comparative example 1 190.6 3.23
Comparative example 2 192.1 3.21
Comparative example 3 192.2 3.19
Comparative example 4 192.7 3.18
Comparative example 5 193.1 3.18
As can be seen from the table, when the conventional electron blocking layer (comparative example 1) is changed to the electron blocking layer structure in the present invention, the brightness is increased from 190.6mW to 194.3mW, and the operating voltage is reduced from 3.23V to 3.14V, which indicates that the electron blocking layer in the present invention can effectively increase the brightness and reduce the operating voltage. Further, as can be seen from a comparison of example 1 with comparative examples 2 to 5, when the electron blocking layer structure in the present invention is changed, it is difficult to effectively achieve the effects of increasing luminance and lowering operating voltage.
While the foregoing is directed to the preferred embodiments of the present invention, it will be appreciated by those skilled in the art that changes and modifications may be made without departing from the principles of the invention, such changes and modifications are also intended to be within the scope of the invention.

Claims (8)

1. The light-emitting diode epitaxial wafer comprises a substrate, and a nucleation layer, an intrinsic GaN layer, an N-type semiconductor layer, a multiple quantum well layer, an electron blocking layer and a P-type semiconductor layer which are sequentially arranged on the substrate, wherein the electron blocking layer comprises a first sub-layer and a second sub-layer which are sequentially laminated;
The first sub-layer is MgInGaN layers, and the proportion of In components In the MgInGaN layers is gradually reduced from 0.2 to 0.4 to 0 along the epitaxial growth direction;
The second sub-layer comprises a Ga 2O3 layer and a MgGaN layer which are sequentially stacked, the Ga 2O3 layer and the MgGaN layer are of a periodic structure, the period number is 3-10, the thickness of a single Ga 2O3 layer is 5nm-20nm, and the thickness of a single MgGaN layer is 1nm-5nm.
2. The light-emitting diode epitaxial wafer of claim 1, wherein the doping concentration of Mg in the MgInGaN layers is 1 x 10 15cm-3-1×1016cm-3 and the thickness of the MgInGaN layers is 5nm to 50nm.
3. The light-emitting diode epitaxial wafer of claim 1, wherein the MgGaN layers have a Mg doping concentration of 1 x 10 17cm-3-1×1018cm-3.
4. A method for preparing a light-emitting diode epitaxial wafer, which is used for preparing the light-emitting diode epitaxial wafer according to any one of claims 1 to 3, and is characterized by comprising:
providing a substrate, and sequentially growing a nucleation layer, an intrinsic GaN layer, an N-type semiconductor layer, a multiple quantum well layer, an electron blocking layer and a P-type semiconductor layer on the substrate, wherein the electron blocking layer comprises a first sub-layer and a second sub-layer which are sequentially laminated;
Wherein the first sub-layer is MgInGaN layers;
The second sub-layer comprises a Ga 2O3 layer and a MgGaN layer which are sequentially stacked.
5. The method for preparing a light-emitting diode epitaxial wafer according to claim 4, wherein In source In MgInGaN layers is intermittently introduced, wherein the interruption time is 1s-5s, and the introduction time is 5s-10s;
the Ga source In the MgInGaN layers is intermittently introduced, when the In source is interrupted, the Ga source is introduced, the Ga source introduction time is the same as the In source interruption time, and when the In source is introduced, the Ga source is interrupted, and the Ga source interruption time is the same as the In source introduction time.
6. The method of manufacturing a light-emitting diode epitaxial wafer according to claim 4, wherein the growth temperature of the first sub-layer is gradually increased from 750 ℃ to 800 ℃ to 850 ℃ to 900 ℃ and the growth pressure is 100torr to 300torr;
The growth temperature of the second sub-layer is 950-1000 ℃ and the growth pressure is 100-300 torr.
7. The method of claim 4, wherein the carrier gas used in the growth of the first and second sub-layers is N 2.
8. A light emitting diode comprising the light emitting diode epitaxial wafer according to any one of claims 1 to 3.
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