CN115826856A - Flash memory exception handling method, system and storage medium - Google Patents

Abstract

The embodiment of the application provides a flash memory exception handling method, a flash memory exception handling system and a storage medium. In the embodiment of the application, for a super block of an idle flash memory block which is not reserved for replacing an abnormal flash memory block, when an unreadable abnormal super block occurs in the super block, the data of the abnormal super block can be recovered according to application data of other normal data flash memory blocks and check data of redundant blocks, RAID is constructed by using normal data flash memory blocks, storage protection is performed on the data of the abnormal super block, and the data of the abnormal flash memory block can be stored on the premise of not reducing data reliability. Compared with an abnormal flash memory processing mode of reserving idle flash memory blocks for replacing abnormal flash memory blocks, the capacity of the super block can be reused, and the capacity utilization rate of the super block is improved.

Description

Flash memory exception handling method, system and storage medium

technical field

The present application relates to the technical field of data storage, and in particular to a flash memory exception handling method, system and storage medium.

Background technique

The proliferation of the Internet and electronic commerce generates massive amounts of data. A large number of storage systems and servers have been created in the art to store and access data. The storage system or server may include volatile memory (e.g., dynamic random access memory) and multiple storage drives (such as solid-state drives, etc.). The storage drives may include non-volatile memory (such as NAND flash or flash memory) for persistent storage. memory, etc.) The memory in the server plays a key role in the performance and capacity of the storage system.

Storage drives typically utilize internal data buffers as write caches to reduce write latency. As we all know, during the data read and write process of flash memory, flash block failure may occur. In the prior art, a blank flash memory block is often reserved in each flash memory chip, and when an abnormal flash memory block occurs, the abnormal flash memory block is replaced by the reserved blank flash memory block. When the blank flash memory blocks reserved by the flash memory chip are exhausted, the flash memory chip as a whole is no longer usable, resulting in a reduction in the capacity of the storage drive and a low utilization rate of the flash memory capacity.

Contents of the invention

Aspects of the present application provide a flash memory exception handling method, system, and storage medium, so as to improve the utilization rate of flash memory capacity.

An embodiment of the present application provides a flash memory exception handling method, including:

For the abnormal flash memory block in the flash memory, detect whether the abnormal flash memory block can be read;

If the abnormal flash memory block is unreadable, recover the application data of the abnormal flash memory block according to the application data of the target flash memory block in the target super block to which the abnormal flash memory block belongs and the check data of the redundant block; The flash memory block is a flash memory block except the abnormal flash memory block and the redundant block in the target super block;

The target flash memory block is set as the first redundant array of independent disks RAID, and the check data to be written in the application data of the first superpage of the first RAID in the application data of the abnormal flash memory block is calculated;

Writing the application data to be written into the first super page and the verification data corresponding to the application data to be written into the first super page into the first super page.

The embodiment of the present application also provides a computing system, including: a processor and a storage driver; the storage driver includes: a controller and a flash memory;

The controller includes: firmware and a channel management component; the controller communicates with the flash memory through the channel management component; and accesses the flash memory through a channel;

The firmware is used to execute the steps in the above-mentioned flash memory exception handling method.

The embodiment of the present application also provides a computer-readable storage medium storing computer instructions. When the computer instructions are executed by one or more processors, the one or more processors in the above-mentioned flash memory exception handling method step.

In the embodiment of the present application, for the super block of the free flash memory block that is not reserved for replacing the abnormal flash memory block, when there is an unreadable abnormal super block in the super block, it can be used according to the application of other normal data flash memory blocks. Check data of data and redundant blocks, recover abnormal super block data, and use normal data flash blocks to build RAID, store and protect abnormal super block data, and store abnormal flash memory without reducing data reliability block of data. Compared with the abnormal flash memory processing method of reserving free flash memory blocks for replacement of abnormal flash memory blocks, the capacity of the super block can be reused, which helps to improve the capacity utilization of the super block.

Description of drawings

The drawings described here are used to provide a further understanding of the application and constitute a part of the application. The schematic embodiments and descriptions of the application are used to explain the application and do not constitute an improper limitation to the application. In the attached picture:

FIG. 1 is a schematic structural diagram of a computing system provided by an embodiment of the present application;

Fig. 2 is a schematic diagram of the logic structure of the flash memory chip provided by the embodiment of the present application;

FIG. 3 is a schematic diagram of a logical structure of a flash memory provided by an embodiment of the present application;

Figure 4 is a schematic diagram of the abnormal flash memory processing method provided by the traditional solution;

FIG. 5 is a schematic diagram of an abnormal flash memory processing method provided by the embodiment of the present application;

Fig. 6 is a schematic diagram of the processing method when the abnormal flash memory block provided by the embodiment of the present application can be read;

Fig. 7 is a schematic diagram of the processing method when the abnormal flash memory block provided by the embodiment of the present application cannot be read;

FIG. 8 is a schematic flow diagram of a method for processing abnormal flash memory provided by an embodiment of the present application;

FIG. 9 is a schematic diagram of the process of the abnormal flash memory processing method provided by the embodiment of the present application;

FIG. 10 is a schematic flowchart of another abnormal flash memory processing method provided by an embodiment of the present application.

Detailed ways

In order to make the purpose, technical solution and advantages of the present application clearer, the technical solution of the present application will be clearly and completely described below in conjunction with specific embodiments of the present application and corresponding drawings. Apparently, the described embodiments are only some of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of this application.

Aiming at the technical problem of low utilization rate of flash memory capacity caused by the existing abnormal flash memory processing method, the embodiment of the present application provides a management method for a super block with no spare flash memory block reserved for replacing the abnormal flash memory block. For the abnormal super block that cannot be read in the block, the data of the abnormal super block is recovered according to the application data of other normal data flash blocks and the verification data of the redundant block, and the normal data flash block is used to construct RAID, and the abnormal super block It can store the data of the abnormal flash block without reducing the reliability of the data. Compared with the abnormal flash memory processing method of reserving free flash memory blocks for replacement of abnormal flash memory blocks, the capacity of the super block can be reused, which helps to improve the capacity utilization of the super block.

The technical solutions provided by various embodiments of the present application will be described in detail below in conjunction with the accompanying drawings.

It should be noted that the same reference numerals represent the same object in the following drawings and embodiments, therefore, once a certain object is defined in one drawing or embodiment, it does not need to be defined in subsequent drawings and embodiments It is discussed further.

FIG. 1 is a schematic structural diagram of a computing system provided by an embodiment of the present application. As shown in FIG. 1 , the computing system S10 may include: a processor 10 and a storage driver 20 . Wherein, the processor 10 is communicatively connected with the storage drive 20 . The processor 10 may be implemented as a central processing unit (Central Processing Unit, CPU) of a computing device. The storage drive 20 may be a solid state drive (Solid State Driver, SSD). The number of storage drives 20 may be one or more. A plurality means two or more.

In some embodiments, the computing system S10 may further include: a volatile memory 30 . The volatile memory 30 can be random access memory (Random Access Memory, RAM) or dynamic random access memory (Dynamic Random Access Memory, DRAM), etc. Volatile memory 30 may be the main memory of a computing device. Certainly, the computing system S10 may further include components such as a network card 40 . Fig. 1 only schematically shows some components of the computing system, which does not mean that the computing system must include all the components shown in Fig. 1, nor does it mean that the computing system can only include the components shown in Fig. 1 . In this embodiment, the computing system may be a computing system in a computing device, such as a computing system in a server. In the field of cloud storage or cloud computing, components in the computing system can also be located in different servers.

As shown in FIG. 1 , the storage driver 20 may include: a controller 21 and a flash memory 22 . Wherein, the flash memory 22 is a non-volatile storage medium. The flash memory 22 can be a NAND (Not AND, NAND) flash or a NOR (Not OR, NOR) flash or the like. The controller 21 may include: an interface for connecting to the host and the flash memory 22 . The interface connected to the host mainly refers to the interface connected to the processor 10 of the host. Controller 21 may also include write buffer 211 , firmware 212 and channel management component 213 . The write buffer 211 has a power-failure protection function, and is used for buffering the data to be written included in the write command sent by the host.

Firmware 212 refers to components for executing the commands, instructions and/or codes described herein. In this application, the firmware 212 is used to receive the write command; write the data to be written contained in the write command into the write buffer 211 ; and then return a write success message to the processor 10 . In this way, the host (not shown in FIG. 1 ) considers that the write command is written successfully. The firmware 212 can also asynchronously write the data to be written in the write buffer 211 into the flash memory 22 .

As shown in FIG. 1 , the flash memory 22 may include a plurality of channels (Channel) 221 . Each channel is provided with a plurality of flash memory chips 222 . For NAND flash memory, the flash memory chips 222 can be NAND particles. FIG. 2 is a schematic structural diagram of a flash memory chip 222 . As shown in FIG. 2 , each flash memory chip 222 may include: 1 or more flash memory planes (Planes). Multiple flash planes (Planes) can operate concurrently. Each flash memory plane may include: 1 or more flash memory blocks (Block). A flash block is the smallest unit of erasing. Each flash block may include: 1 or more flash pages (Page). A flash memory page is the smallest read/write unit of the flash memory 22 .

In actual use, data is usually erased and written to the flash memory in units of super blocks. The concept of a super block is explained below.

As shown in FIG. 3 , the flash memory 22 includes a plurality of channels (Channel) 221 . Each channel is provided with a plurality of flash memory chips 222 . For the organizational structure of the flash memory chip 222, please refer to the above-mentioned FIG. 2 . As shown in FIG. 3 , a super block may include flash memory blocks located in multiple flash memory chips on different channels. Flash blocks located in the same row in Figure 3 form a super block. Correspondingly, a super page, also called a page stripe, may include flash pages in multiple flash chips on different channels, that is, flash pages in the same row in a super block form a super page. Wherein, the flash memory pages filled in gray in FIG. 3 represent physical pages with written data, and the flash memory pages filled with oblique lines and white represent free flash memory pages.

When the data to be written is written into the flash memory 22 , the firmware 212 may write the data to be written into the flash memory page of the super page in a “horizontal” manner. That is to say, the firmware 212 can write a page of data to the first free physical page of the first-ranked flash chip 222 in the superpage (ie, the physical page filled with oblique lines in FIG. 3 ). Then, the firmware 212 can continue to write the next page of data into the first free flash memory page (the flash memory page filled with oblique lines in FIG. into the first free physical page of the superpage, and then write the verification data of the superpage into the redundancy page of the superpage.

In practical applications, the flash memory 22 may contain abnormal flash memory blocks, that is, abnormal flash memory blocks. In the traditional scheme, as shown in Figure 4, in order to abnormal flash memory block processing, often reserve free flash memory block in each flash memory chip 222, when abnormal flash memory block occurs, utilize the spare flash memory block of reservation to replace abnormal flash block. “blk” in the super block in FIG. 4 represents a flash memory block, and the flash memory block marked with “×” is an abnormal flash memory block, and the flash memory block replacing the abnormal flash memory block is a reserved free flash memory block. As shown in FIG. 4, the abnormal flash memory block may be replaced by a reserved free flash memory block in the same channel as the abnormal flash memory block.

Since data has been written in the abnormal flash block, the data needs to be copied to the reserved free flash block, and the abnormal flash block is marked with an abnormal label, and the abnormal flash block will not be used later. The above-mentioned flash memory exception handling method needs to reserve free flash memory blocks for each flash memory chip. When the free flash memory blocks reserved in the flash memory chip are exhausted, the flash memory chip as a whole is unavailable, resulting in a rapid decline in the capacity of a storage drive (such as an SSD), and low capacity utilization of the flash memory.

In the embodiment of the present application, in order to improve the utilization rate of the flash memory capacity, a new method for handling exceptions of the flash memory is provided, which will be exemplarily described below in conjunction with specific embodiments.

FIG. 5 is a schematic structural diagram of a storage driver without reserved free flash memory blocks provided by an embodiment of the present application. The part marked with "s" filled in gray in Fig. 5 represents the free flash memory block reserved in the traditional solution. In the embodiment of the present application, there is no reserved free flash memory block in the flash memory chip 222, that is, the gray filled part in Fig. 5 The flash memory block can be freed for use. In Fig. 5, when an abnormal flash memory block appears in the flash memory chip 222, the composition of the super block does not need to be changed, and before the next garbage collection (GarbageCollection, GC), the written data can be saved in the original super block, which can reduce the amount of data migration and media write amplification. GC and write amplification are explained below.

GC refers to the process of re-transferring the existing data in the flash memory to other flash memory locations, and completely deleting some useless data. Due to the way in which the data of the flash memory is written, that is, it is written in the unit of the flash memory page, but the deletion of data needs to be in the unit of the flash memory block. Therefore, to delete useless data, it is first necessary to copy useful data contained in a flash memory block to a page in a brand new flash memory block, so that the useless data contained in the original flash memory block can be deleted in units of flash memory blocks. New data can only be written after deletion, and new data cannot be written before erasing.

Because when writing new data, if the controller 21 cannot find a flash memory page that can be written, GC will be executed. The GC mechanism will merge valid data in some flash memory blocks into other flash memory blocks. Then, erase the invalid data of these flash memory blocks, and then write new data into these flash memory blocks, and in the whole process, in addition to writing new data, actually write some other flash memory blocks. data, this is called write amplification.

In the embodiment of the present application, in order to improve the stability and security of data storage, a redundancy check algorithm may be used to store data in the flash memory. Specifically, the redundancy check algorithm can be used to encode the data to obtain the check data corresponding to the redundancy check algorithm; and the data to be written and the check data are written according to the data storage form corresponding to the redundancy check algorithm stored in the flash memory 22. In this way, when part of the data is lost or erroneous, the lost or erroneous data can be recovered by using the redundancy check algorithm and other correct data. In this embodiment of the present application, the specific implementation form of the redundancy check algorithm is not limited. Optionally, the redundancy check algorithm may be a parity check algorithm, an error detection and correction (Error Checking and Correction, ECC) algorithm, a cyclic redundancy check (Cyclic Redundancy Check, CRC) algorithm or an erasure code check algorithm, etc. wait.

The number of bits of data that can be recovered by the redundancy check algorithm is limited. For example, the ECC algorithm can correct 1-bit errors and detect 2-bit errors. Correspondingly, the number of digits threshold corresponding to the ECC algorithm may be 1.

In the embodiment of the present application, flash memory data storage may be performed using redundant array of independent disks (Redundant Arrays of Independent Disks, RAID) technology. The super block in flash memory can form RAID. In a RAID scenario, a super block may include: a data flash block and a redundant block. Data flash blocks are flash blocks used to store application data. A redundant block is a flash memory block that stores parity data. The number of redundant blocks is determined by the redundancy check algorithm. For example, for the ECC algorithm, a super block may include a redundant block; other data blocks in the super block are data flash blocks.

Based on the above-mentioned RAID, when the firmware 212 writes the data to be written into the flash memory, it can also divide the data to be written according to the number of data flash memory blocks and the capacity of the flash memory page, so as to obtain data slices of the data to be written; The data volume of each data slice is equal to the capacity of the data flash page in the superpage. Afterwards, the firmware 212 may use a redundancy check algorithm to calculate the check data of each data slice; and write the data slice and the check data of the data slice into the super block of the RAID in units of pages. In the embodiment of the present application, the capacity of the super block can be flexibly set according to actual needs. Alternatively, a superblock may include one flash block per channel.

With regard to the aforementioned flash memory for data storage using the RAID technology, the method for handling the exception of the flash memory provided by the embodiment of the present application will be exemplarily described below with reference to FIG. 6 and FIG. 7 . A super block includes M data flash blocks and P redundant blocks. Data flash blocks are flash blocks used to store application data. A redundant block is a flash memory block that stores parity data. After N abnormal flash blocks appear in use, the super block is reduced to contain (M-N) data flash blocks and P redundant blocks. P is a positive integer, and the specific value is determined by the redundancy check algorithm. For example, for the ECC algorithm, P=1.

In the embodiment of the present application, the firmware 212 may perform state detection on the flash memory during the process of reading and writing the flash memory. For example, in the process of reading the flash memory, the firmware 212 can detect whether a read error occurs in the flash memory page currently read; If the currently read flash memory page reads data, it is determined that a read error occurs in the flash memory block where the currently read flash memory page is located. For the abnormal flash memory block with read error, the physical address of the abnormal flash memory block can be marked with a read error label in the flash memory mapping layer, so that the data of the abnormal flash memory block can be preferentially reclaimed when the next garbage collection for the target super block occurs.

In the process of writing the flash memory, the firmware 212 can read the data written in the flash memory page of the flash memory 22; and compare the data written in the flash memory page with the current page data stored in the page buffer; It is the same as the current page data stored in the page buffer, and it is determined that there is no write error in the current flash memory page. Correspondingly, if the data written into the flash memory page is inconsistent with the current page data stored in the page buffer, it is determined that a write error occurs in the current flash memory page. The flash memory block where the flash memory page where the write error occurs is the abnormal flash memory block where the write error occurs. Of course, if the firmware 212 cannot read the written data from the current flash memory page, it means that the firmware 212 has a read error and a write error. For an abnormal flash memory block where a write error occurs, the abnormal flash memory block may be marked as read-only.

In the embodiment of the present application, for the abnormal flash memory block, the firmware 212 can detect whether the abnormal flash memory block is readable. Optionally, the firmware 212 can perform a data read operation on the abnormal flash memory block; if the data of the abnormal flash memory block is successfully read, it is determined that the abnormal flash memory block can be read. If the data of the abnormal flash memory block cannot be read, it is determined that the abnormal flash memory block cannot be read. Since data cannot be read from an abnormal flash memory block where a read error has occurred, the abnormal flash memory block where a read error has occurred cannot be read.

Data in an abnormal flash block where a write error occurred may or may not be readable. Because the abnormal flash memory block that data can be read does not affect the accuracy of subsequent data reading, therefore, in this embodiment, as shown in Figure 6, other data flash memory blocks and other data flash memory blocks in the super block to which the abnormal flash memory block belongs can be Redundant blocks form a new RAID; and write data to the new RAID until the next GC. In the embodiment of the present application, for the convenience of description and distinction, the flash memory blocks other than the abnormal flash memory block in the super block to which the abnormal flash memory block belongs are defined as target flash memory blocks. In Figure 6, the gray filled rectangles represent the superpages where data is currently written; the black filled rectangles represent flash memory pages where write errors occur but data can be read. Correspondingly, the flash memory block to which the flash memory page in which a write error occurs belongs to is an abnormal flash memory block. The other data flash blocks in the data flash block except the abnormal flash block are the target flash blocks. The data flash block filled with a left slash in Figure 6 is the target flash block.

Since the GC needs to recover valid data, based on this, after the GC operation starts, the firmware 212 can preferentially recover the application data in the abnormal flash memory block; and recover the application data of the target flash memory block and the verification data of the redundant block. Afterwards, the firmware 212 can erase the super block where the abnormal flash memory block is located, and remove the abnormal flash memory block.

In some other embodiments, the data of the abnormal flash memory block may not be readable, which will affect the data reading performance of the flash memory, and the data stored in the abnormal flash memory block needs to be reclaimed. An abnormal flash block that cannot be read may have a read error and may have a write error. In FIG. 7 , it is only shown that a write error occurs in an unreadable abnormal flash memory block, but it does not constitute a limitation. In FIG. 7 , the gray filled part represents the superpage where data has been written, and the black filled part represents the flash memory page where a write error occurs, and the flash memory page cannot be read. Correspondingly, the flash memory block where the flash memory page of the black filled part is located is an abnormal flash memory block, and the abnormal flash memory block cannot be read. The grid filling part of the superpage with written data is the application data stored in the flash memory pages of the abnormal flash memory block, that is, the application data of the abnormal flash memory block. The part filled with left slashes in the superpage with written data is the verification data (ie original verification data) of the superpage with written data.

As shown in Figure 7, for the unreadable abnormal flash block, firmware 212 can read the application data of the target flash block in the target super block to which the abnormal flash block belongs and the verification data of the target flash block (that is, the original calibration data of Figure 7 test data). In each embodiment of the present application, the target flash memory block refers to the flash memory block except the abnormal flash memory block and the redundant block in the target super block, that is, other flash memory blocks except the abnormal flash memory block in the data flash memory block of the target super block . Data flash memory block 1 and data flash memory block 2 in FIG. 7 are target flash memory blocks.

Further, the firmware 212 can restore the application data of the abnormal flash memory block according to the application data of the target flash memory block and the verification data of the redundant block (ie, the original verification data in FIG. 7 ). Specifically, the firmware 212 can restore the application data of the abnormal flash memory block using a redundancy verification algorithm according to the application data of the target flash memory block and the verification data of the redundant block (ie, the original verification data in FIG. 7 ). The redundancy check algorithm is a redundancy check algorithm used by the target super block to store application data. Optionally, the firmware 212 may restore the application data of the abnormal flash memory block in units of pages. The flash memory block filled with gray grid in FIG. 7 is the abnormal flash memory block, and the data stored in the flash memory block is the application data of the abnormal flash memory block.

After restoring the application data of the abnormal flash memory block, it is also necessary to store the application data of the abnormal flash memory block. In this embodiment, in order to ensure the stability and security of the application data of the abnormal flash memory block, as shown in FIG. Verification data of the application data written to the superpage of the new RAID.

For example, the firmware 212 can use a redundancy check algorithm to encode the application data to be written into the superpage of the new RAID in the application data of the abnormal flash memory block, so as to obtain the verification data of the application data to be written into the superpage . In the embodiment of the present application, for the convenience of description and distinction, the RAID composed of target flash memory blocks is defined as the first RAID. The superpage of the first RAID refers to a page stripe composed of other flash pages except the abnormal flash page in the superpage of the target superblock. The first RAID may include: data flash blocks and redundant blocks. The number of redundant blocks of the first RAID is determined by a redundancy check algorithm.

For example, in FIG. 7, data flash memory block 1 and data flash memory block 2 form the first RAID. Data flash memory block 1 is a data flash memory block of the first RAID; data flash memory block 2 is a redundant block of the first RAID.

Further, the firmware 212 may write the application data to be written into the superpage of the first RAID and the verification data corresponding to the application data to be written into the superpage of the first RAID into the superpage of the first RAID. The firmware 212 writes the application data to be written into the superpage of the first RAID and the verification data corresponding to the application data to be written into the superpage of the first RAID into the superpage of the first RAID in units of flash memory pages. For example, in Figure 7, the application data to be written into the superpage of the first RAID is written into the data flash memory block 1 in units of flash memory pages, and the verification data of each superpage of the first RAID is written into the data flash memory Flash page corresponding to block 2. The rectangle filled with black grid in Fig. 7 represents the flash page of the first RAID of the application data written in the abnormal flash memory block; the rectangle filled with the vertical line in Fig. 7 represents the application data of the abnormal flash memory block written in the super page of the first RAID Corresponding verification data.

The embodiment of the present application provides a management method for a super block of a free flash memory block that is not reserved for replacing an abnormal flash memory block. For the abnormal super block that cannot be read in the super block, it can be stored according to other normal data flash memory blocks. The application data of the redundant block and the verification data of the redundant block are restored to the data of the abnormal super block, and a new RAID is constructed by using the normal data flash block in the super block to store and protect the data of the abnormal super block without reducing the data Store the data of abnormal flash block under the premise of reliability. Compared with the abnormal flash memory processing method of reserving free flash memory blocks for replacement of abnormal flash memory blocks, the capacity of the super block can be reused, which helps to improve the capacity utilization of the super block.

On the other hand, since the application data of the abnormal flash block is still written into the original super block, the composition of the super block does not need to be changed. Before the next GC of the entire super block, the written data of the super block is still stored in the original super block. Therefore, the amount of data relocation and media write amplification can be reduced.

The method for processing abnormal flash memory provided by the embodiment of the present application will be exemplarily described below with reference to FIG. 8 . As shown in Figure 8, the abnormal flash memory processing method provided by the embodiment of the present application mainly includes the following steps:

801. For the abnormal flash memory block in the flash memory, detect whether the abnormal flash memory block is readable.

802. If the abnormal flash memory block is unreadable, restore the application data of the abnormal flash memory block according to the application data of the target flash memory block in the target super block to which the abnormal flash memory block belongs and the verification data of the redundant block; the target flash memory block is the target super block Flash blocks other than abnormal flash blocks and redundant blocks in

803. Set the target flash memory block as the first RAID.

804. Calculate the check data of the application data to be written into the first superpage of the first RAID among the application data of the abnormal flash memory block.

805. Write the application data to be written into the first superpage and the verification data corresponding to the application data to be written into the first superpage into the first superpage. Wherein, the first superpage is any superpage of the first RAID.

The abnormal flash memory processing method provided in the embodiment of the present application is mainly applied to the firmware in the controller in FIG. 1 above. In this embodiment, there is no reserved free flash memory block in the flash memory chip. When an abnormal flash memory block appears in the flash memory chip, the composition of the super block does not need to be changed. Before the next garbage collection (Garbage Collection, GC), the written data can be saved in the original super block, which can reduce the amount of data migration and media write amplification .

In an embodiment, in order to improve the stability and security of data storage, a redundancy check algorithm may be used to store data in the flash memory. In this way, when part of the data is lost or erroneous, the lost or erroneous data can be recovered by using the redundancy check algorithm and other correct data. In the embodiment of the present application, the RAID technology may be used for flash memory data storage. The super block in flash memory can form RAID. In a RAID scenario, a super block may include: a data flash block and a redundancy block. Data flash blocks are flash blocks used to store application data. A redundant block is a flash memory block that stores parity data. The number of redundant blocks is determined by the redundancy check algorithm.

Based on the above-mentioned RAID, when the data to be written is written in the flash memory, the data to be written can also be segmented according to the number of data flash memory blocks and the capacity of the flash memory page, so as to obtain data slices of the data to be written; each The data volume of the data slice is equal to the capacity of the data flash page in the super page. Afterwards, a redundancy check algorithm may be used to calculate the check data of each data slice; and write the data slice and the check data of the data slice into the super block of the RAID in units of pages.

With regard to the above-mentioned flash memory for data storage using the RAID technology, the method for handling the exception of the flash memory provided by the embodiment of the present application will be exemplarily described below with reference to FIGS. 6-9 . In the embodiment of the present application, the state detection of the flash memory may be performed during the process of reading and writing the flash memory. For example, in the process of reading the flash memory, it is possible to detect whether a read error occurs in the currently read flash page; if data is read from the currently read flash page, it is determined that there is no read error in the flash block where the currently If data is read from the flash memory page, it is determined that a read error occurs in the flash memory block where the currently read flash memory page is located. For the abnormal flash memory block with read error, the physical address of the abnormal flash memory block can be marked with a read error label in the flash memory mapping layer, so that the data of the abnormal flash memory block can be preferentially reclaimed when the next garbage collection for the target super block occurs.

In the process of writing flash memory, the data written in the flash page of flash memory can be read; and the data written in the flash memory page is compared with the current page data stored in the page buffer; The current page data stored in the flash memory area is the same, and it is determined that there is no write error in the current flash memory page. Correspondingly, if the data written into the flash memory page is inconsistent with the current page data stored in the page buffer, it is determined that a write error occurs in the current flash memory page. The flash memory block where the flash memory page where the write error occurs is the abnormal flash memory block where the write error occurs. Of course, if the firmware cannot read the written data from the current flash memory page, it means that the firmware has read and written errors. For an abnormal flash memory block where a write error occurs, the abnormal flash memory block may be marked as read-only.

In the embodiment of the present application, for the abnormal flash memory block, in step 801, it may be detected whether the abnormal flash memory block is readable. Optionally, the firmware can perform a data read operation on the abnormal flash memory block; if the data of the abnormal flash memory block is successfully read, it is determined that the abnormal flash memory block can be read. If the data of the abnormal flash memory block cannot be read, it is determined that the abnormal flash memory block cannot be read. Since data cannot be read from an abnormal flash memory block where a read error has occurred, the abnormal flash memory block where a read error has occurred cannot be read.

Data in an abnormal flash block where a write error occurred may or may not be readable. Because the abnormal flash memory block that data can be read does not affect the accuracy of subsequent data reading, therefore, in this embodiment, as shown in Figure 6, other flash memory blocks and other flash memory blocks in the target super block to which the abnormal flash memory block belongs can be Redundant blocks form a new RAID (defined as ); and write data to the new RAID until the next GC. In the embodiment of the present application, for the convenience of description and distinction, the flash memory blocks other than the abnormal flash memory block in the super block to which the abnormal flash memory block belongs are defined as target flash memory blocks.

Since the GC needs to recover valid data, based on this, after the GC operation is started, the application data in the abnormal flash block can be recovered first; and the application data of the target flash block and the verification data of the redundant block can be recovered. After that, the super block where the abnormal flash memory block is located can be erased, and the abnormal flash memory block can be removed.

In some other embodiments, the data of the abnormal flash memory block may not be readable, which will affect the data reading performance of the flash memory, and the data stored in the abnormal flash memory block needs to be reclaimed. An abnormal flash block that cannot be read may have a read error and may have a write error. In FIG. 7 , it is only shown that a write error occurs in an unreadable abnormal flash memory block, but it does not constitute a limitation.

Referring to FIG. 7 and FIG. 8 , for an unreadable abnormal flash memory block, the firmware can read the application data of the target flash memory block and the verification data of the target super block in the target super block to which the abnormal flash memory block belongs. In each embodiment of the present application, the target flash memory block refers to the flash memory block except the abnormal flash memory block and the redundant block in the target super block, that is, other flash memory blocks except the abnormal flash memory block in the data flash memory block of the target super block .

Further, in step 802, the application data of the abnormal flash memory block can be restored according to the application data of the target flash memory block and the check data of the redundant block. Specifically, according to the application data of the target flash memory block and the check data of the redundant block, the application data of the abnormal flash memory block can be recovered by using a redundancy check algorithm. Optionally, the firmware may restore the application data of the abnormal flash memory block in units of pages.

Specifically, for any superpage A in the target superblock, the superpage A is a superpage that has already written data, according to the application data of the target flash memory block in superpage A, and the redundancy block in superpage A Check the data, use the redundancy check algorithm to restore the application data of the abnormal flash memory block in super page A.

Optionally, according to the decoding process corresponding to the redundancy check algorithm, the application data of the target flash memory block in super page A and the check data of the redundant block in super page A are decoded to obtain the abnormal flash block in super page A Application data for page A.

The above embodiment only uses super page A as an example to illustrate the process of restoring the application data of the abnormal flash memory block. In the same way, the application data of the abnormal flash memory block in each superpage where data has been written can be restored to obtain the application data of the abnormal flash memory block.

After restoring the application data of the abnormal flash memory block, it is also necessary to store the application data of the abnormal flash memory block. In this embodiment, in order to ensure the stability and security of the application data of the abnormal flash block, in conjunction with Fig. 7 and Fig. 8, in step 803 of Fig. 8, the target flash block can be set as a new RAID, and in step In 804, the check data of the application data to be written into the superpage of the new RAID among the application data of the abnormal flash memory block is calculated. Specifically, a redundancy check algorithm may be used to encode the application data to be written into the superpage of the new RAID in the application data of the abnormal flash memory block, so as to obtain the check data of the application data to be written into the superpage. In the embodiment of the present application, for the convenience of description and distinction, the RAID composed of target flash memory blocks is defined as the first RAID. The superpage of the first RAID refers to a page stripe composed of other flash pages except the abnormal flash page in the superpage of the target superblock. The first RAID may include: data flash blocks and redundant blocks. The number of redundant blocks of the first RAID is determined by a redundancy check algorithm.

Further, in step 805, the application data to be written into the superpage of the first RAID and the verification data corresponding to the application data to be written into the superpage of the first RAID can be written into the superpage of the first RAID. The firmware writes the application data to be written into the superpage of the first RAID and the verification data corresponding to the application data to be written into the superpage of the first RAID into the superpage of the first RAID in units of flash memory pages.

Specifically, the application data of the abnormal flash memory block may be divided into application data slices according to the quantity of the target flash memory block and the capacity of the flash memory page. The number of application data slices may be one or more. A plurality means two or more. The data volume of each application data slice is equal to the total capacity of the data flash pages included in the superpage of the first RAID.

In this embodiment, it is assumed that the number of super pages into which data has been written in the target super block is K, where K is a positive integer. The number of target flash memory blocks is Q. Q≥3, and is an integer. The number of redundant blocks of the first RAID is P, 1≦P≦(Q−2), and is an integer.

In some embodiments, K is an integer multiple of (Q-P), so that the application data of the abnormal flash block can be equally divided into at least one application data slice. In some embodiments, K is not an integer multiple of (Q-P), then N pages of data can be filled in the application data of the abnormal flash block to obtain the filled application data. Wherein, R is equal to the remainder of Q minus K divided by (Q-P). That is, R=Q-[K%(Q-P)], "%" means taking the remainder. For the ECC algorithm, P=1. In FIG. 6 , FIG. 7 and FIG. 9 , the number of redundant blocks is taken as one for illustration, but it is not limited thereto. For the embodiment in which the number of redundant blocks is one, the firmware can perform abnormal processing on one abnormal flash memory block.

Further, the filled application data may be divided into at least one application data slice according to the number of data flash memory blocks and the capacity of the flash memory pages of the first RAID. The application data slice is the application data to be written into the superpage of the first RAID. An application data slice is application data to be written into a super page of the first RAID.

After the application data of the abnormal flash memory block is divided into individual application data slices, a redundancy check algorithm may be used to encode the application data slices to obtain check data of the application data slices. Further, the application data slice and the verification data corresponding to the application data slice may be written into the super page of the first RAID. An application data slice and the verification data corresponding to the application data slice are written into a super page of the first RAID, thereby realizing the storage and RAID protection of the application data of the abnormal flash memory block.

In FIG. 7 , the black grid filled part is the data flash page of the super page of the first RAID, and the application data of the abnormal flash block is written. The part filled with the vertical lines is the redundant page of the superpage of the first RAID, and what is written is the verification data of the application data of the abnormal flash memory block.

The embodiment of the present application provides a management method for the super block of the free flash memory block that is not reserved for replacing the abnormal flash memory block. For the abnormal super block that cannot be read in the super block, it can be based on other normal data flash memory blocks. The application data and the verification data of the redundant block restore the data of the abnormal super block, and use the normal data flash block in the super block to construct RAID to store and protect the data of the abnormal super block without reducing the reliability of the data. Store the data of the abnormal flash block under the premise. Compared with the abnormal flash memory processing method of reserving free flash memory blocks for replacement of abnormal flash memory blocks, the capacity of the super block can be reused, which helps to improve the capacity utilization of the super block.

On the other hand, since the application data of the abnormal flash block is still written into the original super block, the composition of the super block does not need to be changed. Before the next GC of the entire super block, the written data of the super block is still stored in the original super block. Therefore, the amount of data relocation and media write amplification can be reduced.

Since the RAID protection of the super page with data written in the super block is the verification data obtained by encoding the data flash page of the super page by using the redundancy verification algorithm. Therefore, the verification data stored in the redundant block of the super block is fused with the application data of the abnormal flash block, so that the RAID protection can no longer work on the super page that has written data.

In order to continue to perform RAID protection on the written data of the super block, it is necessary to eliminate the influence of the application data of the abnormal flash block. Based on this, in conjunction with Fig. 7 and Fig. 9, also according to the application data of the abnormal flash memory block and the application data of the redundant block of the target super block, adopt the redundant verification algorithm to determine the verification data of the application data of the target flash memory block, obtain The updated checksum data. The verification data obtained in this process can strip the application data of the abnormal flash memory block, and retain the protection of other data flash memory pages except the page where the abnormal flash memory block is located, so it is called the offset effect. The offset effect means that the RAID protection strips the application data of the abnormal flash block, and can continue to form RAID protection for the data of other normal data flash blocks.

Specifically, as shown in Figure 9, for any superpage B that has written data in the target superblock, the application data of the abnormal flash memory block in superpage B, and the redundancy block of the superblock in superpage B For the check data, a redundancy check algorithm is used to determine the check data of the target flash memory block in the super page B as the updated check data of the super page B. In FIG. 9 , it is only shown that the target super block includes M data flash memory blocks and one redundant block, but it is not limited thereto. In FIG. 9, after N abnormal flash blocks appear in use, the super block is reduced to contain (M-N) data flash blocks and 1 redundant block.

Optionally, the application data of the abnormal flash block in super page B and the check data of the redundant block of the super block in super page B can be inversely calculated to obtain the target flash memory block The verification data in super page B is used as the updated verification data of super page B.

For example, the redundancy check algorithm is an exclusive OR algorithm. As shown in Figure 9, a bitwise XOR operation can be performed on the application data of the abnormal flash block in super page B and the verification data of the redundant block of the super block in super page B to obtain the target flash block in super page B The verification data of is used as the updated verification data of super page B. "⊕" in Fig. 9 means "exclusive OR".

Further, as shown in FIG. 7 , the parity data corresponding to the application data of the target flash memory block can be written into the free redundant page of the original redundant block of the target super block. The updated parity data is to be written into the free redundant page of the original redundant block of the target super block. The redundant block of the target super block is the redundant block of the original super block, that is, the redundant block storing the original parity data in FIG. 7 . In FIG. 7 , the updated check data is the check data corresponding to the application data of the target flash memory block. Specifically, starting from the first redundant page that is currently free, the parity data corresponding to the application data of the target flash memory block is written page by page into the free redundant page of the original redundant block in units of flash memory pages.

Based on the RAID cancellation and rebuilding, the above embodiments can flexibly unbind the combination of super blocks and release the capacity of super blocks. For data protection before abnormal flash memory blocks occur, the RAID redundancy can be updated through the above-mentioned RAID offset effect, so as to effectively protect the data written in normal flash memory blocks and reuse the media capacity.

In the embodiment of the present application, after the application data to be written into the superpage of the first RAID and the verification data of these application data are written into the superpage of the first RAID, the target flash memory block and the target superblock can be The redundant block is set to a new RAID (defined as the second RAID). Further, when the flash memory is subsequently written, data can be written to the second RAID until the next GC.

Further, when the GC for the target super block starts, it can respond to the GC operation for the target super block, reclaim the data of the above-mentioned target flash memory block, the check data of the original redundant block update of the target super block and write to the second RAID Checksum of the data. Wherein, the updated verification data is the verification data of the application data of the target flash memory block.

After the valid data is recovered, the target super block can be erased, and abnormal flash memory blocks can be removed to realize GC of the target super block.

In the abnormal flash memory processing method provided by the embodiment of the present application, when an abnormal flash memory block appears in the super block, if the data of the abnormal flash memory block can be read, the original super block will continue to be used for data reading and writing. If the data of the abnormal flash memory block cannot be read out, after completing the relocation of the data of the abnormal flash memory block in the same super block, the original super block can be read and written normally. During the relocation of the same super block for processing abnormal flash block data, the front-end writing can still be undertaken by the parallel open super block, which can reduce the impact on user-visible performance and improve the service performance (Quality of Service, QoS) of SSD.

In the process of replacing the abnormal flash memory block shown in FIG. 4 above, it is necessary to read the data of the abnormal super block and rewrite the reserved free flash memory block. Since the abnormal flash memory block is defined as failure recovery, it has a higher processing priority and needs to be processed quickly. Therefore, such operations consume SSD back-end resources and form competition with front-end user requests, which has a periodic impact on the overall performance stability of SSDs. Therefore, the flash memory exception handling method provided by the embodiment of the present application helps to improve the performance stability and QoS of the SSD.

On the other hand, in the abnormal flash memory block replacement scheme shown in Figure 4, the discovery of abnormal flash memory blocks is usually found through write errors during the writing process. At this time, the parallel writing of multiple flash memory pages is interrupted, and the abnormal The data migration and mapping update included in the replacement of the flash memory block also needs to use the data cache to temporarily accept the input data, which puts significant pressure on the data consistency and power-off protection of the computing system.

The flash memory exception processing method provided by the embodiment of the present application, the relocation of the data of the abnormal flash memory block in the same super block can reduce the number of data relocations, increase the speed of data relocation, and help reduce the interruption duration of parallel writing of multiple flash memory pages , to a certain extent, can reduce the pressure of data consistency and power-down protection.

In order to better understand the flash memory exception handling method provided by the embodiment of the present application, an exemplary description will be given below in conjunction with the specific embodiment shown in FIG. 10 . In FIG. 10, the super block includes: M data flash memory blocks and one redundant block. The redundancy check algorithm is an exclusive-or (XOR) algorithm. As shown in Figure 10, the flash memory exception handling method mainly includes:

S1. Load the abnormal flash memory block table, and select normal flash memory blocks to form a super block according to channel distribution. The super block includes: M data flash blocks and a redundant block.

S2. The SSD performs read and write operations on the flash memory.

S3. During the process of reading the flash memory, it is detected whether a read error occurs. If it occurs, execute step S6; if not, execute step S4.

S4. During the process of writing the flash memory, it is detected whether a writing error occurs. If so, go to step S5. If not, return to step S2.

S5. Mark the abnormal flash memory block where the write error occurs as read-only.

S6. Read the application data of the abnormal flash memory block.

S7. Detect whether the reading is successful. If successful, perform step S9; if failed, perform step S8.

S8. Perform a bitwise XOR operation on the application data of the target flash memory block and the verification data of the redundant block to restore the application data of the abnormal flash memory block. Next, step S10 is executed.

The number of target flash memory blocks is (M-1), and the target flash memory blocks are other flash memory blocks except the abnormal flash memory block among the M data flash memory blocks.

S9. Set (M-1) target flash memory blocks and original redundant blocks as the second RAID; and use the free flash memory pages of the second RAID to write data. Next, step S16 is executed.

S10. Set (M-1) target flash memory blocks as a first RAID, where the first RAID includes (M-2) data flash memory blocks and 1 redundant block. The superpage of the first RAID includes (M-2) data flash pages and 1 redundant page.

S11. For the application data of (M-2) data flash pages to be written in the application data of the abnormal flash page, calculate the verification data of the application data of the (M-2) data flash pages to be written.

S12. Write the application data to be written into (M-2) data flash memory pages and the corresponding check data into a super page of the first RAID.

S13, according to the application data of the abnormal flash memory block in the super page B of the super block, and the verification data of the redundant block of the super block in the super page B, determine the verification data of the target flash memory block in the super page B, and obtain the updated verification data test data.

S14. Write the updated verification data into the idle redundant page of the redundant block of the super block.

S15. Set (M-1) target flash memory blocks and original redundant blocks as the third RAID; and use the free flash memory pages of the third RAID to write data. Next, step S16 is executed.

S16, GC the effective data in the super block, erase the data block, and remove the abnormal data block.

Valid data includes: data of the target flash memory block, updated check data stored in the redundant block, and check data written in the redundant block in step S15.

S17. Add an abnormal flash memory block to the abnormal flash memory table.

S18. Determine whether the read and write operations are completed. If completed, perform step S19; if not completed, perform step S2.

S19. Write the abnormal flash block table into a persistent storage medium, so as to be loaded when the firmware is initialized.

It should be noted that the subject of execution of each step of the method provided in the foregoing embodiments may be the same device, or the method may also be executed by different devices. For example, the execution subject of steps 801 and 802 may be device A; for another example, the execution subject of step 801 may be device A, and the execution subject of step 802 may be device B; and so on.

In addition, in some of the processes described in the above embodiments and accompanying drawings, multiple operations appearing in a specific order are included, but it should be clearly understood that these operations may not be executed in the order in which they appear herein or executed in parallel , the sequence numbers of operations, such as 801, 802, etc., are only used to distinguish different operations, and the sequence numbers themselves do not represent any execution order. Additionally, the processes may include more or fewer operations, and the operations may be performed sequentially or in parallel.

Correspondingly, the embodiment of the present application also provides a computer-readable storage medium storing computer instructions, and when the computer instructions are executed by one or more processors, one or more processors are caused to execute the above-mentioned flash memory exception handling method. step.

It should be noted that the descriptions of "first" and "second" in this article are used to distinguish different messages, devices, modules, etc. are different types.

Those skilled in the art should understand that the embodiments of the present application may be provided as methods, systems, or computer program products. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present application may employ one or more computer-usable storage media (including but not limited to disk storage, compact disc read-only memory (CD-ROM), optical storage, etc.) containing computer-usable program code therein. ) in the form of a computer program product.

The present application is described with reference to flowcharts and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the present application. It should be understood that each procedure and/or block in the flowchart and/or block diagram, and a combination of procedures and/or blocks in the flowchart and/or block diagram can be realized by computer program instructions. These computer program instructions may be provided to a general purpose computer, special purpose computer, embedded processor, or processor of other programmable data processing equipment to produce a machine such that the instructions executed by the processor of the computer or other programmable data processing equipment produce a An apparatus for realizing the functions specified in one or more procedures of the flowchart and/or one or more blocks of the block diagram.

These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing apparatus to operate in a specific manner, such that the instructions stored in the computer-readable memory produce an article of manufacture comprising instruction means, the instructions The device realizes the function specified in one or more procedures of the flowchart and/or one or more blocks of the block diagram.

These computer program instructions can also be loaded onto a computer or other programmable data processing device, causing a series of operational steps to be performed on the computer or other programmable device to produce a computer-implemented process, thereby The instructions provide steps for implementing the functions specified in the flow chart or blocks of the flowchart and/or the block or blocks of the block diagrams.

In a typical configuration, a computing device includes one or more processors (CPU, etc.), input/output interfaces, network interfaces, and memory.

Memory may include non-permanent storage in computer-readable media, in the form of random-access memory (RAM) and/or non-volatile memory such as read-only memory (ROM) or flash RAM . Memory is an example of computer readable media.

The storage medium of the computer is a readable storage medium, which may also be referred to as a readable medium. Readable storage media, including volatile and non-permanent, removable and non-removable media, may be implemented by any method or technology for information storage. Information may be computer readable instructions, data structures, modules of a program, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (Phase-Change Memory, PRAM), static random-access memory (SRAM), dynamic random-access memory (Dynamic Random Access Memory, DRAM), other types of random Access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, compact disc read-only memory (CD-ROM), digital multiplayer A digital video disc (DVD) or other optical storage, magnetic tape cartridge, disk storage or other magnetic storage device or any other non-transmission medium that can be used to store information that can be accessed by a computing device. As defined herein, computer-readable media excludes transitory computer-readable media, such as modulated data signals and carrier waves.

It should also be noted that the term "comprises", "comprises" or any other variation thereof is intended to cover a non-exclusive inclusion such that a process, method, article, or apparatus comprising a set of elements includes not only those elements, but also includes Other elements not expressly listed, or elements inherent in the process, method, commodity, or apparatus are also included. Without further limitations, an element defined by the phrase "comprising a ..." does not preclude the presence of additional identical elements in a process, method, article or device comprising the aforementioned element.

The above content is only an embodiment of the present application, and is not intended to limit the present application. For those skilled in the art, various modifications and changes may occur in this application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included within the scope of the claims of the present application.

Claims (13)

1. A flash memory exception processing method, is characterized in that, comprising: For the abnormal flash memory block in the flash memory, detect whether the abnormal flash memory block can be read; If the abnormal flash memory block is unreadable, recover the application data of the abnormal flash memory block according to the application data of the target flash memory block in the target super block to which the abnormal flash memory block belongs and the check data of the redundant block; The flash memory block is a flash memory block except the abnormal flash memory block and the redundant block in the target super block; The target flash memory block is set as the first redundant array of independent disks RAID, and the check data to be written in the application data of the first superpage of the first RAID in the application data of the abnormal flash memory block is calculated; Writing the application data to be written into the first super page and the verification data corresponding to the application data to be written into the first super page into the first super page. 2. The method according to claim 1, further comprising: According to the application data of the abnormal flash memory block and the application data of the redundant block, using the redundancy check algorithm to determine the check data of the target flash memory block to obtain updated check data; Writing the updated check data into a free redundant page of the redundant block. 3. The method according to claim 2, wherein, according to the application data of the abnormal flash memory block and the verification data of the redundant block, the redundancy verification algorithm is used to determine the target flash memory Block check data, including: For the second super page in the target super block, according to the application data of the abnormal flash memory block in the second super page and the check data of the redundant block in the second super page, adopt the The redundancy check algorithm determines the check data of the target flash memory block in the second super page; the second super page is any super page in the target super block that has written data. 4. The method according to claim 3, wherein the redundancy check algorithm is an XOR algorithm; the application data of the second super page according to the abnormal flash block, and the redundant For the check data of the remaining block in the second super page, the redundancy check algorithm is used to determine the check data of the target flash memory block in the second super page, including: performing a bitwise XOR operation on the application data of the abnormal flash memory block in the second super page and the verification data of the redundant block in the second super page to obtain the target flash memory block in the second super page Describe the verification data of the second superpage. 5. method according to claim 1, is characterized in that, described according to the application data of target flash memory block in the target super block that described abnormal flash memory block belongs and the verification data of redundant block, restore described abnormal flash memory block application data, including: For the second super page in the target super block, according to the application data of the target flash block in the second super page and the check data of the redundancy block in the second super page, redundant The verification algorithm restores the application data of the abnormal flash memory block in the second superpage; the second superpage is any superpage in the target superblock that has written data. 6. The method according to claim 2, wherein the calculation of the verification data of the application data to be written into the first super page of the first RAID in the application data of the abnormal flash memory block includes: According to the quantity of the data flash memory block of the first RAID and the capacity of the flash memory page, the application data of the abnormal flash memory block is divided into at least one application data slice; the application data slice is to be written into the first super page application data; The application data slice is encoded by using a redundancy check algorithm to obtain check data of the application data slice. 7. The method according to claim 6, wherein the quantity of the second super page in the target super block is K; the second super page is the super page of written data in the target super block page; the quantity of the target flash memory blocks is Q; K is a positive integer; M≥3, and is an integer; the quantity of redundant blocks of the first RAID is P; 1≤P≤(Q-2) , and is an integer; According to the number of data flash memory blocks and the capacity of flash memory pages of the first RAID, dividing the application data of the abnormal flash memory block into at least one application data slice includes: If K is not an integer multiple of (Q-P), fill the data of R flash memory pages in the application data of the abnormal flash memory block, to obtain the filled application data; R is equal to the remainder of Q minus K divided by (Q-P); Divide the filled application data into at least one application data slice according to the number of data flash memory blocks and the capacity of flash memory pages of the first RAID. 8. The method of claim 2, further comprising: After writing the application data to be written into the first super page and the verification data corresponding to the application data to be written into the first super page into the first super page, the target flash memory The block and the redundant block are configured as a second RAID; Write data to the second RAID until the next garbage collection for the target super block occurs. 9. The method according to claim 8, wherein the abnormal flash memory block is a flash memory block in which a read error occurs detected in the process of reading data from the flash memory; the method also includes: In the flash memory mapping layer, the physical address of the abnormal flash memory block is marked with a read error label, so that the data of the abnormal flash memory block can be preferentially reclaimed when the next garbage collection for the target super block occurs. 10. The method of claim 2, further comprising: If the abnormal flash memory block can be read, the target flash memory block and the redundant block are set as a second RAID; Write data to the second RAID until the next garbage collection for the target super block occurs. 11. The method according to any one of claims 8-10, further comprising: In response to the garbage collection operation for the target super block, reclaim the data currently written in the target flash memory block, the updated check data in the redundant block and the check data of the second RAID; Erasing the target super block, and removing the abnormal flash memory block. 12. A computing system, comprising: a processor and a storage driver; the storage driver includes: a controller and a flash memory; The controller includes: firmware and a channel management component; the controller communicates with the flash memory through the channel management component; and accesses the flash memory through a channel; The firmware is configured to execute the steps in the method of any one of claims 1-11. 13. A computer-readable storage medium storing computer instructions, wherein when said computer instructions are executed by one or more processors, said one or more processors are caused to perform any of claims 1-11 A step in said method.

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