CN115810620A - Stack packaging structure, packaging method thereof and mobile terminal equipment - Google Patents
Stack packaging structure, packaging method thereof and mobile terminal equipment Download PDFInfo
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- CN115810620A CN115810620A CN202111084049.6A CN202111084049A CN115810620A CN 115810620 A CN115810620 A CN 115810620A CN 202111084049 A CN202111084049 A CN 202111084049A CN 115810620 A CN115810620 A CN 115810620A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
- H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
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Abstract
The embodiment of the invention provides a stacked packaging structure, a packaging method thereof and mobile terminal equipment, and belongs to the field of stacked packaging. The packaging method comprises the following steps: stacking the substrate and at least two components to enable all the components to be in a state of being sequentially stacked along the normal direction of the substrate; each component comprises a device body and a solder ball array attached to at least one surface of the device body; at least part of the components are attached with a glue material layer, so that the glue material layer is at least arranged around the periphery of the solder ball array between every two adjacent components when the substrate and all the components are stacked; and carrying out reflow soldering treatment on the substrate and all the components to solder the two adjacent components, and soldering the substrate and the components connected with the substrate and bonding the glue material layer with at least two adjacent components. The packaging method can effectively reduce the stress existing between the components, and form stress protection on the components far away from one side of the substrate, so as to improve the packaging reliability of the stacked packaging structure.
Description
Technical Field
The invention relates to the technical field of stack packaging, in particular to a stack packaging structure, a packaging method thereof and mobile terminal equipment.
Background
With the continuous intelligentization of the mobile terminal, not only the functions of the chip become more and more complex, but also the mobile terminal becomes more and more precise, and especially the parts of the Printed Circuit Board (PCB) device become more and more dense, so that chip manufacturers propose a Package On Package (POP) process, so that the Printed Circuit Board device exhibits the effect of package on package, and the area occupied by the layout of the Printed Circuit Board device on the mobile terminal can be effectively reduced. However, the reliability of the current stacked and packaged printed circuit board device is poor due to the easy existence of stress, and even the upper-layer device of the printed circuit board device falls off in the using process to cause the failure of the mobile terminal. When the PCB and the chips are stacked and packaged on the premise of being thinner, although the lower chip and the PCB can be glued and reinforced, the upper chip and the lower chip are difficult to be glued effectively, the consistency and continuity of glue gluing are difficult to ensure, and poor glue gluing is caused; in addition, poor soldering may occur between the lower chip and the upper chip. Various factors result in a higher risk of stress between the upper and lower chips.
Disclosure of Invention
The embodiment of the invention mainly aims to provide a stacked packaging structure, a packaging method thereof and mobile terminal equipment, and aims to solve the problem that an upper chip and a lower chip in the existing stacked packaging structure are easy to have higher stress risks.
In a first aspect, an embodiment of the present invention provides a packaging method for a package on package structure, including the following steps: stacking a substrate and at least two components to enable all the components to be in a state of being sequentially stacked along the normal direction of the substrate; wherein each of the components comprises a device body and an array of solder balls attached to at least one surface of the device body; a glue material layer is attached to at least part of the components, so that when the substrate and all the components are stacked, the glue material layer at least surrounds the periphery of the solder ball array between every two adjacent components; it is right the base plate with all components and parts carry out reflow soldering and handle, make adjacent two the components and parts welding, and make the base plate with the base plate is connected the components and parts welding, simultaneously, makes glue the material layer at least with adjacent two components and parts splice.
Compared with the prior art, in the packaging method of the stacked package structure provided by the first aspect of the embodiment of the present invention, the adhesive layer is attached to part of the components, so that when the plurality of components are stacked, the adhesive layer between two adjacent components is annularly disposed on the periphery of the solder ball array, and after the reflow soldering process, the adhesive layer is connected between two adjacent components in a melting manner and extends into the solder gaps of two adjacent components, so as to effectively reduce the existing stress between the components and form stress protection for the components far away from the substrate, thereby effectively improving the packaging reliability of the stacked package structure and improving the yield of the stacked package structure.
In a second aspect, an embodiment of the present invention further provides a package on package structure, including:
the device assembly comprises at least two components, and all the components are sequentially welded in a stacking mode;
the substrate and the device group are arranged in a stacked mode, and one of the devices is welded with the substrate in a stacked mode;
the first adhesive layer is adhered to the two adjacent components;
the second adhesive layer is respectively adhered to the device assembly and the substrate;
and the stacked packaging structure is obtained by packaging according to the packaging method of the stacked packaging structure.
Compared with the prior art, in the stack package structure provided by the second aspect of the embodiment of the present invention, since two adjacent components in the device assembly are bonded together through the first bonding layer in addition to the stack welding, and the device assembly and the substrate are bonded together through the second bonding layer in addition to the stack welding, the connection characteristics between the device assembly and the substrate and inside the device assembly are good, and good stress protection is formed between the component far from the substrate side in the device assembly and the adjacent component, so that the stack package structure has good structural reliability.
In a third aspect, an embodiment of the present invention further provides a mobile terminal device, where the mobile terminal device includes the above stacked package structure.
Compared with the prior art, the mobile terminal device provided by the third aspect of the embodiments of the present invention includes the above stacked package structure, and the stacked package structure has good structural reliability, so that the quality of the mobile terminal device can be effectively improved, and the return rate of the mobile terminal device from factory can be effectively reduced.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a flowchart illustrating a packaging method of a package on package structure according to an embodiment of the invention;
fig. 2 is a schematic top view of a stacked package structure according to an embodiment of the present invention after stacking components;
FIG. 3 isbase:Sub>A schematic cross-sectional view taken along line A-A of FIG. 2;
FIG. 4 is a schematic cross-sectional view taken along line B-B of FIG. 2;
fig. 5 is a schematic top view of a package structure obtained by a packaging method for a package on package structure according to an embodiment of the invention;
FIG. 6 is a schematic cross-sectional view taken along line C-C of FIG. 5;
fig. 7 is a schematic cross-sectional view taken along line D-D in fig. 5.
The reference numbers indicate:
10. a substrate;
20. a glue layer;
30. a component; 31. a first component; 311. a device body; 312. an array of solder balls; 32. a second component;
40. stacking the packaging structures;
41. a device component;
42. a first adhesive layer;
43. a second adhesive layer.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The flowcharts shown in the figures are illustrative only and do not necessarily include all of the contents and operations/steps, nor do they necessarily have to be performed in the order described. For example, some operations/steps may be decomposed, combined or partially combined, so that the actual execution order may be changed according to the actual situation.
It is to be understood that the terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the specification of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
Fig. 1 to fig. 7 illustrate a package on package structure 40, a packaging method thereof and a mobile terminal device according to embodiments of the present invention. The stack package structure 40 may be applied to electronic devices such as smart phones, tablet computers, notebook computers, personal digital assistants, wearable devices, POS machines, and in-vehicle computers. The packaging method of the stacked packaging structure 40 in the embodiment of the invention can ensure that the components 30 have good packaging reliability, and the stacked packaging structure 40 with good packaging effect is obtained, so that the reliability and the quality of the electronic equipment comprising the stacked packaging structure 40 provided by the embodiment of the invention can be effectively improved, and the yield of products is improved.
Some embodiments of the invention are described in detail below with reference to the accompanying drawings. The embodiments described below and the features of the embodiments can be combined with each other without conflict.
Referring to fig. 1 to fig. 4 and fig. 5, a packaging method of a package on package structure 40 according to an embodiment of the invention may include, but is not limited to, the following steps.
Step S01 is to stack the substrate 10 and at least two components 30 so that all the components 30 are sequentially stacked in the normal direction of the substrate 10.
Each component 30 includes a device body 311 and a solder ball array 312, wherein the solder ball array 312 is attached to at least one surface of the device body 311; the adhesive layer 20 is attached to at least some of the components 30, so that when the substrate 10 and all of the components 30 are stacked, the adhesive layer 20 at least surrounds the periphery of the solder ball array 312 between two adjacent components 30.
Referring to fig. 1, in some embodiments of step S01, the substrate 10 includes a printed circuit board or the like. In some embodiments, the substrate 10 has a thickness in any range from 0.5mm to 0.7mm, including 0.5mm, 0.55mm, 0.6mm, 0.65mm, and 0.7 mm. When the stacked package structure 40 is formed by the package method according to the present embodiment based on the substrate 10 and the at least two components 30 having the thicknesses described above, it is possible to form good stress protection for the components 30 located on the side away from the substrate 10, thereby effectively improving the reliability of the stacked package structure 40 based on the thin substrate 10.
In some embodiments, the component 30 includes at least one of a main processor chip, a memory chip, and the like. In some embodiments, component 30 may also include any other suitable chip. In some embodiments, the components 30 include at least two types of components 30, such as a first component 31 and a second component 32, where the first component 31 includes a main processor chip and the second component 32 includes a memory chip. The two types of components 30 are included, and when the stacked package structure 40 is formed by packaging, the layout area can be effectively reduced besides the function of assembling the substrate 10 and the components 30. In some embodiments, at least two components 30 are disposed on the same side of the substrate 10. In other exemplary embodiments, the number of the components 30 may be multiple, such as three or four or more. When the number of the components 30 is multiple, for example, the number of the components 30 is three, all three components 30 may be disposed on the same side of the substrate 10; it is also possible that two components 30 are provided on the same side of the substrate 10 and the remaining one component 30 is provided on the opposite side of the substrate 10. For another example, when the number of the components 30 is four, the four components 30 may be all disposed on the same side of the substrate 10; two of the components 30 may be disposed on the same side of the substrate 10, and the remaining two components 30 may be disposed on opposite sides of the substrate 10; or three components 30 are provided on the same side of the substrate 10 and the remaining one component 30 is provided on the opposite side of the substrate 10. While the number of components 30 is other, it is not exhaustive since it can be reasonably adjusted and designed according to the requirements of the stacked package structure 40.
In an exemplary embodiment, the number of the components 30 on the same side of the substrate 10 is two, and if the first component 31 and the second component 32 are included, the first component 31 is stacked on the substrate 10, and then the second component 32 is stacked on the first component 31. In some embodiments, the orthographic projection of the first component 31 on the substrate 10 and the orthographic projection of the second component 32 on the substrate 10 coincide; alternatively, the orthographic projection of the second component 32 on the substrate 10 falls within the orthographic projection area of the first component 31 on the substrate 10. Both of the first component 31 and the second component 32 can effectively reduce the layout area and improve the structural reliability of the package on package structure 40.
In an exemplary embodiment, the number of the components 30 on the same side of the substrate 10 is two or more, then the first component 30 is stacked on the substrate 10, the second component 30 is stacked on the first component 30, the third component 30 is stacked on the second component 30, and so on until the last component 30 is stacked on the penultimate component 30, thereby completing the stacking process of the components 30.
Referring to fig. 1, in some embodiments of step S01, the adhesive layer 20 includes a thermoplastic adhesive. In some embodiments, the thermoplastic glue comprises a strip of glue, a gel or other suitable state of thermoplastic glue, or the like. Use the thermoplastic glue as glue layer 20, can ensure when reflow soldering, glue layer 20 can the melting and flow along the extending of face of weld, and the reflow soldering cooling back, can solidify again in order to form good cementing effect to play good stress protection.
In some embodiments, the adhesive layer 20 is attached to at least a portion of the components 30 such that when at least two components 30 are stacked, the adhesive layer 20 surrounds the periphery of the solder ball array 312 between two adjacent components 30. When the glue layer 20 is disposed around the periphery of the solder ball array 312 sandwiched between the two components 30, the glue layer 30 is melted and flows along the solder surface by reflow soldering, and after the reflow soldering is cooled, the glue layer can be re-solidified to form a good bonding effect, so as to form a good stress protection for the components 30.
In some embodiments, taking the component 30 including the first component 31 and the second component 32 as an example, the adhesive layer 20 is attached to a surface of at least one component 30 of the first component 31 and the second component 32. Specifically, the adhesive material layer 20 may be attached to the first component 31, so that when the attached adhesive material layer 20 is stacked on the first component 31 and the second component 32, the adhesive material layer 20 is disposed around the outer periphery of the solder ball array 312 between the first component 31 and the second component 32; or the glue material 20 is attached to the second component 32, and the glue material layer 20 is attached so that when the first component 31 and the second component 32 are stacked on each other, the glue material layer 20 is arranged around the periphery of the solder ball array 312 between the first component 31 and the second component 32; or a part of the adhesive layer 20 is attached to the first component 31, a part of the adhesive layer 20 is attached to the second component 32, and the adhesive layer 20 attached to the first component 31 and the adhesive layer 20 attached to the second component 32 are arranged around the periphery of the solder ball array 312 between the first component 31 and the second component 32 when the first component 31 and the second component 32 are stacked. In some embodiments, the adhesive material layer 20 is disposed around the periphery of the solder ball array 312 in a square pattern, or disposed around the periphery of the solder ball array 312 in a circular pattern, etc.; or in other shapes, depending on the shape of the solder ball array 312. In some embodiments, the glue layer 20 may be formed from a length of thermoplastic glue; or formed by multiple sections of thermoplastic glue, and a gap is formed between two adjacent sections of thermoplastic glue.
In some embodiments, the substrate 10 may also be attached with the adhesive layer 20, and when the substrate 10 is attached with the adhesive layer 20, the dispensing process may not be required after the subsequent reflow soldering process.
In some embodiments, the adhesive layer 20 may be adhered to the component 30 and/or the substrate 10. Through bonding, can make the attached reliability of adhesive layer 20 high, and attach in the position that needs to glue to improve the gluey homogeneity, establish the basis for the follow-up even gluey effect that forms.
In some embodiments, when the adhesive layer 20 is attached, the component 30 is fixed, and then the material forming the adhesive layer 20 is adsorbed on the surface of the support, and the support pushes the material forming the adhesive layer 20 to the surface of the component 30, and presses the material forming the adhesive layer 20, so as to form the adhesive layer 20 adhered on the surface of the component 30. The components 30 are fixed and the supporting member is used for extruding the adhesive layer 20, so that when the material forming the adhesive layer 20 is adhered to the surface of the components 30, the components 30 cannot be greatly deformed or damaged, and the uniform stress of all parts of the components 30 is ensured.
In some embodiments, the thickness of the adhesive layer 20 is less than or equal to the height of the solder ball array 312 surrounded by the adhesive layer 20, so that the influence of the thickness of the adhesive layer 20 on the dipping of the soldering flux can be prevented, the influence of the thickness of the adhesive layer 20 on the stacking of two adjacent components 30 can be effectively prevented, the exertion of the soldering flux assistant effect between two adjacent components 30 can be facilitated, the soldering effect can be improved, and the uniformity of the soldering can be improved.
When the first component 31 and the second component 32 are included, in order to enable the component 30 and the substrate 10 to be soldered, the solder ball array 312 of the first component 31 faces the substrate 10, and the solder ball array 312 of the second component 32 stacked on the first component 31 faces the first component 31. When the number of the components 30 exceeds two, the components 30 and the substrate 10 are stacked in the manner described above, so that the solder ball arrays 312 for soldering are provided between the components 30 and the substrate 10, and the solder ball arrays 312 for soldering are also provided between two adjacent components 30.
In some embodiments, the method further includes dipping the soldering flux on the component 30, and the dipping of the soldering flux on the component 30 allows the soldering flux to adhere to the surface of the component 30, which is beneficial to improving the reflow soldering effect of at least two components 30, and is beneficial to forming a good soldering effect between the component 30 directly stacked on the surface of the substrate 10 and the substrate 10. In some embodiments, the method further comprises dipping the substrate 10 with a flux, thereby improving the smoothness of reflow soldering.
It should be noted that the adhesive layer 20 may be attached first and then dipped in the soldering flux; or dipping the soldering flux first and then attaching the adhesive layer 20; the processing of dipping in of scaling powder can also be carried out the components and parts 30 of directly locating the base plate 10 surface to the folding, carries out the attached processing on adhesive layer 20 to other components and parts 30 after that, carries out the processing of dipping in of scaling powder etc. to the components and parts 30 that paste adhesive layer 20 again, in the packaging process, can adjust according to actual conditions.
Step S02, performing reflow soldering processing on the substrate 10 and all the components 30, so as to solder two adjacent components 30, solder the substrate 10 and the component 30 connected to the substrate 10, and glue the glue material layer 20 to at least two adjacent components 30.
Specifically, through the reflow soldering process, one of the components 30 is soldered to the substrate 10, and the other components 30 are soldered to the adjacent components 30 respectively, the glue layer 20 annularly arranged around the periphery of the solder ball array 312 is heated and melted to extend and adhere to the two adjacent components 30 in the reflow soldering process, and penetrates into a gap formed in the solder ball array 312 during the soldering process, when the solder ball array is cooled to room temperature, the melted glue layer 20 forms a first glue layer 42 connected between the two adjacent components 30, and meanwhile, the first glue layer 42 is filled in the gap formed during the soldering process, so that the stress existing between the two adjacent components 30 can be effectively reduced, the stress protection for the components 30 far away from one side of the substrate 10 is formed, and the reliability of the stacked package structure 40 is improved.
In some embodiments, if the adhesive layer 20 is not annularly disposed on the periphery of the solder ball array 312 of the component 30 directly connected to the substrate 10, the method further includes a step of performing a dispensing process on the substrate 10 and the component 30 directly connected to the substrate 10, after the dispensing process, a second adhesive layer 43 is obtained, the second adhesive layer 43 is connected between the substrate 10 and the component 30 directly facing the substrate 10, and the second adhesive layer 43 is filled in a gap where the substrate 10 and the component 30 are soldered, so as to reduce stress existing in soldering between the component 30 and the substrate 10 and strengthen reliability of connection between the component 30 and the substrate 10. If the periphery of the solder ball array 312 of the component 30 directly connected to the substrate 10 is provided with the adhesive layer 20, the dispensing process can be omitted.
Through the above packaging method, a package on package structure 40 is obtained, as shown in fig. 5 to 7.
Referring to fig. 5 to 7, a package on package structure 40 according to an embodiment of the invention includes a substrate 10, a device component 41, a first adhesive layer 42, and a second adhesive layer 43; wherein, the device assembly 41 is laminated on the surface of the substrate 10; the device assembly 41 comprises at least two components 30, all the components 30 are sequentially welded in a stacking mode, and one component 30 is welded with the substrate 10 in a stacking mode; the first adhesive layer 42 is adhered to two adjacent components 30; the second adhesive layer 43 is adhered to the device assembly 41 and the substrate 10.
In some embodiments, the first adhesive layer 42 is filled in the gaps formed by welding the two adjacent components 30; the second adhesive layer 43 is filled in the gap formed by the device assembly 41 and the substrate 10. The device assembly 41 and the substrate 10 have good connection reliability, the upper layer component 30 and the lower layer component 30 in the device assembly 41 have good welding reliability and bonding reliability, and good stress protection can be effectively formed on the upper layer component 30, so that the stacked packaging structure 40 has good reliability and product yield when being assembled into a mobile terminal device together with other parts, and the device assembly 41 and the substrate 10 have good connection reliability, and the upper layer component 30 and the lower layer component 30 in the device assembly 41 also have good connection reliability, so that stress or peeling is not easily generated between the component 30 far away from one side of the substrate 10 and the component 30 close to one side of the substrate 10 even when bumping, vibrating or even colliding and falling, thereby effectively improving the product quality of the mobile terminal device, effectively improving the product yield, and effectively reducing the product return rate.
In some embodiments, the substrate 10 of the stacked package structure 40 includes a printed circuit board having a thickness that includes any thickness within a range of 0.5mm to 0.7 mm; and device assembly 41 includes a main processor chip and a memory chip; the first adhesive layer 42 is thermoplastic adhesive, the main processor chip is welded with the printed circuit board, the memory chip is welded with the main processor chip, wherein the second adhesive layer 43 is connected between the printed circuit board and the main processor chip and filled in the welding gap between the printed circuit board and the main processor chip; the first adhesive layer 42 is connected between the main processor chip and the memory chip and filled between the main processor chip and the memory chip.
In order to better explain the technical scheme of the embodiment of the invention, the following further explains the technical scheme by a plurality of embodiments.
Example 1
Referring to fig. 1 to 4, fig. 5 and fig. 6, a packaging method of a package on package structure 40 includes the following steps:
(1) Providing a PCB board (i.e. the substrate 10) with a thickness of 0.55mm, a thermoplastic glue, a first component 31 (i.e. the main processor chip) and a second component 32 (i.e. the memory chip).
(2) The first component 31 is sucked by the vacuum suction nozzle and placed on the soldering flux groove, so that the soldering flux is dipped on the first component 31, the surface of the solder ball array 312 of the first component 31 is dipped with the soldering flux, and then the first component 31 is stacked on the surface of the PCB.
(3) Sucking the second component 32 by using a vacuum suction nozzle, transferring the second component 32 to a soldering flux groove, dipping soldering flux on the second component 32 to dip soldering flux on the surface of a solder ball array 312 of the second component 32, then placing a baffle plate on the surface of the soldering flux groove opposite to the second component 32 to press the second component 32 against the notch of the soldering flux groove, placing a thermoplastic adhesive material on a supporting member (not shown) and pushing the supporting member to make the supporting member attach the thermoplastic adhesive material to the surface of the second component 32 facing the soldering flux groove to obtain an adhesive material layer 20, wherein the adhesive material layer 20 is annularly arranged on the periphery of the solder ball array 312, then removing the baffle plate and the supporting member, transferring the second component 32 to the surface of the first component 31 by using the vacuum suction nozzle and overlapping the surface of the first component 31, and the solder ball array 312 of the second component 32 and the first component 31 are annularly arranged on the periphery of the solder ball array 312 opposite to the adhesive material layer 20;
(4) Reflow soldering is carried out on the stacked PCB, the first component 31 and the second component 32, so that the first component 31 is soldered with the PCB, the second component 32 is soldered with the first component 31, the glue material layer 20 annularly arranged on the periphery of the solder ball array 312 is connected between the first component 31 and the second component 32 in a melting mode, and the glue material layer extends into gaps existing in the soldering process of the first component 31 and the second component 32;
(5) And dispensing the first component 31 and the PCB to obtain the stacked package structure 40.
Example 2
Referring to fig. 1 to 4, fig. 5 and fig. 6, a packaging method of a package on package structure 40 includes the following steps:
(1) Providing a PCB board (i.e. the substrate 10) with a thickness of 0.7mm, a thermoplastic glue, a main processor chip (i.e. the first component 31) and a memory chip (i.e. the second component 32).
(2) And the main processor chip is sucked by adopting a vacuum suction nozzle and is placed on the scaling powder groove, so that the scaling powder is dipped on the main processor chip, and the surface of the welding ball array 312 of the main processor chip is dipped with the scaling powder.
(3) And attaching thermoplastic adhesive to the surface of the main processor chip opposite to the PCB, extruding to form the adhesive layer 20, and when the storage chip is stacked on the surface of the main processor chip, the adhesive layer 20 is disposed around the periphery of the solder ball array 312 of the storage chip, and then stacking the main processor chip on the surface of the PCB.
(4) The storage chip is transferred to the soldering flux groove after being sucked by the vacuum suction nozzle, the soldering flux is dipped on the storage chip, so that the surface of the solder ball array 312 of the storage chip is dipped with the soldering flux, the storage chip is transferred to the surface of the main processor chip by the vacuum suction nozzle, and the storage chip and the main processor chip are stacked and stacked, the solder ball array 312 of the storage chip is right opposite to the main processor chip, and the adhesive layer 20 on the surface of the main processor chip is annularly arranged on the periphery of the solder ball array 312.
(5) And carrying out reflow soldering treatment on the PCB, the main processor chip and the memory chip which are stacked, so that the PCB and the main processor chip are welded together, meanwhile, the memory chip and the main processor chip are welded together, and the glue material layer 20 is connected between the main processor chip and the memory chip in a melting way and extends into a gap formed by welding the main processor chip and the memory chip.
(6) And dispensing the main processor chip and the PCB to obtain the stacked packaging structure 40.
Example 3
Referring to fig. 1 to 4, fig. 5 and fig. 6, a packaging method of a package on package structure 40 includes the following steps:
(1) Providing a PCB board (i.e. the substrate 10) with a thickness of 0.5mm, a thermoplastic glue, a main processor chip (i.e. the first component 31) and a memory chip (i.e. the second component 32).
(2) The main processor chip is sucked by the vacuum suction nozzle and placed on the scaling powder groove, scaling powder is dipped on the main processor chip, the surface of the welding ball array 312 of the main processor chip is dipped with the scaling powder, then a baffle is placed on the surface of the scaling powder groove opposite to the main processor chip, the main processor chip is pressed against the notch of the scaling powder groove, thermoplastic glue is placed on the bearing piece, the bearing piece is pushed, the thermoplastic glue is attached to the surface of the main processor chip, facing the scaling powder groove, the glue material layer 20 annularly arranged on the periphery of the welding ball array 312 is obtained, then the baffle and the bearing piece are removed, and the storage chip is transferred and stacked on the surface of the PCB by the vacuum suction nozzle.
(3) Adopt vacuum nozzle to absorb and shift to on the scaling powder groove behind the memory chip, carry out dipping in of scaling powder to the memory chip and get, make the solder ball array 312 surface of memory chip dip in and help the welding flux, place the baffle on the surface in the scaling powder groove that the memory chip is back to afterwards, support the memory chip and press in the scaling powder groove notch, place the thermoplastic adhesive on bearing piece, and promote bearing piece, make bearing piece attach the thermoplastic adhesive on the surface in memory chip orientation scaling powder groove, obtain the gluey material layer 20 of ring setting in solder ball array 312 periphery, remove baffle and bearing piece afterwards, reuse vacuum nozzle shifts the memory chip to main processor chip surface, and pile up the surface of piling up the sign indicating number in main processor chip.
(4) Performing reflow soldering treatment on the PCB, the main processor chip and the memory chip which are stacked, so that the PCB and the main processor chip are welded together, and connecting the glue material layer 20 attached to the surface of the main processor chip between the main processor chip and the PCB in a melting way, and extending and permeating into a gap formed by welding the main processor chip and the PCB to obtain a stacked packaging structure 40; meanwhile, the memory chip and the main processor chip are welded together, and the adhesive material layer 20 attached to the surface of the memory chip is connected between the main processor chip and the memory chip in a melting way and extends into a gap formed by welding the main processor chip and the memory chip.
Example 4
Referring to fig. 1 to 4, fig. 5 and fig. 6, a packaging method of a package on package structure 40 includes the following steps:
(1) Providing a PCB board (i.e. the substrate 10) with a thickness of 0.65mm, a thermoplastic glue, a main processor chip (i.e. the first component 31) and a memory chip (i.e. the second component 32).
(2) And a vacuum suction nozzle is adopted to suck the main processor chip, and the main processor chip is placed on the soldering flux groove to dip the soldering flux on the main processor chip, so that the surface of the solder ball array 312 of the main processor chip is dipped with the soldering flux.
(3) And attaching thermoplastic adhesive to the surface of the main processor chip opposite to the PCB to obtain an adhesive layer 20, and then stacking the main processor chip on the surface of the PCB.
(4) The storage chip is sucked by the vacuum suction nozzle and then transferred to the soldering flux groove, the storage chip is dipped, so that the surface of the welding ball array 312 of the storage chip is dipped with soldering flux, then a baffle plate is placed on the surface of the soldering flux groove opposite to the storage chip, so that the storage chip is pressed against the notch of the soldering flux groove, thermoplastic adhesive is placed on the supporting piece, the supporting piece is pushed, the thermoplastic adhesive is attached to the surface of the storage chip, facing the soldering flux groove, of the storage chip by the supporting piece, a part of the adhesive layer 20 annularly arranged on the periphery of the welding ball array 312 is obtained, then the baffle plate and the supporting piece are removed, the storage chip is transferred to the surface of the main processor chip by the vacuum suction nozzle and is stacked on the surface of the main processor chip, when the welding ball array 312 of the storage chip is aligned with the main processor chip, the adhesive layer 20 on the main processor chip and the adhesive layer 20 on the storage chip are mutually surrounded and are annularly arranged on the periphery of the welding ball array 312 of the storage chip.
(5) The PCB, the main processor chip and the memory chip which are stacked in a stacked mode are subjected to reflow soldering treatment, the PCB and the main processor chip are welded together, the memory chip and the main processor chip are welded together, the adhesive layer 20 on the main processor chip and the adhesive layer 20 on the memory chip are connected between the main processor chip and the memory chip in a melting mode, and meanwhile the main processor chip and the memory chip are extended and infiltrated into gaps existing in welding.
(6) And dispensing the main processor chip and the PCB to obtain the stacked packaging structure 40.
It should be understood that the term "and/or" as used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items. It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or system. Without further limitation, an element defined by the phrases "comprising one of 8230; \8230;" 8230; "does not exclude the presence of additional like elements in a process, method, article, or system that comprises the element.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments. While the invention has been described with reference to specific embodiments, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (11)
1. A packaging method of a stack packaging structure is characterized by comprising the following steps:
stacking a substrate and at least two components to enable all the components to be in a state of being sequentially stacked along the normal direction of the substrate;
wherein each of the components comprises a device body and an array of solder balls attached to at least one surface of the device body; at least part of the components are attached with a glue layer, so that when the substrate and all the components are stacked, the glue layer is at least arranged around the periphery of the solder ball array between every two adjacent components;
it is right the base plate with all components and parts carry out reflow soldering and handle, make adjacent two components and parts welding, and make the base plate with the base plate is connected components and parts welding, simultaneously, makes glue the material layer at least with adjacent two components and parts splice.
2. The packaging method of the stack package structure according to claim 1, wherein the number of the at least two components is two, and the at least two components comprise a first component and a second component;
at least one component of the first component and the second component is attached to form the adhesive material layer;
overlapping the first component on one surface of the substrate, and enabling the solder ball array of the first component to be opposite to the substrate;
overlapping the second component on the first component, and enabling the solder ball array of the second component to be opposite to the first component;
and performing reflow soldering treatment on the substrate, the first component and the second component.
3. The packaging method of the package on package structure according to claim 2, wherein the adhesive layer is attached to the second component;
or the adhesive material layer is attached to the surface of the first component, which is opposite to the substrate;
or, part of the adhesive material layer is attached to the surface of the first component opposite to the substrate, and the rest of the adhesive material layer is attached to the second component.
4. The packaging method of the package on package structure according to claim 3, wherein an orthographic projection of the first component on the substrate and an orthographic projection of the second component on the substrate coincide;
alternatively, the orthographic projection of the second component on the substrate falls within the orthographic projection area of the first component on the substrate.
5. The packaging method of the package on package structure according to claim 4, wherein the first component comprises a main processor chip; the second component includes a memory chip.
6. The packaging method of the stack package structure according to any one of claims 1 to 5, wherein the thickness of the adhesive layer is equal to or less than the height of the solder ball array;
and/or the material of the adhesive material layer comprises thermoplastic adhesive.
7. The package on package structure packaging method of claim 1 to 5, wherein the substrate comprises a printed circuit board;
and/or the thickness of the substrate is between 0.5mm and 0.7 mm.
8. The package on package structure packaging method of any one of claims 1 to 5, further comprising dipping at least a part of the components in flux;
and/or the step of dispensing the substrate and the component directly connected with the substrate is further included.
9. A package on package structure, comprising:
the device assembly comprises at least two components, and all the components are sequentially welded in a stacking mode;
the substrate and the device group are arranged in a stacked mode, and one of the devices is welded with the substrate in a stacked mode;
the first adhesive layer is adhered to the two adjacent components;
the second adhesive layer is adhered to the device assembly and the substrate;
the package on package structure is packaged according to the packaging method of the package on package structure of any one of claims 1 to 8.
10. The package on package structure of claim 9, wherein the first adhesive layer further fills a gap formed by welding two adjacent components;
and/or the second adhesive layer is also filled in a gap formed by welding the device assembly and the substrate.
11. A mobile terminal device, characterized in that it comprises a stacked package structure according to any of claims 9 to 10.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111084049.6A CN115810620A (en) | 2021-09-14 | 2021-09-14 | Stack packaging structure, packaging method thereof and mobile terminal equipment |
| PCT/CN2022/106713 WO2023040454A1 (en) | 2021-09-14 | 2022-07-20 | Package-on-package structure and packaging method therefor, and mobile terminal device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111084049.6A CN115810620A (en) | 2021-09-14 | 2021-09-14 | Stack packaging structure, packaging method thereof and mobile terminal equipment |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN115810620A true CN115810620A (en) | 2023-03-17 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202111084049.6A Pending CN115810620A (en) | 2021-09-14 | 2021-09-14 | Stack packaging structure, packaging method thereof and mobile terminal equipment |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN115810620A (en) |
| WO (1) | WO2023040454A1 (en) |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090014856A1 (en) * | 2007-07-10 | 2009-01-15 | International Business Machine Corporation | Microbump seal |
| US8710654B2 (en) * | 2011-05-26 | 2014-04-29 | Kabushiki Kaisha Toshiba | Semiconductor device and manufacturing method thereof |
| JP6189181B2 (en) * | 2013-11-06 | 2017-08-30 | 東芝メモリ株式会社 | Manufacturing method of semiconductor device |
| JP6479577B2 (en) * | 2015-05-29 | 2019-03-06 | 東芝メモリ株式会社 | Semiconductor device |
-
2021
- 2021-09-14 CN CN202111084049.6A patent/CN115810620A/en active Pending
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- 2022-07-20 WO PCT/CN2022/106713 patent/WO2023040454A1/en not_active Ceased
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| Publication number | Publication date |
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| WO2023040454A1 (en) | 2023-03-23 |
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