CN1157705C - Driving method of plasma display panel and circuit thereof - Google Patents

Abstract

A driving method of a plasma display panel. First, in the addressing period, a scan pulse is input to the scan electrode, and a data pulse is selectively input to the data electrode. Then, in the sustain discharge period, first and second sustain discharge pulses having different phases are respectively applied to the first and second sustain electrodes. And applying a third discharge pulse to the scan electrode to maintain the image data. And the first and second sustain electrodes generate first and second discharge currents, respectively. The invention can increase the operable range of the plasma display panel and reduce the interference of electromagnetic radiation.

Description

Driving method and circuit of plasma display panel

The present invention relates to a driving method and circuit of a plasma display panel, and in particular to a driving method and a circuit for reducing the voltage sag of a sustain electrode of a plasma display panel.

Please refer to FIG. 1 , which shows a cross-sectional view of the structure of a conventional AC plasma display panel. There are multiple pairs of elongated sustain electrodes X and scan electrodes Y disposed on the inner surface of the front glass substrate 102 in an alternate manner and parallel to each other. The sustain electrode X and the scan electrode Y each include a transparent electrode 106 and an auxiliary electrode 108 , and the auxiliary electrode 108 is used to increase the conductivity of the transparent electrode 106 . The transparent electrode 106 and the auxiliary electrode 108 are covered with an insulating layer (dielectric layer) 110 , the insulating layer 110 is used to generate wall charges, and the insulating layer 110 is covered with a protective layer 112 .

Data electrodes 114 (address electrodes) perpendicular to the sustain electrodes X and the scan electrodes Y are formed on the inner surface of the lower glass substrate 104 . The data electrode 114 is covered by a phosphor layer 116 and a rib (not shown in the figure). The partition wall is perpendicular to the sustain electrode X, and the discharge space 118 is defined between the passivation layer 112 and the fluorescent layer 116, and the discharge space 118 is filled with a discharge gas, such as an inert gas.

Please refer to FIG. 2 , which is a schematic diagram of a YXYX type electrode arrangement of the conventional plasma display panel of FIG. 1 . In FIG. 2, the sustain electrode X and the scan electrode Y are arranged in a staggered manner, that is, the scan electrode Y (1), the sustain electrode X (1), the scan electrode Y (2) and the sustain electrode X (2). ) in order. The data electrodes A( 1 ), A( 2 ), A( 3 ) and A( 4 ) are arranged in a manner to be perpendicular to the sustain electrode X and the scan electrode Y. As shown in FIG. Where the sustain electrode X and the scan electrode Y intersect with the data electrode A, a discharge element (discharge element) E1 that can be selectively turned on and off is defined.

Please refer to FIG. 3 , which is a schematic diagram of a YXXY electrode arrangement of the conventional plasma display panel of FIG. 1 . In FIG. 3, the sustain electrode X and the scan electrode Y are arranged in the order of YXXY, that is, the scan electrode Y (1), the sustain electrode X (1), the sustain electrode X (2) and the scan electrode Y (2) arranged in order. The data electrodes A( 1 ), A( 2 ), A( 3 ), and A( 4 ) are arranged in a manner to be perpendicular to the sustain electrodes X and the scan electrodes Y. FIG. Where the sustain electrode X and the scan electrode Y intersect with the data electrode A, a discharge cell E2 that can be selectively turned on and off is defined.

Please refer to FIG. 4 , which shows a conventional driving waveform diagram for driving the plasma display panel shown in FIG. 2 or FIG. 3 . For an AC plasma display, the driving waveform of each subfield includes three periods: a reset period (reset period) P1, an address period (address period) P2, and a sustain discharge period (sustain discharge period) P3. The following is an example where a plasma display includes n sustain electrodes X(1)~X(n), n scan electrodes Y(1)~Y(n) and m data electrodes A(1)~A(m) To illustrate.

In order to ensure the correctness of the data written in each pixel during addressing, during the reset period P1, an ignition pulse (priming pulse) 402 with an amplitude of about 340V is input to the sustain electrodes X(1)-X(n), and a priming pulse 402 with an amplitude of about 340V is input to the scan electrodes X(1)-X(n). Y(1)˜Y(n) input an erase pulse (erase pulse) 404, a reset pulse (reset pulse) 406, and an ignition pulse 408. The above-mentioned pulse resets the wall charges in all the discharge cells to a specific energy level, and reduces the free charges in the discharge space 118, so as to facilitate the discharge operation in the next address period P2.

In the address period P2, a scan pulse 410 of a load voltage (about -180V) is sequentially input to the scan electrodes Y( 1 )˜Y(n) respectively. And, according to the image data to be displayed, a data pulse 412 of a positive voltage (about 60V) is selectively input to the data electrodes AS(1)-A(m), so that the discharge cells to be turned on generate wall charges, The initial charge when the sustain discharge is performed as the sustain discharge period P3. The sustain electrodes X( 1 )˜X(n) are maintained at a positive voltage V1 (about 60V). When the scan electrodes Y( 1 )˜Y(n) are not input with the scan pulse 410 , they are maintained at a negative voltage V2 (about −90V). Wherein, by maintaining the sustain electrode X at a high potential, the discharge cells controlled by the data electrodes A(1)˜A(m) can be selectively turned on, and wall charges will be generated in the discharge cells to be displayed.

In the sustain discharge period P3, because the wall charges in the discharge cells have a memory effect, as long as the scan electrodes Y(1)~Y(n) and the sustain electrodes X(1)~X(n) input mutual If it is an AC voltage signal of opposite phase, the discharge cells lit up in the addressing period P2 will continuously generate gas discharge action and continuously emit ultraviolet light. After the ultraviolet light hits the fluorescent layer 116 , visible light that can be seen by the user is generated. Wherein, the AC voltage signal input to sustain electrodes X(1)-X(n) and scan electrodes Y(1)-Y(n) is between 180V and 0V, and is composed of a plurality of sustain discharge pulses 414 square wave signal.

Please refer to FIG. 5 , which is a block diagram of a conventional driving circuit for driving the plasma display panel shown in FIG. 2 or FIG. 3 . FIG. 5 is illustrated by taking n value equal to 8 as an example. The scan sustain driving circuit (Y drive circuit) 502 includes a reset/scan circuit 504 and a Y sustain circuit 506 . The reset/scan circuit 504 is used to generate a voltage value required to be provided to the scan electrode Y between the reset period P1 and the address period P2, for example, 180V, -90V or -180V. The Y sustain circuit 506 is used to generate the voltage value required to be provided to the scan electrode Y during the sustain discharge period P3, for example, 180V and 0V. Controlled by the control signal (not shown in the figure) of the scan and sustain drive circuit (Y drive circuit), the scan and sustain drive circuit (Y drive circuit) 502 is required to provide the scan electrode Y in the address period P2 and the sustain discharge period P3. The driving signal is input to the scanning control circuit (Scanning IC) 510 through the multiplexer 508 . All the scanning electrodes Y(1)˜Y(8) are electrically connected with the scanning control circuit (Scanning IC) 510. The scanning control circuit (Scanning IC) 510 outputs the driving signals to the scanning electrodes Y(1)~Y(8), that is, in the addressing period P2, the scanning control circuit (ScanningIC) 510 sequentially scans The pulse 410 is input to the scan electrodes Y(1)-Y(8), and in the sustain discharge period P3, the scan control circuit (Scanning IC) 510 simultaneously applies multiple pulses to the scan electrodes Y(1)-Y(8). Sustain discharge pulse 414 .

On the other hand, all the sustain electrodes X are short-circuited and coupled to the X sustain circuit 512 , and the X sustain circuit 512 is used to provide the driving waveform required by the sustain electrodes X. Wherein, the X sustain circuit 512 and the Y sustain circuit 506 are respectively composed of a plurality of transistors.

Please refer to FIG. 6 , which shows a waveform diagram of the voltages of the sustain electrode X and the scan electrode Y and the current IX of the sustain electrode X in the sustain discharge period P3 of FIG. 4 . During the sustain discharge period P3, after the sustain discharge pulse 414 is applied to the sustain electrode X and the scan electrode Y, the discharge cells of the plasma display panel will undergo sustain discharge. At this time, during the sustain discharge process, a large current Ids will flow through the sustain electrode X, the scan electrode Y, the X sustain circuit 512 and the Y sustain circuit 506 . Since the X sustain circuit 512 and the Y sustain circuit 506 connected to the sustain electrode X and the scan electrode Y are composed of a plurality of transistors, the internal resistance value Rds of these transistors will cause the voltage value of the sustain electrode X and the scan electrode Y to generate Instantaneous voltage drop ΔV=Ids*Rds. The instantaneous voltage drop ΔV of the sustain electrode X and the scan electrode Y will cause the voltage waveforms of the sustain electrode X and the scan electrode Y to generate a voltage notch 602 . Among them, under normal conditions, the instantaneous voltage drop ΔV is likely to be as high as about 60V. Due to the generation of the voltage sag 602 , the waveform of the voltage on the sustain electrode X and the scan electrode Y is different from the waveform of the AC voltage signal applied to the sustain electrode X and the scan electrode Y, resulting in distortion of the sustain waveform. Also, the operable margin of the plasma display panel will be reduced. In addition, due to the instantaneous large voltage change, the voltage sag 602 will make the electromagnetic radiation interference of the plasma display panel more serious.

In US Pat. No. 6,072,449, a method for driving a plasma display panel is disclosed, which can reduce the value of the above-mentioned instantaneous voltage drop ΔV. The voltage and current waveforms of the sustain electrode X and the scan electrode Y generated by the above method are shown in FIG. 7 . The driving method disclosed in US Pat. No. 6,072,449 is as follows: firstly, the scan electrodes Y are divided into two groups, which are the first scan electrodes Y1 and the second scan electrodes Y2 . Then, sustain discharge pulses having different phases are input to the first scan electrode Y1 and the second scan electrode Y2 . In this way, the displacement current 702 and the discharge current 704 generated by the sustain electrode X and the first scan electrode Y1, and the displacement current 706 and 704 generated by the sustain electrode X and the second scan electrode Y2 The discharge current 708 occurs at different points in time. In this way, the amplitude of the discharge currents 704 and 708 generated on the sustain electrode X becomes smaller, so that the voltage depressions 710 and 712, the voltage depression 714 and the voltage depression 716 on the sustain electrode X, the scan electrode Y1 and the scan electrode Y2 The value of the instantaneous voltage drop ΔV decreases.

Although the above-mentioned driving method can reduce the size of the voltage dip of the sustain electrode X, the circuit used therein is quite complicated and costly. Please refer to FIG. 8 , which is a block diagram of a driving circuit of a plasma display for generating the waveform diagram of FIG. 7 . Because the driving waveforms input to the first scan electrode Y1 and the second scan electrode Y2 are different, different driving scan circuits must be used to input the driving waveforms to the first scan electrode Y1 and the second scan electrode Y2 respectively. In FIG. 8 , the first scan electrode Y1 is coupled to the driving scan circuit 810 , and the second scan electrode Y2 is coupled to the driving scan circuit 820 . Since the reset/scan circuit and the sustain circuit are composed of multiple transistors, they cannot be shared by different driving and scanning circuits. Therefore, different scanning control circuits (Scanning ICs) must be coupled to different scan sustaining driving circuits (Y driving circuits) in order to generate different driving waveforms. Therefore, in FIG. 8 , the scanning control circuits (Scanning IC) 810 and 820 are coupled to the scanning sustain driving circuit (Y driving circuit) 802 and 812 via multiplexers 808 and 818, respectively. Wherein, the scan sustain driving circuit (Y drive circuit) 802 includes a reset/scan circuit 804 and a Y sustain circuit 806, and the scan sustain drive circuit (Y drive circuit) 812 includes a reset/scan circuit 814 and a Y Sustain circuit 816 . The scan sustain driving circuits (Y driving circuits) 802 and 812 respectively receive the control signals C_Y1 and C_Y2 transmitted by the phase shift control circuit 822 to generate sustain discharge pulses with different phases. Furthermore, the phase shift control circuit 822 also needs to transmit the control signal C_X1 to the X sustain circuit 824 so that the sustain circuits 806 , 816 and 824 are clock-synchronized.

In view of this, the object of the present invention is to provide a driving method and a circuit thereof for reducing the voltage sag of the sustain electrode of the plasma display panel. The present invention will effectively reduce the voltage notch to increase the operating margin of the plasma display panel. More importantly, using the driving method of the present invention can significantly reduce the interference of electromagnetic radiation. Moreover, the present invention can achieve the above object only by using a simple circuit structure.

According to the object of the present invention, a method for driving a plasma display panel is proposed. The plasma display panel has a first sustain electrode, a second sustain electrode, a scan electrode and a data electrode. The scan electrodes are arranged parallel to the first sustain electrodes and the second sustain electrodes, and the data electrodes are perpendicular to the scan and sustain electrodes. The driving method of the present invention includes: first, providing an address period. In the address period, a scan pulse is input to the scan electrode, and a data pulse is selectively input to the data electrode to write an image data. Afterwards, a sustain discharge period is provided. During the sustain discharge period, the first sustain discharge pulse and the second sustain discharge pulse with different phases are applied to the first sustain electrode X1 and the second sustain electrode X2 respectively. And apply a third discharge pulse to the scan electrode to maintain the image data. And a first discharge current and a second discharge current are generated on the first sustain electrode X1 and on the second sustain electrode X2 respectively. Wherein, after the first discharge current is generated, the second discharge current is generated after a delay period, so as to reduce the instantaneous power consumption of the plasma display panel.

According to another object of the present invention, a driving circuit for a plasma display panel is provided. The plasma display panel has a first sustain electrode, a second sustain electrode, a scan electrode and a data electrode. The scan electrodes are arranged in parallel with the first sustain electrodes and the second sustain electrodes. The data electrodes are perpendicular to the scan and sustain electrodes. The driving circuit of the present invention includes: a scanning and sustaining driving circuit (Y driving circuit), a scanning control circuit (Scanning IC), a first X sustaining circuit and a second X sustaining circuit, and a phase shift control circuit. The scanning control circuit (Scanning IC) is respectively coupled to the scanning electrodes and the scanning sustain driving circuit (Y driving circuit). The first X sustain circuit is coupled to the first sustain electrode, and the second X sustain circuit is coupled to the second sustain electrode. The phase shift control circuit is respectively coupled to the first X sustain circuit and the second X sustain circuit to control the first X sustain circuit and the second X sustain circuit, so that the first X sustain circuit and the second X sustain circuit are respectively A first sustain discharge pulse and a second sustain discharge pulse with different phases are output.

The above-mentioned purpose, features and advantages of the present invention will be further described in detail below in conjunction with the accompanying drawings shown in the embodiments.

FIG. 1 shows a cross-sectional view of the structure of a conventional AC plasma display panel;

FIG. 2 is a schematic diagram of a YXYX type electrode arrangement of the conventional plasma display panel of FIG. 1;

FIG. 3 is a schematic diagram of a YXXY electrode arrangement of the conventional plasma display panel of FIG. 1;

FIG. 4 is a conventional drive waveform diagram for driving the plasma display panel in FIG. 2 or FIG. 3;

FIG. 5 is a block diagram of a driving circuit conventionally used to drive the plasma display panel of FIG. 2 or FIG. 3;

FIG. 6 is a waveform diagram of the voltage of the sustain electrode X and the scan electrode Y and the current of the sustain electrode X in the sustain discharge period P3 of FIG. 4 ;

FIG. 7 shows voltage and current waveforms of sustain electrode X and scan electrode Y generated by the driving method of the plasma display panel disclosed in US Pat. No. 6,072,449;

FIG. 8 is a block diagram of a driving circuit of a plasma display panel for generating the waveform diagram of FIG. 7;

FIG. 9 shows voltage and current waveforms of the sustain electrode X1, the sustain electrode X2, the first scan electrode Y1 and the second scan electrode Y2 according to a preferred embodiment of the present invention;

FIG. 10 is a block diagram of a driving circuit used in a plasma display panel having a YXYX electrode arrangement according to a preferred embodiment of the present invention;

FIG. 11 is a block diagram of a drive circuit used in a plasma display panel having a YXXY electrode arrangement according to a preferred embodiment of the present invention;

FIG. 12A shows a partial circuit structure diagram of the conventional X sustain circuit in FIG. 8;

FIG. 12B is a partial circuit structure diagram of the X sustain circuit in the driving circuit of FIG. 10;

What Fig. 13 depicts is the partly enlarged view of the waveform diagram in Fig. 9;

FIG. 14 shows a sustain discharge waveform diagram according to the second embodiment of the present invention;

FIG. 15 is a block diagram of the driving circuit of the plasma display panel after the first scanning electrode Y1 and the second scanning electrode Y2 are respectively coupled to different scanning control circuits (Scanning ICs).

The main spirit of the present invention is to divide the sustain electrode X into a first sustain electrode X1 and a second sustain electrode X2 . The scan electrodes Y include a first scan electrode Y1 and a second scan electrode Y2 . The first scan electrode Y1 corresponds to the first sustain electrode X1, and the second scan electrode Y2 corresponds to the second sustain electrode X2. In the sustaining discharge period P3, a first sustaining discharge pulse (discharge sustaining pulse) and a second sustaining discharge pulse with different phases are respectively applied to the first sustaining electrode X1 and the second sustaining electrode X2, and a third sustaining pulse is applied. The discharge pulse is applied to the first scan electrode Y1 and the second scan electrode Y2. So that a first discharge current (Discharge Current) and a second discharge current are generated on the first sustain electrode X1 and on the second sustain electrode X2 respectively. Wherein, after the first discharge current is generated, a lag period is further delayed before the second discharge current starts to be generated. In this way, the instantaneous power consumption of the plasma display panel will be reduced, and the voltage notches on the first sustain electrode X1, the second sustain electrode X2, the first scan electrode Y1 and the second scan electrode Y2 will be reduced.

Furthermore, in the driving method of the present invention, in the sustain discharge period P3, the first sustain discharge pulse and the second sustain discharge pulse with two different phases are applied to the first sustain electrode X1 and the second sustain electrode respectively. In X2, a third sustain discharge pulse is provided to the first scan electrode Y1 and the second scan electrode Y2.

Because the present invention divides the sustain electrodes X into the first sustain electrodes X1 and the second sustain electrodes X2, it is only necessary to divide the X sustain circuits corresponding to the sustain electrodes X into two groups. And because the complexity of the X maintenance circuit is less than the scanning maintenance driving circuit (Y driving circuit) and the scanning control circuit (Scanning IC), so the complexity of the driving circuit used in the present invention is far less than the traditional one as shown in Figure 8 Drive circuit. Therefore, the cost of the driving circuit of the present invention is also much less than that required by the conventional driving circuit of FIG. 8 .

Please refer to FIG. 9 , which shows voltage and current waveforms of the sustain electrode X1 , the sustain electrode X2 , the first scan electrode Y1 and the second scan electrode Y2 according to a preferred embodiment of the present invention. To achieve the purpose of the present invention, the sustain discharge signal IN_Y1, the sustain discharge signal IN_Y2, the sustain discharge signal IN_X1, and the sustain discharge signal IN_Y1 are input to the first scan electrode Y1, the second scan electrode Y2, the first sustain electrode X1, and the second sustain electrode X2 respectively. Discharge signal IN_X2. At this time, the voltage changes on the first scan electrode Y1, the second scan electrode Y2, the first sustain electrode X1, and the second sustain electrode X2 are as shown by the voltage signals VY1, VY2, VX1, and VX2, and the current changes are as follows Current signals IY1, IY2, IX1, and IX2 are shown.

In FIG. 9, the first sustain discharge pulse 902 and the second sustain discharge pulse 904 applied to the first sustain electrode X1 and the second sustain electrode X2 have different phases. That is, the rising edge 906 of the first sustain discharge pulse 902 and the rising edge 908 of the second sustain discharge pulse 904 are generated at different time points respectively; Before and after the falling edge 912 of the third sustain discharge pulse 910 of the second scan electrode Y2 .

When there is a voltage change between the first sustain electrode X1 and the first scan electrode Y1, first displacement currents (displacement current) 922 and 924 will be generated; and when the voltage difference between the first sustain electrode X1 and the first scan electrode Y1 is greater than one plasma When the bulk discharge threshold is reached, a first discharge current 926 will be generated. And when there is a voltage change between the second sustain electrode X2 and the second scan electrode Y2, the second displacement currents 932 and 934 will be generated; and when the voltage difference between the second sustain electrode X2 and the second scan electrode Y2 is greater than the plasma discharge threshold value, a second discharge current 936 will be generated.

Because the phases of the first sustain discharge pulse 902 and the second sustain discharge pulse 904 are different, the first discharge current 926 and the second discharge current 936 are generated at different time points. That is, after the first discharge current 926 is generated, the second discharge current 936 starts to be generated after a delay of a delay period D1. In this way, the instantaneous power consumption of the plasma display panel will be reduced, and the voltage on the first sustain electrode X1, the second sustain electrode X2, the first scan electrode Y1 and the second scan electrode Y2 will be notched (notch) 940, The 942, 946 and 948 have been reduced in size. As a result, electromagnetic radiation interference (EMI) will also be reduced.

Please refer to FIG. 10 , which shows a block diagram of a driving circuit used in a plasma display panel having a YXYX electrode arrangement according to a preferred embodiment of the present invention. The sustain electrode X includes a first sustain electrode X1 and a second sustain electrode X2, and the first sustain electrode X1 and the second sustain electrode X2 are alternately arranged. Figure 10 is that the first sustain electrode X1 includes the first sustain electrode X1(1), X1(2), X1(3), X1(4), and the second sustain electrode X2 includes the second sustain electrode X2(1), X2(2), X2(3), and X2(4) are described as examples. The first sustain electrode X1 is coupled to the first X sustain circuit 1002 , and the second sustain electrode X2 is coupled to the second X sustain circuit 1004 . The first X-sustain circuit 1002 and the second X-sustain circuit 1004 are used to provide driving waveforms required by the first sustain electrode X1 and the second sustain electrode X2 respectively. In addition, a phase shift control circuit (Phase Shift Controller) 1006 is respectively coupled to the first X sustain circuit 1002 and the second X sustain circuit 1004, in order to make the first X sustain circuit 1002 and the second X sustain circuit 1004 respectively generate a first sustain discharge pulse 902 and a second sustain discharge pulse 904 with different phases.

In addition, both the first scanning electrode Y1 and the second scanning electrode Y2 are coupled to a scanning control circuit (Scanning IC) 1008, and the scanning control circuit (Scanning IC) 1008 is coupled to a scanning sustain driving circuit (Y driving circuit) 1012 A multiplexer 1010 in. The scan sustain driving circuit (Y drive circuit) 1012 includes a reset/scan circuit 1014 and a Y sustain circuit 1016 . The reset/scan circuit 1014 is used to generate a voltage value required to be provided to the first scan electrode Y1 and the second scan electrode Y2 during the reset period P1 and the address period P2, for example, 180V, 90V or −180V. The Y sustain circuit 1016 is used to generate the voltage values required to be provided to the first scan electrode Y1 and the second scan electrode Y2 during the discharge period P3 , for example, 180V and 0V.

Controlled by the control signal (not shown in the figure) of the scan and sustain drive circuit (Y drive circuit) 1012, the scan and sustain drive circuit (Y drive circuit) 1012 can provide the first scan electrode Y1 and the second scan electrode Y2 at The different driving signals required for the address period P2 and the sustain discharge period P3 are input to the scanning control circuit (Scanning IC) 1008 sequentially or simultaneously through the multiplexer 1010 .

In the addressing period P2, the scanning control circuit (Scanning IC) 1008 sequentially outputs the driving signals to the first scanning electrodes Y1(1)-Y1(4) and the second scanning electrodes Y2(1)-Y2(4) respectively. middle. That is, the scanning control circuit (Scanning IC) 1008 sequentially inputs the scanning pulse 410 into the first scanning electrodes Y1(1)˜Y1(4) and the second scanning electrodes Y2(1)˜Y2(4). In the sustain discharge period P3, the scanning control circuit (Scanning IC) 1008 simultaneously applies a plurality of sustaining voltages to the first scan electrodes Y1(1)-Y1(4) and the second scan electrodes Y2(1)-Y2(4). Discharge pulse 910 .

Please refer to FIG. 11 , which shows a block diagram of a driving circuit used in a plasma display panel having a YXXY electrode arrangement according to a preferred embodiment of the present invention. The sustain electrodes X include a first sustain electrode X1 and a second sustain electrode X2. FIG. 11 also includes first sustain electrodes X1(1), X1(2), X1(3) and X1(4) with the first sustain electrode X1, and the second sustain electrode X2 comprises second sustain electrodes X2(1), X2(2), X2(3) and X2(4) will be described as examples. The first sustain electrode X1 and the second sustain electrode X2 are the first sustain electrodes X1(1) and X1(2), the second sustain electrodes X2(1) and X2(2), the first sustain electrodes X1(3) and X1(4) and the second sustain electrodes X2(3) and X2(4) are arranged sequentially. Similarly, the first sustain electrode is coupled to the X sustain circuit 1102, the second sustain electrode, and the second sustain electrode X2 are coupled to the X sustain circuit 1104, and the phase shift control circuit 1106 is respectively coupled to the first X sustain circuit 1002. with the second X sustain circuit 1004 .

Please refer to FIGS. 12A-12B, wherein, what FIG. 12A depicts is a partial circuit structure diagram of the conventional X sustaining circuit 824 in FIG. Partial circuit structure diagram of the sustaining circuit 1002. In FIG. 12A , the conventional sustain circuit 824 must be able to provide all the currents required by the sustain electrode X, so the conventional sustain circuit 824 must use at least four transistors Q1, Q2, Q3 and Q4 to meet the requirements. These transistors are respectively controlled by the control signals S1, S2, S3, and S4. For transistors with the same specifications, the number of the first sustaining electrodes X1 driven by the first X sustaining circuit 1002 of the present invention is only half of the number of sustaining electrodes X driven by the conventional sustaining circuit 824. Only two transistors Q1' and Q2' are needed to provide sufficient current to drive the first sustain electrode X1. Therefore, in the driving circuit shown in FIG. 10, although the present invention needs the first X sustain circuit 1002 and the second X sustain circuit 1004 at the same time, the sum of the transistor numbers of the two X sustain circuits 1002 and 1004 is the same as that of the conventional The number of transistors required for the X sustain circuit 824 is the same. Therefore, using the driving circuit of the present invention will not increase the number of transistors used to drive the sustain electrode X. The transistors Q1' and Q2' are respectively controlled by the control signals S1' and S2'.

Similarly, the total number of transistors of the X sustaining circuit 1102 and 1104 in FIG. 11 is also the same as the number of transistors required by the conventional X sustaining circuit 824 . Therefore, using the driving circuit shown in FIG. 11 will not increase the number of transistors for driving the sustain electrode X.

Please refer to FIG. 13 , which shows a partially enlarged view of the waveform diagram in FIG. 9 . Next, the sustain discharge signals IN_Y1 and IN_Y2, the sustain discharge signal IN_X1, the sustain discharge signal IN_X2, and the current signal IX1 input to the first scan electrode Y1, the second scan electrode Y2, the first sustain electrode X1 and the second sustain electrode X2 IX2, IY1, IY2 for further explanation.

Firstly, during the time period T1, the first sustain electrode X1 is caused to undergo a positive potential change, and the voltages of the second sustain electrode X2, the first scan electrode Y1, and the second scan electrode Y2 are substantially maintained at a constant value. Wherein, maintaining the voltage substantially at a constant value means that the voltage signals input to the second sustain electrode X2 , the first scan electrode Y1 and the second scan electrode Y2 are maintained at a constant value. The positive potential change is, for example, rising from a low level (0V) to a high level (180V).

Next, during the time period T2, the first scan electrode Y1 and the second scan electrode Y2 undergo a negative potential change at the same time, and the voltages of the first sustain electrode X1 and the second sustain electrode X2 are substantially maintained at a constant value. . Wherein, the negative potential change is, for example, from a high level (180V) to a low level (0V). After the time period T2, since the voltage difference between the first scan electrode Y1 and the first sustain electrode X1 becomes larger than the plasma discharge threshold, the plasma between the first scan electrode Y1 and the first sustain electrode X1 is excited. to generate the first discharge current 926 .

Then, during the time period T3, a positive potential change occurs on the second sustain electrode X2, and the voltages of the first scan electrode Y1, the second scan electrode Y2, and the first sustain electrode X1 are substantially maintained at a constant value. After the time period T3, since the voltage difference between the second scan electrode Y2 and the second sustain electrode X2 becomes large, the plasma between the second scan electrode Y2 and the second sustain electrode X2 is excited to generate a second discharge current. 936. In this way, after the first discharge current 926 on the first sustain electrode X1 is generated, the second discharge current 936 can be generated after a delay of a first delay period D1.

Generally speaking, the first discharge current 926 and the second discharge current 936 as shown in FIG. 0.5-1 μs after segment T3.

Afterwards, during the time period T4, the first sustain electrode X1 is caused to undergo a negative potential change, and the voltages of the first scan electrode Y1, the second scan electrode Y2, and the second sustain electrode X2 are substantially maintained at a constant value.

Next, during the time period T5, the first scan electrode Y1 and the second scan electrode Y2 undergo a positive potential change at the same time, and the voltages of the first sustain electrode X1 and the second sustain electrode X2 are substantially maintained at a constant value. .

Then, during the time period T6, a negative potential change occurs on the second sustain electrode X2, and the voltages of the first sustain electrode X1, the first scan electrode Y1, and the second scan electrode Y2 are substantially maintained at a constant value.

In this way, the third discharge current 928 that is opposite to the first discharge current 926 can be generated on the first sustain electrode X, and after a delay of a second delay period D2, the second discharge current can be generated on the second sustain electrode X 936 inverts a fourth discharge current 938 .

Generally speaking, the third discharge current 928 and the fourth discharge current 938 as shown in FIG. 0.5-1 μs after segment T6.

Please refer to FIG. 14 , which shows a sustain discharge waveform diagram according to the second embodiment of the present invention. In FIG. 14, within the time zones T1', T2', and T3', the voltage changes of the first sustain electrode X1, the second sustain electrode X2, the first scan electrode Y1, and the second scan electrode Y2 are the same as The time segments T1, T2 in FIG. 13 are the same as T3, and will not be repeated here. During the time period T4', a negative potential change occurs on the second sustain electrode X2, and the voltages of the first scan electrode Y1, the second scan electrode Y2, and the first sustain electrode X1 are substantially maintained at a constant value.

Next, during the time period T5', the first scan electrode Y1 and the second scan electrode Y2 undergo positive potential changes, and the voltages of the first sustain electrode X1 and the second sustain electrode X2 are substantially maintained at a constant value. .

Then, during the time period T6', a negative potential change occurs on the first sustain electrode X1, and the voltages of the second sustain electrode X2, the first scan electrode Y1, and the second scan electrode Y2 are substantially maintained at a constant value. . In this way, the third discharge current 928 that is opposite to the first discharge current 926 can be generated on the second sustain electrode X2. And after a delay of the second delay period D2 , a fourth discharge current 938 opposite to the second discharge current 936 is generated on the first sustain electrode X1 .

Although the present invention is described by taking the first scan electrode Y1 and the second scan electrode Y1 and the second scan electrode Y2 to be coupled to the scanning control circuit (Scanning IC) 1008 or 1108 at the same time as an example, the present invention is not limited thereto. Furthermore, the first scanning electrode Y1 and the second scanning electrode Y2 of the present invention can also be respectively coupled to different scanning control circuits (Scanning IC). Please refer to FIG. 15 , which shows a block diagram of the driving circuit of the plasma display panel after the first scanning electrode Y1 and the second scanning electrode Y2 are respectively coupled to different scanning control circuits (Scanning ICs). The first sustain electrode X1 is coupled to the X sustain circuit 1502 , and the second sustain electrode X2 is coupled to the X sustain circuit 1504 . The first scan electrode Y1 is coupled to the scan control circuit (Scanning IC) 1508, and the second scan electrode Y2 is coupled to the scan control circuit (Scanning IC) 1518. The scanning control circuits (Scanning IC) 1508 and 1518 are respectively coupled to the multiplexers 1510 and 1520 in the scanning sustain driving circuits (Y driving circuits) 1512 and 1522. The scan and sustain driving circuit (Y driving circuit) 1512 includes a reset/scan circuit 1514 and a Y sustain circuit 1516 , and the scan and sustain driving circuit (Y driving circuit) 1522 includes a reset/scan circuit 1524 and a Y sustain circuit 1526 . The phase shift control circuit 1506 is coupled to the X sustain circuit 1502 , the X sustain circuit 1504 , the scan sustain driver circuit (Y driver circuit) 1512 and the scan sustain driver circuit (Y driver circuit) 1522 . The scanning control circuit (Scanning IC) 1508 and the scanning control circuit (Scanning IC) 1518 will output the third sustain discharge pulse and the fourth sustain discharge pulse. Wherein, the phases of the third sustain discharge pulse and the fourth sustain discharge pulse may be the same or different.

Furthermore, according to the spirit of the present invention, the sustain electrodes X can also be divided into N groups, wherein N is greater than 2. The object of the present invention can be achieved by making the phases of the sustain discharge pulses input to the sustain electrodes X of the N groups different.

The driving method and circuit for reducing the voltage notch of the sustain electrode of the plasma display panel disclosed in the above-mentioned embodiments of the present invention can effectively make the voltage notch smaller, so as to increase the operable range of the plasma display panel , to reduce the interference of electromagnetic radiation. Moreover, the present invention can achieve the above object only by using a simple circuit structure.

In summary, although the present invention has been disclosed as above with a preferred example, it is not intended to limit the present invention, and any person of ordinary skill in the professional field, without departing from the spirit and scope of the present invention, may act as Various changes and modifications, so the protection scope of the present invention should be determined by the claims.

Claims (11)

1, a kind of driving method of plasma display panel, this plasma display panel has one first to be kept electrode, one second and keeps electrode, one scan electrode and a data electrode, this scan electrode is first to keep electrode and this second and keep electrode and be arranged in parallel with this, this data electrode is to keep the electrode quadrature with this scanning, and this driving method comprises:

One addressing period was provided, to this scan electrode input one scan pulse, and optionally this data electrode is imported a data pulse, to write an image data; And

Provide one to keep the discharge period, apply respectively and have first of out of phase and keep discharge pulse and second and keep discharge pulse and keep on the electrode and second keep on the electrode in first, and apply one the 3rd discharge pulse to this scan electrode, to keep this image data, and this first is kept on the electrode and this second is kept and produce one first discharge current and one second discharge current on the electrode respectively, wherein, after producing this first discharge current, be to postpone a retardation period, the side produces this second discharge current, to reduce the moment consumed power of this plasma display panel.

2, driving method of plasma display panel as claimed in claim 1, it is characterized in that: described scan electrode comprises one first scan electrode, one second scan electrode, this first scan electrode, this second scan electrode, this first keeps electrode and this second to keep electrode is to be arranged in parallel, this data electrode is to keep the electrode quadrature with this first scanning, and this driving method further comprises:

Apply one the 3rd discharge pulse and one the 4th discharge pulse respectively on this first scan electrode and this second scan electrode, to keep this image data.

3, driving method as claimed in claim 2, wherein to hold the phase place that discharge pulse and this fourth dimension hold discharge pulse identical for this third dimension.

4, driving method as claimed in claim 2, wherein this third dimension is held discharge pulse and this fourth dimension to hold the phase place of discharge pulse different.

5, a kind of driving method in keeping interdischarge interval of plasma display, this plasma display panel comprise that one scan electrode, one first keeps electrode, one second and keep electrode, and this driving method comprises the following steps:

In very first time section, make this first keep the potential change that electrode produces forward, and make this second voltage of keeping electrode and this scan electrode keep definite value in fact;

In the second time section, make this scan electrode produce the potential change of negative sense, and make this first keep electrode and this second voltage of keeping electrode is kept definite value in fact; And

In the 3rd time section T 3, make this second keep the potential change that electrode produces forward, and make this scan electrode and this first voltage of keeping electrode keep definite value in fact;

So, just can in this first keep on the electrode produce one first discharge current after, postponed for one first retardation period, this second keeps Fang Yu and produces one second discharge current on the electrode.

6, driving method as claimed in claim 5, this driving method also comprises the following steps:

In the 4th time section, make this first keep the potential change that electrode produces negative sense, and make this scan electrode and this second voltage of keeping electrode keep definite value in fact;

In the 5th time section, make this scan electrode produce the potential change of forward, and make this first keep electrode and this second voltage of keeping electrode is kept definite value in fact; And

In the 6th time section, make this second keep the potential change that electrode produces negative sense, and make this first voltage of keeping electrode and this scan electrode keep definite value in fact;

So, just can make this first keep on the electrode and to produce and one the 3rd anti-phase discharge current of this first discharge current, and in postponing one second retardation after the period, second keep on the electrode and produce and one the 4th anti-phase discharge current of this second discharge current in this.

7, driving method as claimed in claim 5, this driving method also comprises the following steps:

In the 4th time section, make this second keep the potential change that electrode produces negative sense, and make this scan electrode and this first voltage of keeping electrode keep definite value in fact;

In the 5th time section, make this scan electrode produce the potential change of forward, and make this first keep electrode and this second voltage of keeping electrode is kept definite value in fact; And

In the 6th time section, make this first keep the potential change that electrode produces negative sense, and make this second voltage of keeping electrode and this scan electrode keep definite value in fact;

So, just can make this second keep on the electrode and to produce and one the 3rd anti-phase discharge current of this first discharge current, and in postponing one second retardation after the period, first keep on the electrode and produce and one the 4th anti-phase discharge current of this second discharge current in this.

8, a kind of plasma display panel driving circuit, this plasma display panel has one first and keeps electrode, one second keeps electrode, an one scan electrode and a data electrode, this scan electrode is first to keep electrode and this second and keep electrode and be arranged in parallel with this, this data electrode is to keep the electrode quadrature with this scanning, and this driving circuit comprises:

It is the Y driving circuit that one scan is kept driving circuit;

The one scan control circuit is to be coupled to this scan electrode and this scanning respectively to keep driving circuit be the Y driving circuit;

One the one X holding circuit and one the 2nd X holding circuit, an X holding circuit are to be coupled to this first to keep electrode, and the 2nd X holding circuit is to be coupled to this second to keep electrode; And

One phase shift control circuit, be to be coupled to an X holding circuit and the 2nd X holding circuit respectively, in order to control an X holding circuit and the 2nd X holding circuit, make different one first the keeping discharge pulse and one second and keep discharge pulse of output phase respectively of an X holding circuit and the 2nd X holding circuit.

9, a kind of plasma display panel driving circuit, this plasma display panel has one first to be kept electrode, one second and keeps electrode, one first scan electrode, one second scan electrode and a data electrode, this scan electrode is first to keep electrode and this second and keep electrode and be arranged in parallel with this, this data electrode is to keep the electrode quadrature with this first scanning, and this driving circuit comprises:

It is the Y driving circuit and one second scan that to keep driving circuit be the Y driving circuit that driving circuit is kept in one first scanning;

One first scan control circuit and one second scan control circuit, the firstth scan control circuit is to be coupled to this first scan electrode and this first scanning respectively to keep driving circuit be the Y driving circuit, and this second scanning to keep driving circuit be to be coupled to this second scan electrode respectively second to scan that to keep driving circuit be the Y driving circuit with this;

One the one X holding circuit and one the 2nd X holding circuit, an X holding circuit are to be coupled to this first to keep electrode, and the 2nd X holding circuit is to be coupled to this second to keep electrode; And

One phase shift control circuit, be to be coupled to an X holding circuit and the 2nd X holding circuit respectively, in order to control an X holding circuit and the 2nd X holding circuit, make different one first the keeping discharge pulse and one second and keep discharge pulse of output phase respectively of an X holding circuit and the 2nd X holding circuit.

10, driving circuit as claimed in claim 9, wherein, this phase shift control circuit also is coupled to this first scanning to keep driving circuit is the Y driving circuit with this and second scans that to keep driving circuit be the Y driving circuit, makes this first scan control circuit third dimension different with this second scan control circuit output phase hold discharge pulse and a fourth dimension is held discharge pulse.

11, driving circuit as claimed in claim 9, wherein, this phase shift control circuit also is coupled to this first scanning to keep driving circuit is the Y driving circuit with this and second scans that to keep driving circuit be the Y driving circuit, makes this first scan control circuit third dimension identical with this second scan control circuit output phase hold discharge pulse and a fourth dimension is held discharge pulse.

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