Detailed Description
Embodiments of the present application will be described below with reference to the accompanying drawings. In the drawings, like reference numerals designate identical or similar elements or process flows.
FIG. 1 is a simplified functional block diagram of a display system 100 according to an embodiment of the present application. The display system 100 includes a display panel control chip 110, a display panel 120, a Universal Serial Bus (USB) interface circuit 130, and a USB hub 140. The display panel control chip 110 is coupled to the USB interface circuit 130 through the USB hub 140, and the display panel control chip 110 is also coupled to the display panel 120.
The display panel control chip 110 includes a processor 112 and a signal processing circuit 114 coupled to each other. When the display system 100 receives the video signals VSa and VSb of the computing devices 101a and 101b, the processor 112 generates the video output VO according to the content of the video signals VSa and VSb. The processor 114 controls the display panel 120 to simultaneously display a plurality of images corresponding to the contents of the video signals VSa and VSb by the video output VO. For example, as shown in fig. 2A described below, the processor 114 may control the display panel 120 to simultaneously display juxtaposed (Picture by Picture) images 210 and 220 corresponding to video signals VSa and VSb, respectively. As another example, as shown in fig. 3A described below, the processor 114 may control the display panel 120 to simultaneously display the primary (Picture in Picture) images 310 and 320 corresponding to the video signals VSa and VSb, respectively.
In some embodiments, the display panel control chip 110 may be implemented with a scaling control chip (Scaler IC). Accordingly, in the process of the processor 112 generating the video output VO according to the contents of the video signals VSa and VSb, operations for performing resolution adjustment on the contents of the video signals VSa and VSb are included.
In practice, the processor 112 may encapsulate the packet of a certain frame in the video signal VSa and the packet of a certain frame in the video signal VSb together into a packet of a certain frame of the video output VO, and then transmit the packet of the video output VO to the display panel 120. In this way, the display panel 120 can simultaneously display a plurality of images corresponding to the video signals VSa and VSb in a frame of picture. In other embodiments, computing devices 101a and 101b may be implemented by a desktop computer, a notebook computer, or a game console.
Referring to fig. 1 again, when the display system 100 is coupled to the cursor control device 103a, the signal processing circuit 114 receives the cursor control signal CSa of the cursor control device 103a through the USB interface circuit 130 and the USB hub 140. In some embodiments, cursor control device 103a may be implemented by a mouse, a trackball, or a joystick. The package of the cursor control signal CSa may include key click information and cursor movement information. In some embodiments, the signal processing circuit 114 can calculate the current coordinates of the cursor CRa according to the cursor movement information, and inform the processor 112 to display the cursor CRa on the appropriate position of the display panel 120 through the video output VO. In some embodiments, the signal processing circuit 114 may be implemented by a USB Host (USB Host).
In addition, the signal processing circuit 114 transmits the cursor control signal CSa to one of the computing devices 101a and 101b according to the current coordinates of the cursor CRa, which will be described in detail in the following paragraphs. In some embodiments, the signal processing circuit 114 is further coupled to the user input device 105a through the USB interface circuit 130 and the USB hub 140. The user input signal INa of the user input device 105a is transmitted to the same target along with the cursor control signal CSa. In some embodiments, the user input device 105a may be implemented by a keyboard. It is noted that neither the cursor control signal CSa nor the user input signal INa is transmitted to the computing device 101a or the computing device 101b before being transmitted to the signal processing circuit 114.
The operation of the display panel control chip 110 to switch signal transmission paths will be further described with reference to fig. 2A and 2B. Fig. 2A is a schematic diagram illustrating the cursor CRa moving in the frame of the display panel 120. As shown in fig. 2A, the display panel 120 displays side-by-side images 210 and 220 corresponding to video signals VSa and VSb, respectively, according to the video output VO, wherein the images 210 and 220 are adjacent to a boundary BLa. It should be noted that the boundary BLa is not necessarily a line actually displayed on the display panel 120, and the boundary BLa is an edge for representing that the images 210 and 220 are joined to each other.
In the present embodiment, the display panel 120 includes an edge 122 extending along the first direction D1. The coordinates Xa of the boundary BLa in the first direction D1 extend perpendicular to the first direction D1 (hereinafter, the boundary BLa has the coordinates Xa in the first direction D1). The signal processing circuit 114 stores the coordinates Xa, wherein the coordinates Xa may be stored in the signal processing circuit 114 in advance when the display system 100 leaves the factory, or the processor 112 may transmit the coordinates Xa to the signal processing circuit 114 after the processor 112 determines the area ratio of the images 210 and 220.
The signal processing circuit 114 determines whether the cursor CRa is located in the image 210 or 220 according to the cursor control signal CSa and the coordinates Xa to generate a determination result. The signal processing circuit 114 transmits the cursor control signal CSa and/or the user input signal INa to a corresponding one of the computing devices 101a and 101b according to the determination result.
For example, at a certain point in time, the signal processing circuit 114 calculates that the cursor CRa has the coordinate Xb in the first direction D1 according to the cursor control signal CSa. The signal processing circuit 114 further determines that the cursor CRa is located on the image 210 according to the difference (e.g., relative magnitude relation) between the coordinates Xa and Xb. Since the image 210 is generated based on the video signal VSa, the signal processing circuit 114 transmits the cursor control signal CSa and/or the user input signal INa to the signal source of the video signal VSa, i.e. the computing device 101a. In this way, the user can control the computing device 101a through the cursor control device 103a and/or the user input device 105 a.
At another time point, the signal processing circuit 114 calculates that the cursor CRa is moved to another position according to the cursor control signal CSa and has the coordinate Xc in the first direction D1. The signal processing circuit 114 further determines that the cursor CRa is located on the image 220 according to the difference (e.g., relative magnitude relation) between the coordinates Xa and Xc. At this time, the signal processing circuit 114 transmits the cursor control signal CSa and/or the user input signal INa to the signal source of the video signal VSb, i.e. the computing device 101b, so that the user can control the computing device 101b through the cursor control device 103a and/or the user input device 105 a.
Fig. 2B is used to illustrate the operation of the processor 112 to change the area ratio of the images 210 and 220. In this embodiment, the processor 112 may change the area ratio of the images 210 and 220 (e.g., from 1:1 in FIG. 2A to 1:3 in FIG. 2B), and the coordinates of the boundary BLa in the first direction D1 may change accordingly. In some embodiments, the processor 112 is configured to receive a command from a button (not shown) on the display system 100 to adjust the area ratio of the images 210 and 220, but the application is not limited thereto. When the processor 112 changes the area ratio of the images 210 and 220, the processor 112 notifies the signal processing circuit 114 to update the coordinates of the stored boundary BLa in the first direction D1. At this time, the signal processing circuit 114 can determine whether to switch the transmission path of the cursor control signal CSa and/or the user input signal INa according to the position of the cursor CRa.
For example, as shown in fig. 2B, when the boundary BLa is changed from having the coordinate Xa to having the coordinate Xd in the first direction D1, the processor 112 notifies the signal processing circuit 114 to update the stored coordinate of the boundary BLa (i.e. to update the coordinate Xa to the coordinate Xd).
As can be seen from fig. 2B, cursor CRa has a coordinate Xb in the first direction D1 and is located at image 210 before the area ratio of images 210 and 220 changes. Therefore, the signal processing circuit 114 transmits the cursor control signal CSa and/or the user input signal INa to the computing device 101a.
After the area ratio of the images 210 and 220 is changed, the signal processing circuit 114 can determine that the cursor CRa is currently located in the image 220 by comparing the difference between the coordinates Xd and Xb, although the position of the cursor CRa is not changed. Therefore, the signal processing circuit 114 switches the cursor control signal CSa and/or the user input signal INa to be transmitted to the computing device 101b.
Another operation of the display panel control chip 110 to switch signal transmission paths will be further described with reference to fig. 3A and 3B. Fig. 3A is a schematic diagram illustrating the cursor CRa moving in the frame of the display panel 120. As shown in fig. 3A, the display panel 120 displays primary and secondary images 310 and 320 corresponding to video signals VSa and VSb, respectively, according to the video output VO, wherein the images 310 and 320 are adjacent to a boundary BLb. It should be noted that the boundary BLb is not necessarily a line actually displayed on the display panel 120, and the boundary BLb is an edge for representing that the images 310 and 320 are joined to each other.
In the present embodiment, the display panel 120 includes an edge 124 extending along the first direction D1, and includes an edge 126 extending along the second direction D2. The coordinates Xe of the boundary BLb in the first direction D1 extend perpendicular to the first direction D1, and the coordinates Ya in the second direction D2 extend perpendicular to the second direction D2 (hereinafter, the boundary BLb has the coordinates Xe and Ya in the first direction D1 and the second direction D2, respectively). The signal processing circuit 114 stores coordinates Xe and Ya of the boundary BLb, wherein the coordinates Xe and Ya may be stored in the signal processing circuit 114 in advance when the display system 100 is shipped, or the processor 112 may transmit the coordinates Xe and Ya to the signal processing circuit 114 after the processor 112 determines the area ratio of the images 310 and 320.
The signal processing circuit 114 determines whether the cursor CRa is located on the image 310 or 320 according to the cursor control signal CSa, the coordinates Xe and the coordinates Ya to generate a determination result. The signal processing circuit 114 transmits the cursor control signal CSa to a corresponding one of the computing devices 101a and 101b according to the determination result.
For example, at a certain point in time, the signal processing circuit 114 calculates that the cursor CRa has the coordinate Xf in the first direction D1 and the coordinate Yb in the second direction D2 according to the cursor control signal CSa. The signal processing circuit 114 further determines that the cursor CRa is located on the image 310 based on the difference between the coordinates Xe and Xf and the difference between the coordinates Ya and Yb (e.g., the relative magnitude relation). Because the image 310 is generated based on the video signal VSa, the signal processing circuit 114 transmits the cursor control signal CSa and/or the user input signal INa to the computing device 101a. In this way, the user can control the computing device 101a through the cursor control device 103a and/or the user input device 105 a.
At another time point, the signal processing circuit 114 calculates that the cursor CRa is moved to another position according to the cursor control signal CSa, and has the coordinate Xg in the first direction D1 and the coordinate Yc in the second direction D2. The signal processing circuit 114 further determines that the cursor CRa is located on the image 320 according to the difference between the coordinates Xe and Xg and the difference between the coordinates Ya and Yc (e.g., the relative magnitude relation). At this time, the signal processing circuit 114 transmits the cursor control signal CSa and/or the user input signal INa to the computing device 101b, so that the user controls the computing device 101b through the cursor control device 103a and/or the user input device 105 a.
Fig. 3B is used to illustrate the operation of processor 112 to change the area ratio of images 310 and 320. When the processor 112 changes the area ratio of the images 310 and 320, the coordinates of the boundary BLb in the first direction D1 and the second direction D2 are changed. When the processor 112 changes the area ratio of the images 310 and 320, the processor 112 notifies the signal processing circuit 114 to update the coordinates of the boundary BLb stored therein. At this time, the signal processing circuit 114 can determine whether to switch the transmission path of the cursor control signal CSa and/or the user input signal INa according to the position of the cursor CRa.
For example, as shown in fig. 3B, when the boundary BLb is changed from having the coordinate Xe to having the coordinate Xh in the first direction D1 and from having the coordinate Ya to having the coordinate Yd in the second direction D2, the processor 112 notifies the signal processing circuit 114 to update the stored coordinates Xe and Ya thereof to the coordinates Xh and Yd, respectively.
As can be seen in FIG. 3B, cursor CRa has coordinates Xf and Yb and is located at image 310 before the area ratio of images 310 and 320 changes. Therefore, the signal processing circuit 114 transmits the cursor control signal CSa and/or the user input signal INa to the computing device 101a. After the area ratio of the images 310 and 320 is changed, the signal processing circuit 114 can determine that the cursor CRa is currently located in the image 320 by comparing the difference between the coordinates Xf and Xh and the difference between the coordinates Yd and Yb, although the position of the cursor CRa is not changed. Therefore, the signal processing circuit 114 switches the cursor control signal CSa and/or the user input signal INa to be transmitted to the computing device 101b.
As can be seen from the above, the display system 100 allows a user to perform one-to-many control via a set of input devices, which is helpful for improving the space utilization of the desktop. Also, when the area ratio of the images is changed, the display system 100 can automatically update the judgment conditions for switching the control object without relying on the assistance of the control object (e.g., the computing devices 101a and 101 b), and thus does not occupy the computing resources of the control object.
FIG. 4 is a simplified functional block diagram of a display system 400 according to an embodiment of the application. The display system 400 is similar to the display system 100, except that the display system 400 has a plurality of USB interface circuits 130 and a plurality of USB hubs 140. For brevity, fig. 4 only shows the combination of two sets of USB interface circuits 130 and USB hubs 140, but the application is not limited thereto.
In this embodiment, the display system 400 can be coupled to the cursor control devices 103a and 103b via the plurality of USB interface circuits 130 and the plurality of USB hubs 140 to receive the cursor control signals CSa and CSb from the cursor control devices 103a and 103b, respectively. The signal processing circuit 114 can calculate the current coordinates of the cursors CRa and CRb according to the cursor control signals CSa and CSb, respectively, and inform the processor 112 to display the cursors CRa and CRb at the appropriate positions on the display panel 120 through the video output VO.
In addition, the signal processing circuit 114 transmits the cursor control signal CSa to one of the computing devices 101a and 101b according to the current coordinates of the cursor CRa. Similarly, the cursor control signal CSb is also transmitted to a corresponding one of the computing devices 101a and 101b due to the current coordinates of the cursor CRb, as will be described in detail in the following paragraphs. In some embodiments, the signal processing circuit 114 is further coupled to the user input devices 105a and 105b through the USB interface circuit 130. The user input signal INa of the user input device 105a is transmitted to the same target as the cursor control signal CSa, and the user input signal INb of the user input device 105b is transmitted to the same target as the cursor control signal CSb.
The operation of the display panel control chip 410 to switch signal transmission paths will be further described with reference to fig. 5. Fig. 5 is a schematic diagram illustrating the cursor CRb moving in the frame of the display panel 120. As shown in fig. 5, the display panel 120 displays side-by-side images 510 and 520 corresponding to video signals VSa and VSb, respectively, according to the video output VO, wherein the images 510 and 520 are adjacent to the boundary BLa.
At a certain point in time, the signal processing circuit 114 determines that the cursor CRa is located in the image 510 according to the cursor control signal CSa (i.e. the coordinates of the cursor CRa in the first direction D1) and the coordinates of the boundary BLa in the first direction D1. The signal processing circuit 114 also determines that the cursor CRb is located in the image 520 according to the cursor control signal CSb (i.e. the coordinates of the cursor CRb in the first direction D1) and the coordinates of the boundary BLa in the first direction D1. Therefore, the signal processing circuit 114 transmits the cursor control signal CSa and/or the user input signal INa to the computing device 101a, and transmits the cursor control signal CSb and/or the user input signal INb to the computing device 101b.
At another time point, the signal processing circuit 114 further determines that the cursor CRb moves from the image 520 to the image 510 according to the cursor control signal CSb (i.e. the coordinates of the cursor CRb in the first direction D1) and the coordinates of the boundary BLa in the first direction D1. At this time, the signal processing circuit 114 transmits the cursor control signal CSa and/or the user input signal INa and the cursor control signal CSb and/or the user input signal INb to the computing device 101a. In this way, different users can control the computing device 101a together through the respective input devices (such as a keyboard and a mouse) without exchanging the input devices, so that the users can assist each other quickly in the work.
In the embodiment of the display system 400 displaying the primary-secondary images, the display system 400 can also transmit the cursor control signals CSa and CSb to the same object or to different objects according to the coordinates of the boundaries of the cursor control signals CSa and CSb and the primary-secondary images in the first direction D1 and the second direction D2. The display system 400 can use the method described in fig. 3A to determine whether the signal transmission path of any one of the cursor control signals CSa and CSb needs to be switched, and for brevity, the description is not repeated here.
In some embodiments in which the display system 400 can change the area ratio of the image, the display system 400 can determine whether the signal transmission path of any one of the cursor control signals CSa and CSb needs to be switched by individually determining the positions of the cursors CRa and CRb according to the method of fig. 2B or fig. 3B, which is not repeated herein for brevity.
The remaining connection modes, elements, embodiments and advantages of the display system 100 are applicable to the display device 400, and are not repeated here for brevity.
In some embodiments in which the display panel control chip 110 has a greater number of input/output pins, the USB hub 140 of fig. 1 and 4 may be omitted.
Certain terms are used throughout the description and claims to refer to particular components. However, it will be understood by those of ordinary skill in the art that like elements may be referred to by different names. The description and claims are not intended to identify differences in names but rather to identify differences in functions of the elements. The terms "comprising" and "comprises" as used in the specification and claims are to be construed as "including but not limited to". In addition, "coupled" herein includes any direct or indirect connection. Thus, if a first element couples to a second element, that connection may be through an electrical or wireless transmission, optical transmission, etc., directly to the second element, or through other elements or connections indirectly to the second element.
As used herein, the term "and/or" includes any combination of one or more of the listed items. In addition, any singular reference is intended to encompass a plural reference unless the specification expressly states otherwise.
The foregoing is only one preferred embodiment of the present application, and all equivalent changes and modifications made in accordance with the claims of the present application shall fall within the scope of the present application.
Symbol description
100,400 Display system
101A,101b computing device
103A,103b cursor control device
105A,105b user input device
110 Display panel control chip
112 Processor
114 Signal processing circuit
120 Display panel
122,124,126: Edges
130 Universal Serial Bus (USB) interface circuit
140 USB hub
210,220,310,320,510,520 Image
BLa, BLb boundary
CSa, CSb, cursor control signals
CRa, CRb, vernier
D1 first direction
D2, second direction
INa, INb, user input signals
VSa, VSb video signal
VO video output
Xa, xb, xc, xd, xe, xf, xh, xg, ya, yb, yc, yd: coordinates