CN115116900A - Wafer bonding equipment - Google Patents
Wafer bonding equipment Download PDFInfo
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- CN115116900A CN115116900A CN202210688197.7A CN202210688197A CN115116900A CN 115116900 A CN115116900 A CN 115116900A CN 202210688197 A CN202210688197 A CN 202210688197A CN 115116900 A CN115116900 A CN 115116900A
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Abstract
本发明提供了一种晶圆键合设备，包括：第一卡盘、第二卡盘、K个真空管路、控制器、键合执行单元；其中，第一卡盘和第二卡盘分别用于承载第一待键合晶圆对中的第一晶圆、第二晶圆；第一卡盘或第二卡盘的表面具有沿卡盘表面所在圆的周向分布的N个吸附区域，K≥N；每个吸附区域至少与一个真空管路连接；控制器与K个真空管路连接，用于通过K个真空管路从N个吸附区域分别控制第一卡盘和/或第二卡盘对第一待键合晶圆对中对应晶圆的吸附时长和/或吸附力大小，以对第一待键合晶圆对执行沿N个不同方向的缩放补偿；键合执行单元，用于将执行缩放补偿后的第一待键合晶圆对进行键合。
The present invention provides a wafer bonding equipment, comprising: a first chuck, a second chuck, K vacuum pipelines, a controller, and a bonding execution unit; wherein, the first chuck and the second chuck respectively use for carrying the first wafer and the second wafer in the first pair of wafers to be bonded; the surface of the first chuck or the second chuck has N adsorption areas distributed along the circumference of the circle where the chuck surface is located, K≥N; each adsorption area is connected to at least one vacuum pipeline; the controller is connected to K vacuum pipelines for controlling the first chuck and/or the second chuck pair from N adsorption areas respectively through K vacuum pipelines the adsorption duration and/or the adsorption force of the corresponding wafers in the first pair of wafers to be bonded, so as to perform scaling compensation along N different directions for the first pair of wafers to be bonded; the bonding execution unit is used to The first wafer pair to be bonded after scaling compensation is performed is bonded.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a wafer bonding device.
Background
A wafer Bonding process (Bonding process) can three-dimensionally integrate two or more chips having the same or different functions. By using the wafer bonding process, the research and development and manufacturing period of the chips can be greatly reduced, the metal interconnection among the functional chips is shortened, and the heat generation, the power consumption and the delay are reduced. The alignment accuracy is the most important parameter for the bonding process.
However, in the related art, there are problems that the compensation effect is not good and the alignment accuracy is not high when the wafer bonding is performed.
Disclosure of Invention
In order to solve the related technical problems, an embodiment of the invention provides a wafer bonding apparatus.
An embodiment of the present invention provides a wafer bonding apparatus, including: the device comprises a first chuck, a second chuck, K vacuum pipelines, a controller and a bonding execution unit; wherein,
the first chuck is used for bearing a first wafer in a first pair of wafers to be bonded, and the second chuck is used for bearing a second wafer in the first pair of wafers to be bonded;
the surface of the first chuck or the second chuck is provided with N adsorption areas distributed along the circumferential direction of a circle where the surface of the chuck is located, K, N are positive integers larger than 1, and K is larger than or equal to N;
each adsorption area in the N adsorption areas is connected with at least one vacuum pipeline in the K vacuum pipelines;
the controller is connected with the K vacuum pipelines and is used for respectively controlling the adsorption time and/or the adsorption force of the first chuck and/or the second chuck on the corresponding wafer in the first wafer pair to be bonded from the N adsorption areas through the K vacuum pipelines so as to perform scaling compensation along N different directions on the first wafer pair to be bonded;
and the bonding execution unit is used for bonding the first wafer pair to be bonded after scaling compensation is executed.
In the above scheme, the area of each of the N adsorption regions is equal.
In the above aspect, the suction area is located near the edge of the chuck, and the shape of the suction area includes a sector.
In the above scheme, the surface of one of the first chuck and the second chuck has N suction areas distributed along the circumferential direction of the circle where the surface of the chuck is located, and the remaining one of the first chuck and the second chuck has a cavity;
the controller is specifically configured to control, through the K vacuum pipes, adsorption durations of one of the first chuck and the second chuck on a corresponding wafer in the first pair of wafers to be bonded from the N adsorption regions, respectively, so as to perform scaling compensation along N different directions; and controlling the inflation pressure in the cavity of the remaining one of the first and second chucks to perform scaling compensation in one direction.
In the above solution, the first chuck is located above the second chuck; the surface of the first chuck is provided with N adsorption areas distributed along the circumferential direction of a circle where the surface of the chuck is located; the second chuck has a cavity;
the controller is specifically configured to control, through the K vacuum pipelines, adsorption durations of the first chuck on the first wafer from the N adsorption regions, respectively, so as to perform scaling compensation along N different directions; and controlling the inflation pressure in the cavity of the second chuck to perform scaling compensation in one direction;
the wafer bonding equipment further comprises a thimble, and the thimble is used for applying downward acting force to the first wafer through the center of a circle where the surface of the first chuck is located in the process of executing scaling compensation along N different directions.
In the foregoing solution, the controller is specifically configured to determine, according to the bonding alignment mark of the first pair of wafers to be bonded, a first coefficient set for performing scaling compensation on the first wafer in N different directions, and a first coefficient for performing scaling compensation on the second wafer in one direction; the first coefficient set comprises N coefficients;
and respectively controlling the duration of the first chuck adsorbing the first wafer in N different directions through the K vacuum pipelines according to the first coefficient set, and adjusting the inflation pressure in the built-in cavity of the second chuck according to the first coefficient.
In the above solution, the wafer bonding apparatus further includes a position moving unit connected to the controller;
the controller is further configured to determine a second coefficient for performing translational compensation on the first pair of wafers to be bonded and a third coefficient for performing rotational compensation on the first pair of wafers to be bonded according to the bonding alignment mark of the first pair of wafers to be bonded; and adjusting the relative position between the wafers in the first pair of wafers to be bonded through the position moving unit according to the second coefficient and the third coefficient.
In the foregoing solution, the wafer bonding apparatus further includes a position measurement unit, connected to the controller, for measuring a positional relationship between a plurality of bonding alignment marks of each wafer in the first pair of wafers to be bonded.
In the above solution, the wafer bonding apparatus further includes: the controller is also used for analyzing the bonding result of the first wafer pair to be bonded; when the bonding result does not meet a preset condition, adjusting the first coefficient, the first coefficient set or; and performing scaling compensation on the second wafer pair to be bonded according to the adjusted first coefficient and the adjusted first coefficient set.
The embodiment of the invention provides a wafer bonding device. The wafer bonding apparatus includes: the device comprises a first chuck, a second chuck, K vacuum pipelines, a controller and a bonding execution unit; the first chuck is used for bearing a first wafer in a first pair of wafers to be bonded, and the second chuck is used for bearing a second wafer in the first pair of wafers to be bonded; the surface of the first chuck or the second chuck is provided with N adsorption areas distributed along the circumferential direction of a circle where the surface of the chuck is located, K, N are positive integers larger than 1, and K is larger than or equal to N; each adsorption area in the N adsorption areas is connected with at least one vacuum pipeline in the K vacuum pipelines; the controller is connected with the K vacuum pipelines and is used for respectively controlling the adsorption time and/or the adsorption force of the first chuck and/or the second chuck on the corresponding wafer in the first wafer pair to be bonded from the N adsorption areas through the K vacuum pipelines so as to perform scaling compensation along N different directions on the first wafer pair to be bonded; and the bonding execution unit is used for bonding the first wafer pair to be bonded after scaling compensation is executed. In each embodiment of the invention, the K vacuum pipelines and the N adsorption areas are divided into a plurality of different directions, the adsorption duration and/or the adsorption force of the chuck on the corresponding area of the wafer are respectively controlled, the zooming compensation is respectively carried out on the wafer pair to be bonded in the plurality of different directions, and the zooming compensation is respectively and independently carried out along the plurality of different directions, so that the deformation correction requirement of the asymmetric bonding alignment mark can be better met, the compensation effect can be greatly improved, and the alignment precision in the bonding process is improved.
Drawings
FIGS. 1 a-1 d are schematic top views of translational misalignment, rotational misalignment, scaling misalignment, and random error misalignment of a wafer to be bonded according to an embodiment of the present invention;
FIG. 2a is a schematic diagram illustrating a curve of a wafer to be bonded having asymmetric left and right wafer bending according to an embodiment of the present invention;
FIG. 2b is a schematic top view of a misalignment of wafers to be bonded according to an embodiment of the present invention;
fig. 3 is a schematic diagram illustrating a wafer bonding apparatus according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a wafer bonding apparatus according to an embodiment of the present invention;
FIG. 5 is a schematic diagram illustrating a related art method according to an embodiment of the present invention and a distribution of a plurality of chucking regions on a chuck according to an embodiment of the present invention.
Detailed Description
The technical solution of the present invention is further described in detail with reference to the drawings and the specific embodiments of the specification.
Each of the wafers to be bonded is provided with a plurality of corresponding bonding alignment mark points, and in practical application, the mark points may be conductive contacts. When the wafer bonding is carried out, the bonding process is carried out after the bonding alignment mark points corresponding to the two wafers are aligned. However, when two wafers to be bonded are aligned due to various reasons, such as that each of the wafers to be bonded undergoes a different semiconductor processing process, an alignment error may occur in at least a portion of the plurality of corresponding bonding alignment marks.
In some specific examples, the alignment errors that are mainly involved include translation (as shown in fig. 1 a), rotation (as shown in fig. 1 b), scaling (as shown in fig. 1 c), and random errors (as shown in fig. 1 d). To correct these alignment errors, a basic alignment model is developed that is abstracted from these alignment errors. The basic alignment model is built based on three major axis transformations. In some embodiments, the basic alignment model is calculated as shown in equations 1 through 3 below. In some specific examples, the part corresponding to the coordinate axis transformation, i.e. the translation, the rotation and the scaling, can be compensated by the adjustment process, while the random error cannot be compensated by the adjustment process.
dx i ＝Tx+S*X i －Rot*Y i +Random xi (1)
dy i ＝Ty+S*Y i +Rot*X i +Random yi (2)
Wherein, i ═ 1, 2, …, n, denotes the ith bonding alignment mark; x represents X-axis coordinates and Y represents Y-axis coordinates; dx represents a measurement value in the x-axis direction, dy represents a measurement value in the y-axis direction, Tx represents a translational alignment error compensation coefficient in the x-axis direction, Ty represents a translational alignment error compensation coefficient in the y-axis direction, S represents a scaling alignment error compensation coefficient, Rot represents a rotational alignment error compensation coefficient, and Random represents a Random alignment error compensation coefficient.
Wherein n represents the total number of bonding alignment marks; x represents X-axis coordinates and Y represents Y-axis coordinates; dx represents a measurement value in the x-axis direction, and dy represents a measurement value in the y-axis direction; tx represents an x-axis direction translation alignment error compensation coefficient; ty represents the y-axis direction translation alignment error compensation coefficient, S represents the scaling alignment error compensation coefficient, and Rot represents the rotation alignment error compensation coefficient.
It should be noted that the translation is the offset of the relative position of the wafer pair in the radial direction of the two-dimensional plane wafer; the rotation is the deviation of the wafer pair on a two-dimensional plane by taking the axial direction of the wafer as a reference relative angle; zooming is the spatial shift in three-dimensional space when the wafer deforms in wafer pairs, such as expansion and contraction. In some specific examples, when performing compensation, iterative calculations may be performed using equations 1 through 3 to obtain a compensation coefficient that minimizes the vector sum of all the bonding alignment marks.
In some embodiments, when scaling compensation is performed, the wafer is generally considered as a central symmetric pattern for compensation. That is, in some embodiments, a symmetry-based scaling compensation method is used, i.e., symmetric regions of the wafer share a compensation factor and are scaled together.
However, due to the irregularity of the wafer deformation, the wafer curvature may present a left-right asymmetric condition as shown in fig. 2a, which is reflected on the alignment mark of the wafer, and may present a condition as shown in fig. 2b, at this time, the scaling compensation method based on symmetry is adopted, which is difficult to consider the compensation of all the bonding alignment marks, and the compensation effect is not good.
Based on this, in each embodiment of the invention, the K vacuum pipelines and the N adsorption areas are divided into a plurality of different directions, the adsorption duration and/or the adsorption force of the chuck to the corresponding area of the wafer are respectively controlled, so that the scaling compensation is respectively performed on the wafer pair to be bonded in the plurality of different directions, and the scaling compensation is respectively and independently performed along the plurality of different directions, so that the deformation correction requirement of the asymmetric bonding alignment mark can be better met, thus, the compensation effect can be greatly improved, and the alignment precision in the bonding process can be improved.
An embodiment of the present invention further provides a wafer bonding apparatus, as shown in fig. 3, the wafer bonding apparatus 300 includes: a first chuck 301, a second chuck 302, K vacuum pipes 303, a controller 304, and a bonding execution unit 305; wherein,
the first chuck 301 is used for bearing a first wafer in a first pair of wafers to be bonded, and the second chuck 302 is used for bearing a second wafer in the first pair of wafers to be bonded;
the surface of the first chuck 301 or the second chuck 302 is provided with N adsorption areas distributed along the circumferential direction of a circle where the surface of the chuck is located, wherein K, N is a positive integer greater than 1 and K is greater than or equal to N;
each of the N adsorption zones is connected to at least one of the K vacuum lines 303;
the controller 304 is connected to the K vacuum pipes 303, and configured to control, through the K vacuum pipes 303, a suction duration and/or a suction force of the first chuck 301 and/or the second chuck 302 to a corresponding wafer in the first pair of wafers to be bonded from the N suction regions, respectively, so as to perform scaling compensation on the first pair of wafers to be bonded along N different directions;
and a bonding execution unit 305, configured to bond the first pair of wafers to be bonded after performing the scaling compensation.
Fig. 4 is a schematic structural diagram of a wafer bonding apparatus according to an embodiment of the present invention. The wafer bonding apparatus provided by the embodiment of the invention is described in detail below with reference to fig. 3 and 4.
Here, the first pair of wafers to be bonded may include two wafers ready for bonding, i.e., a first wafer W1 and a second wafer W2; among them, the first wafer W1 (also referred to as an upper wafer) is adsorbed on the first chuck 301 (also referred to as an upper chuck), and the second wafer W2 (also referred to as a lower wafer) is adsorbed on the second chuck 302 (also referred to as a lower chuck).
In some specific examples, the first pair of wafers to be bonded may include two or more wafers with the same or different functions, for example, the pair of wafers to be bonded may include a wafer formed with a Complementary Metal Oxide Semiconductor (CMOS) circuit or a wafer formed with a memory array structure.
The first wafer W1 and the second wafer W2 both have a plurality of bonding alignment marks; and multiple bonding alignment marks of the first wafer W1 and multiple bonding alignment marks of the second wafer W2 are desirably perfectly aligned when the first wafer W1 and the second wafer W2 are bonded to achieve accurate connection of the bonding contacts. However, in some specific examples, the processing may be affected by various processing techniques, etc. There is a positional deviation between a plurality of bonding alignment marks of the first wafer W1 and a plurality of bonding alignment marks of the second wafer W2, i.e., the aforementioned various alignment errors. Here, the surfaces of the first and second chucks 301 and 302 for sucking the wafer may be circular, and the surface of the circular first or second chuck 301 or 302 has a plurality of sucking regions distributed along the circumferential direction of the circle on which the chuck surface is located, that is, the chuck is divided into a plurality of sucking regions along the circumferential direction thereof.
Here, when compensating the first wafer to be bonded, the first chuck 301 and the second chuck layer 302 are stacked with a gap; the first wafer of the first pair of wafers to be bonded is disposed in the gap on a surface of the first chuck 301 and the second wafer of the first pair of wafers to be bonded is disposed in the gap on a surface of the second chuck 302.
Here, the suction area is used to provide a suction force to the wafer. In some specific examples, the suction force may be provided by vacuum suction in a vacuum hole disposed on the suction region. The vacuum holes may extend through the wafer chuck, be located in the chucking region of the wafer chuck, and provide vacuum suction by connecting vacuum lines, such as suction pumps, to reduce the pressure in the vacuum holes.
The first chuck and the second chuck may have the same or different suction areas. Illustratively, the first chuck may have N adsorption regions distributed in the N direction; alternatively, the second chuck may have N adsorption regions distributed in the N direction; alternatively, the first chuck may have N adsorption regions distributed in the N direction, and the second chuck may also have N adsorption regions distributed in the N direction.
To facilitate coordinate conversion, in some embodiments, each of the N adsorption regions is equal in area. That is, the plurality of adsorption areas corresponding to different directions are uniformly distributed along the circle where the surfaces of the first chuck and the second chuck are located.
In the embodiment of the present invention, the shape of the suction area is not limited, but the suction area needs to be set in accordance with the direction of the zoom compensation. In some embodiments, the shape of the chucking region may include a fan shape, the chucking region being located at a position close to the chuck edge.
Here, the suction region of the fan shape includes a region formed between a first distance (e.g., L1 in the left arrow in fig. 5) and a second distance (e.g., L2 in the left arrow in fig. 5) from the center of the circle on which the first/second chuck surfaces are located (e.g., O in the left arrow in fig. 5); wherein the first distance L1 is greater than the second distance L2. In some specific examples, the first distance and the second distance may be adjusted according to the size of the wafer, for example, for a 12-inch wafer, the radius is 150mm, the first distance may be 120mm, and the second distance may be 100 mm.
In some specific examples, the suction area may be as shown with reference to area A, B, C, D, E, F, G, H in fig. 5.
It should be noted that, the left side of the arrow in fig. 5 shows a distribution diagram of 4 symmetrical adsorption regions including 8 adsorption regions when the symmetric scaling compensation method is adopted; fig. 5 is a diagram on the right side of the arrow, which shows a distribution diagram of 8 corresponding adsorption regions when the scaling compensation method is independently performed in different directions in the embodiment of the present invention. Here, two symmetric adsorption regions of each of the 8 adsorption regions in the left side view of the arrow in fig. 5 are communicated, and the communicated two adsorption regions are controlled together; and each of the 8 adsorption areas in the left side diagram of the arrow in the figure 5 is isolated, and the adsorption areas are respectively and independently controlled.
That is, unlike the left side of the arrow in fig. 5 which shows the scaling compensation method based on symmetry in some embodiments, the scaling compensation method is performed independently along a plurality of different directions in the embodiments of the present invention (the right side of the arrow in fig. 5).
Illustratively, as shown in the right arrow diagram of fig. 5, the first or second chuck has 8 chucking forces on its surface in 8 directions, A, B, C, D, E, F, G, H; wherein, the A adsorption areas are distributed along the 90-degree diameter direction; b, the adsorption areas are distributed along the diameter direction of 45 degrees; c, the adsorption areas are distributed along the diameter direction of 0 degrees; d, distributing adsorption areas along the diameter direction of 315 degrees; e, the adsorption areas are distributed along the 270-degree diameter direction; the F adsorption areas are distributed along the diameter direction of 225 degrees; the G adsorption areas are distributed along the diameter direction of 180 degrees; the H adsorption zones are distributed along the 135 ° diameter.
It should be noted that fig. 5 is used as an example only for explaining the distribution, structural features, and the like of the adsorption regions in the embodiment of the present invention, and is not intended to limit the number, shape, and the like of the adsorption regions in the embodiment of the present invention.
Here, the number of vacuum lines 303 is greater than or equal to the number of suction areas, so that each suction area may correspond to a separate vacuum line 303.
In some specific examples, the vacuum pipeline 303 may be a pipeline including an air pump, such that the air pump can pump air to change the pressure in the pipeline into a negative pressure, so as to suck the wafer by the negative pressure in the suction region.
Here, the controller is mainly configured to control a duration and/or an amount of suction force of the K vacuum lines to suck the wafer from the N suction areas. It can be understood that the duration of the adsorption can be realized by controlling the duration of the vacuum line maintaining the vacuum, and the magnitude of the adsorption force can be realized by controlling the degree of the vacuum line maintaining the vacuum. The length of time that the vacuum is maintained is easier to quantify than it is.
In some Specific examples, the controller 304 may include, but is not limited to, a Micro Controller Unit (MCU), such as a single chip microcomputer, an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA), a Digital Signal Processor (DSP), and the like.
It can be understood that, considering that the control process is complicated when the multi-directional scaling compensation is performed on the first wafer W1 and the second wafer W2 at the same time, the multi-directional scaling compensation may be performed only on one of the first wafer W1 and the second wafer W2, and the scaling compensation may be performed on the remaining one of the first wafer W1 and the second wafer W2 along one direction or the whole, so that the compensation along different directions may be achieved, and the compensation process may be simplified.
Based on this, in some embodiments, the surface of one of the first chuck 301 and the second chuck 302 has N suction regions distributed along the circumference of a circle in which the chuck surface is located, and the remaining one of the first chuck and the second chuck has a cavity;
the controller 304 is specifically configured to control the chucking duration of the corresponding wafer in the first pair of wafers to be bonded by one of the first chuck and the second chuck from the N chucking regions through the K vacuum pipes, respectively, so as to perform scaling compensation along N different directions; and controlling the inflation pressure in the cavity of the remaining one of the first and second chucks to perform scaling compensation in one direction.
In some embodiments, the first chuck 301 is located above the second chuck 302; the surface of the first chuck 301 is provided with N adsorption areas distributed along the circumferential direction of a circle on which the surface of the chuck is located; the second chuck 302 has a cavity;
the controller 304 is specifically configured to control the suction time of the first chuck 301 to the first wafer W1 from the N suction areas through the K vacuum pipes 303, respectively, so as to perform scaling compensation along N different directions; and controlling the inflation pressure in the cavity of the second chuck 302 to perform scaling compensation in one direction;
the wafer bonding apparatus further includes ejector pins 306 for applying a downward force to the first wafer W1 at the center of the circle where the surface of the first chuck 301 is located in the course of performing zoom compensation in N different directions.
Here, during bonding, the thimble 306 may pass through the first chuck 301 to apply a downward acting force to the center of the circle where the first wafer is located, the acting force of the thimble 306 may be decreased with an increase in the distance from the center of the circle to a point on the wafer surface with respect to the entire wafer surface, and it is understood that the first chuck 301 adsorbs the first wafer W1, that is, the first chuck 301 provides an upward acting force to the first wafer W1, and when the downward acting force applied by the thimble 306 is not changed, the upward acting force applied to the first wafer W1 may be adjusted by adjusting the time length for which the first chuck 301 adsorbs the first wafer W1 (the longer the adsorption time length is, the longer the time for receiving the thimble force corresponding to the adsorption region is, the shorter the adsorption time length is, so as to correct the deformation of the first wafer by the applied force of the first wafer, thereby realizing scaling compensation and compensating the misalignment of the bonding marks caused by the deformation of the wafer. When N adsorption areas exist, the adsorption duration of each adsorption area in the N adsorption areas can be controlled, so that the zoom compensation can be performed along N directions, the compensation of different directions of a plurality of bonding alignment marks can be better met, the compensation effect is greatly improved, and the alignment precision in the bonding process is improved.
It should be noted that, in this embodiment, only the lower wafer (the second wafer) is used as the compensation reference standard, and mainly the scaling compensation in multiple directions is performed on the upper wafer (the first wafer), however, different compensation strategies of the upper wafer and the lower wafer may be interchanged, but when the compensation strategies are interchanged, the direction of the force applied by the thimble needs to be adjusted accordingly. That is, when performing the zoom compensation, the misalignment error of the deformation such as the expansion between the upper wafer and the lower wafer can be realized only by the zoom compensation adjustment of one wafer in different directions, such as the upper wafer; completely different compensation strategies can be adopted for the upper wafer and the lower wafer, namely the lower wafer is subjected to scaling compensation integrally according to one direction, and the upper wafer is subjected to scaling compensation respectively along N different directions.
In some specific examples, considering that when performing the zoom compensation, the process is easy to perform the zoom-in (expansion, or bending towards the direction far away from the chuck applying the suction force) compensation on the wafer, and is not easy to perform the zoom-out (bending towards the chuck applying the suction force) compensation on the wafer, the zoom compensation may be performed on the whole of one wafer and the following wafer in one direction, so as to perform the amplitude adjustment in one direction on the deformation error such as the expansion between the two wafers, and when the lower wafer is not compensated, the upper wafer needs to perform the negative direction (zoom-out) compensation with respect to the lower wafer, the compensation of the upper wafer with respect to the lower wafer may be pulled to the positive direction by performing the positive direction (amplification) compensation on the lower wafer first.
In some specific examples, when the wafer is subjected to scaling compensation in one direction as a whole, the inflation pressure in the built-in cavity of the corresponding chuck can be adjusted, so that the wafer follows the chord height change of the protrusions on the surface of the chuck, and thus, deformation compensation such as expansion of the wafer is realized.
In practical applications, the corresponding compensation coefficient may be determined according to a positional relationship between a plurality of bonding alignment marks of each wafer in the first pair of wafers to be bonded, and then the absorption duration may be determined according to the compensation coefficient.
In some embodiments, the controller 304 is specifically configured to determine, according to the bonding alignment marks of the first pair of wafers to be bonded, a first coefficient set for performing scaling compensation on the first wafer W1 in N different directions and a first coefficient for performing scaling compensation on the second wafer W2 in one direction; the first coefficient set comprises N coefficients;
according to the first coefficient set, the time length of the first chuck 301 for adsorbing the first wafer W1 is controlled in N different directions through the K vacuum pipelines, and the inflation pressure in the built-in cavity of the second chuck 302 is adjusted according to the first coefficient.
In some specific examples, the positional relationship between a plurality of bonding alignment marks of each wafer in the first pair of wafers to be bonded may be measured by a bonding alignment mark measuring apparatus. The alignment error of each bonded alignment mark for each wafer can be considered as a vector value. The method for determining the compensation coefficient may specifically be that vector values corresponding to the alignment errors of all the bonding alignment marks are summed, iterative calculation is performed by using an alignment model formula, and when all the vector values are minimum, a value corresponding to the compensation coefficient at this time is determined.
In some specific examples, the compensation coefficients of the scaling alignment method in N different directions in the embodiments of the present invention may include: the translational misalignment compensation coefficient (misalignment Tx in the first direction and misalignment Ty in the second direction), the rotational misalignment compensation coefficient Rot, and the scaling misalignment coefficient in N directions, for example, N-8, i.e., N directions are S0 (corresponding to C in the right-hand diagram of the arrow in fig. 5), S45 (corresponding to B in the right-hand diagram of the arrow in fig. 5), S90 (corresponding to a in the right-hand diagram of the arrow in fig. 5), S135 (corresponding to G in the right-hand diagram of the arrow in fig. 5), S180 (corresponding to G in the right-hand diagram of the arrow in fig. 5), S225 (corresponding to F in the right-hand diagram of the arrow in fig. 5), S270 (corresponding to E in the right-hand diagram of the arrow in fig. 5), S315 (corresponding to D in the right-hand diagram of the arrow in fig. 5), then the wafer-to-wafer misalignment compensation coefficients may be represented as Tx, Ty, Rot, S0, S45, S90, S135, S180, S225, S270, S315.
In some embodiments, the wafer bonding apparatus 300 further includes a position measuring unit for measuring a positional relationship between a plurality of bonding alignment marks of each wafer in the first pair of wafers to be bonded.
In some embodiments, the position measurement unit may include a sensor, such as a camera and corresponding image processor, capable of capturing images of wafer bonding marks.
The controller 304 is connected to the position measurement unit, and the controller 304 may obtain a corresponding compensation coefficient according to a position relationship measured by the position measurement unit, so as to control the adsorption duration of the corresponding wafer in the first pair of wafers to be bonded by controlling the vacuum pipeline, thereby realizing zoom compensation along N different directions.
In some embodiments, a position moving unit is further included, connected to the controller;
the controller is further used for determining a second coefficient for performing translation compensation on the first wafer pair to be bonded and a third coefficient for performing rotation compensation on the first wafer pair to be bonded according to the bonding alignment mark of the first wafer pair to be bonded; and adjusting the relative position between the wafers in the first pair of wafers to be bonded through the position moving unit according to the second coefficient and the third coefficient.
Here, the second coefficient may correspond to the above-mentioned translational compensation coefficients Tx and Ty, and the translational compensation is implemented by adjusting relative positions of two wafers in the first pair of wafers to be bonded along the radial direction of the wafer by using the second coefficient. Meanwhile, the third coefficient may adjust a relative angle of the two wafers in the first pair of wafers to be bonded along the axial direction of the wafer to realize rotation compensation, corresponding to the rotation error Rot.
In some embodiments, the position moving unit may include a mechanism capable of moving the first chuck and the second chuck, such as a motor and a motor driving circuit.
Here, after the compensation is completed, the first wafer W1 and the second wafer W2 may be bonded.
The bonding execution unit 305 is a device for executing bonding. In some embodiments, the wafers in the first pair of wafers to be bonded may be bonded by any bonding means, such as adhesive bonding, anodic bonding, direct wafer bonding, metal bonding, or hybrid bonding.
In some embodiments, when the pair of wafers to be bonded is a wafer formed with CMOS circuits and a wafer formed with memory array structures, the wafers in the pair of wafers to be bonded may be bonded using a hybrid bond (also referred to as a "metal/dielectric hybrid bond"). The following describes a specific implementation of the scaling compensation in different directions according to the embodiment of the present invention with reference to fig. 4.
For example, as shown in fig. 4, during the bonding compensation, the upper wafer is acted by the downward force of the thimble in the middle area of the upper chuck, the upper wafer has a downward deformation, after the area of the upper wafer acted by the downward force of the thimble is contacted with the lower wafer, the upper chuck releases the upper wafer by vacuum, and the upper wafer are pre-bonded (pre-bonding).
The upper wafer is adsorbed on the upper chuck by vacuum, a vacuum area of the upper chuck is used for adjusting zooming compensation, the upper chuck consists of 8 vacuum areas on the outer edge of the upper wafer, the 8 vacuum areas are controlled by 8 paths of vacuum, and each path of vacuum controls 1 vacuum area, so that the zooming compensation method is independently carried out on 8 different directions respectively.
In some embodiments, the controller 304 is further configured to analyze the bonding result of the first pair of wafers to be bonded; when the bonding result does not meet a preset condition, adjusting the first coefficient and the first coefficient set; and performing scaling compensation on the second wafer pair to be bonded according to the adjusted first coefficient and the adjusted first coefficient set.
Here, the controller 304 may further correct the first coefficient and the first coefficient set according to the bonding result after the bonding is completed, and perform scaling compensation on a new wafer pair to be bonded, that is, a second wafer to be bonded, by using the corrected first coefficient and the first coefficient set.
The features disclosed in the several method or apparatus embodiments provided in the present application may be combined arbitrarily, without conflict, to arrive at new method embodiments or apparatus embodiments.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.
Claims (9)
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20130076470A (en) * | 2011-12-28 | 2013-07-08 | 엘아이지에이디피 주식회사 | Substrate bonding apparatus |
| CN108133903A (en) * | 2016-12-01 | 2018-06-08 | 东京毅力科创株式会社 | Bonding device, bonding system, bonding method, and computer storage medium |
| CN110875219A (en) * | 2018-08-30 | 2020-03-10 | 三星电子株式会社 | Substrate bonding apparatus and substrate bonding method |
| CN114388392A (en) * | 2020-10-22 | 2022-04-22 | 上海新微技术研发中心有限公司 | Wafer bonding equipment and bonding method for eliminating wafer warpage |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20130076470A (en) * | 2011-12-28 | 2013-07-08 | 엘아이지에이디피 주식회사 | Substrate bonding apparatus |
| CN108133903A (en) * | 2016-12-01 | 2018-06-08 | 东京毅力科创株式会社 | Bonding device, bonding system, bonding method, and computer storage medium |
| CN110875219A (en) * | 2018-08-30 | 2020-03-10 | 三星电子株式会社 | Substrate bonding apparatus and substrate bonding method |
| CN114388392A (en) * | 2020-10-22 | 2022-04-22 | 上海新微技术研发中心有限公司 | Wafer bonding equipment and bonding method for eliminating wafer warpage |
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