CN115065031A - Over-temperature protection circuit and chip based on RS latch - Google Patents
Over-temperature protection circuit and chip based on RS latch Download PDFInfo
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- CN115065031A CN115065031A CN202210641845.3A CN202210641845A CN115065031A CN 115065031 A CN115065031 A CN 115065031A CN 202210641845 A CN202210641845 A CN 202210641845A CN 115065031 A CN115065031 A CN 115065031A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H5/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal non-electric working conditions with or without subsequent reconnection
- H02H5/04—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal non-electric working conditions with or without subsequent reconnection responsive to abnormal temperature
- H02H5/042—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal non-electric working conditions with or without subsequent reconnection responsive to abnormal temperature using temperature dependent resistors
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H1/00—Details of emergency protective circuit arrangements
- H02H1/0061—Details of emergency protective circuit arrangements concerning transmission of signals
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H5/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal non-electric working conditions with or without subsequent reconnection
- H02H5/04—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal non-electric working conditions with or without subsequent reconnection responsive to abnormal temperature
- H02H5/044—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal non-electric working conditions with or without subsequent reconnection responsive to abnormal temperature using a semiconductor device to sense the temperature
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/20—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for electronic equipment
- H02H7/205—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for electronic equipment for controlled semi-conductors which are not included in a specific circuit arrangement
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Abstract
本发明公开了一种基于RS锁存器的过温保护电路及芯片，其中过温保护电路包括：参考电压产生网络，用于产生第一参考电压和第二参考电压；负温度系数比较电压产生电路，包括PTAT电流和BJT晶体管；第一比较器，第一比较器的正相输入端连接第一参考电压，反相输入端连接BJT晶体管的发射极；第二比较器，第二比较器的正相输入端连接BJT晶体管的发射极，反相输入端连接第二参考电压；RS锁存器，RS锁存器的第一输入端连接第一比较器的输出端，RS锁存器的第二输入端连接第二比较器的输出端。本发明利用RS锁存器的保持态来实现温度的回滞功能，保证了回滞温度的准确性，回滞温度的控制更加简单精确，可广泛应用于集成电路技术领域。
The invention discloses an over-temperature protection circuit and a chip based on an RS latch, wherein the over-temperature protection circuit comprises: a reference voltage generating network for generating a first reference voltage and a second reference voltage; a negative temperature coefficient comparison voltage generating network The circuit includes a PTAT current and a BJT transistor; a first comparator, the non-inverting input terminal of the first comparator is connected to the first reference voltage, and the inverting input terminal is connected to the emitter of the BJT transistor; The non-inverting input terminal is connected to the emitter of the BJT transistor, and the inverting input terminal is connected to the second reference voltage; RS latch, the first input terminal of the RS latch is connected to the output terminal of the first comparator, and the first input terminal of the RS latch is connected to the output terminal of the first comparator. The two input terminals are connected to the output terminal of the second comparator. The invention utilizes the holding state of the RS latch to realize the temperature hysteresis function, ensures the accuracy of the hysteresis temperature, the control of the hysteresis temperature is simpler and more accurate, and can be widely used in the technical field of integrated circuits.
Description
Technical Field
The invention relates to the technical field of integrated circuits, in particular to an over-temperature protection circuit and a chip based on an RS latch.
Background
With the continuous development of integrated circuit technology, the size of the integrated circuit is continuously reduced, and the integration level is higher and higher. Due to the fact that power devices are integrated in the intelligent power chip and some power management chips, the temperature of the chips during working is high under the trend that the sizes of the chips are smaller and smaller, and the reliability problem can be caused by the fact that the chips are irreversibly damaged due to the excessively high working temperature of the chips. An on-chip integrated over-temperature protection circuit is necessary for these chips.
The chip integrated with the power device can generate larger heat because larger current flows when the chip works, the generated heat is difficult to dissipate because the integration level of the chip is higher and higher, and the temperature of the chip is higher and higher, so that the performance parameters of the chip are seriously degraded. It is essential to integrate the over-temperature protection circuit in the chip. The over-temperature protection circuit can be classified into a protection type over-temperature protection, a hysteresis type over-temperature protection and a thermal regulation type. The protection type over-temperature protection circuit is used for switching off the power device when the temperature reaches the thermal switching-off temperature, and the circuit cannot be switched on again even if the temperature is reduced to a normal level. The hysteresis type over-temperature protection circuit is used for switching off a power device when the temperature rises to a thermal shutdown temperature and enabling the circuit to work again when the temperature drops to a thermal recovery temperature. The regulation type over-temperature protection circuit utilizes negative feedback to make the temperature of the chip constant at a certain preset value when the chip is over-temperature. The most common over-temperature protection circuit structure is a hysteresis type over-temperature protection circuit, but the existing hysteresis type over-temperature protection circuit has too many parameters and is too complicated to adjust, and the finally determined hysteresis temperature is not accurate enough.
Disclosure of Invention
To solve at least one of the technical problems in the prior art to some extent, the present invention is directed to an over-temperature protection circuit and a chip based on an RS latch.
The technical scheme adopted by the invention is as follows:
an over-temperature protection circuit based on an RS latch, comprising:
a reference voltage generating network for generating a first reference voltage and a second reference voltage, wherein the first reference voltage is greater than the second reference voltage;
the negative temperature coefficient comparison voltage generation circuit comprises a PTAT current and a BJT transistor, wherein the emitter of the BJT transistor is connected with the PTAT current, and the base and the collector of the BJT transistor are grounded;
a positive phase input end of the first comparator is connected with the first reference voltage, and an inverted phase input end of the first comparator is connected with an emitter of the BJT transistor;
a positive phase input end of the second comparator is connected with the emitter of the BJT transistor, and a negative phase input end of the second comparator is connected with the second reference voltage;
the first input end of the RS latch is connected with the output end of the first comparator, the second input end of the RS latch is connected with the output end of the second comparator, and the output end of the RS latch is used as the output end of the over-temperature protection circuit.
Further, the RS latch is an RS latch with a blanking structure.
Further, the RS latch includes:
the input end of the first inverter is connected with the first input end of the RS latch, and the output end of the first inverter is connected with the first input end of the first NAND gate;
the input end of the second inverter is connected with the second input end of the RS latch, and the output end of the second inverter is connected with the first input end of the second NAND gate;
a second input end of the first NAND gate is connected with a second input end of the RS latch, and an output end of the first NAND gate is connected with a first input end of the third NAND gate;
a second input end of the second NAND gate is connected with the first input end of the RS latch, and an output end of the second NAND gate is connected with the first input end of the fourth NAND gate;
a second input end of the third NAND gate is connected with an output end of the fourth NAND gate, and the output end of the third NAND gate is used as a first output end of the RS latch;
and a second input end of the fourth NAND gate is connected with the output end of the third NAND gate, and the output end of the fourth NAND gate is used as a second output end of the RS latch.
Further, the reference voltage generation network comprises a first resistor, a second resistor and a third resistor which are sequentially connected in series;
one end of the third resistor is connected with a reference voltage, the other end of the third resistor is connected with one end of the second resistor, and the first reference voltage is generated at the connection point of the third resistor and the second resistor;
the other end of the second resistor is connected with one end of the first resistor, the other end of the first resistor is grounded, and the second reference voltage is generated at the connection point of the first resistor and the second resistor.
Further, the reference voltage and the PTAT current are both generated by a preceding stage of Bandgap circuitry.
Further, the first reference voltage V A The expression of (a) is as follows:
the second reference voltage V B The expression of (a) is as follows:
turn-on voltage V of BJT transistor BE The expression of (c) is as follows:
V BE ＝V BE0 -A·T
wherein R is 1 Is a first resistance, R 2 Is a second resistance, R 3 Is a third resistance, V REF Is a reference voltage, V BE0 The turn-on voltage of the BJT transistor at 0 ℃, A is the temperature coefficient, and T is the temperature.
Further, the thermal shutdown temperature T of the over-temperature protection circuit SD The expression of (a) is as follows:
thermal recovery temperature T of the over-temperature protection circuit RE The expression of (a) is as follows:
the expression of the hysteresis temperature delta T of the over-temperature protection circuit is as follows:
the other technical scheme adopted by the invention is as follows:
a chip comprises the over-temperature protection circuit based on the RS latch.
The beneficial effects of the invention are: the invention realizes the hysteresis function of the temperature by using the holding state of the RS latch, and ensures the accuracy of the hysteresis temperature. In addition, compared with the traditional method, the method for realizing the temperature hysteresis function by using the RS latch is simpler and more accurate in control of hysteresis temperature.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following description is made on the drawings of the embodiments of the present invention or the related technical solutions in the prior art, and it should be understood that the drawings in the following description are only for convenience and clarity of describing some embodiments in the technical solutions of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is an electrical circuit diagram of a conventional hysteresis type over-temperature protection circuit according to an embodiment of the present invention;
FIG. 2 is an electronic circuit diagram of an over-temperature protection circuit based on an RS latch according to an embodiment of the present invention;
FIG. 3 is a circuit diagram of an RS latch with blanking structure in an embodiment of the invention;
FIG. 4 is a schematic diagram of OTP curves for 2.5v and 3.3v supply voltages in an embodiment of the invention;
FIG. 5 is a graphical illustration of OTP curves at tt, ss and ff process corners in an embodiment of the invention.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention. The step numbers in the following embodiments are provided only for convenience of illustration, the order between the steps is not limited at all, and the execution order of each step in the embodiments can be adapted according to the understanding of those skilled in the art.
In the description of the present invention, it should be understood that the orientation or positional relationship referred to in the description of the orientation, such as the upper, lower, front, rear, left, right, etc., is based on the orientation or positional relationship shown in the drawings, and is only for convenience of description and simplification of description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention.
In the description of the present invention, the meaning of a plurality of means is one or more, the meaning of a plurality of means is two or more, and larger, smaller, larger, etc. are understood as excluding the number, and larger, smaller, inner, etc. are understood as including the number. If the first and second are described for the purpose of distinguishing technical features, they are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of the technical features indicated.
In the description of the present invention, unless otherwise explicitly limited, terms such as arrangement, installation, connection and the like should be understood in a broad sense, and those skilled in the art can reasonably determine the specific meanings of the above terms in the present invention in combination with the specific contents of the technical solutions.
The structure and the principle of the existing hysteresis type over-temperature protection circuit are as follows:
as shown in fig. 1, the conventional over-temperature protection circuit mainly realizes a temperature hysteresis function by forming a positive feedback through a MOS transistor M1 and a resistor R2. The circuit principle is described in detail as follows: the circuit mainly comprises a comparison voltage generating circuit (a PTAT current I1 and a PNPBJT transistor), a reference voltage generating circuit (a PTAT current I1, resistors R1 and R2 and a MOS transistor M1), a comparator and a waveform shaping circuit (a Schmidt trigger and an inverter).
Let the PTAT current I1 be
Turn-on voltage V of Q1 BE Which is inversely temperature-dependent, with a temperature coefficient of A and a turn-on voltage of V at 0 DEG C BE0 When the starting voltage of the Q1 with lower temperature is larger at the beginning, the voltage of the forward input end of the comparator is larger than that of the reverse input end, the comparator outputs high level, the over-temperature protection signal OTP also outputs high level, the high level is fed back to the grid of the M1 after being shaped by the Schmitt trigger and the inverter to be conducted, and the voltage V of the forward input end and the reverse input end of the comparator A And V B Can be expressed by the following formulas, respectively:
V A ＝V BE0 -AT (1)
when the temperature starts to rise, V A Begins to fall, V B Starting to rise when the temperature rises to a value that allows V A ＝V B During the process, the output of the comparator is turned, and the turning temperature is as follows:
when the temperature is higher than T SD The output of the time comparator is inverted into low level, and the over-temperature protection signal outputs low level. At this time, the gate of M1 is low, M1 is OFF, and V is B1 A voltage across the terminals of：
When the temperature starts to decrease, V A Initially elevated, V B1 Initially decrease when the temperature drops to V A ＝V B1 During the process, the output of the comparator is turned over again, and the turning temperature is as follows:
in over-temperature protection circuit, T SD Called thermal shutdown temperature, T RE Referred to as the thermal recovery temperature, the hysteresis temperature, i.e., the difference between the thermal shutdown temperature and the thermal recovery temperature, is:
in order to avoid the thermal oscillation phenomenon, a certain margin is required to be reserved for the hysteresis temperature, and the hysteresis temperature can be adjusted by adjusting the values of the resistors R1 and R2 so as to meet the circuit protection requirement.
However, it can be seen from the above analysis that the parameters related to the hysteresis temperature are too numerous to adjust, and the finally determined hysteresis temperature is not accurate enough. The reason for this is that the voltages at the positive and negative inputs of the comparator vary with temperature. And the temperature hysteresis is realized by feeding the output signal back to the gate of the M1 to control the on/off of the gate to change the on/off threshold, which also causes a certain error.
Accordingly, the present embodiment provides a new over-temperature protection circuit architecture.
As shown in fig. 2, the present embodiment provides an RS latch-based over-temperature protection circuit, which mainly includes a reference voltage generation network (including resistors R1, R2, and R3), a negative temperature coefficient comparison voltage generation circuit (including BJT transistor Q1 and PTAT current I1), and a thermal shutdown and thermal recovery circuitComparator comp1 (and first comparator), comparator comp2 (i.e., second comparator), and an RS latch with blanking structure that implements a temperature hysteresis function. As an alternative, the reference voltage V REF And PTAT current I1 may be generated by the preceding stage Bandgap circuit.
Two reference voltages V generated by the reference voltage generating circuit A And V B Can be respectively expressed as:
in the negative temperature coefficient comparison voltage generation circuit, the starting voltage VBE of the BJT transistor is linearly reduced along with the rise of the temperature, the starting voltage at 0 ℃ is set as VBE0, and the temperature coefficient is set as A; then:
V BE ＝V BE0 -A·T (9)
at the beginning, the temperature is low, V BE >V A >V B At this time, the output end V of the comparator comp1 R At low level, comp2 output terminal V S The output voltage is high level, and after passing through the RS latch, the OTP end outputs high level; with increasing temperature, V BE Is gradually decreased so as to have V B <V BE <V A At this time, the output end V of the comparator comp1 R For high level, the output terminal V of the comparator comp2 S Also high, the OTP output will remain in the last state, i.e. high. The temperature is further increased to make V BE <V B <V A At this time, the output end V of the comparator comp1 R For high level, the output terminal V of the comparator comp2 S And the two signals are inverted into low level, the OTP signal is inverted into low level through the RS latch to trigger over-temperature protection, and the turn-off temperature of the chip begins to be reduced.
Initial stage of temperature decrease V BE <V B <V A Output of OTP signal is lowA level; as the temperature decreases, V is caused to decrease B <V BE <V A Comparator comp1 output terminal V R Is high level, the output end V of the comparator comp2 S If the voltage level is high, the OTP output signal keeps the last state, namely low level, and the chip is still in an over-temperature protection state; when the temperature is lowered to the point that V is BE >V A >V B Comparator comp1 output terminal V R Is low level, the output end V of the comparator comp2 S And when the voltage is high level, the OTP signal is turned over, the high level is output, the over-temperature protection state is released, and the chip recovers to work normally.
It can be seen that the chip rises in temperature to the thermal shutdown temperature T due to the presence of the holding state of the RS latch SD And the temperature is reduced to a heat recovery temperature T RE There is a hysteresis in the two processes, so that the function of temperature hysteresis is realized. Compared with the traditional method, the method for realizing the temperature hysteresis function by using the RS latch is simpler and more accurate in control of the hysteresis temperature. From the above analysis, it can be seen that the thermal shutdown temperature T of the over-temperature protection circuit of the present invention SD Temperature of heat recovery T RE Respectively as follows:
the hysteresis temperature is thus:
it can be seen that the thermal shutdown and thermal recovery temperatures and the hysteresis temperature can be accurately controlled by simply adjusting the proportion of the resistors, and the reference voltage is more accurate by connecting the resistors with the positive temperature coefficient and the negative temperature coefficient in series in order to reduce the influence of the temperature change on the resistance value of the resistors, thereby further improving the precision of the hysteresis temperature.
Further as an alternative, in order to avoid the influence of the metastable state of the RS latch on the normal operation of the circuit, the present embodiment adopts the RS latch with the blanking structure as shown in fig. 3. The RS latch adopts a blanking structure to avoid abnormal output of the OTP signal caused by the fact that the RS latch works in a metastable state under an abnormal state. The RS latch specifically includes:
the input end of the first inverter is connected with the first input end of the RS latch, and the output end of the first inverter is connected with the first input end of the first NAND gate;
the input end of the second phase inverter is connected with the second input end of the RS latch, and the output end of the second phase inverter is connected with the first input end of the second NAND gate;
the second input end of the first NAND gate is connected with the second input end of the RS latch, and the output end of the first NAND gate is connected with the first input end of the third NAND gate;
the second input end of the second NAND gate is connected with the first input end of the RS latch, and the output end of the second NAND gate is connected with the first input end of the fourth NAND gate;
a second input end of the third NAND gate is connected with an output end of the fourth NAND gate, and the output end of the third NAND gate is used as a first output end of the RS latch;
and a second input end of the fourth NAND gate is connected with the output end of the third NAND gate, and the output end of the fourth NAND gate is used as a second output end of the RS latch.
The truth table of the RS latch is shown in Table 1 below:
TABLE 1
The simulation results of the over-temperature protection circuit under different power supply voltages and process angles are as follows:
1) as shown in fig. 4, the temperature variables were set to-40 deg.c-160 deg.c at 2.5v and 3.3v supply voltages, with the temperatures sweeping the simulated thermal shutdown and thermal recovery temperatures from low to high and from high to low, respectively. The thermal shutdown thermal recovery and hysteresis temperatures for different supply voltages are shown in table 2.
TABLE 2
2) The case of the three process corners tt, ss, ff was simulated at a supply voltage of 3.3v, as shown in fig. 5. The thermal shutdown temperature, thermal recovery temperature, and hysteresis temperature for different process corners are shown in table 3.
TABLE 3
According to the simulation result, the thermal shutdown and thermal recovery temperature under different power supply voltages and process angles are not changed greatly, the hysteresis temperature is kept unchanged, and the circuit has enough stability.
To sum up, the over-temperature protection circuit based on the RS latch of the embodiment of the present application has the following advantages and beneficial effects, compared with the prior art:
(1) according to the method, the temperature hysteresis function is realized by using the holding state of the RS latch to replace the traditional over-temperature protection circuit, and the temperature hysteresis function is realized by controlling the switching-on and switching-off of mos through an output signal to change the threshold voltage of a comparator. Compared with the traditional over-temperature protection circuit, the over-temperature protection circuit has the characteristics of simple structure and easy adjustment of the thermal shutdown temperature of the circuit.
(2) According to the method and the device, the hysteresis function of the temperature is realized by using the holding state of the RS latch, and the accuracy of the hysteresis temperature is ensured. In addition, the RS latch adopts a blanking structure, so that the output abnormity of the OTP signal caused by the metastable state of the RS latch in an abnormal state is avoided.
(3) The over-temperature protection circuit of this application can be used to power management chip, if: DC-DC converter, LDO and the like, and intelligent power integrated circuits such as motor driving chip and the like.
The embodiment also provides a chip, which comprises an over-temperature protection circuit based on an RS latch as shown in fig. 2.
The chip of the embodiment and the over-temperature protection circuit based on the RS latch have a one-to-one correspondence relationship, and thus have corresponding functions and beneficial effects. The chip can be a power management chip, such as: DC-DC converter, LDO and the like, and intelligent power integrated circuits such as motor driving chip and the like.
In the foregoing description of the specification, reference to the description of "one embodiment/example," "another embodiment/example," or "certain embodiments/examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
While embodiments of the present invention have been shown and described, it will be understood by those of ordinary skill in the art that: various changes, modifications, substitutions and alterations can be made to the embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.
While the preferred embodiments of the present invention have been illustrated and described, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (8)
1. An over-temperature protection circuit based on an RS latch, comprising:
a reference voltage generation network for generating a first reference voltage and a second reference voltage, wherein the first reference voltage is greater than the second reference voltage;
the negative temperature coefficient comparison voltage generation circuit comprises a PTAT current and a BJT transistor, wherein the emitter of the BJT transistor is connected with the PTAT current, and the base and the collector of the BJT transistor are grounded;
a positive phase input end of the first comparator is connected with the first reference voltage, and an inverted phase input end of the first comparator is connected with an emitter of the BJT transistor;
a positive phase input end of the second comparator is connected with the emitter of the BJT transistor, and a negative phase input end of the second comparator is connected with the second reference voltage;
and the first input end of the RS latch is connected with the output end of the first comparator, the second input end of the RS latch is connected with the output end of the second comparator, and the output end of the RS latch is used as the output end of the over-temperature protection circuit.
2. The RS latch based overtemperature protection circuit according to claim 1, wherein the RS latch is an RS latch with a blanking structure.
3. The RS latch based over-temperature protection circuit according to claim 2, wherein the RS latch comprises:
the input end of the first inverter is connected with the first input end of the RS latch, and the output end of the first inverter is connected with the first input end of the first NAND gate;
the input end of the second inverter is connected with the second input end of the RS latch, and the output end of the second inverter is connected with the first input end of the second NAND gate;
a second input end of the first NAND gate is connected with a second input end of the RS latch, and an output end of the first NAND gate is connected with a first input end of the third NAND gate;
a second input end of the second NAND gate is connected with the first input end of the RS latch, and an output end of the second NAND gate is connected with the first input end of the fourth NAND gate;
a second input end of the third NAND gate is connected with an output end of the fourth NAND gate, and the output end of the third NAND gate is used as a first output end of the RS latch;
and a second input end of the fourth NAND gate is connected with the output end of the third NAND gate, and the output end of the fourth NAND gate is used as a second output end of the RS latch.
4. The RS latch based over-temperature protection circuit as claimed in claim 1, wherein the reference voltage generation network comprises a first resistor, a second resistor and a third resistor connected in series in sequence;
one end of the third resistor is connected with a reference voltage, the other end of the third resistor is connected with one end of the second resistor, and the first reference voltage is generated at the connection point of the third resistor and the second resistor;
the other end of the second resistor is connected with one end of the first resistor, the other end of the first resistor is grounded, and the second reference voltage is generated at the connection point of the first resistor and the second resistor.
5. The RS latch based over-temperature protection circuit according to claim 4, wherein the reference voltage and the PTAT current are both generated by a preceding stage Bandgap circuit.
6. The RS latch-based over-temperature protection circuit according to claim 4, wherein the first reference voltage V A The expression of (a) is as follows:
the second reference voltage V B The expression of (a) is as follows:
turn-on voltage V of BJT transistor BE The expression of (a) is as follows:
V BE ＝V BE0 -A·T
wherein R is 1 Is a first resistance, R 2 Is a second resistance, R 3 Is a third resistance, V REF Is a reference voltage, V BE0 The turn-on voltage of the BJT transistor at 0 ℃, A is the temperature coefficient, and T is the temperature.
7. The RS latch-based over-temperature protection circuit according to claim 6, wherein a thermal shutdown temperature T of the over-temperature protection circuit SD The expression of (a) is as follows:
the thermal recovery temperature T of the over-temperature protection circuit RE The expression of (a) is as follows:
the expression of the hysteresis temperature delta T of the over-temperature protection circuit is as follows:
8. a chip comprising an RS latch based overtemperature protection circuit as claimed in any of claims 1 to 7.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN119765201A (en) * | 2024-12-30 | 2025-04-04 | 黑龙江汇芯半导体有限公司 | Over-temperature protection ADC circuit with rising and falling threshold values |
| CN119765202A (en) * | 2024-12-30 | 2025-04-04 | 黑龙江汇芯半导体有限公司 | Over-temperature protection circuit with rising and falling threshold values |
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| CN119765201A (en) * | 2024-12-30 | 2025-04-04 | 黑龙江汇芯半导体有限公司 | Over-temperature protection ADC circuit with rising and falling threshold values |
| CN119765202A (en) * | 2024-12-30 | 2025-04-04 | 黑龙江汇芯半导体有限公司 | Over-temperature protection circuit with rising and falling threshold values |
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