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CN115001400A - A High Precision Eight Phase LC Voltage Controlled Oscillator - Google Patents

A High Precision Eight Phase LC Voltage Controlled Oscillator Download PDF

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Publication number
CN115001400A
CN115001400A CN202210453709.1A CN202210453709A CN115001400A CN 115001400 A CN115001400 A CN 115001400A CN 202210453709 A CN202210453709 A CN 202210453709A CN 115001400 A CN115001400 A CN 115001400A
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China
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terminal
nmos transistor
voltage
controlled oscillator
output signal
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Chinese (zh)
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李振荣
段世泽
余立艳
曲凡
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Xidian University
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Xidian University
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
    • H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
    • H03B5/1206—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device using multiple transistors for amplification
    • H03B5/1218—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device using multiple transistors for amplification the generator being of the balanced type
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
    • H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
    • H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
    • H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
    • H03B5/1228—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device the amplifier comprising one or more field effect transistors
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks

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  • Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)

Abstract

The invention relates to a high-precision eight-phase LC voltage-controlled oscillator, which comprises a first voltage-controlled oscillator unit, a second voltage-controlled oscillator unit, a third voltage-controlled oscillator unit, a fourth voltage-controlled oscillator unit and a coupling network circuit, wherein output signals V1+ and V1-of the first voltage-controlled oscillator unit, output signals V2+ and V2-of the second voltage-controlled oscillator unit, output signals V3+ and V3-of the third voltage-controlled oscillator unit, and output signals V4+ and V4-of the fourth voltage-controlled oscillator unit are coupled through the coupling network circuit, and after rectification, the output signals V1+, V1-, V2+, V2-, V3+, V3-, V4+ and V4-become eight-phase oscillation signals. The invention adopts in-phase injection, the coupling network circuit injects current into the resonant cavity of each voltage-controlled oscillator unit, the current is in-phase with the output voltage of the voltage-controlled oscillator unit, compared with a multi-phase oscillator coupled in opposite phase, the multi-phase oscillator has the advantages of low phase noise and low phase difference, and under the in-phase injection, the offset of the frequency offset natural oscillation frequency is smaller.

Description

High-precision eight-phase LC voltage-controlled oscillator
Technical Field
The invention belongs to the technical field of radio frequency integrated circuits, and relates to a high-precision eight-phase LC voltage-controlled oscillator.
Background
Quadrature signals or multi-phase signals are necessary for wireless transceivers, sub-rate clock data recovery circuits, phased arrays, direct conversion transmitters, and fractional frequency synthesizers. There are many ways to generate the quadrature signals. The first is to use a phase filter to generate the quadrature signal, however, its insertion loss is high, and thus an additional buffer is required to compensate for the loss. Secondly, a frequency divider with quadrature outputs can be used, but usually requires very high frequency input signals, making design very difficult when the output frequency is high. A final option is to use a quadrature voltage controlled oscillator which itself provides a quadrature output signal with high accuracy.
There are many circuit topologies and structures for realizing a multiphase signal oscillator, and although a ring oscillator has the advantage of multiphase output signals, its phase noise performance is poor, so that an LC oscillator is used in a communication system with high requirements. A conventional multiphase LC oscillator generates a multiphase signal by coupling a plurality of LC oscillators in opposite phases, pulling them apart from each other, and stabilizing them in the vicinity of a certain natural oscillation frequency; or the outputs of the LC oscillators are combined by an analog phase interpolator to output a multiphase signal.
The existing multiphase oscillator mostly adopts an inverse phase coupling mode, four LC oscillators are reversely coupled to generate eight paths of oscillation signals, however, due to the fact that NMOS tubes and PMOS tubes are stacked, the existing multiphase oscillator is not suitable for the situation that the power supply voltage is too low, power consumption and swing amplitude of the circuit are sacrificed, and the circuit adopts the inverse phase coupling mode, and the oscillation frequency deviates from the resonance frequency greatly. In addition, there is an eight-phase oscillator using a capacitor as a coupling unit, which uses an active inductor instead of a passive inductor having a large area, and realizes eight-phase oscillation signal output in a wide frequency range. However, the quality factor of the active inductor is poor, and the active inductor is greatly influenced by PVT, so that it is difficult to realize high precision and high reliability.
Therefore, how to achieve low phase difference in the tuning range while ensuring low power consumption and low phase noise of the circuit becomes a problem to be solved urgently.
Disclosure of Invention
In order to solve the problems in the prior art, the invention provides an eight-phase LC voltage-controlled oscillator with high precision. The technical problem to be solved by the invention is realized by the following technical scheme:
the embodiment of the invention provides a high-precision eight-phase LC voltage-controlled oscillator, which comprises a first voltage-controlled oscillator unit, a second voltage-controlled oscillator unit, a third voltage-controlled oscillator unit, a fourth voltage-controlled oscillator unit and a coupling network circuit, wherein:
an output signal V1+ and an output signal V1-of the first voltage-controlled oscillator unit, an output signal V2+ and an output signal V2-of the second voltage-controlled oscillator unit, an output signal V3+ and an output signal V3-of the third voltage-controlled oscillator unit, an output signal V4+ and an output signal V4-of the fourth voltage-controlled oscillator unit are coupled through the coupling network circuit, and after rectification of the coupling network circuit, the output signal V1+, the output signal V1-, the output signal V2+, the output signal V2-, the output signal V3+, the output signal V3-, the output signal V4+ and the output signal V4-are eight-phase oscillation signals.
In an embodiment of the present invention, the first voltage controlled oscillator unit includes an NMOS transistor M0, an NMOS transistor M1, an NMOS transistor M2, a variable capacitor C1, a variable capacitor C2, an inductor L1, and an inductor L2, wherein:
the source terminal of the NMOS transistor M0 is grounded, the gate terminal of the NMOS transistor M0 is connected to a bias voltage terminal Vb, and the drain terminal of the NMOS transistor M0 is connected to the source terminal of the NMOS transistor M1 and the source terminal of the NMOS transistor M2, respectively;
the gate terminal of the NMOS transistor M1 is connected to the drain terminal of the NMOS transistor M2 and to the first output signal terminal of the first voltage-controlled oscillator unit for outputting a signal V1-;
the gate terminal of the NMOS transistor M2 is connected to the drain terminal of the NMOS transistor M1 and to the second output signal terminal of the first voltage-controlled oscillator unit for outputting a signal V1 +;
a first end of the variable capacitor C1 is connected to a first end of the variable capacitor C2, a first end of the variable capacitor C1 and a first end of the variable capacitor C2 are simultaneously connected to a control signal terminal Vctrl, a second end of the variable capacitor C1 is connected to a drain terminal of the NMOS transistor M1 and to a second output signal terminal of the first voltage-controlled oscillator unit, and a second end of the variable capacitor C2 is connected to a drain terminal of the NMOS transistor M1 and to a first output signal terminal of the first voltage-controlled oscillator unit;
a first terminal of the inductor L1 and a first terminal of the inductor L2 are connected, a first terminal of the inductor L1 and a first terminal of the inductor L2 are connected to a power supply terminal VDD, a second terminal of the inductor L1 is connected to a drain terminal of the NMOS transistor M1, a second terminal of the variable capacitor C1 and a first output signal terminal of the first voltage controlled oscillator unit, and a second terminal of the inductor L2 is connected to a drain terminal of the NMOS transistor M2, a second terminal of the variable capacitor C2 and a second output signal terminal of the first voltage controlled oscillator unit.
In an embodiment of the present invention, the second voltage controlled oscillator unit includes an NMOS transistor M3, an NMOS transistor M4, an NMOS transistor M5, a variable capacitor C3, a variable capacitor C4, an inductor L3, and an inductor L4, where:
the source terminal of the NMOS transistor M3 is grounded, the gate terminal of the NMOS transistor M3 is connected to a bias voltage terminal Vb, and the drain terminal of the NMOS transistor M3 is connected to the source terminal of the NMOS transistor M4 and the source terminal of the NMOS transistor M5, respectively;
the gate terminal of the NMOS transistor M4 is connected to the drain terminal of the NMOS transistor M5 and to the first output signal terminal of the second voltage-controlled oscillator unit for outputting a signal V2-;
the gate terminal of the NMOS transistor M5 is connected to the drain terminal of the NMOS transistor M4 and to the second output signal terminal of the second voltage-controlled oscillator unit for outputting a signal V2 +;
a first end of the variable capacitor C3 is connected to a first end of the variable capacitor C4, a first end of the variable capacitor C3 and a first end of the variable capacitor C4 are simultaneously connected to a control signal terminal Vctrl, a second end of the variable capacitor C3 is connected to a drain terminal of the NMOS transistor M4 and to a second output signal terminal of the second voltage-controlled oscillator unit, and a second end of the variable capacitor C4 is connected to a drain terminal of the NMOS transistor M4 and to a first output signal terminal of the second voltage-controlled oscillator unit;
a first terminal of the inductor L3 and a first terminal of the inductor L4 are connected, a first terminal of the inductor L3 and a first terminal of the inductor L4 are connected to a power supply terminal VDD, a second terminal of the inductor L3 is connected to a drain terminal of the NMOS transistor M4, a second terminal of the variable capacitor C3 and a first output signal terminal of the second voltage-controlled oscillator unit, and a second terminal of the inductor L4 is connected to a drain terminal of the NMOS transistor M5, a second terminal of the variable capacitor C4 and a second output signal terminal of the second voltage-controlled oscillator unit.
In an embodiment of the present invention, the third voltage controlled oscillator unit includes an NMOS transistor M6, an NMOS transistor M7, an NMOS transistor M8, a variable capacitor C5, a variable capacitor C6, an inductor L5, and an inductor L6, where:
the source terminal of the NMOS transistor M6 is grounded, the gate terminal of the NMOS transistor M6 is connected to a bias voltage terminal Vb, and the drain terminal of the NMOS transistor M6 is connected to the source terminal of the NMOS transistor M7 and the source terminal of the NMOS transistor M8, respectively;
the gate terminal of the NMOS transistor M7 is connected to the drain terminal of the NMOS transistor M8 and to the first output signal terminal of the third voltage-controlled oscillator unit for outputting a signal V3-;
the gate terminal of the NMOS transistor M8 is connected to the drain terminal of the NMOS transistor M7 and to the second output signal terminal of the third voltage-controlled oscillator unit for outputting a signal V3 +;
a first end of the variable capacitor C5 is connected to a first end of the variable capacitor C6, a first end of the variable capacitor C5 and a first end of the variable capacitor C6 are simultaneously connected to a control signal terminal Vctrl, a second end of the variable capacitor C5 is connected to a drain terminal of the NMOS transistor M7 and to a second output signal terminal of the third voltage-controlled oscillator unit, and a second end of the variable capacitor C6 is connected to a drain terminal of the NMOS transistor M7 and to a first output signal terminal of the third voltage-controlled oscillator unit;
a first terminal of the inductor L5 and a first terminal of the inductor L6 are connected, a first terminal of the inductor L5 and a first terminal of the inductor L6 are connected to a power supply terminal VDD, a second terminal of the inductor L5 is connected to a drain terminal of the NMOS transistor M7, a second terminal of the variable capacitor C5 and a first output signal terminal of the third vco cell, and a second terminal of the inductor L6 is connected to a drain terminal of the NMOS transistor M8, a second terminal of the variable capacitor C6 and a second output signal terminal of the third vco cell.
In an embodiment of the present invention, the fourth voltage controlled oscillator unit includes an NMOS transistor M9, an NMOS transistor M10, an NMOS transistor M11, a variable capacitor C7, a variable capacitor C8, an inductor L7, and an inductor L8, where:
the source terminal of the NMOS transistor M9 is grounded, the gate terminal of the NMOS transistor M9 is connected to a bias voltage terminal Vb, and the drain terminal of the NMOS transistor M9 is connected to the source terminal of the NMOS transistor M10 and the source terminal of the NMOS transistor M11, respectively;
the gate terminal of the NMOS transistor M10 is connected to the drain terminal of the NMOS transistor M11 and to the first output signal terminal of the fourth vco unit, which is used for outputting the signal V4-;
the gate terminal of the NMOS transistor M11 is connected to the drain terminal of the NMOS transistor M10 and to the second output signal terminal of the fourth voltage-controlled oscillator unit for outputting a signal V4 +;
a first end of the variable capacitor C7 is connected to a first end of the variable capacitor C8, a first end of the variable capacitor C7 and a first end of the variable capacitor C8 are simultaneously connected to a control signal terminal Vctrl, a second end of the variable capacitor C7 is connected to a drain terminal of the NMOS transistor M10 and to a second output signal terminal of the fourth voltage-controlled oscillator unit, and a second end of the variable capacitor C8 is connected to a drain terminal of the NMOS transistor M10 and to a first output signal terminal of the fourth voltage-controlled oscillator unit;
a first end of the inductor L7 is connected to a first end of the inductor L8, a first end of the inductor L7 and a first end of the inductor L8 are connected to a power supply terminal VDD, a second end of the inductor L7 is connected to a drain terminal of the NMOS transistor M10, a second end of the variable capacitor C7 and a first output signal terminal of the fourth voltage-controlled oscillator unit, and a second end of the inductor L8 is connected to a drain terminal of the NMOS transistor M11, a second end of the variable capacitor C8 and a second output signal terminal of the fourth voltage-controlled oscillator unit.
In one embodiment of the present invention, the coupling network circuit includes an NMOS transistor M12, an NMOS transistor M13, an NMOS transistor M14, an NMOS transistor M15, an NMOS transistor M16, an NMOS transistor M17, an NMOS transistor M18, and an NMOS transistor M19, wherein:
the source terminal of the NMOS transistor M12 is connected to the drain terminal of the NMOS transistor M13 and the gate terminal of the NMOS transistor M13, and to the second output signal terminal of the second voltage-controlled oscillator unit for outputting a signal V2 +;
the source terminal of the NMOS transistor M13 is connected to the drain terminal of the NMOS transistor M14 and the gate terminal of the NMOS transistor M14, and to the second output signal terminal of the third voltage-controlled oscillator unit for outputting a signal V3 +;
the source terminal of the NMOS transistor M14 is connected to the drain terminal of the NMOS transistor M15 and the gate terminal of the NMOS transistor M15, and to the second output signal terminal of the fourth voltage-controlled oscillator unit for outputting a signal V4 +;
the source terminal of the NMOS transistor M15 is connected with the drain terminal of the NMOS transistor M16 and the gate terminal of the NMOS transistor M16, and is connected with the first output signal terminal of the first voltage-controlled oscillator unit for outputting a signal V1-;
the source terminal of the NMOS transistor M16 is connected with the drain terminal of the NMOS transistor M17 and the gate terminal of the NMOS transistor M17, and is connected with the first output signal terminal of the second voltage-controlled oscillator unit for outputting a signal V2-;
the source terminal of the NMOS transistor M17 is connected with the drain terminal of the NMOS transistor M18 and the gate terminal of the NMOS transistor M18, and is connected with the first output signal terminal of the third voltage-controlled oscillator unit for outputting a signal V3-;
the source terminal of the NMOS transistor M18 is connected with the drain terminal of the NMOS transistor M19 and the gate terminal of the NMOS transistor M19, and is connected with the first output signal terminal of the fourth voltage-controlled oscillator unit for outputting a signal V4-;
the source terminal of the NMOS transistor M19 is connected to the drain terminal of the NMOS transistor M12 and the gate terminal of the NMOS transistor M12, and is connected to the second output signal terminal of the first voltage-controlled oscillator unit for outputting a signal V1 +.
Compared with the prior art, the invention has the beneficial effects that:
first, the present invention adopts the mode of in-phase injection, the current injected by the coupling network circuit to the resonant cavity of each voltage-controlled oscillator unit is in-phase with the output voltage of the voltage-controlled oscillator unit, and compared with a multi-phase oscillator coupled in reverse phase, the present invention has the advantages of low phase noise and low phase difference, and under the in-phase injection, the offset of the frequency offset from the natural oscillation frequency is smaller.
Secondly, the invention only adopts NMOS tubes as a tail current source and a negative resistance pair, increases the output voltage swing and has the characteristics of low voltage and low power consumption.
Thirdly, the invention adopts a ring-shaped and symmetrical coupling network circuit, and has higher circuit stability under temperature, voltage and process deviation.
Fourthly, the coupling network circuit of the invention is composed of MOS tubes and does not contain frequency-related devices such as inductors and capacitors, thereby realizing higher phase precision in a frequency tuning range.
Other aspects and features of the present invention will become apparent from the following detailed description, which proceeds with reference to the accompanying drawings. It is to be understood, however, that the drawings are designed solely for purposes of illustration and not as a definition of the limits of the invention, for which reference should be made to the appended claims. It should be further understood that the drawings are not necessarily drawn to scale and that, unless otherwise indicated, they are merely intended to conceptually illustrate the structures and procedures described herein.
Drawings
Fig. 1 is a schematic circuit diagram of a high-precision eight-phase LC voltage-controlled oscillator according to an embodiment of the present invention;
FIG. 2 is a time domain simulation diagram according to an embodiment of the present invention;
fig. 3 is a frequency domain simulation diagram according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to specific examples, but the embodiments of the present invention are not limited thereto.
Example one
Referring to fig. 1, fig. 1 is a schematic circuit structure diagram of a high-precision eight-phase LC voltage-controlled oscillator according to an embodiment of the present invention, which provides a high-precision eight-phase LC voltage-controlled oscillator including a first voltage-controlled oscillator unit, a second voltage-controlled oscillator unit, a third voltage-controlled oscillator unit, a fourth voltage-controlled oscillator unit, and a coupling network circuit, wherein:
the output signal V1+ and the output signal V1-of the first voltage-controlled oscillator unit, the output signal V2+ and the output signal V2-of the second voltage-controlled oscillator unit, the output signal V3+ and the output signal V3-of the third voltage-controlled oscillator unit, the output signal V4+ and the output signal V4-of the fourth voltage-controlled oscillator unit are coupled through a coupling network circuit, and after rectification of the coupling network circuit, the output signal V1+, the output signal V1-, the output signal V2+, the output signal V2-, the output signal V3+, the output signal V3-, the output signal V4+ and the output signal V4-are stabilized to be eight-phase oscillation signals.
In a specific embodiment, the first voltage-controlled oscillator unit includes an NMOS transistor M0, an NMOS transistor M1, an NMOS transistor M2, a variable capacitor C1, a variable capacitor C2, an inductor L1, and an inductor L2, where:
the source terminal of the NMOS tube M0 is grounded, the gate terminal of the NMOS tube M0 is connected with a bias voltage terminal Vb, and the drain terminal of the NMOS tube M0 is respectively connected with the source terminal of the NMOS tube M1 and the source terminal of the NMOS tube M2;
the grid end of the NMOS tube M1 is connected with the drain end of the NMOS tube M2 and is connected with a first output signal end of the first voltage-controlled oscillator unit for outputting a signal V1-;
the gate terminal of the NMOS transistor M2 is connected with the drain terminal of the NMOS transistor M1 and connected with the second output signal terminal of the first voltage-controlled oscillator unit for outputting a signal V1 +;
a first end of the variable capacitor C1 is connected with a first end of the variable capacitor C2, a first end of the variable capacitor C1 and a first end of the variable capacitor C2 are simultaneously connected to a control signal terminal Vctrl, a second end of the variable capacitor C1 is connected with a drain terminal of the NMOS transistor M1 and is connected with a second output signal terminal of the first voltage-controlled oscillator unit, and a second end of the variable capacitor C2 is connected with a drain terminal of the NMOS transistor M1 and is connected with a first output signal terminal of the first voltage-controlled oscillator unit;
a first terminal of the inductor L1 is connected to a first terminal of the inductor L2, a first terminal of the inductor L1 and a first terminal of the inductor L2 are connected to a power supply terminal VDD, a second terminal of the inductor L1 is connected to a drain terminal of the NMOS transistor M1, a second terminal of the variable capacitor C1 and a first output signal terminal of the first voltage-controlled oscillator unit, and a second terminal of the inductor L2 is connected to a drain terminal of the NMOS transistor M2, a second terminal of the variable capacitor C2 and a second output signal terminal of the first voltage-controlled oscillator unit.
In a specific embodiment, the second voltage-controlled oscillator unit includes an NMOS transistor M3, an NMOS transistor M4, an NMOS transistor M5, a variable capacitor C3, a variable capacitor C4, an inductor L3, and an inductor L4, where:
the source terminal of the NMOS tube M3 is grounded, the grid terminal of the NMOS tube M3 is connected with a bias voltage terminal Vb, and the drain terminal of the NMOS tube M3 is respectively connected with the source terminal of the NMOS tube M4 and the source terminal of the NMOS tube M5;
the gate terminal of the NMOS transistor M4 is connected with the drain terminal of the NMOS transistor M5 and connected with the first output signal terminal of the second voltage-controlled oscillator unit for outputting a signal V2-;
the gate terminal of the NMOS transistor M5 is connected with the drain terminal of the NMOS transistor M4 and connected with the second output signal terminal of the second voltage-controlled oscillator unit for outputting a signal V2 +;
a first end of the variable capacitor C3 is connected to a first end of the variable capacitor C4, a first end of the variable capacitor C3 and a first end of the variable capacitor C4 are simultaneously connected to the control signal terminal Vctrl, a second end of the variable capacitor C3 is connected to a drain terminal of the NMOS transistor M4 and to a second output signal terminal of the second vco unit, and a second end of the variable capacitor C4 is connected to a drain terminal of the NMOS transistor M4 and to a first output signal terminal of the second vco unit;
a first terminal of the inductor L3 is connected to a first terminal of the inductor L4, a first terminal of the inductor L3 and a first terminal of the inductor L4 are connected to a power supply terminal VDD, a second terminal of the inductor L3 is connected to a drain terminal of the NMOS transistor M4, a second terminal of the variable capacitor C3 and a first output signal terminal of the second voltage-controlled oscillator unit, and a second terminal of the inductor L4 is connected to a drain terminal of the NMOS transistor M5, a second terminal of the variable capacitor C4 and a second output signal terminal of the second voltage-controlled oscillator unit.
In a specific embodiment, the third voltage controlled oscillator unit includes an NMOS transistor M6, an NMOS transistor M7, an NMOS transistor M8, a variable capacitor C5, a variable capacitor C6, an inductor L5, and an inductor L6, where:
the source terminal of the NMOS tube M6 is grounded, the grid terminal of the NMOS tube M6 is connected with a bias voltage terminal Vb, and the drain terminal of the NMOS tube M6 is respectively connected with the source terminal of the NMOS tube M7 and the source terminal of the NMOS tube M8;
the gate terminal of the NMOS transistor M7 is connected to the drain terminal of the NMOS transistor M8 and to the first output signal terminal of the third voltage-controlled oscillator unit for outputting the signal V3-;
the gate terminal of the NMOS transistor M8 is connected to the drain terminal of the NMOS transistor M7 and to the second output signal terminal of the third voltage-controlled oscillator unit, which is used for outputting the signal V3 +;
a first end of the variable capacitor C5 is connected with a first end of the variable capacitor C6, a first end of the variable capacitor C5 and a first end of the variable capacitor C6 are simultaneously connected to a control signal terminal Vctrl, a second end of the variable capacitor C5 is connected with a drain terminal of the NMOS transistor M7 and is connected with a second output signal terminal of the third voltage-controlled oscillator unit, and a second end of the variable capacitor C6 is connected with a drain terminal of the NMOS transistor M7 and is connected with a first output signal terminal of the third voltage-controlled oscillator unit;
a first terminal of the inductor L5 is connected to a first terminal of the inductor L6, a first terminal of the inductor L5 and a first terminal of the inductor L6 are connected to a power supply terminal VDD, a second terminal of the inductor L5 is connected to a drain terminal of the NMOS transistor M7, a second terminal of the variable capacitor C5 and a first output signal terminal of the third voltage-controlled oscillator unit, and a second terminal of the inductor L6 is connected to a drain terminal of the NMOS transistor M8, a second terminal of the variable capacitor C6 and a second output signal terminal of the third voltage-controlled oscillator unit.
In a specific embodiment, the fourth voltage controlled oscillator unit includes an NMOS transistor M9, an NMOS transistor M10, an NMOS transistor M11, a variable capacitor C7, a variable capacitor C8, an inductor L7, and an inductor L8, where:
the source terminal of the NMOS tube M9 is grounded, the grid terminal of the NMOS tube M9 is connected with a bias voltage terminal Vb, and the drain terminal of the NMOS tube M9 is respectively connected with the source terminal of the NMOS tube M10 and the source terminal of the NMOS tube M11;
the gate terminal of the NMOS transistor M10 is connected to the drain terminal of the NMOS transistor M11 and to the first output signal terminal of the fourth voltage-controlled oscillator unit for outputting a signal V4-;
the gate terminal of the NMOS transistor M11 is connected to the drain terminal of the NMOS transistor M10 and to the second output signal terminal of the fourth voltage-controlled oscillator unit for outputting a signal V4 +;
a first end of the variable capacitor C7 is connected with a first end of the variable capacitor C8, a first end of the variable capacitor C7 and a first end of the variable capacitor C8 are simultaneously connected to a control signal terminal Vctrl, a second end of the variable capacitor C7 is connected with a drain terminal of the NMOS transistor M10 and is connected with a second output signal terminal of the fourth voltage-controlled oscillator unit, and a second end of the variable capacitor C8 is connected with a drain terminal of the NMOS transistor M10 and is connected with a first output signal terminal of the fourth voltage-controlled oscillator unit;
a first terminal of the inductor L7 is connected to a first terminal of the inductor L8, a first terminal of the inductor L7 and a first terminal of the inductor L8 are connected to a power supply terminal VDD, a second terminal of the inductor L7 is connected to a drain terminal of the NMOS transistor M10, a second terminal of the variable capacitor C7 and a first output signal terminal of the fourth voltage-controlled oscillator unit, and a second terminal of the inductor L8 is connected to a drain terminal of the NMOS transistor M11, a second terminal of the variable capacitor C8 and a second output signal terminal of the fourth voltage-controlled oscillator unit.
In one embodiment, the coupling network circuit comprises an NMOS transistor M12, an NMOS transistor M13, an NMOS transistor M14, an NMOS transistor M15, an NMOS transistor M16, an NMOS transistor M17, an NMOS transistor M18, and an NMOS transistor M19, wherein:
the source terminal of the NMOS transistor M12 is connected with the drain terminal of the NMOS transistor M13 and the gate terminal of the NMOS transistor M13, and is connected with the second output signal terminal of the second voltage-controlled oscillator unit for outputting a signal V2 +;
the source terminal of the NMOS transistor M13 is connected to the drain terminal of the NMOS transistor M14 and the gate terminal of the NMOS transistor M14, and is connected to the second output signal terminal of the third voltage-controlled oscillator unit, which is used for outputting a signal V3 +;
the source terminal of the NMOS transistor M14 is connected to the drain terminal of the NMOS transistor M15 and the gate terminal of the NMOS transistor M15, and to the second output signal terminal of the fourth voltage-controlled oscillator unit for outputting the signal V4 +;
the source terminal of the NMOS transistor M15 is connected with the drain terminal of the NMOS transistor M16 and the gate terminal of the NMOS transistor M16, and is connected with the first output signal terminal of the first voltage-controlled oscillator unit for outputting a signal V1-;
the source terminal of the NMOS transistor M16 is connected with the drain terminal of the NMOS transistor M17 and the gate terminal of the NMOS transistor M17, and is connected with the first output signal terminal of the second voltage-controlled oscillator unit for outputting a signal V2-;
the source terminal of the NMOS transistor M17 is connected with the drain terminal of the NMOS transistor M18 and the gate terminal of the NMOS transistor M18, and is connected with the first output signal terminal of the third voltage-controlled oscillator unit for outputting a signal V3-;
the source terminal of the NMOS transistor M18 is connected to the drain terminal of the NMOS transistor M19 and the gate terminal of the NMOS transistor M19, and is connected to the first output signal terminal of the fourth voltage-controlled oscillator unit for outputting the signal V4-;
the source terminal of the NMOS transistor M19 is connected to the drain terminal of the NMOS transistor M12 and the gate terminal of the NMOS transistor M12, and to the second output signal terminal of the first voltage-controlled oscillator unit for outputting the signal V1 +.
In the embodiment, the eight-phase LC voltage-controlled oscillator is composed of four LC voltage-controlled oscillator units (i.e. a first voltage-controlled oscillator unit, a second voltage-controlled oscillator unit, a third voltage-controlled oscillator unit, and a fourth voltage-controlled oscillator unit) and a coupling network circuit, and is used for generating eight oscillation signals V1+, V1-, V2+, V2-, V3+, V3-, V4+, and V4-, and the phase difference between two adjacent signals in the coupling network circuit is 45 °. The first voltage-controlled oscillator unit is used for generating differential oscillation signals V1+ and V1-, and comprises an NMOS tube M0, an NMOS tube M1, an NMOS tube M2, a variable capacitor C1, a variable capacitor C2, an inductor L1 and an inductor L2; the NMOS tube M0 functions as a bias current source and can control the current magnitude by the voltage of the gate terminal, its source terminal is connected to ground, its gate terminal is connected to the bias voltage terminal Vb, its drain terminal is connected to the NMOS tube M1 and the source terminal of the NMOS tube M2, the MNOS tube M1 and the NMOS tube M2 are connected in a cross-coupling manner, forming a negative resistance pair to supplement the energy consumed by the resonant cavity, wherein the drain terminal of the NMOS tube M1 is connected to the gate terminal of the NMOS tube M2, the second terminal of the variable capacitor C1, the second terminal of the inductor L1 and the second output signal terminal of the first voltage-controlled oscillator unit for outputting the signal V1+, the drain terminal of the NMOS tube M2 is connected to the gate terminal of the NMOS tube M1, the second terminal of the variable capacitor C2, the second terminal of the second inductor L2 and the first output signal terminal of the first voltage-controlled oscillator unit for outputting the signal V1-, the NMOS tubes M0, M1, and M2 all operate in a saturation region, the first end of the variable capacitor C1 is connected to the first end of the variable capacitor C2 and connected to a control signal terminal Vctrl (i.e., a control voltage terminal), the size of the variable capacitor can be changed by adjusting the control voltage of the control signal terminal Vctrl, so as to change the resonant frequency of the LC resonant circuit, the first end of the inductor L1 is connected to the first end of the inductor L2 and connected to the power supply terminal VDD, and by selecting an appropriate inductance value and using an inductor with a high quality factor, the noise performance of the circuit can be improved and the area can be optimized. It should be noted that the principles of the second voltage controlled oscillator unit, the third voltage controlled oscillator unit, and the fourth voltage controlled oscillator unit are the same as those of the first voltage controlled oscillator unit, and are not described herein again.
In this embodiment, the coupling network circuit includes eight NMOS transistors, that is, NMOS transistors M12 to M19, and the coupling network circuit is used to convert the output voltages of four voltage-controlled oscillator units into currents, and inject the currents into the resonant cavities of other voltage-controlled oscillator units, and finally generate eight oscillation signals with adjacent phase differences of 45 °. The coupling network circuit is formed into a ring shape by connecting MOS tubes connected in a diode mode end to end
The working principle of this example is as follows:
after the circuit is started, four voltage-controlled oscillator units generate four groups of differential signals, each oscillation signal is converted into current through an MOS (metal oxide semiconductor) tube and then is respectively injected into a resonant cavity of the corresponding voltage-controlled oscillator unit to mutually influence the phase and the frequency of the voltage-controlled oscillator unit, finally the circuit is stable near the natural oscillation frequency, and the four voltage-controlled oscillator units output high-precision eight-phase oscillation signals.
Let V1+ ═ Vcos (ω t), V2+ ═ Vcos (ω t-pi/4), V4 ═ Vcos (ω t + pi/4), where V is the oscillation signal amplitude and ω is the oscillation signal frequency. The current flowing through the NMOS transistor M12 is:
Id 12 ＝g m (Vcos(ωt)-Vcos(ωt-π/4))
wherein gm is the transconductance of the transistor, and similarly, the current flowing through the NMOS transistor M19 is:
Id 19 ＝g m (Vcos(ωt+π/4)-Vcos(ωt))
the current injected into the first voltage-controlled oscillator unit by the NMOS transistor M12 and the NMOS transistor M19 through the node V1+ is:
Figure BDA0003619870990000151
the current injected into the first voltage-controlled oscillator unit by the negative resistance pair NMOS transistor M1 is:
Id 1 ＝g m1 Vcos(ωt)
therefore, the current injected into the resonant cavity by the coupling network circuit and the negative resistance pair is in phase, which is referred to as in-phase injection coupling. The coupling mode does not introduce extra phase angles, so that the change of the resonant frequency is small, the stability is improved, and the phase error is reduced.
The effect of the present invention will be further described in conjunction with simulation experiments
1. Simulation experiment conditions are as follows:
the simulation experiment element of the invention adopts an SMIC 40nmRFCMOS process, and a simulation circuit of the invention is built on the basis of a cadence IC617 simulation experiment platform under a Redhat system.
The simulation of the invention adopts a Spectre RF simulation tool to simulate the circuit of the invention, the given power supply voltage VDD is 1.1V, the working temperature is 27 ℃, the bias voltage Vb is 0.65V, and the control voltage Vctrl is 0V.
2. Simulation content and result analysis:
simulation 1, under the above working conditions, a spectrum RF simulation tool is adopted, and corresponding output ports are respectively added to two output ends of each voltage-controlled oscillator unit to perform transient simulation on the present invention, and the result is shown in fig. 2, where the abscissa represents time in ns, and the ordinate represents the magnitude of an oscillation signal in V. As can be seen from fig. 2, the present invention has eight output signals, and the phase difference between two adjacent signals is 45 °.
And 2, under the working conditions, adopting a Spectre RF simulation tool, respectively adding corresponding output ports at two output ends of each voltage-controlled oscillator unit, setting the control voltage Vctrl to be changed from 0 to the power supply voltage VDD, wherein the step length is 0.1V, and carrying out PSS simulation on the voltage-controlled oscillator unit, wherein the result is shown in figure 3, wherein the abscissa is the frequency of an output signal and has the unit of Ghz, and the ordinate is the phase of the output signal and has the unit of degrees. As can be seen from fig. 3, the present invention has eight output signals, the phase change of each output signal in the frequency tuning range is less than 1 °, and the phase error of the two adjacent output signals is less than 0.035 °.
The theoretical analysis and simulation results show that the eight-phase LC voltage-controlled oscillator provided by the invention has the advantages of low phase noise and low phase difference while ensuring low power consumption and low voltage.
First, the present invention adopts the mode of in-phase injection, the current injected by the coupling network circuit to the resonant cavity of each voltage-controlled oscillator unit is in-phase with the output voltage of the voltage-controlled oscillator unit, and compared with a multi-phase oscillator coupled in reverse phase, the present invention has the advantages of low phase noise and low phase difference, and under the in-phase injection, the offset of the frequency offset from the natural oscillation frequency is smaller.
Secondly, the invention only adopts NMOS tubes as a tail current source and a negative resistance pair, increases the output voltage swing and has the characteristics of low voltage and low power consumption.
Thirdly, the invention adopts a ring-shaped and symmetrical coupling network circuit, and has higher circuit stability under temperature, voltage and process deviation.
Fourthly, the coupling network circuit of the invention is composed of MOS tubes and does not contain frequency-related devices such as inductance and capacitance, thus realizing higher phase precision in the frequency tuning range.
In the description of the invention, the terms "first", "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implying any number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic data point described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristic data points described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples described in this specification can be combined and combined by those skilled in the art.
The foregoing is a more detailed description of the invention in connection with specific preferred embodiments and it is not intended that the invention be limited to these specific details. For those skilled in the art to which the invention pertains, several simple deductions or substitutions can be made without departing from the spirit of the invention, and all shall be considered as belonging to the protection scope of the invention.

Claims (6)

1.一种高精度的八相位LC压控振荡器，其特征在于，所述八相位LC压控振荡器包括第一压控振荡器单元、第二压控振荡器单元、第三压控振荡器单元、第四压控振荡器单元以及耦合网络电路，其中：1. A high-precision eight-phase LC voltage-controlled oscillator, wherein the eight-phase LC voltage-controlled oscillator comprises a first voltage-controlled oscillator unit, a second voltage-controlled oscillator unit, a third voltage-controlled oscillator a voltage-controlled oscillator unit, a fourth voltage-controlled oscillator unit, and a coupling network circuit, wherein: 所述第一压控振荡器单元的输出信号V1+和输出信号V1-、所述第二压控振荡器单元的输出信号V2+和输出信号V2-、所述第三压控振荡器单元的输出信号V3+和输出信号V3-、所述第四压控振荡器单元的输出信号V4+和输出信号V4-通过所述耦合网络电路进行耦合，经过所述耦合网络电路的整流后，所述输出信号V1+、所述输出信号V1-、所述输出信号V2+、所述输出信号V2-、所述输出信号V3+、所述输出信号V3-、所述输出信号V4+和所述输出信号V4-成为八相振荡信号。The output signal V1+ and the output signal V1- of the first voltage-controlled oscillator unit, the output signal V2+ and the output signal V2- of the second voltage-controlled oscillator unit, and the output signal of the third voltage-controlled oscillator unit V3+ and the output signal V3-, the output signal V4+ and the output signal V4- of the fourth voltage-controlled oscillator unit are coupled through the coupling network circuit. After being rectified by the coupling network circuit, the output signals V1+, The output signal V1-, the output signal V2+, the output signal V2-, the output signal V3+, the output signal V3-, the output signal V4+ and the output signal V4- become eight-phase oscillation signals . 2.根据权利要求1所述的高精度的八相位LC压控振荡器，其特征在于，所述第一压控振荡器单元包括NMOS管M0、NMOS管M1、NMOS管M2、可变电容C1、可变电容C2、电感L1和电感L2，其中：2. The high-precision eight-phase LC voltage-controlled oscillator according to claim 1, wherein the first voltage-controlled oscillator unit comprises an NMOS transistor M0, an NMOS transistor M1, an NMOS transistor M2, and a variable capacitor C1 , variable capacitor C2, inductor L1 and inductor L2, where: 所述NMOS管M0的源极端接地，所述NMOS管M0的栅极端连接偏置电压端Vb，所述NMOS管M0的漏极端分别连接所述NMOS管M1的源极端和所述NMOS管M2的源极端；The source terminal of the NMOS transistor M0 is grounded, the gate terminal of the NMOS transistor M0 is connected to the bias voltage terminal Vb, and the drain terminal of the NMOS transistor M0 is respectively connected to the source terminal of the NMOS transistor M1 and the NMOS transistor M2. source extreme; 所述NMOS管M1的栅极端连接所述NMOS管M2的漏极端并连接所述第一压控振荡器单元的用于输出信号V1-的第一输出信号端；The gate terminal of the NMOS transistor M1 is connected to the drain terminal of the NMOS transistor M2 and is connected to the first output signal terminal of the first voltage-controlled oscillator unit for outputting the signal V1-; 所述NMOS管M2的栅极端连接所述NMOS管M1的漏极端并连接所述第一压控振荡器单元的用于输出信号V1+的第二输出信号端；The gate terminal of the NMOS transistor M2 is connected to the drain terminal of the NMOS transistor M1 and is connected to the second output signal terminal of the first voltage-controlled oscillator unit for outputting the signal V1+; 所述可变电容C1的第一端和所述可变电容C2的第一端相连、并且所述可变电容C1的第一端和所述可变电容C2的第一端同时连接到控制信号端Vctrl，所述可变电容C1的第二端连接所述NMOS管M1的漏极端并连接所述第一压控振荡器单元的第二输出信号端，所述可变电容C2的第二端连接所述NMOS管M1的漏极端并连接所述第一压控振荡器单元的第一输出信号端；The first end of the variable capacitor C1 is connected to the first end of the variable capacitor C2, and the first end of the variable capacitor C1 and the first end of the variable capacitor C2 are simultaneously connected to the control signal terminal Vctrl, the second terminal of the variable capacitor C1 is connected to the drain terminal of the NMOS transistor M1 and is connected to the second output signal terminal of the first voltage-controlled oscillator unit, and the second terminal of the variable capacitor C2 connecting the drain terminal of the NMOS transistor M1 and connecting the first output signal terminal of the first voltage-controlled oscillator unit; 所述电感L1的第一端和所述电感L2的第一端相连、并且所述电感L1的第一端和所述电感L2的第一端连接到电源端VDD，所述电感L1的第二端连接所述NMOS管M1的漏极端、所述可变电容C1的第二端和所述第一压控振荡器单元的第一输出信号端，所述电感L2的第二端连接所述NMOS管M2的漏极端、所述可变电容C2的第二端和所述第一压控振荡器单元的第二输出信号端。The first end of the inductance L1 is connected to the first end of the inductance L2, and the first end of the inductance L1 and the first end of the inductance L2 are connected to the power supply terminal VDD, and the second end of the inductance L1 The terminal is connected to the drain terminal of the NMOS transistor M1, the second terminal of the variable capacitor C1 and the first output signal terminal of the first voltage-controlled oscillator unit, and the second terminal of the inductor L2 is connected to the NMOS The drain terminal of the tube M2, the second terminal of the variable capacitor C2 and the second output signal terminal of the first voltage-controlled oscillator unit. 3.根据权利要求1所述的高精度的八相位LC压控振荡器，其特征在于，所述第二压控振荡器单元包括NMOS管M3、NMOS管M4、NMOS管M5、可变电容C3、可变电容C4、电感L3和电感L4，其中：3. The high-precision eight-phase LC voltage-controlled oscillator according to claim 1, wherein the second voltage-controlled oscillator unit comprises an NMOS transistor M3, an NMOS transistor M4, an NMOS transistor M5, and a variable capacitor C3 , variable capacitor C4, inductor L3 and inductor L4, where: 所述NMOS管M3的源极端接地，所述NMOS管M3的栅极端连接偏置电压端Vb，所述NMOS管M3的漏极端分别连接所述NMOS管M4的源极端和所述NMOS管M5的源极端；The source terminal of the NMOS transistor M3 is grounded, the gate terminal of the NMOS transistor M3 is connected to the bias voltage terminal Vb, and the drain terminal of the NMOS transistor M3 is respectively connected to the source terminal of the NMOS transistor M4 and the NMOS transistor M5. source extreme; 所述NMOS管M4的栅极端连接所述NMOS管M5的漏极端并连接所述第二压控振荡器单元的用于输出信号V2-的第一输出信号端；The gate terminal of the NMOS transistor M4 is connected to the drain terminal of the NMOS transistor M5 and is connected to the first output signal terminal of the second voltage-controlled oscillator unit for outputting the signal V2-; 所述NMOS管M5的栅极端连接所述NMOS管M4的漏极端并连接所述第二压控振荡器单元的用于输出信号V2+的第二输出信号端；The gate terminal of the NMOS transistor M5 is connected to the drain terminal of the NMOS transistor M4 and is connected to the second output signal terminal of the second voltage-controlled oscillator unit for outputting the signal V2+; 所述可变电容C3的第一端和所述可变电容C4的第一端相连、并且所述可变电容C3的第一端和所述可变电容C4的第一端同时连接到控制信号端Vctrl，所述可变电容C3的第二端连接所述NMOS管M4的漏极端并连接所述第二压控振荡器单元的第二输出信号端，所述可变电容C4的第二端连接所述NMOS管M4的漏极端并连接所述第二压控振荡器单元的第一输出信号端；The first end of the variable capacitor C3 is connected to the first end of the variable capacitor C4, and the first end of the variable capacitor C3 and the first end of the variable capacitor C4 are connected to the control signal at the same time terminal Vctrl, the second terminal of the variable capacitor C3 is connected to the drain terminal of the NMOS transistor M4 and is connected to the second output signal terminal of the second voltage-controlled oscillator unit, and the second terminal of the variable capacitor C4 connecting the drain terminal of the NMOS transistor M4 and the first output signal terminal of the second voltage-controlled oscillator unit; 所述电感L3的第一端和所述电感L4的第一端相连、并且所述电感L3的第一端和所述电感L4的第一端连接到电源端VDD，所述电感L3的第二端连接所述NMOS管M4的漏极端、所述可变电容C3的第二端和所述第二压控振荡器单元的第一输出信号端，所述电感L4的第二端连接所述NMOS管M5的漏极端、所述可变电容C4的第二端和所述第二压控振荡器单元的第二输出信号端。The first end of the inductance L3 is connected to the first end of the inductance L4, and the first end of the inductance L3 and the first end of the inductance L4 are connected to the power supply terminal VDD, and the second end of the inductance L3 The terminal is connected to the drain terminal of the NMOS transistor M4, the second terminal of the variable capacitor C3 and the first output signal terminal of the second voltage-controlled oscillator unit, and the second terminal of the inductor L4 is connected to the NMOS The drain terminal of the tube M5, the second terminal of the variable capacitor C4 and the second output signal terminal of the second voltage-controlled oscillator unit. 4.根据权利要求1所述的高精度的八相位LC压控振荡器，其特征在于，所述第三压控振荡器单元包括NMOS管M6、NMOS管M7、NMOS管M8、可变电容C5、可变电容C6、电感L5和电感L6，其中：4. The high-precision eight-phase LC voltage-controlled oscillator according to claim 1, wherein the third voltage-controlled oscillator unit comprises an NMOS transistor M6, an NMOS transistor M7, an NMOS transistor M8, and a variable capacitor C5. , variable capacitor C6, inductor L5 and inductor L6, where: 所述NMOS管M6的源极端接地，所述NMOS管M6的栅极端连接偏置电压端Vb，所述NMOS管M6的漏极端分别连接所述NMOS管M7的源极端和所述NMOS管M8的源极端；The source terminal of the NMOS transistor M6 is grounded, the gate terminal of the NMOS transistor M6 is connected to the bias voltage terminal Vb, and the drain terminal of the NMOS transistor M6 is respectively connected to the source terminal of the NMOS transistor M7 and the NMOS transistor M8. source extreme; 所述NMOS管M7的栅极端连接所述NMOS管M8的漏极端并连接所述第三压控振荡器单元的用于输出信号V3-的第一输出信号端；The gate terminal of the NMOS transistor M7 is connected to the drain terminal of the NMOS transistor M8 and is connected to the first output signal terminal of the third voltage-controlled oscillator unit for outputting the signal V3-; 所述NMOS管M8的栅极端连接所述NMOS管M7的漏极端并连接所述第三压控振荡器单元的用于输出信号V3+的第二输出信号端；The gate terminal of the NMOS transistor M8 is connected to the drain terminal of the NMOS transistor M7 and is connected to the second output signal terminal of the third voltage-controlled oscillator unit for outputting the signal V3+; 所述可变电容C5的第一端和所述可变电容C6的第一端相连、并且所述可变电容C5的第一端和所述可变电容C6的第一端同时连接到控制信号端Vctrl，所述可变电容C5的第二端连接所述NMOS管M7的漏极端并连接所述第三压控振荡器单元的第二输出信号端，所述可变电容C6的第二端连接所述NMOS管M7的漏极端并连接所述第三压控振荡器单元的第一输出信号端；The first end of the variable capacitor C5 is connected to the first end of the variable capacitor C6, and the first end of the variable capacitor C5 and the first end of the variable capacitor C6 are connected to the control signal at the same time terminal Vctrl, the second terminal of the variable capacitor C5 is connected to the drain terminal of the NMOS transistor M7 and is connected to the second output signal terminal of the third voltage-controlled oscillator unit, and the second terminal of the variable capacitor C6 connecting the drain terminal of the NMOS transistor M7 and the first output signal terminal of the third voltage-controlled oscillator unit; 所述电感L5的第一端和所述电感L6的第一端相连、并且所述电感L5的第一端和所述电感L6的第一端连接到电源端VDD，所述电感L5的第二端连接所述NMOS管M7的漏极端、所述可变电容C5的第二端和所述第三压控振荡器单元的第一输出信号端，所述电感L6的第二端连接所述NMOS管M8的漏极端、所述可变电容C6的第二端和所述第三压控振荡器单元的第二输出信号端。The first end of the inductance L5 is connected to the first end of the inductance L6, and the first end of the inductance L5 and the first end of the inductance L6 are connected to the power supply terminal VDD, and the second end of the inductance L5 The terminal is connected to the drain terminal of the NMOS transistor M7, the second terminal of the variable capacitor C5 and the first output signal terminal of the third voltage-controlled oscillator unit, and the second terminal of the inductor L6 is connected to the NMOS The drain terminal of the tube M8, the second terminal of the variable capacitor C6 and the second output signal terminal of the third voltage-controlled oscillator unit. 5.根据权利要求1所述的高精度的八相位LC压控振荡器，其特征在于，所述第四压控振荡器单元包括NMOS管M9、NMOS管M10、NMOS管M11、可变电容C7、可变电容C8、电感L7和电感L8，其中：5. The high-precision eight-phase LC voltage-controlled oscillator according to claim 1, wherein the fourth voltage-controlled oscillator unit comprises an NMOS transistor M9, an NMOS transistor M10, an NMOS transistor M11, and a variable capacitor C7 , variable capacitor C8, inductor L7 and inductor L8, where: 所述NMOS管M9的源极端接地，所述NMOS管M9的栅极端连接偏置电压端Vb，所述NMOS管M9的漏极端分别连接所述NMOS管M10的源极端和所述NMOS管M11的源极端；The source terminal of the NMOS transistor M9 is grounded, the gate terminal of the NMOS transistor M9 is connected to the bias voltage terminal Vb, and the drain terminal of the NMOS transistor M9 is respectively connected to the source terminal of the NMOS transistor M10 and the NMOS transistor M11. source extreme; 所述NMOS管M10的栅极端连接所述NMOS管M11的漏极端并连接所述第四压控振荡器单元的用于输出信号V4-的第一输出信号端；The gate terminal of the NMOS transistor M10 is connected to the drain terminal of the NMOS transistor M11 and is connected to the first output signal terminal of the fourth voltage-controlled oscillator unit for outputting the signal V4-; 所述NMOS管M11的栅极端连接所述NMOS管M10的漏极端并连接所述第四压控振荡器单元的用于输出信号V4+的第二输出信号端；The gate terminal of the NMOS transistor M11 is connected to the drain terminal of the NMOS transistor M10 and is connected to the second output signal terminal of the fourth voltage-controlled oscillator unit for outputting the signal V4+; 所述可变电容C7的第一端和所述可变电容C8的第一端相连、并且所述可变电容C7的第一端和所述可变电容C8的第一端同时连接到控制信号端Vctrl，所述可变电容C7的第二端连接所述NMOS管M10的漏极端并连接所述第四压控振荡器单元的第二输出信号端，所述可变电容C8的第二端连接所述NMOS管M10的漏极端并连接所述第四压控振荡器单元的第一输出信号端；The first end of the variable capacitor C7 is connected to the first end of the variable capacitor C8, and the first end of the variable capacitor C7 and the first end of the variable capacitor C8 are connected to the control signal at the same time terminal Vctrl, the second terminal of the variable capacitor C7 is connected to the drain terminal of the NMOS transistor M10 and to the second output signal terminal of the fourth voltage-controlled oscillator unit, and the second terminal of the variable capacitor C8 connecting the drain terminal of the NMOS transistor M10 and connecting the first output signal terminal of the fourth voltage-controlled oscillator unit; 所述电感L7的第一端和所述电感L8的第一端相连、并且所述电感L7的第一端和所述电感L8的第一端连接到电源端VDD，所述电感L7的第二端连接所述NMOS管M10的漏极端、所述可变电容C7的第二端和所述第四压控振荡器单元的第一输出信号端，所述电感L8的第二端连接所述NMOS管M11的漏极端、所述可变电容C8的第二端和所述第四压控振荡器单元的第二输出信号端。The first end of the inductance L7 is connected to the first end of the inductance L8, and the first end of the inductance L7 and the first end of the inductance L8 are connected to the power supply terminal VDD, and the second end of the inductance L7 The terminal is connected to the drain terminal of the NMOS transistor M10, the second terminal of the variable capacitor C7 and the first output signal terminal of the fourth voltage-controlled oscillator unit, and the second terminal of the inductor L8 is connected to the NMOS The drain terminal of the tube M11, the second terminal of the variable capacitor C8, and the second output signal terminal of the fourth voltage-controlled oscillator unit. 6.根据权利要求1所述的高精度的八相位LC压控振荡器，其特征在于，所述耦合网络电路包括NMOS管M12、NMOS管M13、NMOS管M14、NMOS管M15、NMOS管M16、NMOS管M17、NMOS管M18和NMOS管M19，其中：6. The high-precision eight-phase LC voltage-controlled oscillator according to claim 1, wherein the coupling network circuit comprises NMOS transistor M12, NMOS transistor M13, NMOS transistor M14, NMOS transistor M15, NMOS transistor M16, NMOS transistor M17, NMOS transistor M18 and NMOS transistor M19, among which: 所述NMOS管M12的源极端连接所述NMOS管M13的漏极端和所述NMOS管M13的栅极端、并连接所述第二压控振荡器单元的用于输出信号V2+的第二输出信号端；The source terminal of the NMOS transistor M12 is connected to the drain terminal of the NMOS transistor M13 and the gate terminal of the NMOS transistor M13, and is connected to the second output signal terminal of the second voltage-controlled oscillator unit for outputting the signal V2+ ; 所述NMOS管M13的源极端连接所述NMOS管M14的漏极端和所述NMOS管M14的栅极端、并连接所述第三压控振荡器单元的用于输出信号V3+的第二输出信号端；The source terminal of the NMOS transistor M13 is connected to the drain terminal of the NMOS transistor M14 and the gate terminal of the NMOS transistor M14, and is connected to the second output signal terminal of the third voltage-controlled oscillator unit for outputting the signal V3+ ; 所述NMOS管M14的源极端连接所述NMOS管M15的漏极端和所述NMOS管M15的栅极端、并连接所述第四压控振荡器单元的用于输出信号V4+的第二输出信号端；The source terminal of the NMOS transistor M14 is connected to the drain terminal of the NMOS transistor M15 and the gate terminal of the NMOS transistor M15, and is connected to the second output signal terminal of the fourth voltage-controlled oscillator unit for outputting the signal V4+ ; 所述NMOS管M15的源极端连接所述NMOS管M16的漏极端和所述NMOS管M16的栅极端、并连接所述第一压控振荡器单元的用于输出信号V1-的第一输出信号端；The source terminal of the NMOS transistor M15 is connected to the drain terminal of the NMOS transistor M16 and the gate terminal of the NMOS transistor M16, and is connected to the first output signal of the first voltage-controlled oscillator unit for outputting the signal V1- end; 所述NMOS管M16的源极端连接所述NMOS管M17的漏极端和所述NMOS管M17的栅极端、并连接所述第二压控振荡器单元的用于输出信号V2-的第一输出信号端；The source terminal of the NMOS transistor M16 is connected to the drain terminal of the NMOS transistor M17 and the gate terminal of the NMOS transistor M17, and is connected to the first output signal of the second voltage-controlled oscillator unit for outputting the signal V2- end; 所述NMOS管M17的源极端连接所述NMOS管M18的漏极端和所述NMOS管M18的栅极端、并连接所述第三压控振荡器单元的用于输出信号V3-的第一输出信号端；The source terminal of the NMOS transistor M17 is connected to the drain terminal of the NMOS transistor M18 and the gate terminal of the NMOS transistor M18, and is connected to the first output signal of the third voltage-controlled oscillator unit for outputting the signal V3- end; 所述NMOS管M18的源极端连接所述NMOS管M19的漏极端和所述NMOS管M19的栅极端、并连接所述第四压控振荡器单元的用于输出信号V4-的第一输出信号端；The source terminal of the NMOS transistor M18 is connected to the drain terminal of the NMOS transistor M19 and the gate terminal of the NMOS transistor M19, and is connected to the first output signal of the fourth voltage-controlled oscillator unit for outputting the signal V4- end; 所述NMOS管M19的源极端连接所述NMOS管M12的漏极端和所述NMOS管M12的栅极端、并连接所述第一压控振荡器单元的用于输出信号V1+的第二输出信号端。The source terminal of the NMOS transistor M19 is connected to the drain terminal of the NMOS transistor M12 and the gate terminal of the NMOS transistor M12, and is connected to the second output signal terminal of the first voltage-controlled oscillator unit for outputting the signal V1+ .
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