CN114817096A - Serial port switching system, method and device for BMC and BIOS and computer readable medium - Google Patents
Serial port switching system, method and device for BMC and BIOS and computer readable medium Download PDFInfo
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- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
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Abstract
本发明公开了一种BMC和BIOS的串口切换系统、方法、计算机设备及计算机可读介质，该BMC和BIOS的串口切换系统包括BMC、BIOS以及分别与BIOS的串口和BMC的串口连接的CPLD，且CPLD与BMC和BIOS一起通信连接耳机孔，以共用一个输出串口且通过CPLD进行BMC和BIOS的串口输出切换。该系统利用CPLD启动时间短的特点能够在服务器启动时快速启动CPLD，在CPLD中设置控制器，给控制器设计控制电路来将连接到CPLD的BMC和BIOS的串口根据服务器的要求进行切换，而不考虑BMC和BIOS是否故障都可以收集器Log，提高了研发debug的针对性。
The invention discloses a serial port switching system, method, computer equipment and computer readable medium of BMC and BIOS. The serial port switching system of BMC and BIOS comprises BMC, BIOS and CPLD respectively connected with serial port of BIOS and serial port of BMC, In addition, the CPLD communicates with the BMC and the BIOS to connect to the headphone jack, so as to share one output serial port and switch the serial port output of the BMC and the BIOS through the CPLD. The system utilizes the short startup time of CPLD to quickly start the CPLD when the server starts, set the controller in the CPLD, and design a control circuit for the controller to switch the serial port of the BMC and BIOS connected to the CPLD according to the requirements of the server. Regardless of whether the BMC and BIOS are faulty, the Log can be collected, which improves the pertinence of R&D debugging.
Description
Technical Field
The invention relates to the technical field of computers, in particular to a serial port switching system and method of BMC and BIOS, computer equipment and a computer readable medium.
Background
Nowadays, home-made servers are applied more and more in scenes, components are gradually localized, but the following problems are also numerous, and the serial port use frequency of a system and a BMC (baseboard control controller) is higher and higher because some problems cause that machines cannot be opened or the machines are abnormal without reason, so that the invention is an improvement for better collecting serial port information.
At present, under the condition that the server is all fixed in width, height, integrated components and parts are more and more, certain project of domestic sea light, and the space of leaving the serial ports is seriously compressed for the first time in order to promote in the specification, can't use 9 needle interfaces, BMC, BIOS adopt industry boundary earphone hole design, but also can't satisfy and arrange two simultaneously. In order to meet the functional design and simultaneously consider the space design, the BMC and the BIOS multiplex the same earphone hole and share the serial port output, but the design needs to collect the serial port information of the system BIOS after the BMC is started, the invention mainly aims to solve the problem of serial port collection of the BIOS before the BMC is not restarted or the problem of switching of BMC/BIOS serial port output in the serial port before the BMC is not restarted.
Disclosure of Invention
In view of this, an embodiment of the present invention provides a system and a method for switching between BMC and BIOS (basic input output system) serial ports. The system can quickly start the CPLD when the server is started by utilizing the characteristic of short starting time of the CPLD (complex programmable logic device), the controller is arranged in the CPLD, a control circuit is designed for the controller to switch the serial ports of the BMC and the BIOS connected to the CPLD according to the requirements of the server, and the Log can be collected regardless of whether the BMC and the BIOS are in fault, so that the pertinence of developing debug is improved.
Based on the above purpose, an aspect of the embodiments of the present invention provides a serial port switching system for an MC and a BIOS. The system comprises a BMC, a BIOS and a CPLD respectively connected with a serial port of the BIOS and a serial port of the BMC, wherein the CPLD, the BMC and the BIOS are in communication connection with an earphone hole together so as to share one output serial port and carry out serial port output switching of the BMC and the BIOS through the CPLD.
In some embodiments, the serial port of the BMC, the serial port of the BIOS, and the CPLD serial port are connected together to the RS232 chip for the headphone jack to access the BMC, the BIOS, and the CPLD simultaneously.
In some embodiments, the CPLD comprises a controller, and the controller is in communication connection with the serial port of the BMC and the serial port of the BIOS to switch the output of the serial port information of the BMC and the BIOS.
On the other hand, the embodiment of the invention provides a serial port switching method of BMC and BIOS. The method comprises the following steps: the server is powered on to start the CPLD; the CPLD controls the switching between the serial port of the BMC and the serial port of the BIOS; collecting a BMC fault log through the CPLD when the BMC has faults, and collecting a BIOS fault log through the CPLD when the BIOS has faults; and when the BMC and the BIOS work normally, the CPLD selects the earphone hole to output the serial port information of the BMC or the serial port information of the BIOS.
In some embodiments, powering up the server to initiate the CPLD includes: after the server is started, the CPLD is started within 1 second.
In some embodiments, the controlling, by the CPLD, the switching between the serial port of the BMC and the serial port of the BIOS includes: the serial port of the BMC and the serial port of the BIOS are connected into the CPLD, after the CPLD is started, the BMC and the BIOS do not need to be started, and the internal controller of the CPLD controls the switching of the serial port of the BMC and the serial port of the BIOS and stores serial port information.
In some embodiments, collecting the log of BMC failures by the CPLD when the BMC fails and collecting the log of BIOS failures by the CPLD when the BIOS fails comprises: when the CPLD is started, but the BMC and the BIOS are not started, the CPLD is communicated with the serial port of the BMC and the serial port of the BIOS, and if one or both of the serial port of the BMC and the serial port of the BIOS fails to start, the serial port of the BMC and the serial port of the BIOS can be switched through the CPLD to collect a fault Log.
In some embodiments, when the BMC and the BIOS operate normally, selecting the earphone hole to output the serial port information of the BMC or the serial port information of the BIOS through the CPLD includes: the BMC and the BIOS normally work, the CPLD controls the external output of the serial port, and when the CPLD selects 0, the earphone hole outputs the serial port information of the BIOS; and when the CPLD selects 1, the earphone hole outputs the serial port information of the BMC.
In another aspect of the embodiments of the present invention, there is also provided a computer device, including: at least one processor; and a memory storing computer instructions executable on the processor, the instructions when executed by the processor implementing steps of the method comprising: the server is powered on to start the CPLD; the CPLD controls the switching between the serial port of the BMC and the serial port of the BIOS; collecting a BMC fault log through the CPLD when the BMC has faults, and collecting a BIOS fault log through the CPLD when the BIOS has faults; and when the BMC and the BIOS work normally, the CPLD selects the earphone hole to output the serial port information of the BMC or the serial port information of the BIOS.
In some embodiments of the invention, the CPLD is started after the server is started, and the boot time of the BMC and the BIOS is longer than that of the CPLD.
In some embodiments of the invention, the serial port of the BMC and the serial port of the BIOS are connected into the CPLD, after the CPLD is started, the BMC and the BIOS do not need to be started, and the internal controller of the CPLD controls the switching of the serial port of the BMC and the serial port of the BIOS and stores serial port information.
In some embodiments of the invention, in the time period when the CPLD is started but the BMC and the BIOS are not started, the CPLD is communicated with the serial port of the BMC and the serial port of the BIOS, and if one or both of the serial port of the BMC and the serial port of the BIOS fails to start, the serial port of the BMC and the serial port of the BIOS can be switched through the CPLD to collect the fault Log.
In some embodiments of the invention, the BMC and the BIOS work normally, the CPLD controls the external output of the serial port, and when the CPLD selects 0, the earphone hole outputs the serial port information of the BIOS; and when the CPLD selects 1, the earphone hole outputs the serial port information of the BMC.
In a further aspect of the embodiments of the present invention, a computer-readable storage medium is also provided, in which a computer program for implementing the above method steps is stored when the computer program is executed by a processor.
The invention has at least the following beneficial technical effects:
the serial port switching system of BMC and BIOS adopts a serial port switching method of BMC and BIOS. The serial port of the BMC and the serial port of the BIOS are connected to the CPLD, and the CPLD, the BMC and the BIOS are in communication connection with the earphone hole together so as to share one output serial port and carry out serial port output switching of the BMC and the BIOS through the CPLD. The starting time of the CPLD is only 1s, and the CPLD is very short and can be quickly started when the server is started. A controller is arranged in the CPLD, a control circuit is designed for the controller to switch the serial ports of the BMC and the BIOS connected to the CPLD according to the requirements of a server, and the collector Log can be used regardless of whether the BMC and the BIOS have faults, so that the pertinence of developing debug (removing faults of a computer) is improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other embodiments can be obtained by using the drawings without creative efforts.
FIG. 1 is a schematic diagram of an embodiment of a serial port switching system for BMC and BIOS provided in the present invention;
FIG. 2 is a schematic diagram of an embodiment of a serial port switching method for BMC and BIOS provided in the present invention;
FIG. 3 is a schematic diagram of an embodiment of a computer device provided by the present invention;
FIG. 4 is a schematic diagram of an embodiment of a computer-readable storage medium provided by the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the following embodiments of the present invention are described in further detail with reference to the accompanying drawings.
It should be noted that all expressions using "first" and "second" in the embodiments of the present invention are used for distinguishing two entities with the same name but different names or different parameters, and it should be noted that "first" and "second" are merely for convenience of description and should not be construed as limitations of the embodiments of the present invention, and they are not described in any more detail in the following embodiments.
FIG. 1 is a schematic diagram illustrating an embodiment of a serial port switching system of a BMC and a BIOS provided in the present invention.
Based on the above purpose, the first aspect of the embodiment of the present invention provides a serial port switching system between BMC and BIOS. The system comprises a BMC, a BIOS and a CPLD respectively connected with a serial port of the BIOS and a serial port of the BMC, wherein the CPLD, the BMC and the BIOS are in communication connection with an earphone hole together so as to share one output serial port and carry out serial port output switching of the BMC and the BIOS through the CPLD.
As shown in fig. 1, the serial port of the BMC and the serial port of the BIOS are simultaneously connected to the CPLD, so that the CPLD is allowed to access the serial port of the BMC and the serial port of the BIOS, and thus the serial port of the BMC and the serial port of the BIOS can be switched without starting the BMC and the BIOS, and required serial port information is collected. The boot time and the fault condition of the BMC and the BIOS are not required to be considered.
Because BMC and BIOS share a serial port, that is, only one piece of information can be collected in the restarting process, after the BMC or the system is restarted, a unit connected with a serial port line is not arranged, the restart log is not stored, and the restart log cannot be found even if problems occur.
When a general server is electrified for the first time, the BMC/BIOS is started at the same time, but before the BMC is not restarted, the earphone hole outputs serial port information of the BMC in a default mode, after the BMC is started (2-3 minutes), serial port output switching (to be the BIOS or the BMC) can be carried out through a BMC command party
The CPLD has short starting time (within 1 second), so that the switching of BMC/BIOS serial port output can be realized before the BMC is not started.
In some embodiments of the invention, the serial port of the BMC, the serial port of the BIOS, and the CPLD serial port are connected to the RS232 chip together, and are used for the headphone jack to access the BMC, the BIOS, and the CPLD simultaneously.
As shown in FIG. 1, the interface of the RS232 chip is a 9-pin or 25-pin serial port. The serial port of the BMC, the serial port of the BIOS and the CPLD are simultaneously connected to the earphone hole, the CPLD is internally provided with a switching function, and serial port information is output through the earphone hole.
In some embodiments of the present invention, the CPLD includes a controller, and the controller is communicatively connected to the serial port of the BMC and the serial port of the BIOS to switch output of serial port information of the BMC and the BIOS.
As shown in fig. 1, the CPLD internal control circuit, through software design, can control the external output of the serial port, and when the CPLD selects "0", it represents that the earphone hole outputs the serial port information (including CPU-related start information) of the BIOS; when the CPLD selects '1', serial port information (mainly restart information of the BMC and log information under a BMC system) of the BMC is output by the representative earphone hole. The restarting time of the CPLD is less than 1 second, so that the serial port switching of the BMC/BIOS can be realized after the CPLD is powered on. The personal notebook is connected with the server through the earphone hole, the notebook runs the serial port assistant, and after the server is powered on, the CPLD switching command is directly input by the serial port assistant. CPLD access link design: the restarting time of the device is less than 1S, a debug serial port of the CPLD cannot be designed normally, and the access control of the CPLD is carried out through the design that the CPLD shares the serial port of the BMC and the BIOS. And (3) CPLD switching function design: the CPU and the Uart interface of the BMC are connected to the CPLD, the serial port information of the BMC and the CPU is transmitted into the CPLD, after the CPLD receives the information, the serial port information of the BMC and the CPU is distinguished according to the link number of the Uart, the CPLD forwards the BMC or the CPU Uart information according to the setting, the content of the forwarding is not carried out, and the CPLD does not carry out any processing. CPLD command specification: directly accessing the CPLD through a serial port tool, a serial port line and an earphone hole, and outputting uart information of the CPU by the earphone hole when the identification bit is set to be 0 according to a software logic preset by the CPLD through a custom command of the CPLD; when the CPLD selects '1', the serial port information of the BMC is output by the representative earphone hole.
Based on the above purpose, the first aspect of the embodiments of the present invention provides an embodiment of a serial port switching method for BMC and BIOS. Fig. 2 is a schematic diagram illustrating an embodiment of a serial port switching method for BMC and BIOS according to the present invention. As shown in fig. 2, the serial port switching method for BMC and BIOS according to the embodiment of the present invention includes the following steps:
001. the server is powered on to start the CPLD;
002. the CPLD controls the switching between the serial port of the BMC and the serial port of the BIOS;
003. when the BMC fails, collecting a BMC fault log through the CPLD, and when the BIOS fails, collecting a BIOS fault log through the CPLD;
004. when the BMC and the BIOS work normally, the CPLD selects the earphone hole to output the serial port information of the BMC or the serial port information of the BIOS.
As shown in fig. 2, in this embodiment, a controller is initially set in the CPLD, and an internal control circuit is designed, and the control circuit implements external output of a serial port controlled by the control circuit through a commonly connected headphone jack, such as a serial port of the BMC and a serial port of the BIOS of the present application, by software design. The '0' represents the serial port information of the BIOS, the serial port information comprises related information of CPU starting, and when the CPLD selects the '0', the earphone hole outputs the serial port information of the BIOS. The '1' represents the serial port information of the BMC, the information mainly reflects the restart information and log information of the BMC, and when the CPLD selects the '1', the earphone hole outputs the serial port information of the BMC. Preferably, a manner in which the personal notebook is operated by being connected to the server through the headphone jack may also be employed. The serial assistant is operated in the notebook computer, and the CPLD switching command is directly input by using the serial assistant after the server is powered on. In the CPLD access link design, a debug serial port of the CPLD is not designed according to the characteristic of short starting time of the CPLD. The CPLD shares the serial port of the BMC and the BIOS, the access BMC and the BIOS of the CPLD are adopted to control the switching of the serial port, and the serial port information is collected. And (3) CPLD switching function design: the CPU and the Uart interface of the BMC are connected to the CPLD, serial port information of the BMC and the CPU is transmitted into the CPLD, after the CPLD receives the information, the serial port information of the BMC and the CPU is distinguished according to the link number of the Uart, the CPLD forwards the Uart information of the BMC or the CPU according to the setting, the forwarding content is not needed, and the CPLD does not perform any processing. CPLD command specification: directly accessing the CPLD through a serial port tool, a serial port line and an earphone hole, and outputting uart information of the CPU (central processing unit) representing the earphone hole when the identification bit is set to be 0 according to a software logic preset by the CPLD through a custom command of the CPLD, wherein the uart information of the CPU is the uart information of the BIOS; when the identification bit is set to be 1, the representative earphone hole outputs the serial port information of the BMC.
In some embodiments of the invention, powering up the server to initiate the CPLD comprises: after the server is started, the CPLD is started within 1 second.
The CPLD, the BMC and the BIOS are all arranged in the server, after the server is started, the CPLD, the BMC and the BIOS are all started, only the starting time is different, the starting time of the CPLD is 1 second or less than 1 second, and the starting time is very short. While boot times for BMC and BIOS require 2 to 3 minutes or even longer.
In some embodiments of the present invention, the controlling, by the CPLD, the switching between the serial port of the BMC and the serial port of the BIOS includes: the serial port of the BMC and the serial port of the BIOS are connected into the CPLD, after the CPLD is started, the BMC and the BIOS do not need to be started, and the internal controller of the CPLD controls the switching of the serial port of the BMC and the serial port of the BIOS and stores serial port information.
In this embodiment, the BMC and the BIOS share one output serial port, and the boot time of the BMC and the BIOS is longer and requires 2 to 3 minutes. Therefore, if the conventional method is adopted, the BMC and the BIOS can only output one serial port information. For example, if the output is serial port information of the BMC, the BIOS must wait until the BMC is started to switch the serial port information, and at this time, the log of the time period when the BMC is not started cannot be recorded.
In some embodiments of the present invention, collecting the log of BMC failures via the CPLD when the BMC failed and collecting the log of BIOS failures via the CPLD when the BIOS failed comprises: when the CPLD is started, but the BMC and the BIOS are not started, the CPLD is communicated with the serial port of the BMC and the serial port of the BIOS, and if one or both of the serial port of the BMC and the serial port of the BIOS fails to start, the serial port of the BMC and the serial port of the BIOS can be switched through the CPLD to collect a fault Log. When the BMC and the BIOS work normally, the step of selecting the earphone hole to output the serial port information of the BMC or the serial port information of the BIOS through the CPLD comprises the following steps: the BMC and the BIOS normally work, the CPLD controls the external output of the serial port, and when the CPLD selects 0, the earphone hole outputs the serial port information of the BIOS; and when the CPLD selects 1, the earphone hole outputs the serial port information of the BMC.
In this embodiment, there are situations where the BMC or BIOS has failed prior to boot. Under the condition, when the output is directly connected with the earphone hole through the serial port of the BMC and the serial port of the BIOS, once one of the BMC and the BIOS fails, the output cannot be performed. Therefore, the CPLD is adopted to connect the serial port of the BMC and the serial port of the BIOS first, the switching between the serial port of the BMC and the serial port of the BIOS can be realized through the link design of the CPLD, and the serial port information can be recorded even if the two fail.
In view of the above object, a third aspect of the embodiments of the present invention provides a computer device. Fig. 3 is a schematic diagram of an embodiment of a computer device provided by the present invention. As shown in fig. 3, the computer apparatus of the embodiment of the present invention includes: at least one processor 021; and a memory 022, the memory 022 storing computer instructions 023 executable on the processor, the instructions when executed by the processor implementing steps of the method comprising: the server is powered on to start the CPLD; the CPLD controls the switching between the serial port of the BMC and the serial port of the BIOS; when the BMC fails, collecting a BMC fault log through the CPLD, and when the BIOS fails, collecting a BIOS fault log through the CPLD; and when the BMC and the BIOS work normally, the CPLD selects the earphone hole to output the serial port information of the BMC or the serial port information of the BIOS.
In some embodiments of the invention, the CPLD is started after the server is started, and the boot time of the BMC and the BIOS is longer than that of the CPLD.
In some embodiments of the invention, the serial port of the BMC and the serial port of the BIOS are connected into the CPLD, after the CPLD is started, the BMC and the BIOS do not need to be started, and the internal controller of the CPLD controls the switching of the serial port of the BMC and the serial port of the BIOS and stores serial port information.
In some embodiments of the invention, in the time period when the CPLD is started but the BMC and the BIOS are not started, the CPLD is communicated with the serial port of the BMC and the serial port of the BIOS, and if one or both of the serial port of the BMC and the serial port of the BIOS fails to start, the serial port of the BMC and the serial port of the BIOS can be switched through the CPLD to collect the fault Log.
In some embodiments of the invention, the BMC and the BIOS work normally, the CPLD controls the external output of the serial port, and when the CPLD selects 0, the earphone hole outputs the serial port information of the BIOS; and when the CPLD selects 1, the earphone hole outputs the serial port information of the BMC.
The invention also provides a computer readable storage medium. FIG. 4 is a schematic diagram illustrating an embodiment of a computer-readable storage medium provided by the present invention. As shown in fig. 4, the computer readable storage medium 031 stores a computer program 032 which, when executed by a processor, performs the method as described above.
Finally, it should be noted that, as one of ordinary skill in the art can appreciate that all or part of the processes in the methods of the above embodiments can be implemented by a computer program to instruct related hardware, and the program of the method for centralized server testing can be stored in a computer readable storage medium, and when executed, the program can include the processes of the embodiments of the methods as described above. The storage medium of the program may be a magnetic disk, an optical disk, a Read Only Memory (ROM), a Random Access Memory (RAM), or the like. The embodiments of the computer program may achieve the same or similar effects as any of the above-described method embodiments.
Furthermore, the methods disclosed according to embodiments of the invention may also be implemented as a computer program executed by a processor, which may be stored in a computer-readable storage medium. Which when executed by a processor performs the above-described functions defined in the methods disclosed in embodiments of the invention.
Further, the above method steps and system elements may also be implemented using a controller and a computer readable storage medium for storing a computer program for causing the controller to implement the functions of the above steps or elements.
Those of skill would further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the disclosure herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as software or hardware depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the disclosed embodiments of the present invention.
In one or more exemplary designs, the functions may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media may be any available media that can be accessed by a general purpose or special purpose computer. By way of example, and not limitation, such computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a general-purpose or special-purpose computer, or a general-purpose or special-purpose processor. Also, any connection is properly termed a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, Digital Subscriber Line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, D0L, or wireless technologies such as infrared, radio, and microwave are included in the definition of medium. Disk and disc, as used herein, includes Compact Disc (CD), laser disc, optical disc, Digital Versatile Disc (DVD), floppy disk, blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.
The foregoing is an exemplary embodiment of the present disclosure, but it should be noted that various changes and modifications could be made herein without departing from the scope of the present disclosure as defined by the appended claims. The functions, steps and/or actions of the method claims in accordance with the disclosed embodiments described herein need not be performed in any particular order. Furthermore, although elements of the disclosed embodiments of the invention may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.
It should be understood that, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly supports the exception. It should also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items.
The numbers of the embodiments disclosed in the embodiments of the present invention are merely for description, and do not represent the merits of the embodiments.
It will be understood by those skilled in the art that all or part of the steps for implementing the above embodiments may be implemented by hardware, or may be implemented by a program instructing relevant hardware, and the program may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a magnetic disk or an optical disk, etc.
Those of ordinary skill in the art will understand that: the discussion of any embodiment above is meant to be exemplary only, and is not intended to intimate that the scope of the disclosure, including the claims, of embodiments of the invention is limited to these examples; within the idea of an embodiment of the invention, also technical features in the above embodiment or in different embodiments may be combined and there are many other variations of the different aspects of the embodiments of the invention as described above, which are not provided in detail for the sake of brevity. Therefore, any omissions, modifications, substitutions, improvements, and the like that may be made without departing from the spirit and principles of the embodiments of the present invention are intended to be included within the scope of the embodiments of the present invention.
Claims (10)
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| CN107656856A (en) * | 2017-09-25 | 2018-02-02 | 郑州云海信息技术有限公司 | A kind of system mode display methods and device based on CPLD |
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| CN112948157A (en) * | 2021-01-29 | 2021-06-11 | 苏州浪潮智能科技有限公司 | Server fault positioning method, device and system and computer readable storage medium |
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| CN107656856A (en) * | 2017-09-25 | 2018-02-02 | 郑州云海信息技术有限公司 | A kind of system mode display methods and device based on CPLD |
| US20190220340A1 (en) * | 2018-01-12 | 2019-07-18 | Quanta Computer Inc. | System and method for remote system recovery |
| CN212723999U (en) * | 2020-09-25 | 2021-03-16 | 苏州浪潮智能科技有限公司 | A Grabbing System Based on BIOS and BMC Serial Information of Server without Power-on |
| CN112948157A (en) * | 2021-01-29 | 2021-06-11 | 苏州浪潮智能科技有限公司 | Server fault positioning method, device and system and computer readable storage medium |
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