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CN1147774C - Computer device and method for entering operation mode from power-saving mode - Google Patents

Computer device and method for entering operation mode from power-saving mode

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Publication number
CN1147774C
CN1147774C CNB981201881A CN98120188A CN1147774C CN 1147774 C CN1147774 C CN 1147774C CN B981201881 A CNB981201881 A CN B981201881A CN 98120188 A CN98120188 A CN 98120188A CN 1147774 C CN1147774 C CN 1147774C
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CN
China
Prior art keywords
data
peripheral
peripheral device
group
interrupt signal
Prior art date
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Expired - Lifetime
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CNB981201881A
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Chinese (zh)
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CN1252546A (en
Inventor
李怡娴
杨金良
廖世宏
杨修宗
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Wistron Corp
Acer Inc
Original Assignee
Wistron Corp
Acer Inc
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Priority to CNB981201881A priority Critical patent/CN1147774C/en
Publication of CN1252546A publication Critical patent/CN1252546A/en
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Publication of CN1147774C publication Critical patent/CN1147774C/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

A computer device and a method for entering an operation mode from a power-saving mode; the computer device mainly comprises: a central processing unit, a chipset with a main control unit, and a memory with a peripheral device data block; the method comprises the following steps: the chipset periodically sends an interrupt signal to the CPU; judging whether the interrupt signal is sent out by the main control unit; if the interrupt signal is not sent by the main control unit, the computer device enters an operation mode; if the interrupt signal is sent by the main control unit, checking whether a peripheral device writes data into a peripheral device data block; if data is written into the block, the computer system enters an operation mode.

Description

Computer apparatus and enter the method for operating mode by battery saving mode
The present invention relates to a kind of power saving computer apparatus, particularly a kind of computer apparatus and enter the method for operating mode by battery saving mode.
The standard that connects the system bus of peripheral device at present has USB (Universal SerialBus), SSA, Fire Wire standards such as (IEEE 1394).That be usually used in PC at present is USB, or is called universal series bus standard.Universal series bus standard makes computer can connect various peripheral devices easily.When computer installs peripheral device additional now, normally after revising the operation default, must restart operating system, new setting is come into force.And because the expansion slot on the computer motherboard is limited, the peripheral equipment number that computer can install additional is also restricted.This is quite inconvenient for the user.The USB standard can be improved aforesaid drawbacks, and the attachable peripheral equipment number of computer is increased, and also can under the situation that computer does not shut down peripheral equipment be installed, and can use after installing, and must not restart operating system.Indication USB standard is Universal Serial Bus Specification (Revision1.0) herein.
In the following description, can cooperate the computer of USB interface standard to be called for short the USB computer, can cooperate the peripheral device of USB interface standard to be called for short the USB device, universal serial bus is called for short serial bus.Each USB device is connected in series with the four-core line, and wherein four connecting lines have two to be power lead, and two is data line.The USB computer is provided with a USB main control unit (HostController), as the usefulness of each USB device of control.USB is to use level shape bus structure, and bus-structured root level is by the USB main control unit, and each level of all the other of bus is made up of device maincenter (USB HUB) and peripheral device; The device maincenter can be connected to the device maincenter or the peripheral device of a time level again, makes several peripheral devices become dendroid to distribute and is serially connected; So several peripheral devices are connected in computer apparatus by this connecting interface.The USB main control unit can connect several USB device maincenters, and the device maincenter can connect several device maincenters and USB device again.Operating system is done data access by the USB main control unit to each USB device, also by the USB main control unit USB device is done setting.The USB main control unit is in charge of the power supply of USB device simultaneously and is supplied with, and the use right of priority of decision USB device.
Transmit information in packet (package) mode between USB main control unit and the USB device.The kind of package is divided into three kinds of signal package (token packet), data packet (datapacket), response packet (handshake packet) etc.The direction that signal package determination data transmits (the USB main control unit passes toward peripheral device, peripheral device and passes toward USB main control unit or transmitted in both directions); The data packet content comprises actual data; Response packet is then sent by an end of receiving data, and expression has received data, and perhaps data are wrong must retransfer.Each USB device connects in the serial connection mode, and the package that the USB main control unit sends can be sent to each peripheral device that is connected on the USB.The USB device that is connected on the serial bus respectively has its particular address, after the USB device is received the signal package, whether the address in the meeting explanation signal package matches with the address of itself, if coincide, data in the then subsequent interpret data package, it is whether complete to inform the data Data Receiving to send a response packet after receiving again.If the USB device is separated the address that translates and misfitted, it is not to send at this USB device that expression this time transmits data, can ignore this data packet.
The USB device that can be connected on the serial bus has a variety of: as keyboard, Venier controller, rocking bar, printer, scanning machine, digital camera or the like.The USB main control unit can constantly be inquired (polling) to the USB device, to detect number and the kind that is connected USB device on the serial bus at present.When universal serial bus is gone up in a new USB device connection, after this USB device is received the interrogating signal of USB main control unit, its kind class identification number can be passed to the USB main control unit, specify an address to the USB device by the USB main control unit.Then this USB device can be deposited in its pairing address code in the package when transmitting package, and so USB main control unit or other USB devices promptly judge that with this address code this package is sent by that USB device when receiving this package.
Use the USB standard that aforesaid advantage is arranged, but when computer apparatus enters battery saving mode, problem can take place.For making the USB device be connected or to separate with computer system at any time, the USB main control unit must constantly be informed the operating system state of each USB device at present.With existing computer system and can't inquire that initiatively the USB main control unit obtains the status data of USB device by CPU (central processing unit) (CPU), make second wafer set send look-at-me but constantly send signal to CPU (central processing unit) by the USB main control unit, by CPU (central processing unit) the USB main control unit is inquired again, to know the state of each USB device.It is after computer apparatus enters battery saving mode that this way produces a problem, and second wafer set is still constantly sent look-at-me and given CPU (central processing unit), wakes whole computer apparatus up, so that can't maintain the battery saving mode state.
It is when the USB computer enters battery saving mode the USB function to be cancelled that a kind of way is arranged, and so the USB main control unit just can periodically not send look-at-me to CPU (central processing unit); Just can without reason computer apparatus not waken up yet.But this shortcoming is after the USB function cancellation, and computer apparatus just can't be by the USB device state of resuming work.In other words, if computer apparatus uses the USB keyboard, then just enter behind the battery saving mode can't be by keyboard with the computer state that resumes operation for computer.
The objective of the invention is to improve above-mentioned shortcoming, provide a kind of when computer is in battery saving mode, can make the computer system of its pattern that resumes operation by the USB device.
Purpose of the present invention two when providing a kind of computer to enter battery saving mode, can make the method for its pattern that resumes operation by the USB device.
Three of purpose of the present invention is to make the computer apparatus that enters battery saving mode to avoid causing leaving battery saving mode because of the invalid signals of USB device, enters the method for normal operation pattern.
For achieving the above object, the present invention takes following measure:
After computer apparatus of the present invention enters battery saving mode, computer apparatus is resumed work, leave battery saving mode.
Method of the present invention is after computer enters battery saving mode, when CPU (central processing unit) receives the look-at-me that the USB main control unit sends, judges by bios software whether this look-at-me is effective, whether computer apparatus is replied the normal operation pattern with decision.This kind mode only CPU (central processing unit) is replied the normal operation pattern when carrying out bios program, and the computer apparatus remainder still maintains battery saving mode, like this, still plays province's electro ultrafiltration.
Concrete device and method of the present invention is as follows:
A kind of computer apparatus with electricity-saving function of the present invention comprises peripheral device and external bus, and first group of peripheral device is electrically connected on computer apparatus by external bus, it is characterized in that, comprising:
One CPU (central processing unit);
A machine bus;
One wafer set is electrically connected on CPU (central processing unit) by this machine bus, and wafer set comprises a main control unit, and main control unit is in order to coordinate the data transmission between CPU (central processing unit) and the first group of peripheral device;
One memory cell is electrically connected on wafer set, and in order to stocking system management interrupt program, memory cell comprises one group of peripheral device block, in order to store the data that transmit between first group of peripheral device and CPU (central processing unit);
One Power Management Unit is electrically connected on wafer set; And
One second group of peripheral device is electrically connected on Power Management Unit;
Described CPU (central processing unit) stops the power supply supply to second group of peripheral device after entering battery saving mode, then in response in a look-at-me executive system management interrupt program, the system management interrupt program may further comprise the steps:
(1) judges whether look-at-me is sent by main control unit;
(2) when look-at-me be not when being sent by main control unit, power supply to the second group peripheral device;
(3) when look-at-me is sent by main control unit, judge then whether first group of peripheral device transmits valid data to the peripheral device block;
(4) when transmitting valid data to the peripheral device block, then power supply to the second group peripheral device, and ends with system management interrupt program;
(5) when no valid data write the peripheral device block, then make computer apparatus maintain battery saving mode.
A kind of computer apparatus of the present invention enters the method for operating mode by battery saving mode, it is characterized in that, may further comprise the steps:
(a) in response in the triggering of described main control unit, described wafer set is periodically sent a look-at-me to CPU (central processing unit);
(b) in response in look-at-me, judge whether look-at-me is sent by main control unit;
(c) if look-at-me is not to be sent by main control unit, then make computer apparatus enter operating mode;
(d) whether if look-at-me is to be sent by main control unit, then checking has peripheral device that data are write described peripheral device block;
(e) if no datat writes the peripheral device block, then make computer apparatus continue to maintain battery saving mode;
(f) if there are data to write the peripheral device block, then make computer apparatus enter operating mode.
Description of drawings:
Fig. 1 is the circuit block diagram of first embodiment of computer apparatus of the present invention.
Fig. 2 is the circuit block diagram of the preferred embodiment of computer apparatus of the present invention.
Fig. 3 is the synoptic diagram of usb data structure.
Fig. 4 is the workflow synoptic diagram of preferred embodiment of the present invention.
Reaching embodiment in conjunction with the accompanying drawings is described in detail as follows feature of the present invention:
First embodiment of the invention as shown in Figure 1, tool electricity-saving function of the present invention and possess the computer 100 that connects several peripheral devices with bus and mainly comprise a CPU (central processing unit) 102, one first wafer set 104, a random access memory (RAM) 106, a testing fixture 108, one second wafer set 110, a vga controller 114, an I/O controller 116, a ROM (read-only memory) (ROM) 126, a pci bus 206 and an isa bus 208.This computer apparatus is to cooperate uses such as a traditional data machine 118, a traditional magnetic disk machine 120, a USB keyboard 122, one the 2nd USB device 124 and USB device maincenter 128.
CPU (central processing unit) 102 is connected with first wafer set 104 by a machine bus (LocalBus) as Intel Pentium CPU; First wafer set 104 is in order to control random access memory 106, and device and the data access of control linkage on pci bus 206.Second wafer set 110 is electrically connected on pci bus 206 and isa bus 208, as the bridge between this two bus, in order to the peripheral device that is connected on the isa bus is carried out data access.Vga controller 114 is electrically connected on the pci bus, in order to connect screen display device.ROM (read-only memory) 126 is connected in isa bus and I/O controller, deposits bios program (basic output/input system program) etc.I/O controller 116 is electrically connected on isa bus 208, in order to be electrically connected traditional peripheral device (non-USB device) as traditional data machine 118, traditional disk drives 120 etc.
Second wafer set 110 comprises a USB main control unit 112, and USB main control unit 112 is in order to control each USB device.USB main control unit 112 is electrically connected to USB device maincenter 128 by bus D_1; USB device maincenter 128 is electrically connected to USB keyboard 122 by bus D_2; USB device maincenter 128 is electrically connected to the 2nd USB device 124 by bus D_3.Bus D_1, D_2, D_3 etc. are collectively referred to as usb bus.Bus D_1, D_2, D_3 are the four-core connecting line.During actual the use, the user can be installed the USB device according to need additional, is connected to USB device maincenter 128; USB device maincenter 128 also can connect other USB device maincenters again, to connect more USB device; Like this, all USB devices are branch difference shape and distribute and to be connected in series.
Bus D_4 is electrically connected to bus D-1 and testing fixture 108, and testing fixture 108 is by the look-at-me of data line INT_1 reception from second wafer set 110; After testing fixture 108 receives look-at-me, can judge whether the signal on the bus D_4 is effective, if effectively, then testing fixture 108 can transmit a SMI# look-at-me to CPU (central processing unit) 102 by signal wire 224, start relevant secondary program, make computer system leave battery saving mode, enter operating mode.
Testing fixture 108 be used to judge the USB device on the D_1 bus signal waveform and whether the look-at-me that determines second wafer set to send effective.With the USB keyboard is example, no matter whether the user presses keyboard, the USB keyboard all can feed signals to bus D_1.But the signal waveform of being sent when the user presses keyboard is different with the signal waveform that does not press keyboard and sent.Can judge by testing fixture 108 which kind of waveform is the signal waveform on the D_1 be, whether effective with the look-at-me that determines second wafer set to send.
Preferred embodiment of the present invention as shown in Figure 2, wherein the difference of the preferred embodiment and first embodiment is that preferred embodiment there is no testing fixture, the look-at-me that second wafer set is sent is directly delivered to CPU (central processing unit), whether effectively to judge look-at-me by program.
As shown in Figure 2, computer apparatus 300 comprises a CPU (central processing unit) 302, one first wafer set 304, a memory RAM 306, one second wafer set 310, a storer ROM312, a vga controller 314 and an I/O controller 316.Computer apparatus 300 cooperates first group of peripheral device, second group of peripheral device and a USB device maincenter 322 to use.First group of peripheral device comprises a USB keyboard 324 and a USB Venier controller 326; Second group of peripheral device comprises a Winchester disk drive 330, a traditional data machine 318, one traditional floppy drive 320 etc.Second group of peripheral device claims power consumer apparatus again.
CPU (central processing unit) 302 is connected with first wafer set 304 by a machine bus (Local Bus); First wafer set, 304 control ram sets 306 and other are electrically connected on the device on the PCIBus; Second wafer set 310 is electrically connected on PCI Bus and ISA Bus, as the signal bridge of the two; Vga controller 314 is electrically connected on PCI Bus; ROM device 312 is electrically connected on ISA Bus and I/O controller 316.I/O controller 316 is electrically connected on ISABus, has multiple control function, it comprises modem controller, disk drive controller, keyboard controller, Venier controller etc., in order to connecting traditional peripheral device such as traditional data machine 318, traditional magnetic disk machine 320, and conventional keyboard, traditional Venier controller etc.Winchester disk drive 330 is electrically connected on second wafer set 310.
Second wafer set 310 comprises a USB main control unit 328, and USB main control unit 328 is in order to control each USB device.USB main control unit 328 is electrically connected to USB device maincenter 322 by bus D_1; USB device maincenter 322 is electrically connected to USB keyboard 324 by bus D_2; USB device maincenter 322 is electrically connected to USB Venier controller 326 by data bus D_3.In fact the user can be installed the USB device according to need additional, is electrically connected on USB device maincenter 322; USB device maincenter 322 also can connect other USB device maincenters again, to connect more USB devices; So being the distribution of branch difference shape is connected in series.
First wafer set 304 comprises a power management modules, when responsible computer apparatus 300 enters battery saving mode, and enters the pattern relevant action.When computer 300 enters battery saving mode, will reduce or cut off power supply supply second group of peripheral device.First wafer set 304 also can be made as battery saving mode with USB device maincenter and second group of peripheral device etc. by USB main control unit 328, to reduce its electrical source consumption.CPU (central processing unit) 302, first wafer set 304, second wafer set 310 itself also can be set at battery saving mode, and closed portion circuit or reduction action clock pulse are to reduce power consumption.
USB main control unit 328 is periodically delivered to CPU (central processing unit) 302 with the SMI# signal by signal wire 330, makes CPU (central processing unit) 302 state of inquiry USB device regularly.USB main control unit 328 also can send the IRQ# look-at-me, and sends out SMI# or IRQ# is by program setting actually.USB main control unit 328 comprises a USB HC working storage (Host Controller Register).When USB main control unit 328 sends the SMI# signal, USB HC working storage can be set at " 1 ".When CPU (central processing unit) 302 is received a SMI# signal, carry out a system management interrupt program (SMI Handler).Whether the system management interrupt program is triggered by USB main control unit 328 or is triggered by other devices to judge a SMI# by the value that reads USB HC working storage.The system management interrupt program is the part of BIOS, is stored in ROM device 312, is written in the ram set 306 after computer 300 starts.Ram set 306 is deposited USB keyboard data structure (datastructure) 502a and USB Venier controller data structure 502b, uses as the related data of depositing USB keyboard 324 and USB Venier controller 326.
As shown in Figure 3, the data structure 502a of USB keyboard comprises index 504a and flag value 506a.USB keyboard data structure 502a still comprises other relevant steering orders (as the state of USB device, the direction of data transmission etc.).Index a 504 (pointer) points to the group of addresses of depositing usb data a, and (be called for short the data address group a), usb data a is the data of USB keyboard and 302 transmission of CPU (central processing unit).Flag value a 506a writes the storer of data address group a correspondence in order to judge whether data.If there are data to write the pairing storer of data address group a, then flag value a 506a will be set to " 0 ", otherwise flag value a 506a is " 1 ".Same, the data structure 502b of USB Venier controller comprises index 504b and flag value 506b.Index b 504b points to the group of addresses (being called for short data address group b) of depositing usb data b, and usb data b is the data of USB Venier controller and 302 transmission of CPU (central processing unit).Flag value b 506b writes the storer of data address group b correspondence in order to judge whether data.If there are data to write the pairing storer of data address group b, then flag value b 506a will be set to " 0 ", otherwise be set at " 1 ".If the user is installed a USB device additional, then system program or driver can increase by a usb data structure again.Each usb data structure is corresponding to a USB device, and different USB devices is corresponding to different usb data structures.
Do not supporting in the computer apparatus of USB keyboard, keyboard controller can triggering second wafer set 310 make it send IRQ1# to CPU (central processing unit) after receiving data in the past.Send SMI# when in the present embodiment, the system management interrupt program has been set at keyboard data with second wafer set 310.Same, the system management interrupt program setting makes second wafer set 310 when Venier controller receives data, sends the SMI# signal to CPU (central processing unit).The system management interrupt program implementation must cooperate hardware device, wherein the computer apparatus 300 front and back flow process that enters battery saving mode and enter pattern as shown in Figure 4, its step is described in detail as follows:
Step 402: computer apparatus 300 enters battery saving mode.
Step 404: stop CPU (central processing unit) 302 inner clock pulses,
Step 406: judged whether that the SMI# signal sends CPU (central processing unit) 302 to? when CPU (central processing unit) 302 enters battery saving mode, if do not receive the SMI# signal, CPU (central processing unit) 302 can maintain battery saving mode, when receiving the SMI# signal, CPU (central processing unit) 302 can be left battery saving mode, enters pattern and executive system management interrupt program.
Step 408: judge that this SMI# signal is USB SMI#? is judgment mode to check that the value of the USB HC working storage of USB main control unit 328 is to be " 1 " or " 0 "? " if 0 ", then this SMI# signal is not a USB SMI# signal, may be sent by other devices, therefore jump to step 410, make computer apparatus 302 leave battery saving mode, enter pattern.If USB HC working storage value then skips to step 414 for " 1 ".
Does step 414: checking have the USB keyboard data? its mode is the flag value a 506a of the USB keyboard data structure 502a of inspection USB keyboard 324 correspondences, sees that flag value a 506a still is " 1 " for " 0 "." if 0 ", expression has data, check further that then index a 504a usb data a 508a pointed is null value (being that numerical value is zero)? if not null value then skips to step 416; If usb data a 508a is null value (expression invalid data), or flag value a 506a is " 1 " (expression no datat), then skips to step 422.
Step 416: usb data a 508a is sent to keyboard controller in the I/O controller 316.Such way is compatible in order and not support the USB functional programs in the past, makes old program also can read the data of USB keyboard.
Step 418: after keyboard controller receives data, trigger making second wafer set 310 send the SMI# signal to CPU (central processing unit) 302.This moment, the SMI# signal was not a USB SMI# signal, therefore skipped to step 410 by step 408, made computer leave battery saving mode, entered pattern.
Step 422: judge to have or not effective USB Venier controller data? if no datat, rebound step 404 if data are arranged, skips to step 424.
Step 424: USB Venier controller data are delivered to controller, skip to step 418, make second wafer set send the SMI# signal, follow step 406, step 408, step 410 and make computer apparatus leave battery saving mode, enter pattern.
In a second embodiment, use existing on the market wafer set device to finish.The invention provides a new software BIOS flow process and reach and make the USB computer can enter battery saving mode, can the USB computer be recovered by the USB device again simultaneously, jump out of battery saving mode, enter the regular event pattern.
The present invention compared with prior art has following effect:
Because the present invention utilizes the electricity-saving mode management program, can be under the battery saving mode state, can cause computer to enter the normal operation pattern by the triggering of peripheral device, make the computer apparatus power consumption still less.
More than employed embodiment be in order to set forth the specific practice that the present invention checks USB main control unit look-at-me.Person skilled in the art scholar can replace by the peer to peer technology circuit under the situation that does not break away from the present invention's design.But this replacement also should belong to protection scope of the present invention.

Claims (28)

1、一种具有省电功能的电脑装置,包括周边装置及外部总线,第一组周边装置藉由外部总线电连接于电脑装置,其特征在于,包括:1. A computer device with power saving function, comprising peripheral devices and an external bus, the first group of peripheral devices is electrically connected to the computer device through the external bus, characterized in that it includes: 一中央处理单元;a central processing unit; 一本机总线;A machine bus; 一晶片组,藉由本机总线电连接于中央处理单元,晶片组包括一主控制单元,主控制单元用以协调中央处理单元与第一组周边装置之间的数据传送;A chipset, electrically connected to the central processing unit via the local bus, the chipset includes a main control unit, the main control unit is used for coordinating the data transmission between the central processing unit and the first group of peripheral devices; 一存储器单元,电连接于晶片组,用以储存系统管理中断程序,存储器单元包括一组周边装置数据区块,用以储存第一组周边装置与中央处理单元间传送的数据;A memory unit, electrically connected to the chipset, used for storing the system management interrupt program, the memory unit includes a group of peripheral device data blocks, used for storing the data transmitted between the first group of peripheral devices and the central processing unit; 一电源管理单元,电连接于晶片组;及a power management unit electrically connected to the chipset; and 一第二组周边装置,电连接于电源管理单元;a second set of peripheral devices electrically connected to the power management unit; 所述中央处理单元在进入省电模式后,停止对第二组周边装置的电源供应,而后因应于一中断信号执行系统管理中断程序,系统管理中断程序包括以下步骤:After the central processing unit enters the power saving mode, it stops the power supply to the second group of peripheral devices, and then executes a system management interrupt program in response to an interrupt signal. The system management interrupt program includes the following steps: (1)判断中断信号是否为主控制单元所发出;(1) Determine whether the interrupt signal is sent by the main control unit; (2)当中断信号不是由主控制单元所发出时,供应电源至第二组周边装置;(2) When the interrupt signal is not sent by the main control unit, supply power to the second group of peripheral devices; (3)当中断信号为主控制单元所发出时,则判断第一组周边装置是否传送有效数据至周边装置数据区块;(3) When the interrupt signal is sent by the main control unit, it is judged whether the first group of peripheral devices transmit valid data to the peripheral device data block; (4)当传送有效数据至周边装置区块时,则供应电源至第二组周边装置,并结束系统管理中断程序;(4) When sending valid data to the peripheral device block, then supply power to the second group of peripheral devices, and end the system management interruption procedure; (5)当无有效数据写入周边装置数据区块时,则使电脑装置维持在省电模式。(5) When no valid data is written into the data block of the peripheral device, the computer device is kept in the power saving mode. 2、根据权利要求1所述的电脑装置,其特征在于,所述中断信号为一SMI#信号或一IRQ#信号。2. The computer device according to claim 1, wherein the interrupt signal is an SMI# signal or an IRQ# signal. 3、根据权利要求1所述的电脑装置,其特征在于,所述晶片组还包括一暂存器,暂存器用以储存一标示值,所述中央处理单元藉由读取标示值以判断所述中断信号是否来自所述主控制单元。3. The computer device according to claim 1, wherein the chipset further comprises a temporary register for storing a marked value, and the central processing unit judges the value by reading the marked value Whether the interrupt signal is from the main control unit. 4、根据权利要求3所述的电脑装置,其特征在于,所述步骤(1)中判断该中断信号是否为所述主控制单元发出的,读取所述晶片组的暂存器储存的标示值以资判断。4. The computer device according to claim 3, wherein in the step (1), it is judged whether the interrupt signal is sent by the main control unit, and the indication stored in the temporary register of the chipset is read value for judgment. 5、根据权利要求1所述的电脑装置,其特征在于,所述存储器单元还存放一周边装置数据结构,周边装置数据结构存放一旗标值及一指标值,指标值用以指向周边装置数据区块的地址,而旗标值用以判定是否有数据写入周边装置数据区块的地址。5. The computer device according to claim 1, wherein the memory unit further stores a peripheral device data structure, the peripheral device data structure stores a flag value and an index value, and the index value is used to point to the peripheral device data The address of the block, and the flag value is used to determine whether there is data written into the address of the data block of the peripheral device. 6、根据权利要求5所述的电脑装置,其特征在于,所述步骤(3)中判断第一组周边装置是否传送数据至周边装置数据地址对应的存储器,是读取周边装置数据结构的旗标值,判断旗标值是否被设定,若被设定,在进一步判断周边装置数据区块所储存的数据是否为零值。6. The computer device according to claim 5, wherein in the step (3), judging whether the first group of peripheral devices transmits data to the memory corresponding to the data address of the peripheral device is a flag for reading the data structure of the peripheral device Flag value, determine whether the flag value is set, if set, further judge whether the data stored in the peripheral device data block is zero value. 7、根据权利要求1所述的电脑装置,其特征在于,所述总线为一通用序列总线,当第一组周边装置传送数据给主控制单元时,是通过通用序列总线以序列方式传送数据。7. The computer device according to claim 1, wherein the bus is a Universal Serial Bus, and when the first group of peripheral devices transmits data to the main control unit, the data is transmitted serially through the Universal Serial Bus. 8、根据权利要求7所述的电脑装置,其特征在于,所述通用序列总线由一组四芯线组成,其中二条线用以供应电源至第一组周边装置,另二条线用以供传送序列数据。8. The computer device according to claim 7, wherein the Universal Serial Bus is composed of a set of four-core wires, two of which are used to supply power to the first group of peripheral devices, and the other two are used for transmission sequence data. 9、根据权利要求8所述的电脑装置,其特征在于,所述通用序列总线符合USB 1.0及其修订版本的规定。9. The computer device according to claim 8, wherein said Universal Serial Bus complies with USB 1.0 and its revisions. 10、根据权利要求1所述的电脑装置,其特征在于,所述周边装置数据区块的数目对应于所述第一组周边装置的数目,且每一周边装置数据区块对应于一第一组周边装置;当第一组周边装置传送数据至电脑时,是先将数据传送至周边装置数据区块,再由所述中央处理单元读出该数据。10. The computer device according to claim 1, wherein the number of peripheral device data blocks corresponds to the number of peripheral devices of the first group, and each peripheral device data block corresponds to a first A group of peripheral devices; when the first group of peripheral devices transmits data to the computer, the data is first transmitted to the data block of the peripheral devices, and then the data is read out by the central processing unit. 11、根据权利要求1所述的电脑装置,其特征在于,还包括一数据输出输入控制器,所述步骤(4)是将周边装置数据区块送至数据输出输入控制器,由数据输出输入控制器触发所述晶片组发出一中断信号至所述中央处理单元;利用步骤(1)使电脑装置离开省电模式,进入运作模式,从而将电源供应至第一组周边装置。11. The computer device according to claim 1, further comprising a data output and input controller, the step (4) is to send the peripheral device data block to the data output and input controller, and the data output and input The controller triggers the chipset to send an interrupt signal to the central processing unit; using step (1), the computer device leaves the power saving mode and enters the operation mode, so as to supply power to the first group of peripheral devices. 12、根据权利要求1所述的电脑装置,其特征在于,还包括一装置中枢,且所述总线为一层级状总线,总线的根部层级由所述主控制单元组成,总线的其余每一层级则由装置中枢及所述第一组周边装置组成;装置中枢可再连接至次一层级的装置中枢或第一组周边装置,使各个第一组周边装置成树枝状分布串接在一起;如此将第一组周边装置通过连接接口连接于电脑装置。12. The computer device according to claim 1, further comprising a device hub, and the bus is a hierarchical bus, the root level of the bus is composed of the main control unit, and each other level of the bus It consists of a device center and the first group of peripheral devices; the device center can be connected to the device center of the next level or the first group of peripheral devices, so that each of the first group of peripheral devices is connected in series in a tree-like distribution; thus Connect the first group of peripheral devices to the computer device through the connection interface. 13、根据权利要求12所述的电脑装置,其特征在于,当所述一第一组周边装置接上所述总线时,所述主控制单元即给予第一组周边装置一特定的地址,当主控制单元传送数据给第一组周边装置或第一组周边装置传送数据给主控制单元时,在数据之前附加第一组周边装置的特定地址。13. The computer device according to claim 12, wherein when the peripheral device of the first group is connected to the bus, the main control unit gives the peripheral device of the first group a specific address, and when the peripheral device of the first group is When the control unit transmits data to the first group of peripheral devices or when the first group of peripheral devices transmits data to the main control unit, a specific address of the first group of peripheral devices is added before the data. 14、一种适用于权利要求1-13的电脑装置由省电模式进入运作模式的方法,其特征在于,包括以下步骤:14. A method for the computer device of claims 1-13 to enter the operation mode from the power saving mode, characterized by comprising the following steps: (a)因应于所述主控制单元的触发,所述晶片组周期性地发出一中断信号至中央处理单元;(a) in response to the triggering of the main control unit, the chipset periodically sends an interrupt signal to the central processing unit; (b)因应于中断信号,判断中断信号是否为主控制单元所发出;(b) in response to the interrupt signal, determine whether the interrupt signal is sent by the main control unit; (c)若中断信号不是由主控制单元发出,则使电脑装置进入运作模式;(c) if the interrupt signal is not sent by the main control unit, put the computer device into the operation mode; (d)若中断信号是由主控制单元发出,则检查是否有周边装置将数据写入所述周边装置数据区块;(d) if the interrupt signal is sent by the main control unit, then check whether any peripheral device writes data into the peripheral device data block; (e)若无数据写入周边装置数据区块,则使电脑装置继续维持在省电模式;(e) If no data is written into the data block of the peripheral device, the computer device is kept in the power saving mode; (f)若有数据写入周边装置数据区块,则使电脑装置进入运作模式。(f) If data is written into the data block of the peripheral device, the computer device enters into an operation mode. 15、根据权利要求14所述的方法,其特征在于,所述主控制单元对每一周边装置赋予一特定的装置地址,当所述周边装置传送数据至主控制单元,或主控制单元传送数据给周边装置时,皆将装置地址附加在所述数据中。15. The method according to claim 14, wherein the main control unit assigns a specific device address to each peripheral device, when the peripheral device transmits data to the main control unit, or the main control unit transmits data For peripheral devices, the device address is appended to the data. 16、根据权利要求14所述的方法,其特征在于,所述步骤(a)中,当所述晶片组发出中断信号后,即设定暂存器的值,而于步骤(b)中,藉由读取暂存器的值以判断中断信号是否由主控制单元所发出。16. The method according to claim 14, characterized in that in the step (a), when the chipset sends an interrupt signal, the value of the temporary register is set, and in the step (b), By reading the value of the temporary register, it is judged whether the interrupt signal is sent by the main control unit. 17、根据权利要求14所述的方法,其特征在于,所述每一组周边装置数据区块对应于一周边装置,当周边装置欲传送数据给电脑装置时,先将数据写入周边装置数据区块,而后由中央处理单元将数据读出。17. The method according to claim 14, wherein each group of peripheral device data blocks corresponds to a peripheral device, and when the peripheral device intends to transmit data to the computer device, the data is first written into the peripheral device data block, and then the data is read out by the central processing unit. 18、一种适用于权利要求1-13的电脑装置,由省电模式进入运作模式的方法,其特征在于,包括以下步骤:18. A computer device applicable to claims 1-13, a method for entering the operation mode from the power saving mode, characterized by comprising the following steps: 利用所述晶片组,因应于一周边装置的触发以传送一中断信号,并于所述主控暂存器储存一第一旗标值;Utilizing the chipset, transmitting an interrupt signal in response to a trigger of a peripheral device, and storing a first flag value in the master register; 利用所述存储器单元,储存一周边装置数据及一第二旗标值;using the memory unit to store a peripheral device data and a second flag value; 利用所述中央处理单元,于接收一中断信号时,读取第一旗标值以判断中断信号是否由周边装置所触发,或由其他事件所触发;Using the central processing unit, when receiving an interrupt signal, read the first flag value to determine whether the interrupt signal is triggered by a peripheral device or triggered by other events; 当中断信号为周边装置所触发时,读取第二旗标值以判断是否有周边装置数据写入存储器单元;When the interrupt signal is triggered by the peripheral device, read the second flag value to determine whether there is peripheral device data written into the memory unit; 当判断有周边装置数据写入存储器单元时,读取周边装置数据的值,当周边装置数据非零值时,使电脑装置进入运作模式。When it is judged that peripheral device data is written into the memory unit, the value of the peripheral device data is read, and when the peripheral device data is non-zero, the computer device enters the operation mode. 19、一种电脑装置由省电模式进入运作模式的方法,其特征在于,包括以下步骤:19. A method for a computer device to enter an operation mode from a power saving mode, comprising the following steps: 利用一周边主控制单元,以协调一中央处理单元与一组周边装置之间的数据传送,因应于该组周边装置的触发以传送一中断信号,并于一主控暂存器储存一第一旗标值;Utilize a peripheral main control unit to coordinate the data transmission between a central processing unit and a group of peripheral devices, send an interrupt signal in response to the triggering of the group of peripheral devices, and store a first in a master register. flag value; 利用一存储器单元,以储存一组周边装置数据及一组第二旗标值,各周边装置对应于各周边装置数据及各第二旗标值,各组周边装置数据为中央处理单元与各组周边装置之间传送的数据;A memory unit is used to store a set of peripheral device data and a set of second flag values, each peripheral device corresponds to each peripheral device data and each second flag value, each set of peripheral device data is the central processing unit and each set Data transmitted between peripheral devices; 利用中央处理单元,于接收一中断信号时,读取第一旗标值以判断中断信号是否由周边主控制单元所触发;Using the central processing unit to read the first flag value to determine whether the interrupt signal is triggered by the peripheral main control unit when receiving an interrupt signal; 当中断信号为周边主控制单元所发出,依序读取各第二旗标值以判断是否有周边装置数据写入存储器单元;When the interrupt signal is sent by the peripheral main control unit, read each second flag value in order to determine whether there is peripheral device data written into the memory unit; 当判断有周边装置数据写入存储器单元,读取该周边装数据,并因应于周边装置数据非零值,使电脑装置进入运作模式。When it is judged that peripheral device data is written into the memory unit, the peripheral device data is read, and the computer device enters the operation mode in response to the non-zero value of the peripheral device data. 20、一种电脑装置由省电模式进入运作模式的方法,其特征在于,包括以下步骤:20. A method for a computer device to enter an operation mode from a power saving mode, comprising the following steps: 利用一晶片组,用以协调周边装置与一中央处理单元之间的数据的传送,周边装置包括一第一组周边装置及一第二组周边装置;晶片组因应于周边装置的触发而产生一中断信号,当周边装置属于第一组周边装置时,晶片组并于一主控暂存器储存一第一旗标值;A chipset is used to coordinate the transmission of data between the peripheral device and a central processing unit, the peripheral device includes a first group of peripheral devices and a second group of peripheral devices; the chip group generates a trigger in response to the peripheral device interrupt signal, when the peripheral device belongs to the first group of peripheral devices, the chipset stores a first flag value in a master register; 利用一存储器单元,以储存一组周边装置数据及一组第二旗标值,当第一组周边装置传送周边装置数据至中央处理单元时,由晶片组单元将该周边装置数据写至存储器单元,并设定第二旗标值,再由中央处理单元自存储器单元读取该周边装置数据;Using a memory unit to store a set of peripheral device data and a set of second flag values, when the first set of peripheral devices transmit peripheral device data to the central processing unit, the chipset unit writes the peripheral device data to the memory unit , and set a second flag value, and then the central processing unit reads the peripheral device data from the memory unit; 当中央处理单元接收到中断信号时,读取第一旗标值以判断该中断信号是否由第一组周边装置所触发;When the central processing unit receives the interrupt signal, it reads the first flag value to determine whether the interrupt signal is triggered by the first group of peripheral devices; 当中断信号为第一组周边装置所触发时,读取第二旗标值以判断是否有第一组周边装置所传送的周边装置数据写入存储器单元,因应于判断有周边装置数据写入存储器单元,且周边装置数据非零值,使电脑装置进入运作模式。When the interrupt signal is triggered by the first group of peripheral devices, read the second flag value to determine whether there is peripheral device data transmitted by the first group of peripheral devices to be written into the memory unit, in response to judging that there is peripheral device data written into the memory unit, and the peripheral device data is non-zero, so that the computer device enters the operation mode. 21、一种电脑装置,配合一第一组周边装置及一第二组周边装置,该电脑装置包括:21. A computer device that cooperates with a first set of peripheral devices and a second set of peripheral devices, the computer device comprising: 一中央处理单元;a central processing unit; 一晶片组,包括一主控暂存器,用以控制第一组周边装置及第二组周边装置与中央处理单元之间的数据传送;晶片组因应于第一组周边装置的触发以传送一中断信号,并于一主控暂存器储存一第一旗标值;晶片组因应于第二组周边装置的触发亦传送一中断信号;A chipset, including a main control register, is used to control the data transmission between the first group of peripheral devices and the second group of peripheral devices and the central processing unit; the chipset transmits a trigger in response to the first group of peripheral devices an interrupt signal, and store a first flag value in a master register; the chipset also sends an interrupt signal in response to the triggering of the second group of peripheral devices; 一存储器单元,用以储存一组周边装置数据及一组第二旗标值,当第一组周边装置传送周边装置数据至中央处理单元时,由晶片组将周边装置数据写至存储器单元,并设定该组第二旗标值,再由中央处理单元自存储器单元读取该周边装置数据;A memory unit for storing a set of peripheral device data and a set of second flag values, when the first group of peripheral devices transmits the peripheral device data to the central processing unit, the chip set writes the peripheral device data to the memory unit, and Setting the set of second flag values, and then the central processing unit reads the peripheral device data from the memory unit; 当电脑装置进入省电模式后,当中央处理单元接收到一中断信号时,藉由判断中断信号由第一组周边装置所触发,判断有第一组周边装置传送的周边装置数据写入存储器单元,判断该周边装置数据非零值,使电脑装置进入运作模式。After the computer device enters the power-saving mode, when the central processing unit receives an interrupt signal, it judges that the peripheral device data transmitted by the first group of peripheral devices is written into the memory unit by judging that the interrupt signal is triggered by the first group of peripheral devices , judging that the data of the peripheral device is non-zero, so that the computer device enters the operation mode. 22、一种电脑装置由省电模式进入运作模式的方法,其特征在于,包括以下步骤:22. A method for a computer device to enter an operation mode from a power saving mode, comprising the following steps: 利用一周边主控制单元,用以协调一中央处理单元与一USB键盘之间的数据传送,因应于USB键盘的触发以传送一中断信号,并于一主控暂存器储存一第一旗标值;Utilize a peripheral main control unit to coordinate the data transmission between a central processing unit and a USB keyboard, send an interrupt signal in response to the trigger of the USB keyboard, and store a first flag in a main control register value; 利用一存储器单元,以储存USB键盘数据及一第二旗标值,USB键盘数据是中央处理单元与USB键盘之间传送的数据;A memory unit is used to store USB keyboard data and a second flag value, the USB keyboard data is data transmitted between the central processing unit and the USB keyboard; 利用中央处理单元,于接收一中断信号时,读取第一旗标值以判断该中断信号是否由周边主控制单元所触发;Using the central processing unit to read the first flag value to determine whether the interrupt signal is triggered by the peripheral main control unit when receiving an interrupt signal; 当该中断信号为主控制单元所发出时,读取第二旗标值以判断是否有USB键盘数据写入存储器单元,且因应于判断有USB键盘数据写入存储器单元,读取USB键盘数据,并因应于该USB键盘数据非为零值,使电脑装置进入运作模式。When the interrupt signal is sent by the main control unit, read the second flag value to judge whether there is USB keyboard data written into the memory unit, and in response to judging that there is USB keyboard data written into the memory unit, read the USB keyboard data, And in response to the non-zero value of the USB keyboard data, the computer device enters the operation mode. 23、一种电脑装置,配合一USB键盘使用,该电脑装置包括:23. A computer device used with a USB keyboard, the computer device comprising: 一中央处理单元;a central processing unit; 一周边主控制单元,包括一主控暂存器,周边主控制单元用以协调中央处理单元与USB键盘之间的数据传送,因应于USB键盘的触发以传送一中断信号,并于主控暂存器储存一第一旗标值;A peripheral main control unit, including a main control temporary register, the peripheral main control unit is used to coordinate the data transmission between the central processing unit and the USB keyboard, and transmits an interrupt signal in response to the triggering of the USB keyboard, and the main control temporary register The memory stores a first flag value; 一存储器单元,以储存一USB键盘数据及一第二旗标值,USB键盘数据是中央处理单元与USB键盘之间传送的数据;A memory unit, to store a USB keyboard data and a second flag value, the USB keyboard data is the data transmitted between the central processing unit and the USB keyboard; 中央处理单元接收一中断信号时,读取第一旗标值以判断中断信号是否由周边控制单元所触发;当中断信号为该周边主控制单元所发出时,读取第二旗标值以判断是否有USB键盘数据写入存储器单元,当有USB键盘数据写入存储器单元时,读取USB键盘数据,并因应于USB键盘数据非为零值,使电脑装置进入运作模式。When the central processing unit receives an interrupt signal, it reads the first flag value to judge whether the interrupt signal is triggered by the peripheral control unit; when the interrupt signal is sent by the peripheral master control unit, reads the second flag value to judge Whether there is USB keyboard data written into the memory unit, when there is USB keyboard data written into the memory unit, read the USB keyboard data, and make the computer device enter the operation mode in response to the USB keyboard data being non-zero. 24、一种电脑装置,配合一周边装置使用,电脑装置包括:24. A computer device used in conjunction with a peripheral device, the computer device comprising: 一晶片组单元,因应于周边装置的触发以传送一中断信号,并于主控暂存器储存一第一旗标值;A chipset unit transmits an interrupt signal in response to a trigger of a peripheral device, and stores a first flag value in a master register; 一存储器单元,用以储存一周边装置数据及一第二旗标值;a memory unit for storing a peripheral device data and a second flag value; 一中央处理单元,接收一中断信号时,读取第一旗标值以判断中断信号是否由周边装置所触发,读取第二旗标值以判断是否有周边装置数据写入存储器单元,读取周边装置数据的值以判断是否为零值,当周边装置数据非零值时,使电脑装置进入运作模式。A central processing unit, when receiving an interrupt signal, reads the first flag value to determine whether the interrupt signal is triggered by a peripheral device, reads the second flag value to judge whether there is peripheral device data written into the memory unit, and reads The value of the peripheral device data is used to determine whether it is a zero value, and when the peripheral device data is non-zero value, the computer device enters the operation mode. 25、一种电脑装置,配合至少二个周边装置使用,周边装置包括第一组周边装置及第二组周边装置,电脑装置包括一中央处理单元、一晶片组及一存储器单元;晶片组用以协调周边装置与中央处理单元之间数据的传送,晶片组因应于周边装置的触发以产生一中断信号,晶片组包括一主控暂存器,由读取主控暂存器的值以判断中断信号是否由第一组周边装置所触发,存储器单元用以储存一组周边装置数据及一组旗标值,周边装置数据是第一组周边装置与中央处理单元之间传送的数据,该组旗标值用以判断是否有周边装置数据写入存储器单元;电脑装置进入省电模式后因应第一组周边装置的触发而进入运作模式的方法为:25. A computer device used with at least two peripheral devices. The peripheral devices include a first group of peripheral devices and a second group of peripheral devices. The computer device includes a central processing unit, a chip set and a memory unit; the chip set is used for Coordinate the transmission of data between the peripheral device and the central processing unit. The chip set generates an interrupt signal in response to the triggering of the peripheral device. The chip set includes a master register, and the interrupt is judged by reading the value of the master register Whether the signal is triggered by the first group of peripheral devices, the memory unit is used to store a group of peripheral device data and a set of flag values, the peripheral device data is the data transmitted between the first group of peripheral devices and the central processing unit, the group flag The mark value is used to determine whether there is peripheral device data written into the memory unit; after the computer device enters the power saving mode, the method of entering the operation mode in response to the trigger of the first group of peripheral devices is as follows: 当中央处理单元接收到一中断信号,且判断中断信号由第一组周边装置所触发、判断有第一组周边装置传送的周边装置数据写入存储器单元、判断该周边装置数据非零值时,使电脑装置进入运作模式。When the central processing unit receives an interrupt signal, and judges that the interrupt signal is triggered by the first group of peripheral devices, judges that the peripheral device data transmitted by the first group of peripheral devices is written into the memory unit, and judges that the peripheral device data is non-zero, Put the computer device into operation mode. 26、一种电脑装置由省电模式进入运作模式的方法,其特征在于,包括以下步骤:26. A method for a computer device to enter an operation mode from a power saving mode, comprising the following steps: 一中央处理单元接收到中断信号时判断中断信号是否由一USB周边装置所触发;When a central processing unit receives the interrupt signal, it judges whether the interrupt signal is triggered by a USB peripheral device; 该中央处理单元判断USB周边装置是否有传送数据至电脑装置;The central processing unit judges whether the USB peripheral device transmits data to the computer device; 该中央处理单元判断该数据是否为零值;The central processing unit judges whether the data is a zero value; 该中央处理单元因应于该数据非零值,使电脑装置进入运作模式。The central processing unit causes the computer device to enter an operation mode in response to the non-zero value of the data. 27、一种电脑装置,包括一中央处理单元、一晶片组、一存储器单元;晶片组包括一主控暂存器;存储器单元包括一周边装置存储区块,周边装置存储区块储存一旗标值;27. A computer device, comprising a central processing unit, a chip set, and a memory unit; the chip set includes a master register; the memory unit includes a peripheral device storage block, and the peripheral device storage block stores a flag value; 该中央处理单元接收到中断信号时由主控暂存器的储存值判断中断信号是否由一USB周边装置所触发;When the central processing unit receives the interrupt signal, it judges whether the interrupt signal is triggered by a USB peripheral device according to the storage value of the main control temporary register; 该中央处理单元读取旗标值以判断USB周边装置是否有传送数据至电脑装置;The central processing unit reads the flag value to determine whether the USB peripheral device transmits data to the computer device; 该中央处理单元判断该数据是否为零值;The central processing unit judges whether the data is a zero value; 该中央处理单元因应于该数据非零值,使电脑装置进入运作模式。The central processing unit causes the computer device to enter an operation mode in response to the non-zero value of the data. 28、一种电脑装置,配合通用序列总线周边装置使用,电脑装置包括:28. A computer device used in conjunction with Universal Serial Bus peripheral devices, the computer device comprising: 一晶片组单元,因应于中断事件以产生一中断信号,中断事件包括通用序列总线周边装置的触发,晶片组单元包括一主控暂存器以储存一第一旗标值;A chipset unit generates an interrupt signal in response to an interrupt event, the interrupt event includes triggering of a universal serial bus peripheral device, and the chipset unit includes a master register to store a first flag value; 一存储器单元,用以储存一周边装置数据及一第二旗标值;a memory unit for storing a peripheral device data and a second flag value; 一中央处理单元,接收一中断信号时,读取第一旗标值以判断中断信号是否由周边装置所触发,读取第二旗标值以判断是否有周边装置数据写入存储器单元,读取周边装置数据的值以判断是否为零值,当周边装置数据非零值时,使电脑装置进入运作模式。A central processing unit, when receiving an interrupt signal, reads the first flag value to determine whether the interrupt signal is triggered by a peripheral device, reads the second flag value to judge whether there is peripheral device data written into the memory unit, and reads The value of the peripheral device data is used to determine whether it is a zero value, and when the peripheral device data is non-zero value, the computer device enters the operation mode.
CNB981201881A 1998-10-23 1998-10-23 Computer device and method for entering operation mode from power-saving mode Expired - Lifetime CN1147774C (en)

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US7069464B2 (en) * 2001-11-21 2006-06-27 Interdigital Technology Corporation Hybrid parallel/serial bus interface
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