CN114709330A - High-density phase change storage material, phase change memory and preparation method thereof - Google Patents
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Abstract
The invention relates to a high-density phase change memory material, a phase change memory and a preparation method thereof, wherein the phase change memory material comprises the following components: the device comprises a substrate, a buffer layer, a superlattice phase change material layer and a medium isolation layer. The phase change memory comprises an upper electrode layer, a phase change material layer and a lower electrode layer. The phase change memory shows stable multi-level resistance state and quick erasing operation characteristics, and is expected to meet the application requirements of storage and calculation integration and neuromorphic devices.
Description
Technical Field
The invention belongs to the field of microelectronic integrated circuits, and particularly relates to a high-density phase change memory material, a phase change memory and a preparation method thereof.
Background
With the development of information technologies such as artificial intelligence and cloud computing, the requirements on storage and processing capabilities of mass data are continuously increasing. The nonvolatile memory has the characteristics of large memory capacity, high read-write speed, multi-level storage and the like, is expected to replace a dynamic random access memory and a flash memory to break the existing von Neumann system of a computer, and realizes low-energy-consumption and high-speed memory-computation integration and neuromorphic computation storage architecture. The phase change memory is the most potential next-generation nonvolatile memory technology due to the characteristics of high operation speed, low power consumption, high thermal stability, good micro-shrinkage, compatibility with the existing CMOS (complementary metal oxide semiconductor) process and the like.
The phase change memory has the phase transition characteristic of chalcogenide compounds, and the crystalline state and the amorphous state have about 30 percent of reflectivity change or more than two orders of magnitude of resistance difference. When a phase change material is transformed from a crystalline state (low resistance, high reflectance) to an amorphous state (high resistance, low reflectance), it is necessary to heat the phase change material to a molten state by joule heat of an electric pulse and then quench it. Although phase change memories have lower cost, stereoscopic stacking possibilities relative to DRAMs; faster operating speed, longer life time relative to NAND; but its lower storage density limits the application of phase change memories to more fields and becomes a truly commercially viable storage class memory.
Disclosure of Invention
The invention aims to solve the technical problem of providing a high-density phase change memory material, a phase change memory and a preparation method thereof, and overcoming the defect of low storage density of the phase change memory in the prior art.
The invention provides a phase change storage material with a multi-stage resistance state, which sequentially comprises the following components from bottom to top: a substrate 101, a buffer layer 102, a superlattice phase change material layer, and a medium isolation layer 105; wherein the superlattice phase-change material layer is formed by alternately depositing doped nitrogen-sulfur compound 103 and GeTe 104.
The base is a hard substrate or a flexible substrate.
The substrate 101 is one or more of monocrystalline silicon, silicon carbide, gallium nitride, polyimide and polyethylene terephthalate; the dielectric isolation layer 105 is a nitride dielectric material layer; the nitride dielectric material is Si3N4。
The buffer layer 102 is a phase change material layer having a van der waals structure; the phase change material having a van der waals structure is a nitrogen-sulfur compound material having a hexagonal crystal orientation and a van der waals structure, and having a high (00L) texture orientation.
The buffer layer 102 is Sb2Te3，Bi2Te3，Bi2Se3One or more of them.
The doped nitrogen-sulfur family compound 103 is a nitrogen-sulfur family compound material doped with a Van der Waals structure, wherein the doping component is a compound material or a simple substance transition metal material, and the nitrogen-sulfur family compound material is Sb2Te3、Bi2Te3、Bi2Se3One or more of the above;
the compound material is TiTe2(ii) a The simple substance transition metal material is at least one of Mo and Ti.
The superlattice phase-change material layer is (TiTe)2)x(Sb2Te3)y-GeTe，Mox(Sb2Te3)y-at least one of GeTe; wherein 0<x<0.15；0.85<y<1。
The thickness of the buffer layer 102 is 1-10 nm; the thickness of the doped nitrogen chalcogenide 103 may be 1-5 nm; the thickness of the GeTe material 104 is 1-5 nm; the thickness of the medium isolation layer is 5-50 nm.
The doped nitrogen-sulfur compound 103 and GeTe104 are alternately deposited to form a superlattice phase change material layer, and the alternate deposition period is 1-50 times.
The invention provides a preparation method of a phase change storage material with a multi-level resistance state, which comprises the following steps:
depositing a buffer layer on the substrate, then alternately depositing doped nitrogen-sulfur family compounds and GeTe on the buffer layer to form a superlattice phase change material layer, and finally depositing a medium isolation layer.
Further, the preparation method of the phase change memory material with the multi-level resistance state comprises the following steps:
before preparing the superlattice phase-change material layer, a substrate is prepared. The substrate may be a hard substrate such as single crystal silicon, silicon carbide, or gallium nitride, or a flexible substrate such as polyimide or polyethylene terephthalate, which is successively cleaned with an alcohol solution or an acetone solution in an ultrasonic wave.
After the substrate is ready for cleaning, the substrate surface needs to be cleaned to remove the oxide layer on the substrate surface. Subsequently, a layer with hexagonal crystal orientation and van der Waals junction is grown on the cleaned substrateThe structural nitrogen-sulfur family compound is used as a buffer layer. The buffer layer is formed to facilitate subsequent growth of the superlattice structure. The material of the buffer layer may be Sb2Te3And (c) nitrogen-sulfur compounds having a hexagonal orientation and having a van der waals structure to ensure that the subsequently grown thin film can maintain a good (00L) texture orientation.
After the deposition of the buffer layer is completed, a layer of doped nitrogen-sulfur compound material having a van der waals structure is first grown. Then, a GeTe material layer is deposited on the nitrogen-sulfur family compound material with Van der Waals structure. The thickness of the nitrogen-sulfur compound material layer having the van der waals structure may be arbitrarily selected within a range of 1 to 5 nm. Then, the van der waals nitride compound material layer and the GeTe layer are alternately deposited by the aforementioned method to achieve the target cycle number. The deposition method can adopt one of physical vapor deposition method, chemical vapor deposition method, atomic layer deposition method and pulse laser deposition method.
After the doped nitrogen-sulfur compound material layer with the Van der Waals structure and the GeTe layer which are alternately deposited are finished, a layer of nitride is grown under the same deposition environment to be used as a medium isolation layer and used as a protective layer of the phase change material.
The buffer layer and the phase-change material layer can be formed by one of a physical vapor deposition method, a chemical vapor deposition method, an atomic layer deposition method and a pulse laser deposition method.
The substrate temperature during deposition is 200-350 ℃, and the background vacuum degree is less than or equal to 2 multiplied by 10-5The sputtering pressure is 0.2-1 Pa.
Preferably, the deposition temperature is 300 ℃.
The invention provides a phase change memory, which sequentially comprises: the phase change memory device comprises a lower electrode layer, a phase change memory material layer and an upper electrode layer.
The invention provides a preparation method of a high-density phase change memory, which comprises the following steps:
(1) preparing a lower electrode layer on a substrate;
(2) preparing the phase change material layer on the lower electrode layer in the step (1);
(3) and (3) preparing an upper electrode layer on the phase change material layer in the step (2).
The materials of the lower electrode layer and the upper electrode layer comprise: w, WN, Ta, TaW, TiW, TiN, TiSiN and C.
The preparation method of the lower electrode layer and the upper electrode layer comprises one of a physical vapor deposition method, a chemical vapor deposition method, an atomic layer deposition method and a pulse laser deposition method.
The invention provides an application of the phase change memory in a nonvolatile memory device with high storage density.
The invention provides a phase-change material with multi-level resistance states for high-density data storage, a phase-change memory and a preparation method thereof.A buffer layer grows on a substrate, and a nitrogen-sulfur compound material with a van der Waals structure and a GeTe phase-change material are alternately deposited on the buffer layer to obtain a superlattice phase-change material with a plurality of resistance states and obvious resistance difference; and then by preparing the upper electrode, the lower electrode and the superlattice phase change material, compared with the traditional phase change material, the multi-resistance phase change material can store data of a plurality of bits in one unit, and the nonvolatile memory device with unit bit, low operation power consumption and high storage density is realized.
Advantageous effects
One unit of the traditional binary phase change memory can only store two bits of data, and the high-density phase change memory has a plurality of resistance states (not less than 4) in one unit, can be used for storing multi-bit data, is favorable for improving the storage density of the traditional phase change memory on the basis of not increasing the process complexity and the cost, meets the requirements of memory calculation and neuromorphic devices on the storage precision performance, and has high industrial development value.
Drawings
FIGS. 1(a) to (f) are TiTe2Doped with Sb2Te3A flow schematic diagram of a preparation method of the GeTe superlattice phase change storage material;
FIG. 2 shows TiTe2Doped with Sb2Te3Under the action of different electrical pulses, GeTe superlattice phase change memory,a device unit resistance variation curve (R-V curve) along with voltage pulse;
FIG. 3 shows TiTe2Doped with Sb2Te3The erasing and writing cycle operation curve of the unit of the device under the action of different electrical pulses of the GeTe superlattice phase change memory;
FIG. 4 is Sb2Te3Under the action of different electrical pulses, the unit resistance of the GeTe superlattice phase change memory changes along with voltage pulses (R-V curve);
FIG. 5 is Sb2Te3And the erasing and writing cycle operation curve of the unit of the device of the GeTe superlattice phase change memory under the action of different electrical pulses.
Detailed Description
The invention will be further illustrated with reference to the following specific examples. It should be understood that these examples are for illustrative purposes only and are not intended to limit the scope of the present invention. Further, it should be understood that various changes or modifications of the present invention may be made by those skilled in the art after reading the teaching of the present invention, and such equivalents may fall within the scope of the present invention as defined in the appended claims.
Example 1
(1) Cleaning the substrate for 10 minutes by using an alcohol solution and an acetone solution in turn under the action of ultrasonic waves; then placing the substrate in a 120 ℃ oven to dry for 20 minutes; in the present embodiment, a silicon wafer is selected as a substrate.
(2) As shown in fig. 1(a), a substrate (101) is cleaned by magnetron sputtering in a magnetron sputtering machine to remove an oxide layer. Background vacuum of 2X 10-5The sputtering pressure is 0.5 Pa, the sputtering power is 50 watts, and the temperature of the reaction cavity is 300 ℃.
(3) As shown in FIG. 1(b), a layer of Sb with a thickness of 10nm was deposited on a silicon wafer by magnetron sputtering in the same sputtering environment2Te3A van der Waals buffer layer (102) with a background vacuum of 2 x 10-5The sputtering pressure is 0.5 Pa, and the temperature of the reaction cavity is 300 ℃.
(4) As shown in FIG. 1(c), in the same sputtering environment, TiTe is used2Alloy target and Sb2Te3Co-sputtering of alloy targetsPrepared doped Sb2Te3A phase change material (103).
(5)TiTe2Sputtering the alloy target by using a radio frequency power supply, wherein the sputtering power is 10 watts; sb2Te3The alloy target is sputtered by a radio frequency power supply, and the sputtering power is 20 watts. TiTe2Doped Sb2Te3The thickness of the phase-change material layer is 1-5 nm. In this embodiment, TiTe is selected2Doped Sb2Te3The thickness of the phase change material layer was 5 nm.
By regulation, TiTe2The power of the alloy target can obtain Ti-Sb-Te phase change materials with different components; the TiTe2Alloy target and Sb2Te3The sputtering power for the alloy target can also be other values, and the scope of the present invention should not be limited too much here.
(6) As shown in fig. 1(d), a layer of GeTe layer material (104) with a thickness of 1nm is sputtered by magnetron sputtering in the same environment.
(7) As shown in fig. 1(e), sequentially repeating the step (5) and the step (6) in the first embodiment to form an alternately deposited superlattice phase-change material structure, wherein the alternate sputtering period is 1-50 times; as an example, the alternate sputtering cycle of this example is 20 times.
(8) As shown in FIG. 1(f), a dielectric isolation layer (105) with a thickness of 10nm is deposited in the same sputtering environment, and Si is selected as the material in this embodiment3N4。
As shown in fig. 1 (f): the phase change memory material is composed of a substrate (101); sb2Te3Van der waals buffer layer (102), TiTe2Doped Sb2Te3-a GeTe superlattice structure; and a dielectric isolation layer.
Example 2
The preparation of the high storage density superlattice phase change memory device comprises the following steps:
(1) preparing a lower electrode layer, wherein the lower electrode layer is made of TiN;
(2) forming a phase change material layer on the lower electrode layer, wherein the phase change material layer is the phase change memory material of embodiment 1;
(3) and forming a TiN upper electrode on the phase change memory material layer.
(4) And connecting the prepared phase change memory device to an electrical test system through a probe or a lead, loading an electrical pulse signal, performing writing, erasing and reading operations of the phase change memory device, and researching the performance of the phase change memory device under the structure.
As shown in fig. 2: made of TiTe2Doped Sb2Te3The resistance-voltage relation diagram of the GeTe superlattice phase change memory shows that the superlattice phase change memory can realize 'erasing' and 'writing' operations under different pulse widths. With the change of the pulse width, the on-state voltage and the off-state voltage of the phase change memory cell are not obviously increased, and a lower low resistance state is obtained. Meanwhile, under smaller pulse width, a second-stage 'erasing' operation occurs near 0.8V, and a second-stage low-resistance state is obtained; a second "write" operation is found around 3.5V, resulting in a second level of high resistance. Therefore, at a specific pulse width, the pulse width is determined by TiTe2Doped Sb2Te3The GeTe superlattice phase change memory can obtain four resistance states with obvious resistance difference. The superlattice phase change material provided by the invention can obtain more than two levels of resistance states by changing the pulse width, and the phase change storage material with multi-level resistance states and the high-density phase change memory are realized.
As shown in fig. 3: made of TiTe2Doped Sb2Te3-fatigue performance curves of cyclic erase and write operations of a GeTe superlattice phase change memory device, by applying different electrical pulses, four stable resistance states with significant resistance differences are obtained; meanwhile, the repeated erasing and writing cycle times of the superlattice phase-change memory device without obvious performance attenuation exceed 1 multiplied by 104Secondly, the superlattice phase change memory device provided by the invention can obtain more than two levels of resistance states by adjusting the width and the voltage value of the electric pulse, and realize a phase change memory material with multi-level resistance states and a high-density phase changer.
Comparative example 1
In the phase change memory material to be used in example 2TiTe2Doped Sb2Te3-GeTe superlattice structure replaced by Sb2Te3A GeTe superlattice structure, and the rest are the same as in embodiment 2, to obtain a phase change memory device.
And connecting the prepared phase change memory device to an electrical test system through a probe or a lead, loading an electrical pulse signal, performing writing, erasing and reading operations of the phase change memory device, and researching the performance of the phase change memory device under the structure.
As shown in fig. 4: from Sb2Te3The resistance-voltage relation diagram of the GeTe superlattice phase change memory shows that the superlattice phase change memory can realize 'erasing' and 'writing' operations under different pulse widths. With the change of the pulse width, the phase change memory cell can only show two stable resistance states, and the number of the resistance states is not changed along with the operation parameters.
As shown in fig. 5: from Sb2Te3Fatigue performance curves for cyclic erase operation of GeTe superlattice phase change memory devices, it can be seen that the number of repeated erasures of the devices between two stable resistance states exceeds 1.0 x 105Next, the process is carried out.
Claims (10)
1. The phase change memory material with multi-level resistance states is characterized by comprising the following components in sequence from bottom to top: the device comprises a substrate (101), a buffer layer (102), a superlattice phase change material layer and a medium isolation layer (105); wherein the superlattice phase-change material layer is formed by alternately depositing doped nitrogen-sulfur compound (103) and GeTe (104).
2. The material according to claim 1, wherein the substrate (101) is one or more of monocrystalline silicon, silicon carbide, gallium nitride, polyimide and polyethylene terephthalate; the dielectric isolation layer (105) is a nitride dielectric material layer; the nitride dielectric material is Si3N4。
3. The material of claim 1, wherein the buffer layer (102) is a layer of phase change material having a van der waals structure; the phase change material having a van der waals structure is a nitrogen-sulfur compound material having a hexagonal crystal orientation and a van der waals structure, and having a high (00L) texture orientation.
4. The material according to claim 1, wherein the buffer layer (102) is Sb2Te3，Bi2Te3，Bi2Se3One or more of them.
5. The material according to claim 1, wherein the doped nitrogen-sulfur compound (103) is a doped nitrogen-sulfur compound material with a van der Waals structure, wherein the doping component is a compound material or an elemental transition metal material, and the nitrogen-sulfur compound material is Sb2Te3、Bi2Te3、Bi2Se3One or more of the above; the compound material is TiTe2(ii) a The simple substance transition metal material is at least one of Mo and Ti.
6. The material according to claim 1, wherein the buffer layer (102) has a thickness of 1-10 nm; the thickness of the nitrogen-sulfur compound (103) with doping may be 1-5 nm; the thickness of the GeTe material (104) is 1-5 nm; the thickness of the medium isolation layer is 5-50 nm; the alternating deposition period is 1-50 times.
7. A preparation method of a multi-level resistance state phase change memory material comprises the following steps:
depositing a buffer layer on the substrate, then alternately depositing doped nitrogen-sulfur family compounds and GeTe on the buffer layer to form a superlattice phase change material layer, and finally depositing a medium isolation layer.
8. The method as claimed in claim 7, wherein the deposition temperature of the substrate is 200-350 ℃, and the background vacuum degree is less than or equal to 2 x 10-5The sputtering pressure is 0.2-1 Pa.
9. A phase change memory, comprising in order: a lower electrode layer, a layer of the phase change memory material according to claim 1, and an upper electrode layer.
10. Use of the phase change memory according to claim 9 in a high storage density non-volatile memory device.
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Application publication date: 20220705 |