CN1144286C - Semiconductor device and method of manufacturing same - Google Patents

Abstract

An interlayer insulation film containing a dielectric component represented by a chemical formula having a Si-H bond or a Si-CH3 bond is formed on a substrate. Next, a photoresist is formed on the interlayer insulation film. The photoresist is then formed into a form of a contact hole. Thereafter, dry-etching of the interlayer insulation film is conducted by use of the photoresist as a mask. Subsequently, the photoresist is removed, and the interlayer insulation film is exposed to nitrogen plasma and hydrogen plasma.

Description

Semiconductor device and method of manufacturing same

technical features

The present invention relates to a semiconductor device having an interlayer insulating film, in which properties required for the semiconductor device are easily deteriorated by oxygen plasma treatment, and a method for manufacturing the semiconductor device. In particular, the present invention relates to a semiconductor device capable of recovering deteriorated properties and a method for manufacturing the semiconductor device.

Background technique

The demand for high-speed signal processing in large scale integration (LSI) is increasing year by year. The speed of signal processing in LSI is mainly determined by the working speed of its transistor itself and the signal transmission delay time in wiring. The operating speed of transistors, which greatly affects the speed at which signals are processed in the prior art, has been improved by reducing the size of the transistors.

However, in an LSI having a design size smaller than 0.25 μm, a decrease in signal processing speed based on a signal propagation delay in wiring becomes remarkable. In an LSI device having a multilayer wiring structure of four or more wiring layers, this influence is large.

Therefore, in recent years, as a method for improving the delay of signal transmission in wiring, the use of a hydrogen silsesquioxane (HSQ) film or similar film having a small dielectric constant in place of the conventional silicon oxide film layer has now been studied. inter-insulation film. The HSQ film is a resin film with a certain chemical structure, in which a part of the Si-O bond of the silicon oxide film is replaced by a Si-H bond. This film is applied to a substrate and then heated and sintered so that it functions as an interlayer insulating film. Since almost all of the HSQ film is composed of Si-O bonds in the same way as conventional silicon oxide films, the HSQ film has a low dielectric constant and a thermal resistance as high as about 500°C.

However, when the HSQ film is used as the interlayer insulating film, there is still a problem of damaging the HSQ film in the step of stripping the photoresist used in the usual photolithography and etching techniques for forming various patterns.

Generally, in the step of stripping the photoresist, treatment is performed with oxygen plasma, thereby removing the remainder of the photoresist that was not stripped or the remainder of etching. Therefore, treat with a wet stripping solution containing monoethanolamine or similar. When the HSQ film is exposed to oxygen plasma, the Si-H bonds therein are broken and Si-OH bonds are generated. The film is made to contain moisture. When the HSQ film is treated with a wet stripping solution, Si-H bonds are broken and Si-OH bonds are generated, which is the same as the treatment with oxygen plasma. That is, during these stripping steps, the HSQ film contained a large amount of moisture. As a result, its dielectric constant rises undesirably. If the HSQ film contains a large amount of moisture, this causes a problem of leakage current between via holes. In the step of embedding in the via hole by CVD (Chemical Vapor Deposition) or sputtering method, the embedding process in the via hole becomes insufficient due to outgassing.

A process for manufacturing a semiconductor device in the prior art is described below. FIG. 1 is a cross-sectional view showing a manufacturing process of a semiconductor device in the related art.

First, a bottom layer 52 is formed on a silicon substrate 51 . Bottom layer 52 includes bottom layer components, such as transistors. Next, a barrier metal layer 53 is selectively formed on the underlying layer 52 . Thereafter, a first metal wiring layer 54 is formed on the barrier metal layer 53 . An antireflection layer 55 is formed on the first metal wiring layer 54 . Next, a first silicon oxide layer 57 is formed on the entire surface by plasma CVD. Next, an HSQ film 58 is formed on the first silicon oxide layer 57 by a coating machine. The resultant is temporarily sintered on a hot plate, and then sintered in a sintering furnace.

At this time, in order to avoid Si-H bond decomposition, nitrogen gas or the like is usually introduced around the hot plate, or into the sintering furnace so that the HSQ film does not react with oxygen or water. Next, a second silicon oxide film 59 is formed on the HSQ film 58 by plasma CVD or the like. Then, the silicon oxide film 59 and the HSQ film 58 on the antireflection layer 55 are etched with the patterned photoresist. In this way, through holes are formed. Next, the photoresist is stripped by treatment with oxygen plasma. The resultant is further subjected to an alkali-wet solution stripping treatment to remove etching residues and the like.

As described above, at this time, the Si-H bonds in the region of the HSQ film 58 exposed at the via holes and subjected to the oxygen plasma treatment are changed to Si-H bonds due to the oxygen plasma treatment and the stripping treatment with a wet solution. OH bond. Consequently, damaged portions 58b having an increased dielectric constant are produced in these regions. These damaged portions 58b cause unwanted vias.

In addition, a method has been proposed in which an HSQ film is formed, and then the resulting product is treated from the surface with an inert gas (for example, nitrogen or argon) to increase the strength of the HSQ film (Japanese Patent Application Publication No. 8- 111458).

According to this manufacturing method of the prior art disclosed in the above-mentioned publication, the strength of the HSQ film is improved. Therefore, even if an external force is applied to the HSQ film from the metal layer formed as the lower layer of the HSQ film, cracks are less likely to occur. However, it is impossible to suppress the increase in the dielectric constant of the HSQ film even by the method in the prior art.

Contents of the invention

An object of the present invention is to provide a semiconductor device such that the influence of an increase in the dielectric constant of an interlayer insulating film due to oxygen plasma treatment or the like can be reduced; and a method for manufacturing the semiconductor device .

According to an aspect of the present invention, a semiconductor device may include a semiconductor substrate, a wiring layer formed on the semiconductor substrate, a nitride film covering the wiring layer, and an interlayer insulating film formed on the nitride film. The interlayer insulating film may have openings reaching the wiring layer and contain a dielectric composition represented by a chemical formula having Si—H or Si—CH ₃ bonds.

In this aspect of the invention, the wiring layer is covered with a nitride film. Therefore, even in the process of forming the semiconductor device, fluorine plasma treatment is performed to lower the dielectric constant of the interlayer insulating film raised by the oxygen plasma treatment, the wiring layer is isolated from the fluorine plasma. Therefore, the wiring layer is not etched by fluorine plasma, so that an interlayer insulating film having a low dielectric constant is obtained. By lowering the dielectric constant of the interlayer insulating film. A semiconductor integrated circuit (for example, LSI) can be made to operate at high speed.

The nitride film can be made of titanium nitride or silicon nitride.

According to one aspect of the present invention, a method for manufacturing a semiconductor device may include the steps of: forming an interlayer comprising a dielectric composition represented by a chemical formula having a Si-H bond or a Si-CH _bond on a semiconductor substrate Insulating film, forming a photoresist on the interlayer insulating film, patterning the photoresist into a contact hole shape, performing dry etching of the interlayer insulating film by using the photoresist as a mask, removing the photoresist, And the interlayer insulating film was exposed to nitrogen plasma and hydrogen plasma.

The step of exposing the interlayer insulating film to nitrogen plasma and hydrogen plasma may include the step of introducing nitrogen gas and hydrogen gas into the cavity in which the semiconductor substrate is distributed, and the ratio of hydrogen gas volume to nitrogen gas volume may be from 2 to 80%.

According to another aspect of the present invention, a method for manufacturing a semiconductor device may include the step of forming a layer comprising a dielectric composition represented by a chemical formula having a Si-H bond or a Si-CH _bond on a semiconductor substrate interlayer insulating film, forming a photoresist on the interlayer insulating film, patterning the photoresist into a contact hole shape, performing dry etching of the interlayer insulating film by using the photoresist as a mask, and removing the photoresist , and exposing the interlayer insulating film to nitrogen plasma or hexamethyldisilane gas.

According to another aspect of the present invention, a method for manufacturing a semiconductor device may include the steps of: selectively forming a wiring layer on a semiconductor substrate; forming a nitride film on the entire surface; An interlayer insulating film having a dielectric composition represented by a Si-H bond or a Si-CH ₃ bond, forming a photoresist on the interlayer insulating film, patterning the photoresist to have The shape of the opening, dry etching of the interlayer insulating film by using the photoresist as a mask, removing the photoresist, and exposing the interlayer insulating film to nitrogen plasma.

In the method used in the present invention, even if the dielectric constant of the interlayer insulating film is raised when the photoresist is removed, the interlayer insulating film is then exposed to predetermined plasma or hexamethyldisilane gas. Therefore, the raised dielectric constant can be sufficiently reduced. As a result, semiconductor integrated circuits such as LSI can operate at high speed by lowering the dielectric constant of the interlayer insulating film.

According to the present invention, even if fluorine plasma treatment is performed to reduce the interlayer insulating film raised by oxygen plasma treatment in the process of manufacturing the device, the wiring layer is not exposed to fluorine plasma and is not subjected to corrosion.

Description of drawings

FIG. 1 is a cross-sectional view illustrating a method used in the prior art to create a semiconductor device.

FIG. 2 is a cross-sectional view showing a semiconductor device according to a first embodiment of the present invention.

3A to 3E are cross-sectional views showing the method for manufacturing the semiconductor device according to the first embodiment of the present invention in the order of steps.

4 is a cross-sectional view showing a semiconductor device according to a second embodiment of the present invention.

5A to 5C are cross-sectional views showing, in order of steps, a method for manufacturing a semiconductor device according to a second embodiment of the present invention.

FIG. 6 is a cross-sectional view showing an example of employing a fluorine-resistant film containing Si ₃ N ₄ .

7 is a cross-sectional view showing a semiconductor device according to a third embodiment of the present invention.

8A to 8E are cross-sectional views showing, in order of steps, a method for manufacturing a semiconductor device according to a third embodiment of the present invention.

Detailed ways

A semiconductor device according to an embodiment of the present invention is described in detail below with reference to the accompanying drawings. FIG. 2 is a cross-sectional view showing a semiconductor device according to a first embodiment of the present invention.

In this embodiment, the bottom layer 2 is formed on the silicon substrate 1 . A barrier metal layer 3 is selectively formed on the underlying layer 2 . A first metal wiring layer 4 is formed on the barrier metal layer 3 . An antireflection layer 5 is formed on the first metal wiring layer 4 . A connection metal layer 6 is formed on the antireflection layer 5 .

First interlayer insulating film 7 is formed to cover the upper surface of base layer 2 , and the side surfaces of barrier metal layer 3 , metal wiring layer 4 , and antireflection layer 5 . The second interlayer insulating film 8 is formed on the first interlayer insulating film 7 to have a thickness reaching the middle of the connection metal layer 6 . The permittivity of the second interlayer insulating film 8 is smaller than that of the silicon oxide film. The changing portion 8 a is formed on the interface between the second interlayer insulating film 8 and the connection metal layer 6 . The third interlayer insulating film 9 is formed on the second interlayer insulating film 8 so as to have a height as high as the top of the connection metal layer 6 . The second metal wiring layer 10 is formed on the connection metal layer 6 so as to extend over a part of the third interlayer insulating film 9 .

The first metal wiring layer 4 and the second metal wiring layer 10 are made of an aluminum-based wiring material, for example, an aluminum alloy containing copper or an aluminum alloy containing silicon and copper. The barrier metal layer 3 and the antireflection layer 5 are made of Ti, TiN or TiW. The first interlayer insulating film 7 and the third interlayer insulating film 9 are made of SiH ₄ type plasma SiO ₂ ; TEOS (tetraethylorthosilicate) type plasma SiO ₂ using Si (OC ₂ H ₅ ) as a raw material ; SiH ₄ type plasma SiON; SiH ₄ type plasma SiN; fluorine-containing plasma SiOF; or similar materials. The second interlayer insulating film 8 is made of hydrogen silsesquioxane (HSQ) or organic spin-on-glass (SOG). Almost all bonds in second interlayer insulating film 8 are Si-O bonds, but almost all bonds in modified portion 8a are Si-H bonds and Si-N bonds. The connecting metal layer 6 is made of tungsten, aluminum, etc., and the barrier metal layer is made of TiN or Ti.

A method for manufacturing the semiconductor device according to the first embodiment of the present invention will be described below. 3A to 3E are cross-sectional views showing in order of steps thereof for manufacturing the semiconductor device according to the first embodiment.

As shown in FIG. 3A , the bottom layer 2 is first formed on the silicon substrate 1 . Bottom 2 includes bottom elements, such as transistors. Next, for connection to underlying elements, a barrier metal layer 3 composed of TiN/Ti is selectively formed on the underlying layer 2 to have a thickness of 30 to 200 nm (nanometer). Thereafter, a first metal wiring layer 4 composed of aluminum or an aluminum alloy containing copper is formed on the barrier metal layer 3 to have a thickness of 300 to 800 nm by a sputtering process. In addition, in order to avoid a reflection phenomenon in photolithography, an antireflection layer 5 made of TiN is formed on the first metal wiring layer 4 to have a thickness of 10 to 100 nm. Next, a first interlayer insulating film 7 composed of silicon oxide or silicon oxide containing fluorine is formed on the entire surface along a pattern in a similar manner by plasma CVD (Chemical Vapor Deposition) or the like. The thickness of the film 7 amounts to 20 to 100 nm. Adhesion between the subsequently formed second interlayer insulating film 8 and the substrate 1 is improved by the first interlayer insulating film 7 . Its thickness is preferably as thin as possible to reduce the dielectric constant of the entire interlayer insulating film.

Next, an HSQ resin film is applied on the first interlayer insulating film 7 so as to have a thickness of 200 to 1000 nm. For temporary sintering, the resultant is subjected to three-step heat treatment at temperatures of, for example, 100-150° C., 150-250° C., and 250-300° C. in a nitrogen atmosphere, each step lasting 1-10 minutes. The substrate 1 having the HSQ resin film subjected to temporary sintering was placed in a sintering furnace, and then sintered at a temperature of 350-500° C. for 1 hour in a nitrogen atmosphere. In this way, the second interlayer insulating film 8 is formed.

Next, as shown in FIG. 3B, a third interlayer insulating film 9 made of silicon oxide or the like is formed on the second interlayer insulating film 8 to have a thickness of, for example, 2000 to 15000 nm. Thereafter, a patterned photoresist 9a is formed on the third interlayer insulating film 9 so as to have a thickness of about 1 µm. The photoresist 9 a is used to form a via hole reaching the antireflection layer 5 .

Next, as shown in Figure 3C, the product is subjected to oxygen plasma treatment at an output power of 300-600W and an oxygen import flow rate of 100-400sccm (standard cubic centimeter per minute) in the chamber of the plasma processor, to The photoresist 9a is stripped off. The resultant is subjected to a wet stripping treatment with a wet stripping solution containing ethanolamine or the like for 10 to 20 minutes in order to remove the remaining photoresist 9a that has not been stripped and the etching residue. By the oxygen plasma treatment and the wet stripping treatment, the Si-H in the regions exposed at the via holes of the second interlayer insulating film 8 is disconnected, and Si-OH bonds are generated to generate damaged parts in these regions 8b.

Next, the substrate 1 is introduced into the cavity of the plasma processor, as shown in FIG. 3D, and then the substrate 1 is simultaneously exposed to nitrogen plasma and hydrogen plasma. These plasmas are obtained by setting the temperature in the cavity to 50-300 ° C and using parallel plate reactors, inductively coupled radio frequency plasma (ICP), horn-shaped electron cyclotron resonance (ECR), microwave emission sources, etc., at 500 to 300 ° C. generated under an output power of 1500W. The flow rates of nitrogen and oxygen introduced into the cavity are 100-1000 sccm and 20-800 sccm, respectively. The blending ratio of hydrogen and oxygen is preferably set at 2-80%. In this way, Si-OH bonds at the damaged portion 8b are replaced by Si-N bonds or Si-H bonds, so that the damage of the film quality is restored. Accordingly, the corrected portion 8a is produced in the region where the damaged portion 8b is formed. Therefore, the film quality of the HSQ film surface was restored. However, if the blending ratio of hydrogen to nitrogen is less than 2%, the entire nitride film is easily generated, so that the dielectric constant of the HSQ film is abnormally increased. On the other hand, if the above blending ratio is greater than 80%, whiskers or the like may be generated on the first wiring layer 4 mainly composed of aluminum. Therefore, the blending ratio is preferably 2-80%.

Next, as shown in FIG. 3E , a connection metal layer 6 made of tungsten, aluminum or similar metals is embedded into the via holes by CVD or sputtering. The second wiring layer 10 is selectively formed on a part of the third interlayer insulating film and the connection metal layer 6 .

In the first embodiment thus manufactured, by subjecting the damaged portion 8b formed in the step of stripping the photoresist 9a to nitrogen plasma treatment and hydrogen plasma treatment at the same time, a correction to restore the damaged portion of the film quality is formed Section 8a. In this way, an increase in the dielectric constant in the second interlayer insulating film 8 including the HSQ film can be avoided. This also avoids the degradation of embedding tungsten, aluminum or similar metals in vias and overcomes the problem of current leakage between vias.

A second embodiment of the present invention will be described below. 4 is a cross-sectional view showing a semiconductor device according to a second embodiment of the present invention.

In this embodiment, a bottom layer (not shown) is formed on a silicon substrate 11 . A barrier metal layer 13 is selectively formed on the underlying layer. The first metal wiring layer 14 is formed on the barrier metal layer 13 . The anti-reflection layer 15 is formed on the first metal layer 14 .

The fluorine prevention layer 21 is formed to cover the side faces of the barrier metal layer 13, the metal wiring layer 14 and the antireflection layer 15. The connection metal layer 16 is formed on the surface of the anti-reflection layer 15 such that the layer 16 has a region reaching from the surface of the fluorine-resistant layer 21 to the bottom layer. The first interlayer insulating film 17 is formed to cover the sides of the fluorine-resistant layer 21 not covered by the connection metal layer 16 or the like, the surface of the underlying layer, and a part of the surface of the anti-reflection layer 15 . The second interlayer insulating film 18 is formed on the first interlayer insulating film 17 so as to have a thickness up to the middle of the connection metal layer 16 . The permittivity of the second interlayer insulating film 18 is smaller than that of the silicon oxide film. A modified portion 18a is formed on the interface between the second interlayer insulating film 18 and the connection metal layer 16. As shown in FIG. The third interlayer insulating film 19 is formed on the second interlayer insulating film 18 to have a thickness up to the upper end of the connection metal layer 16 . The second metal wiring layer 20 is formed on the connection metal layer 16 so as to extend over a part of the third interlayer insulating film 19 .

The first metal wiring layer 14 and the second metal wiring layer 20 are made of aluminum-based wiring materials, such as aluminum alloy containing copper or aluminum alloy containing silicon and copper, and the barrier metal layer 13 and anti-reflection layer 15 are made of Ti, TiN, etc. and TiW. The first interlayer insulating film 17 and the third interlayer insulating film 19 are made of SiH ₄ type plasma SiO ₂ ; TEOS type plasma SiO ₂ using Si(OC ₂ H ₅ ) as a raw material; SiH ₄ type plasma SiON; SiH Type ₄ plasma SiN; fluorine-containing plasma SiOF; or similar materials. The second interlayer insulating film 18 is made of HSQ or organic spin-on-glass (SOG). The modified portion 18a of the second interlayer insulating film 18 is composed of an oxide film having Si-F bonds. The connection metal layer 16 is made of tungsten, aluminum, or the like. The barrier metal is made of TiN or Ti.

A method for manufacturing a semiconductor device according to a second embodiment of the present invention will be described below. 5A to 5C are cross-sectional views showing in order of steps thereof for manufacturing the semiconductor device according to the second embodiment.

As shown in FIG. 5A, a bottom layer (not shown) is formed on a silicon substrate 11 first. The bottom layer includes bottom-level components such as transistors. Next, a barrier metal layer 13 is selectively formed on the base layer 2 for connection to an underlying component or the like. Thereafter, the first metal wiring layer 14 is formed on the barrier metal layer 13 . In addition, an antireflection layer 15 composed of TiN is formed on the first metal wiring layer 14 to have a thickness of 50 nm or more. Next, a fluorine-resistant layer 21 is formed on the entire surface by a CVD process to have a thickness of 50-100 nm.

Next, as shown in FIG. 5B , the antifluorine layer 21 is etched under anisotropic, low pressure, and high density plasma conditions until the antireflection layer 15 is exposed. Since regions or the like formed on the sides of the first metal wiring layer 14 are not easily etched at this time, the fluorine-resistant layer 21 remains on these regions. This makes it possible to obtain a structure in which the first wiring layer 14 is covered with the fluorine prevention layer 21 and the reflection prevention layer 15 composed of TiN.

Next, as shown in FIG. 5C, the first interlayer insulating film 17 is deposited on the entire surface along the pattern according to the usual method. Thereafter, an HSQ resin film is applied on the first interlayer insulating film 17 . The resultant is subjected to heat treatment to form the second interlayer insulating film 18 in the same manner as in the first embodiment. Then, in the same manner as in the first embodiment, a third interlayer insulating film 19 made of silicon oxide is deposited, and the via hole is formed by a borderless contact connection method that creates a gap between the wiring and the via hole.

In the second embodiment, the first wiring layer 14 is covered with the fluorine-resistant layer 21 made of TiN; therefore, even if the borderless contact connection method is used, the first wiring layer 14 and the like do not generate burrs. Accordingly, even if fluorine plasma treatment is performed in the next step, the first metal layer 14 containing aluminum can be prevented from being corroded by fluorine. In addition, the damaged portion formed on the region exposed at the via hole of the second interlayer insulating film 18 in the step of stripping the photoresist is subjected to fluorine plasma treatment. This treatment makes it possible to remove moisture from the damaged areas and to form the corrected portions 18a on these areas. In fluorine plasma treatment, the substrate is placed in the chamber of the plasma processor, and then fluorine gas and fluorine carbon gas, such as CH ₃ F, C ₂ F, are introduced at a flow rate of 50-2000 sccm (standard cubic centimeters per minute). _6, etc., to generate fluorine plasma by parallel plate reactor, inductively coupled radio frequency plasma (ICP), horn-shaped electron cyclotron resonance (ECR), microwave, etc.

Next, the connection metal layer 16 and the second wiring layer 20 are formed in the same manner as in the first embodiment.

In the second embodiment thus performed, the damaged portion formed in the step of stripping the photoresist is restored to the corrected portion 18a having a small amount of moisture and a low dielectric constant by fluorine plasma treatment. In the fluorine plasma treatment, the first wiring layer 14 is covered with the fluorine prevention layer 21 and the reflection prevention layer 15; therefore, the fluorine plasma does not come into contact with the wiring layer 14. Therefore, the first wiring layer 14 containing aluminum is not corroded.

As the fluorine prevention layer, a Si ₃ N ₄ film may be used instead of the TiN film. FIG. 6 shows an example of using a fluorine-resistant layer containing Si ₃ N ₄ . In the case of using Si ₃ N ₄ as the antifluorine layer, the antireflection layer 15 is formed, and then the antifluorine layer 21a is formed on the entire surface by a CVD process to have a thickness of about 50 nm. The second interlayer insulating film 18 is formed on the fluorine prevention layer 21a without forming the first interlayer insulating film. Then via holes are formed. The resultant is subjected to fluorine plasma treatment, and then etched to remove the fluorine-resistant layer 21a in the region where the via hole is formed.

A third embodiment of the present invention is described below. 7 is a cross-sectional view showing a semiconductor device according to a third embodiment of the present invention.

In this third embodiment, a bottom layer 32 is formed on a silicon substrate 31 . A first plasma TEOS oxide film 37 having grooves is formed on the bottom layer 32 . HSQ film 38 and second plasma TEOS oxide film 39 are formed on first plasma TEOS oxide film 37 in the order of films 37 , 38 and 39 . Each of the films 38 and 39 has grooves at the same positions as the grooves of the first plasma TEOS oxide film 37 . A modification portion 38 a containing a large amount of Si—CH ₃ bonds is formed near the groove of the HSQ film 38 . Barrier metal layers 33 are formed on the side and bottom surfaces of the grooves in these three-layer films. The copper wiring layer 34 is embedded in the region covered by the barrier metal layer 33 .

A method for manufacturing a semiconductor device according to a third embodiment of the present invention is described below. 8A to 8E are diagrams showing a method for manufacturing the semiconductor device according to the third embodiment in order of steps.

As shown in FIG. 8A, elements such as transistors are formed on a silicon substrate 31 to form a bottom layer 32. As shown in FIG. Next, a first plasma TEOS oxide film 37 is formed on the under layer 32 so as to have a thickness of about 1000 angstroms. Then, an HSQ film 38 is applied on the first plasma TEOS oxide film 37 to have a thickness of about 500 nm. The resultant was heat-treated on a hot plate at about 200°C, and then sintered at a temperature of about 400°C for 1 hour in a sintering furnace. A second plasma TEOS oxide film 39 is formed on the HSQ film 38 to have a thickness of about 100 nm. Next, a photoresist 39 a is formed on the second plasma TEOS oxide film 39 . Then, the photoresist 19a is patterned by exposure and development. Using the photoresist 19a as a mask, the second plasma TEOS oxide film 39, the HSQ film 38, and the first plasma TEOS oxide film 37 are sequentially patterned by fluorocarbon-based gas to form grooves.

Next, as shown in FIG. 8B, the photoresist 39a is removed by ICP polishing using oxygen gas. The formation is then subjected to a wet stripping process. The Si-H bonds in the regions exposed at the grooves of the HSQ film 38 are easily broken by the plasma treatment and the stripping treatment to generate Si-OH bonds having hygroscopic ability. In this way, damaged portions 38b are produced in these areas.

Next, the HSQ film 38 was exposed to hexamethyldisilane (hereinafter abbreviated as HMDS) for 10 minutes in a vacuum chamber. HMDS is represented by the following chemical formula 1:

(CH ₃ ) ₃ -Si-NH-Si-(CH ₃ ) ₃ ……(1)

By exposing the HSQ film 38 to the HMDS, the damaged portion 38b is caused by a reaction represented by the following chemical equation.

……(2)

This reaction converts almost all Si-OH bonds into Si- _CH3 bonds. Therefore, as shown in FIG. 8C, the corrected portion 38a is produced in the region where the damaged portion 38b is located.

Next, as shown in FIG. 8D, a TiN film was formed on the entire surface by a sputtering process so as to have a thickness of 50 nm. In this way, the barrier metal layer 33 is formed in the groove. Next, a Cu-CVD layer with a thickness of 750 nm was formed on the entire surface by a CVD process while maintaining a vacuum for forming the barrier metal layer 33 . Thus, the copper wiring layer 34 is formed.

Next, as shown in FIG. 8E, the resultant is subjected to metal chemical mechanical polishing (metal CMP), so that the barrier metal layer 33 and the copper wiring layer 34 are flattened.

In the third embodiment thus produced, the damaged portion 38B as a region containing Si-OH bonds is subjected to hydrophobic treatment, that is, treatment exposed to HMDS; thus, Si-OH bonds are changed to Si-CH _bonds to generate the corrected portion 38a. Accordingly, it is possible to avoid quality deterioration in the embedded barrier metal layer 33 and the copper wiring layer 34, and to avoid an increase in the dielectric constant of the HSQ film 38.

In the third embodiment, the HSQ film 38 is used as the low dielectric constant film, but the same advantages can be obtained also in the case of using the organic SOG film. Of course, other membranes containing Si-H bonds and/or Si- _CH3 bonds can also be used.

Claims (14)

1. a semiconductor device is characterized in that, comprising:

The semiconductor substrate,

Be formed at the wiring layer on the described semiconductor chip,

Cover the nitride film of described wiring layer, and

Be formed at the interlayer dielectric on the described nitride film, described interlayer dielectric has the perforate that arrives described wiring layer, and comprises by the represented dielectric composition of the chemical formula with Si-H key,

Wherein said open surface has retouch, and described correction forms by described interlayer dielectric is exposed in nitrogen plasma and hydrogen plasma or fluoro plasma or the hexamethyl bismethane gas.

2. semiconductor device according to claim 1 is characterized in that, described nitride film is choose from the group of titanium nitride film and silicon nitride film a kind of.

3. a semiconductor device is characterized in that, comprises

The semiconductor substrate,

Be formed at the wiring layer on the described semiconductor chip,

Cover the nitride film of described wiring layer, and

Be formed at the interlayer dielectric on the described nitride film, described interlayer dielectric has the perforate that arrives described wiring layer, and comprises by having Si-CH ₃The dielectric composition that the chemical formula of key is represented,

Wherein said open surface has retouch, and described correction forms by described interlayer dielectric is exposed in nitrogen plasma and hydrogen plasma or fluoro plasma or the hexamethyl bismethane gas.

4. semiconductor device according to claim 2 is characterized in that, described nitride film is choose from the group of titanium nitride film and silicon nitride film a kind of.

5. a method that is used for producing the semiconductor devices is characterized in that, comprises the steps:

On silicon chip, form an interlayer dielectric film, wherein comprise by the represented dielectric composition of the chemical formula with Si-H key,

On described interlayer dielectric, form photoresist,

Described photoresist composition is become the shape of contact hole,

By utilizing described photoresist described interlayer dielectric to be carried out dry etching as mask,

Remove described photoresist, and

Described interlayer dielectric is exposed under nitrogen plasma and the hydrogen plasma.

6. the method that is used for producing the semiconductor devices according to claim 5, it is characterized in that, make described interlayer dielectric be exposed to step under nitrogen plasma and the hydrogen plasma and be included in the step that feeds nitrogen and hydrogen in the cavity that described semiconductor chip places, and the ratio of the volume of described hydrogen and the volume of described nitrogen is 2-80%.

7. a method that is used for producing the semiconductor devices is characterized in that, comprises the steps:

On silicon chip, form an interlayer dielectric film, wherein comprise by having Si-CH ₃The dielectric composition that the chemical formula of key is represented,

On described interlayer dielectric, form photoresist,

Described photoresist composition is become the shape of contact hole,

By utilizing described photoresist described interlayer dielectric to be carried out dry etching as mask,

Remove described photoresist, and

Described interlayer dielectric is exposed under nitrogen plasma and the hydrogen plasma.

8. the method that is used for producing the semiconductor devices according to claim 7, it is characterized in that, make described interlayer dielectric be exposed to step under nitrogen plasma and the hydrogen plasma and be included in the step that feeds nitrogen and hydrogen in the cavity that described semiconductor chip places, and the ratio of the volume of described hydrogen and the volume of described nitrogen is 2-80%.

9. a method that is used for producing the semiconductor devices is characterized in that, comprises the steps:

On silicon chip, form anti-fluorine layer or anti-reflection layer, on described anti-fluorine layer or anti-reflection layer, form an interlayer dielectric film, wherein comprise by the represented dielectric composition of the chemical formula with Si-H key,

On described interlayer dielectric, form photoresist,

Described photoresist composition is become the shape of contact hole,

By utilizing described photoresist described interlayer dielectric to be carried out dry etching as mask,

Remove described photoresist, and

Described interlayer dielectric is exposed under the fluoro plasma.

10. a method that is used for producing the semiconductor devices is characterized in that, comprises the steps:

On silicon chip, form anti-fluorine layer or anti-reflection layer, on described anti-fluorine layer or anti-reflection layer, form an interlayer dielectric film, wherein comprise by having Si-CH ₃The dielectric composition that the chemical formula of key is represented,

On described interlayer dielectric, form photoresist,

Described photoresist composition is become the shape of contact hole,

By utilizing described photoresist described interlayer dielectric to be carried out dry etching as mask,

Remove described photoresist, and

Described interlayer dielectric is exposed under the fluoro plasma.

11. a method that is used for producing the semiconductor devices is characterized in that, comprises the steps:

On silicon chip, form an interlayer dielectric film, wherein comprise by the represented dielectric composition of the chemical formula with Si-H key,

On described interlayer dielectric, form photoresist,

Described photoresist composition is become the shape of contact hole,

By utilizing described photoresist described interlayer dielectric to be carried out dry etching as mask,

Remove described photoresist, and

Described interlayer dielectric is exposed in the hexamethyldisilane gas.

12. a method that is used for producing the semiconductor devices is characterized in that, comprises the steps:

On silicon chip, form an interlayer dielectric film, wherein comprise by having Si-CH ₃The dielectric composition that the chemical formula of key is represented,

On described interlayer dielectric, form photoresist,

Described photoresist composition is become the shape of contact hole,

By utilizing described photoresist described interlayer dielectric to be carried out dry etching as mask,

Remove described photoresist, and

Described interlayer dielectric is exposed in the hexamethyldisilane gas.

13. a method that is used for producing the semiconductor devices is characterized in that, comprises the steps:

On silicon chip, form a wiring layer selectively,

On whole surface, form one deck nitrogen film,

On described nitrogen film, form an interlayer dielectric film, wherein comprise by the represented dielectric composition of the chemical formula with Si-H key,

On described interlayer dielectric, form photoresist,

Described photoresist composition is become the shape of perforate,

By utilizing described photoresist described interlayer dielectric to be carried out dry etching as mask,

Remove described photoresist, and

Described interlayer dielectric is exposed under the fluoro plasma.

14. a method that is used for producing the semiconductor devices is characterized in that, comprises the steps:

On silicon chip, form a wiring layer selectively,

On whole surface, form one deck nitrogen film,

On described nitrogen film, form an interlayer dielectric film, wherein comprise by having Si-CH ₃The dielectric composition that the chemical formula of key is represented,

On described interlayer dielectric, form photoresist,

Described photoresist composition is become the shape of perforate,

By utilizing described photoresist described interlayer dielectric to be carried out dry etching as mask,

Remove described photoresist, and

Described interlayer dielectric is exposed under the fluoro plasma.

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