Disclosure of Invention
The invention relates to an anti-attack block cipher encryption scheme design applicable to multiple scenes. A group of random numbers generated by a random number module (RNG) are prestored in a register, plaintext is encrypted simultaneously by designing two groups of round functions, and irrelevant data are encrypted by using irrelevant keys at the same time when correct plaintext is encrypted to interfere with a power consumption curve of a current chip, so that the power consumption curve acquired by an attacker contains irrelevant power consumption, the analysis difficulty of the power consumption curve is increased, meanwhile, a random pseudo wheel is inserted into a 10-round AES encryption algorithm which normally operates to prevent fault injection attack, and when no attacker attacks, the two groups of round functions can be used simultaneously, and two groups of plaintext are encrypted simultaneously, thereby improving the encryption speed.
The technical scheme adopted by the invention for realizing the purpose is that the anti-attack block cipher encryption method for multi-scene application is characterized in that before encryption operation is carried out, a random number module writes a plurality of groups of random numbers into a register for use when encryption and random number fetching operations are not carried out, and simultaneously generates a signal that the random numbers are not null, and after plaintext writing, round key generation and encryption operation are carried out simultaneously so as to interfere with the power consumption information in the encryption process.
When idle, the random number module writes random numbers into the random number register to finish the preparation work before encryption and generate data non-idle signals to the controller;
starting an anti-attack mode, starting an encryption mode, and performing a first round of encryption operation and key expansion after writing a plaintext;
Meanwhile, an unequal pseudo round is randomly inserted in the 10 rounds of AES encryption process, after encryption is completed, a correct ciphertext and an interference ciphertext are stored in a corresponding register at the same time, and the correct ciphertext is read;
When the anti-attack mode is not enabled, two plaintext can be written simultaneously for encryption for different application scenarios.
The anti-attack block cipher encryption method for the multi-scene application comprises the following steps:
1) The random number module writes a random number into a random number register in the encryption control module and updates the random number when the random number module is idle;
2) When encryption operation is started, a controller in an encryption control module reads one group of random numbers, and k pseudo-wheels are inserted into an ith wheel according to the value of the first group of random numbers so as to ensure that the real encryption position is random;
3) Writing plaintext, round secret key and random number into round function A, round function B, key expansion A and key expansion B by the controller respectively, starting round function A, round function B, key expansion A and key expansion B at the same time, so that the power consumption generated by round function A, round function B, key expansion A and key expansion B are mutually interfered, writing current ciphertext and round secret key into a certain register after current round encryption is finished, and writing ciphertext and round secret key generated by random number back into the random number register for next use;
4) And 3) returning to the step 3) to circulate the multiple round function encryption process until the current plaintext encryption is completed, and writing the ciphertext into a ciphertext register which can be read by a user to complete one encryption operation.
4. The method for encrypting a block cipher against attack for a multi-scene application according to claim 1, wherein for the encryption of the plaintext, the i-th plaintext is written by the user, the plaintext register is in a full state, the plaintext is read into the controller after the operation is started, and the plaintext register is in an empty state to be written in the i+1th plaintext successively;
after the encryption of the ith plaintext is completed, the ciphertext register is changed into a full state and is read by a user, at the moment, the controller is encrypting the (i+1) th plaintext, and the step 2) is returned until all the plaintext encryption of the user is completed.
And (3) adopting 10 rounds of serial operation, performing one round of encryption data in one period operation, and re-writing the result of the previous round into the round function to perform the next round of operation.
The invention has the following beneficial effects and advantages:
1. The invention adopts the linkage mode of the random number module and the encryption module, the random number module writes data into a specific register when in idle, and the data is called when in encryption, so that the influence on the encryption speed caused by slower data generation of the random number module is prevented, and after the random number is prepared, the control logic can automatically call the random number after the attack prevention is enabled, and the random number is applied in the encryption process.
2. The invention adopts the parallel operation design of two round functions, and the design of one true and one false interferes with the power consumption of the chip, so that an attacker has interference when collecting the power consumption, the attack difficulty is increased, and the false round is inserted between each round function, so that the attacker has increased difficulty when carrying out fault injection.
3. The invention can be applied to other block cipher algorithms as well, in the implementation process, the equivalent cipher algorithms such as AES and DES are designed in the same control logic to reduce the area consumption of a chip, and meanwhile, the same logic part can be designed in a multiplexing way to further reduce the area consumption.
Detailed Description
The present invention will be described in detail with reference to the accompanying drawings.
The design idea of the controller with the encryption algorithm with the anti-attack function is as shown in fig. 1:
The operation process of the encryption algorithm is to write data into an algorithm control register through a random number module, and then the controller performs encryption operation until the operation is finished. The method comprises the steps that a random number module (RNG) writes random numbers into a register in an encryption control module, the random numbers are updated when the random number module (RNG) is idle, after 128bit plaintext is written into the register by a user, under the condition that all anti-attack modes are started, when encryption operation is started, one group of random numbers are read by a controller, k pseudo-wheels are inserted into an ith round according to the value of the first group of 128bit random numbers and according to user setting, the fact that the true encryption positions are random is ensured, plaintext and round keys are written into a round function A, a round function B, a key expansion A and a key expansion B by the controller, meanwhile, the power consumption generated by the round function A, the round function B, the key expansion A and the key expansion B are mutually interfered, after current round encryption is finished, the current ciphertext and the round key are written into an internal register, meanwhile, the ciphertext generated by the random numbers and the round key are written into the original register for later use, the random numbers are prevented from being excessively slow to greatly prolong encryption time, the random numbers are reused, the random numbers used for different random numbers are prevented from being used, the round encryption operation is prevented from being repeatedly used, the same for multiple times, the current round encryption operation is written into the register by the user, and the encryption operation is completed after the current round function is repeatedly used, and the encryption process is read by the user, and the encryption process is repeatedly accomplished for multiple times. When the first plaintext is encrypted, the ciphertext register becomes full, and is to be read by a user, at the moment, the controller is in encryption of the second plaintext, the encryption process is performed and the like until all the plaintext encryption of the user is completed.
The round function includes byte substitution, row shifting, column mixing, round key addition. The byte substitution comprises an S box, and 8 bits of data of 16 multiplied by 16 are stored, and as each byte in the S box maps the inverse of the byte in the finite field GF (2 8), the corresponding relation between the input and the output of the S box can be calculated through an extended Euclidean algorithm and matrix transformation. The line shift can be directly transformed and then column mixed, the column mixing is realized by multiplying an operation matrix, and the value after the line shift is multiplied by the matrixWhere the multiplication and addition between matrix elements is a binary operation of the irreducible polynomial m (x) =x 8+x4+x3 +x+1 construct GF (2 8) defined in Z 2 [ x ]. And finally, carrying out round key addition to finish one round of encryption operation.
The control register contains pseudo-round control enabling, parallel operation interference enabling, pseudo-round number and the like. The user can start part of functions according to actual use conditions, and under the condition that parallel operation interference enabling is not started, the round function B can also be applied to an encryption algorithm to operate, so that two groups of plaintext can be encrypted at the same time, and the efficiency is improved.
According to the invention, the encryption algorithm controller uses the random number generated by the random number module to randomly insert the pseudo-wheel and interfere, so that the attack is difficult to acquire correct power consumption and the ongoing process of the chip at the position cannot be judged, and further means such as power consumption analysis, fault attack and the like cannot be used in a targeted manner, and the attack difficulty is increased. In the design, a controller is not only provided with a single encryption algorithm, but also is connected with a plurality of grouping algorithms, such as DES, AES and the like, so that multiplexing design is carried out on part of functions, and the chip area consumption of a control logic part is reduced, so that the control logic can be applied to different use environments according to different requirements by combining different grouping algorithms.