CN114170983B - Display device, display driving method, and electronic apparatus - Google Patents

Abstract

Embodiments of the present application provide a display device, a display driving method, and electronic equipment. The display device includes a liquid crystal display panel and a liquid crystal lens disposed on the light-emitting side of the liquid crystal display panel. The liquid crystal lens is configured to control any one of pixel islands during stereoscopic display. The light output of the sub-pixel is emitted; the liquid crystal display panel also includes a gate line, a data line, a gate drive circuit, a source drive circuit and an inversion circuit, and the source drive circuit includes a positive output terminal and a negative output terminal; the inversion circuit and the positive output The terminal is connected to the negative output terminal, and is configured to turn on the positive output terminal and the odd-numbered column data lines during the first period of scanning of the gate drive circuit, and to conduct the negative electrode output terminal and the even-numbered column data lines; to conduct in the second period The negative output terminal is connected to the data lines of odd columns, and the positive output terminal is connected to the data lines of even columns. With such a design, the sub-pixels that control entering the human eye in the 3D scene can contain both positive and negative polarities, which can eliminate the flicker effect and solve the 3D flickering problem.

Description

Display device, display driving method, and electronic device

technical field

The embodiments of the present application relate to the technical field of display devices, and in particular, to a display device, a display driving method, and electronic equipment.

Background technique

In the display device compatible with 2D/3D display in the related art, it includes a 2D display panel with special pixel arrangement, and a liquid crystal lens arranged on the light-emitting side of the 2D display panel; by controlling the liquid crystal lens, the switching between 2D and 3D display is realized .

However, in the existing 2D/3D display device, when the display device is switched from 2D to 3D, serious flicker (flicker) occurs, which affects the display effect.

Contents of the invention

In view of this, the purpose of the embodiments of the present application is to provide a display device, a display driving method, and an electronic device.

In the first aspect, an embodiment of the present application provides a display device, including a liquid crystal display panel and a liquid crystal lens disposed on the light-emitting side of the liquid crystal display panel, and the liquid crystal display panel includes a plurality of Pixel islands, each of which includes at least two sub-pixels arranged along the row direction; the liquid crystal lens is configured to control the light emission of any one of the sub-pixels in the pixel islands during stereoscopic display;

The liquid crystal display panel also includes a gate line, a data line, a gate drive circuit, a source drive circuit and an inversion circuit, the gate line is connected to the sub-pixels in the same row, and the data line is connected to the sub-pixels in the same column. The sub-pixels of are connected;

The gate drive circuit is connected to the gate line, the source drive circuit includes a positive output terminal and a negative output terminal; the inverting circuit is connected to the positive output terminal and the negative output terminal, and configured In the first period of scanning of the gate drive circuit, the positive output terminal is turned on with the data lines in odd columns, and the negative output terminal is turned on with the data lines in even columns; in the second period, it is turned on The negative output terminal and the data lines of the odd columns are connected to the positive output terminal and the data lines of the even columns.

With such a design, the sub-pixels that control entering the human eye in the 3D scene can contain both positive and negative polarities, thereby eliminating the flicker effect and solving the 3D flickering problem.

In a possible implementation manner, the inverting circuit includes a first circuit connecting the positive output terminal and the data lines of odd columns, and a second circuit connecting the negative output terminal and the data lines of even columns a third circuit connecting the negative output terminal and the data lines in the odd columns, and a third circuit connecting the positive output terminal and the data lines in the even columns;

The first circuit includes a first control switch, the second circuit includes a second control switch, the third circuit includes a third control switch, and the fourth circuit includes a fourth control switch;

The inverting circuit controls the opening and/or closing of the first control switch, the second control switch, the third control switch and the fourth control switch in response to a control command.

In a possible implementation manner, the inversion circuit includes a first control terminal, a second control terminal, and at least one inversion unit;

The inversion unit includes:

For the first thin film transistor, the control electrode is connected to the first control terminal, the first electrode is connected to the odd-numbered data lines, and the second electrode is connected to the positive output end;

For the second thin film transistor, the control pole is connected to the first control terminal, the first pole is connected to the data line in the even column, and the second pole is connected to the negative output terminal;

For a third thin film transistor, the control pole is connected to the second control terminal, the first pole is connected to the data line in the even column, and the second pole is connected to the positive output terminal;

For a fourth thin film transistor, the control pole is connected to the second control terminal, the first pole is connected to the data lines in odd columns, and the second pole is connected to the negative output terminal;

The inverting circuit outputs a conduction instruction to the first control terminal or the second control terminal in response to the control instruction.

In a possible implementation manner, the first control terminal is configured to input conduction to the control electrodes of the first thin film transistor and the second thin film transistor during the first period of scanning of the gate drive circuit. signal;

The second control terminal is configured to input a turn-on signal to the control electrodes of the third thin film transistor and the second thin film transistor during the second period of scanning of the gate driving circuit.

In a possible implementation manner, the inversion circuit includes a plurality of inversion units, and each inversion unit is connected to one data line in an odd column and one data line in an even column.

In a possible implementation manner, the pixel island includes 8 sub-pixels arranged along the row direction.

In a possible implementation manner, the liquid crystal display panel includes a plurality of pixel units arranged in an array along the row direction and the column direction, and each of the pixel units includes a pixel unit arranged along the column direction, displaying The pixel islands are of different colors.

In a possible implementation manner, each of the pixel units includes red pixel islands, green pixel islands and blue pixel islands arranged along the column direction.

In a possible implementation manner, the liquid crystal display panel includes an array substrate, a color filter substrate, and a liquid crystal layer disposed between the array substrate and the color filter substrate; the gate drive circuit integrates the array The substrate includes a plurality of cascaded shift register units; the gate lines are connected to the output ends of the shift register units.

In a possible implementation manner, the gate drive circuit includes a first drive unit located outside one end of the gate line, and a second drive unit located outside the other end of the gate line; the first drive unit It includes the shift register units connected to the gate lines in odd rows, and the second drive unit includes the shift register units connected to the gate lines in even rows.

In a possible implementation manner, the shift register units in the liquid crystal display panel are located outside the same end of the gate lines.

In a second aspect, an embodiment of the present application provides a display driving method, which is applied to the display device described in any one of the embodiments of the first aspect, and the display driving method includes:

In the first period when the gate drive circuit scans the gate lines, the positive output terminal is connected to the odd-numbered data lines, and the negative output terminal is connected to the even-numbered data lines;

In the second period when the gate driving circuit scans the gate lines, the negative output terminal is connected to the odd-numbered data lines, and the positive output terminal is connected to the even-numbered data lines.

In a possible implementation manner, the first period is a period during which the gate drive circuit scans odd-numbered gate lines, and the second period is a period during which the gate drive circuit scans even-numbered gate lines.

In a possible implementation manner, the gate driving circuit is integrated on the array substrate of the display device, and includes a plurality of cascaded shift register units; the gate driving circuit includes The first drive unit, and the second drive unit located outside the other end of the gate line; the first drive unit includes the shift register unit connected to the gate lines in odd rows, and the second drive unit including the shift register unit connected to the gate lines in even rows;

During the scanning process of the gate driving circuit, the first driving unit is controlled to scan progressively, and then the second driving unit is controlled to scan progressively;

The first period is a period during which the first drive unit scans, and the second period is a period during which the second drive unit scans.

In a possible implementation manner, the gate driving circuit scans the gate lines row by row, the first period is the first half period of the scanning process of the gate driving circuit, and the second period is the first half of the scanning process of the gate driving circuit. The second half of the circuit scanning process.

In a third aspect, the embodiments of the present application further provide an electronic device, including the display device described in any one of the embodiments of the first aspect.

Description of drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the following will briefly introduce the accompanying drawings that need to be used in the description of the embodiments or related technologies. Obviously, the accompanying drawings in the following description are only To apply for one or more embodiments, those skilled in the art can also obtain other drawings based on these drawings without creative effort.

FIG. 1 is a schematic structural diagram of a display device provided by an embodiment of the present application;

FIG. 2 is a schematic diagram of pixel arrangement in a liquid crystal display panel provided by an embodiment of the present application;

FIG. 3 is a schematic structural diagram of an array substrate provided in an embodiment of the present application;

FIG. 4 is a partial schematic diagram of a driving circuit provided by an embodiment of the present application;

FIG. 5 is a timing diagram of a GOA provided by an embodiment of the present application.

Explanation of reference signs:

1-array substrate, 2-liquid crystal layer, 3-color filter substrate, 4-liquid crystal lens, 5-pixel transistor, 6-pixel electrode.

Detailed ways

In order to make the purposes, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments It is a part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of this application.

Fig. 1 provides a schematic structural diagram of a display device according to an embodiment of the present application. As shown in Fig. 1, the display device includes a liquid crystal display panel and a liquid crystal lens 4 (lens), wherein the liquid crystal display panel may be a twisted nematic ( TwistedNematic, abbreviated as TN) liquid crystal display panel, coplanar switching type (In Plane Switching, abbreviated as IPS) liquid crystal display panel, or fringe field switching type (Fringe Field Switching, abbreviated as FFS) liquid crystal display panel; the embodiment of this application does not limit the liquid crystal display panel Displays the concrete type of the panel.

Please refer to Figure 1, the liquid crystal display panel includes an array substrate 1 (Array), a color filter substrate 3 (CF) and a liquid crystal layer 2 (LC), the array substrate 1 and the color filter substrate 3 are arranged in pairs, and the liquid crystal layer 2 is arranged Between the array substrate 1 and the color filter substrate 3 of the box.

Fig. 2 is a schematic diagram of pixel arrangement in a liquid crystal display panel provided by the embodiment of the present application. As shown in Fig. 2, the liquid crystal display panel includes a plurality of pixel units, and the plurality of pixel units are arranged in multiple rows and columns to form a pixel array , the pixel array includes a plurality of pixel rows extending along the row direction, and the plurality of pixel rows are arranged side by side along the column direction, and each pixel row includes a plurality of pixel units arranged along the row direction; the pixel units between adjacent pixel rows are aligned , forming pixel columns extending along the column direction, and all the pixel columns are arranged side by side along the row direction.

Taking the orientation shown in FIG. 2 as an example, the row direction is the horizontal direction, and the column direction is the vertical direction. The array of pixels forms a display area for display.

The pixel unit includes three pixel islands arranged along the second aspect that can emit different colors. For example, in this embodiment, the three pixel islands in each pixel unit are red (R) pixel island, green pixel island (G) and blue (B) pixel islands. Each pixel island includes 8 sub-pixels arranged along the row direction, and the 8 sub-pixels in the same pixel island emit the same color of light; the sub-pixels are used to display viewpoint information during 3D display, and 8 sub-pixels correspond to 8 viewpoint information , in a possible implementation manner, each pixel island includes two or more sub-pixels to realize 3D display. The sub-pixels in the pixel array are arranged in multiple rows and multiple columns along the row direction and the column direction.

The liquid crystal lens 4 is arranged on the light-emitting side of the liquid crystal display panel, which can be turned on and off. In the off state, the light emitted by the liquid crystal display panel can normally be emitted through the liquid crystal lens 4. At this time, the liquid crystal display panel realizes 2D display; the liquid crystal lens After 4 is turned on, by controlling the shape of the liquid crystal lens 4, it can emit light from any sub-pixel in the pixel island, and the liquid crystal display panel realizes 3D display at this time. Therefore, the switchable effect of 2D and 3D display is realized by controlling the liquid crystal lens 4 .

FIG. 3 is a schematic structural diagram of an array substrate 1 provided by an embodiment of the present application. As shown in FIG. 3 , the array substrate 1 includes a base substrate, a pixel circuit arranged on the base substrate, and a plurality of The pixel electrode 6 is arranged corresponding to the sub-pixel; the color filter substrate 3 is provided with a common electrode corresponding to the pixel electrode 6, and in a possible implementation manner, both the pixel electrode 6 and the common electrode can be arranged on the array substrate 1 On the one hand, the arrangement of the pixel electrodes 6 and the common electrodes can be selected according to different types of liquid crystal display panels, which is not limited here.

The pixel circuit includes a plurality of gate lines Gate, a plurality of data lines Data and a plurality of thin film transistors (Thin Film Transistor, TFT for short) corresponding to sub-pixels, and the thin film transistor is defined as a pixel transistor 5 . The pixel transistor 5 includes a gate, a source and a drain, the drain of the pixel transistor 5 is connected to the pixel electrode 6 of the corresponding sub-pixel, the gate of the pixel transistor 5 is connected to the gate line Gate, and the source of the pixel transistor 5 is connected to the data line .

The pixel transistors 5 are arranged correspondingly to the sub-pixels, and the arrangement of the pixel transistors 5 can refer to the arrangement of the sub-pixels, which will not be repeated here.

Each gate line Gate is extended and arranged along the row direction, multiple gate lines Gate are arranged side by side along the column direction, the gate line Gate is set corresponding to the pixel row, and the gates of the pixel transistors 5 of the same row of sub-pixels are connected to the same gate line Gate .

Each data line Data extends along the column direction, and a plurality of data lines Data are arranged side by side along the row direction, and the data lines Data correspond to the pixel columns. Optionally, the sources of the pixel transistors 5 of the sub-pixels in the same column are connected to the The data line Data is connected.

The display device also includes a driving circuit, and the driving circuit includes a gate driving circuit, a source driving circuit and a common voltage generating circuit. Wherein, the gate driving circuit is connected to multiple gate lines, and is used to sequentially provide scanning signals to multiple gate lines Gate during the driving phase, and the gate line Gate receives the scanning signal to turn on the pixel transistor 5 corresponding to the gate line Gate, namely , so that the source and drain of the pixel transistor 5 are turned on.

The source driving circuit is connected to multiple data lines Data, and is used for writing data voltages to the multiple data lines Data during the driving phase, and the data voltages are input to corresponding pixel electrodes 6 through the turned-on pixel transistors 5 . The common voltage generation circuit is electrically connected to the common electrodes, and is used to provide the common voltage Vcom to the common electrodes during the driving phase.

When the pixel electrode 6 does not input the data voltage, the liquid crystal cell between the pixel electrode 6 and the common electrode is in an initial state; when the pixel electrode 6 inputs the data voltage, a voltage difference is generated between the pixel electrode 6 and the common electrode, and the liquid crystal cell is Under the effect of the voltage difference, flip occurs. After flipping the liquid crystal unit, the amount of light transmitted by the backlight through the liquid crystal unit can be changed, so that the corresponding pixel unit can produce a corresponding brightness, that is, the gray scale of the pixel. The pixel gray scale is related to the flip angle of the liquid crystal cell, and the flip angle of the liquid crystal cell is related to the voltage difference between the pixel electrode 6 and the common electrode, so it can be adjusted by adjusting the voltage difference between the pixel electrode 6 and the common electrode. The size of the pixel grayscale.

During the display process of the liquid crystal display panel, if data signals of the same polarity are always applied to the pixel electrodes 6 , the liquid crystal molecules are likely to be polarized, which may easily cause image sticking. To prevent this situation, during display driving, the polarity of the pixel electrodes 6 is controlled to periodically change around the common voltage Vcom applied to the common electrodes, for example, positive and negative frame driving modes are adopted.

Positive and negative frame driving modes mean that in two adjacent frames of display screens, the voltage difference between the data voltage input to the pixel electrode 6 and the common voltage in one frame display screen is positive, that is, the positive polarity is input to the pixel electrode 6. Drive signal, the frame display screen is positive frame drive; in another frame display screen, the voltage difference between the data voltage input to the pixel electrode 6 and the common voltage is a negative value, that is, a negative polarity drive signal is input to the pixel electrode 6, the The frame display screen is the negative frame drive. By alternately changing the positive frame and the negative frame, the polarity of the voltage applied to the liquid crystal molecules is alternately changed, thereby avoiding that the liquid crystal molecules are always polarized by an electric field in one direction, and reducing the afterimage of the liquid crystal display.

However, due to factors such as liquid crystal forward and reverse bias characteristics, process uniformity, etc., it is impossible to guarantee that the angles between the forward and reverse bias of all sub-pixels of the LCD panel are completely symmetrical, and it is also impossible to guarantee that the brightness of the positive and negative frames under the same gray scale is exactly the same , the brightness of positive and negative frames is prone to periodic jumps, which can produce flicker phenomena that can be perceived by human eyes. In the embodiment of the present application, when the display device is switched from 2D to 3D, due to the distribution of viewpoint sub-pixels, after passing through the liquid crystal lens 4, only viewpoint sub-pixels of the same polarity enter the human eye and are flipped frame by frame, that is, The 3D display screens are flicker pattern.

In view of this, an embodiment of the present application provides a display device. In the driving circuit in the display device, the source driving circuit includes a positive output terminal and a negative output terminal; The output terminal is connected to the negative output terminal, and is configured to conduct the positive output terminal and the odd-numbered column data lines, and conduct the negative electrode output terminal and the even-numbered column data lines during the first period of scanning of the gate drive circuit; Connect the negative output terminal to the odd column data lines, and connect the positive output terminal to the even column data lines. With such a design, the sub-pixels that control entering the human eye in the 3D scene can contain both positive and negative polarities, thereby eliminating the flicker effect and solving the 3D flickering problem.

Figure 4 is a partial schematic diagram of a driving circuit provided by the embodiment of the present application. As shown in Figure 4, the driving circuit includes an inverting circuit (in a dotted frame), and the inverting circuit includes a first control terminal EN_ODD, a second control terminal EN_EVEN and at least one inversion unit (swap unit).

The inversion unit includes a first thin film transistor TFT1, a second thin film transistor TFT2, a third thin film transistor TFT3 and a fourth thin film transistor TFT4, wherein the control electrode of the first thin film transistor TFT1 is connected to the first control terminal EN_ODD, and the first electrode is connected to the first control terminal EN_ODD. The odd-numbered column data lines are connected, the second pole is connected to the positive output terminal; the control pole of the second thin film transistor TFT2 is connected to the first control terminal EN_ODD, the first pole is connected to the even-numbered column data lines, and the second pole is connected to the negative output terminal; the third The control pole of the thin film transistor TFT3 is connected to the second control terminal EN_ODD, the first pole is connected to the even column data line, the second pole is connected to the positive output terminal; the control pole of the fourth thin film transistor TFT4 is connected to the second control terminal, and the first pole It is connected to the data lines of odd columns, and the second pole is connected to the negative pole output terminal.

It should be noted that the thin film transistor used in the embodiment of the present application includes a gate, a source, and a drain. In this paper, one of the source and the drain is referred to as the first electrode, and the other of the source and the drain is referred to as the first electrode. One is called the second pole and the gate is called the control pole.

The inverting circuit outputs a turn-on command to the first control terminal EN_ODD or the second control terminal EN_EVEN in response to the control command.

In a specific application scenario, the pixel polarity control logic is:

Odd-numbered row control: when the gate drive circuit scans the odd-numbered row of gate lines; control the first control terminal EN_ODD=1, the second control terminal EN_EVEN=0, that is, through the first control terminal EN_ODD to the first thin film transistor TFT1 and The control electrode of the second thin film transistor TFT2 inputs a turn-on command, and the first thin film transistor TFT1 and the second thin film transistor TFT2 controlled by the first control terminal EN_ODD are turned on; The control electrode of the thin film transistor TFT4 inputs a turn-on signal, and the third thin film transistor TFT3 and the fourth thin film transistor TFT4 are turned off, so as to implement positive/negative polarity charging for odd rows and odd columns, and negative/positive polarity for odd rows and even columns.

Even-numbered row control: When the gate drive circuit scans even-numbered row gate lines, control the first control terminal EN_ODD=0, the second control terminal EN_EVEN=1, that is to say, through the second control terminal EN_EVEN to the third The control electrodes of the thin film transistor TFT3 and the fourth thin film transistor TFT4 input the conduction command, and the third thin film transistor TFT3 and the fourth thin film transistor TFT4 controlled by the second control terminal EN_EVEN are turned on; since the first control terminal EN_ODD is not connected to the first thin film transistor The control electrodes of TFT1 and the second thin film transistor TFT2 input a turn-on signal, and the first thin film transistor TFT1 and the second thin film transistor TFT2 are turned off; thereby realizing charging negative/positive polarity for even rows and odd columns, and charging positive/negative polarity for even rows and even columns .

From the above description, it can be seen that using the inversion circuit provided by the embodiment of the present application can make the sub-pixels of the odd-numbered and even-numbered lines entering the human eye in a 3D scene just opposite in polarity, so that the number of positive and negative sub-pixels entering the human eye remains the same. Same, eliminate the flicker effect and solve the 3D splash screen problem.

The inversion unit in the inversion circuit can be set corresponding to each pair of odd-numbered column and even-numbered column data lines, or multiple pairs of odd-numbered columns and even-numbered column data lines can share one; the inversion units are all connected to the same first control terminal EN_ODD and the second control terminal Terminal EN_EVEN is connected.

In a possible implementation manner, the inverting circuit can be realized by any circuit capable of line switching. For example, the inverting circuit includes a first circuit connecting the positive output terminal and the data line of the odd column, and a circuit connecting the negative output terminal and the data line of the even column. The second circuit, the third circuit connecting the negative output terminal and the odd-numbered column data lines, and the fourth circuit connecting the positive output terminal and the even-numbered column data lines;

The first circuit includes a first control switch, the second circuit includes a second control switch, the third circuit includes a third control switch, and the fourth circuit includes a fourth control switch;

The inverting circuit controls the opening and/or closing of the first control switch, the second control switch, the third control switch and the fourth control switch in response to the control command.

In some possible implementations, the gate drive circuit adopts a GOA (Gate Driver on Array, array substrate 1 line drive) design, that is, the gate drive circuit is integrated on the array substrate 1 of the display panel, instead of the gate drive circuit made by an external silicon chip. The driver chip can save the Gate IC (Gate Integrated Circuit, gate drive integrated circuit) part and the fan-out (Fanout) wiring space, so as to simplify the structure of the array substrate 1 . The gate driving circuit integrated on the array substrate 1 using the GOA technology is also referred to as a GOA circuit.

The gate drive circuit includes cascaded multi-stage shift register units (hereinafter referred to as GOA). The output signal of the current stage shift register unit is not only output to drive the pixel transistor 5 of the pixel unit in this row, but also output to the upper stage shift register unit (if any), as the reset signal of the upper-stage shift register unit; also output to the next-stage shift register unit (if any), as the input signal of the next-stage shift register unit. In the whole gate driving circuit, the input signal of the shift register unit of the first stage is the frame start signal STV, and the reset signal is not output. The last-stage shift register unit is connected to the first-stage redundant shift register unit (Dummy GOA) to realize the reset of the last-stage shift register unit. It can be seen from this that the cascaded multi-stage shift register units interact with each other to generate a shift pulse signal to realize progressive scanning of the pixel array.

In this embodiment, the gate drive circuit includes a first drive unit located outside one end of the gate line, and a second drive unit located outside the other end; the first drive unit includes a shift register unit connected to odd-numbered gate lines, The second driving unit includes a shift register unit connected to the gate lines of even rows.

FIG. 5 is a timing diagram of a GOA provided by the embodiment of the present application. As shown in FIG. 5, in the 3D mode, the GOA of odd rows is first driven from top to bottom, that is, during the progressive scanning of the first driving unit, Control the first control terminal EN_ODD to input conduction instructions to the control electrodes of the first thin film transistor TFT1 and the second thin film transistor TFT2, and the first thin film transistor TFT1 and the second thin film transistor TFT2TFT controlled by the first control terminal EN_ODD are turned on; The control terminal EN_EVEN does not input a conduction signal to the control electrodes of the third thin film transistor TFT3 and the fourth thin film transistor TFT4, the third thin film transistor TFT3 and the fourth thin film transistor TFT4;

Then drive the GOA of even-numbered rows from top to bottom, that is, during the progressive scanning process of the second drive unit, control the second control terminal EN_EVEN to input conduction instructions to the gate electrodes of the third thin film transistor TFT3 and the fourth thin film transistor TFT4 , the third thin film transistor TFT3 and the fourth thin film transistor TFT4 controlled by the second control terminal EN_EVEN are turned on; the first control terminal EN_ODD is controlled not to input a conduction signal to the control electrodes of the first thin film transistor TFT1 and the second thin film transistor TFT2, the second The first thin film transistor TFT1 and the second thin film transistor TFT2 are turned off.

The foregoing embodiments are described by taking the interlaced scanning performed by the gate driving circuit as an example. However, the present application is not limited thereto, and in some implementation manners, a progressive scanning manner may be adopted. It should be pointed out that the interlaced scanning can greatly reduce the driving power consumption of the liquid crystal display panel. Because after applying the pixel polarity swap driving method to solve the 3D splash screen, if the progressive scanning method is still used, the polarity of the data line will be charged and discharged with a large amount of positive and negative polarity in a behavioral cycle, which will increase power consumption. When the sequence in Figure 5 is used for control, the odd-numbered lines can be scanned first, and then the even-numbered lines can be scanned in 3D mode. The polarity of the data lines in one frame only jumps from positive to negative in a large scale, thereby greatly reducing power consumption.

The embodiment of the present application also provides a display driving method applied to the above display device, the display driving method includes:

In the first period when the gate drive circuit scans the gate lines, the positive output terminal is connected to the odd-numbered data lines, and the negative output terminal is connected to the even-numbered data lines;

In the second period when the gate driving circuit scans the gate lines, the negative output terminal is connected to the odd-numbered data lines, and the positive output terminal is connected to the even-numbered data lines.

In a possible implementation manner, the first period is a period during which the gate drive circuit scans odd-numbered gate lines, and the second period is a period during which the gate drive circuit scans even-numbered gate lines.

In a possible implementation manner, the gate drive circuit is integrated on the array substrate of the display device, including a plurality of cascaded shift register units; the gate drive circuit includes a first drive unit located outside one end of the gate line, and The second drive unit outside the other end of the gate line; the first drive unit includes a shift register unit connected to the gate lines of odd rows, and the second drive unit includes a shift register unit connected to the gate lines of even rows;

During the scanning process of the gate driving circuit, the first driving unit is controlled to scan progressively, and then the second driving unit is controlled to scan progressively;

The first time period is a time period for scanning by the first driving unit, and the second time period is a time period for scanning by the second driving unit.

In a possible implementation manner, the gate driving circuit scans the gate lines row by row, the first period is the first half of the scanning process of the gate driving circuit, and the second period is the second half of the scanning process of the gate driving circuit. The embodiment of the present application also provides an electronic device, the electronic device includes the display device in the above embodiment, and the electronic device may be a TV, a notebook computer, a mobile phone, a tablet computer, an outdoor advertising screen, and the like.

In the description of the embodiments of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer ” and other indicated orientations or positional relationships are based on the orientations or positional relationships shown in the accompanying drawings, which are only for the convenience of describing the application and simplifying the description, rather than indicating or implying that the referred device or element must have a specific orientation, use a specific configuration and operation, and therefore should not be construed as limiting the application. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and should not be construed as indicating or implying relative importance.

In the description of the embodiments of this application, it should be noted that unless otherwise specified and limited, the terms "installation", "connection", and "connection" should be understood in a broad sense, for example, it can be a fixed connection or a A detachable connection, or an integral connection; it may be a mechanical connection or an electrical connection; it may be a direct connection or an indirect connection through an intermediary, and it may be an internal communication between two components. Those of ordinary skill in the art can understand the specific meanings of the above terms in the embodiments of the present application in specific situations.

In addition, the technical features involved in the different embodiments of the present application described above may be combined as long as they do not constitute conflicts with each other.

So far, the technical solutions of the present application have been described in conjunction with the preferred embodiments shown in the accompanying drawings. However, those skilled in the art can easily understand that the protection scope of the present application is obviously not limited to these specific embodiments. Without departing from the principle of the present application, those skilled in the art can make equivalent changes or substitutions to relevant technical features, and the technical solutions after these changes or substitutions will all fall within the protection scope of the present application.

Claims (15)

1. A display device is characterized by comprising a liquid crystal display panel and a liquid crystal lens arranged on the light-emitting side of the liquid crystal display panel, wherein the liquid crystal display panel comprises a plurality of pixel islands which are arranged in an array along the row direction and the column direction, and each pixel island comprises at least two sub-pixels which are arranged along the row direction; the liquid crystal lens is configured to control light emission of any one of the sub-pixels in the pixel island during stereoscopic display;

the liquid crystal display panel also comprises grid lines, data lines, a grid driving circuit, a source driving circuit and an inversion circuit, wherein the grid lines are connected with the sub-pixels positioned on the same row, and the data lines are connected with the sub-pixels positioned on the same column;

the grid driving circuit is connected with the grid line, and the source driving circuit comprises a positive electrode output end and a negative electrode output end; the inversion circuit is connected with the positive electrode output end and the negative electrode output end and is configured to conduct the positive electrode output end and the data lines in odd columns and conduct the negative electrode output end and the data lines in even columns in a first period of scanning of the grid drive circuit; conducting the negative output end and the data lines in odd columns and conducting the positive output end and the data lines in even columns in a second period;

the reverse circuit comprises a first circuit, a second circuit, a third circuit and a fourth circuit, wherein the first circuit is used for connecting the positive output end with the data lines in odd columns, the second circuit is used for connecting the negative output end with the data lines in even columns, the third circuit is used for connecting the negative output end with the data lines in odd columns, and the fourth circuit is used for connecting the positive output end with the data lines in even columns;

the first circuit comprises a first control switch, the second circuit comprises a second control switch, the third circuit comprises a third control switch, and the fourth circuit comprises a fourth control switch;

the inverter circuit controls on and/or off of the first control switch, the second control switch, the third control switch, and the fourth control switch in response to a control command.

2. The display device according to claim 1, wherein the inverting circuit includes a first control terminal, a second control terminal, and at least one inverting unit;

the inversion unit includes:

a control electrode of the first thin film transistor is connected with the first control end, a first electrode of the first thin film transistor is connected with the data lines in odd columns, and a second electrode of the first thin film transistor is connected with the anode output end;

a control electrode of the second thin film transistor is connected with the first control end, the first electrode of the second thin film transistor is connected with the data line in the even-numbered rows, and the second electrode of the second thin film transistor is connected with the negative electrode output end;

a control electrode of the third thin film transistor is connected with the second control end, a first electrode of the third thin film transistor is connected with the data line in the even-numbered rows, and a second electrode of the third thin film transistor is connected with the anode output end;

a control electrode of the fourth thin film transistor is connected with the second control end, a first electrode of the fourth thin film transistor is connected with the odd-numbered rows of the data lines, and a second electrode of the fourth thin film transistor is connected with the negative electrode output end;

the inversion circuit outputs a conduction instruction to the first control terminal or the second control terminal in response to a control instruction.

3. The display device according to claim 2, wherein the first control terminal is configured to input an on signal to control electrodes of the first thin film transistor and the second thin film transistor in a first period of scanning by the gate driving circuit;

the second control terminal is configured to input a turn-on signal to the control electrodes of the third thin film transistor and the second thin film transistor in a second period of scanning by the gate driving circuit.

4. The display device according to claim 2, wherein the inversion circuit includes a plurality of the inversion units, each of the inversion units being connected to one of the data lines in odd columns and one of the data lines in even columns.

5. The display device according to claim 1, wherein the pixel island includes 8 of the subpixels arranged in the row direction.

6. The display device according to claim 5, wherein the liquid crystal display panel includes a plurality of pixel units arranged in an array in the row direction and the column direction, each of the pixel units including the pixel islands arranged in the column direction to display a different color.

7. The display device according to claim 6, wherein each of the pixel units includes a red pixel island, a green pixel island, and a blue pixel island arranged in the column direction.

8. The display device according to claim 1, wherein the liquid crystal display panel comprises an array substrate, a color film substrate, and a liquid crystal layer disposed between the array substrate and the color film substrate; the grid drive circuit is integrated with the array substrate and comprises a plurality of cascaded shift register units; the grid line is connected with the output end of the shift register unit.

9. The display device according to claim 8, wherein the gate driving circuit includes a first driving unit located outside one end of the gate line, and a second driving unit located outside the other end of the gate line; the first driving unit comprises the shift register unit connected with the odd-numbered lines of the grid lines, and the second driving unit comprises the shift register unit connected with the even-numbered lines of the grid lines.

10. The display device according to claim 8, wherein the shift register units in the liquid crystal display panel are located outside the same end of the gate line.

11. A display driving method applied to the display device according to any one of claims 1 to 10, the display driving method comprising:

in a first period of time when the grid drive circuit scans the grid lines, the positive electrode output end and the odd-numbered row data lines are conducted, and the negative electrode output end and the even-numbered row data lines are conducted;

and in a second period of time when the grid drive circuit scans the grid lines, the negative electrode output end and the odd-numbered row data lines are conducted, and the positive electrode output end and the even-numbered row data lines are conducted.

12. The display driving method according to claim 11, wherein the first period is a period in which the gate driving circuit scans odd-numbered row gate lines, and the second period is a period in which the gate driving circuit scans even-numbered row gate lines.

13. The display driving method according to claim 12, wherein the gate driving circuit is integrated on an array substrate of the display device, and comprises a plurality of cascaded shift register units; the grid driving circuit comprises a first driving unit positioned on the outer side of one end of the grid line and a second driving unit positioned on the outer side of the other end of the grid line; the first driving unit comprises the shift register units connected with the odd-numbered lines of the grid lines, and the second driving unit comprises the shift register units connected with the even-numbered lines of the grid lines;

in the scanning process of the gate drive circuit, the first drive unit is controlled to scan line by line, and then the second drive unit is controlled to scan line by line;

the first period is a period scanned by the first driving unit, and the second period is a period scanned by the second driving unit.

14. The display driving method according to claim 11, wherein the gate driving circuit scans the gate lines row by row, the first period is a first half period of a scanning process of the gate driving circuit, and the second period is a second half period of the scanning process of the gate driving circuit.

15. An electronic apparatus characterized by comprising the display device according to any one of claims 1 to 10.

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