CN114005806A

CN114005806A - Parallel stacking type chip set structure and mounting method thereof

Info

Publication number: CN114005806A
Application number: CN202111192785.3A
Authority: CN
Inventors: 尤卫建
Original assignee: Aidesi Automobile Motor Wuxi Co ltd
Current assignee: Aidesi Automobile Motor Wuxi Co ltd
Priority date: 2021-10-13
Filing date: 2021-10-13
Publication date: 2022-02-01
Anticipated expiration: 2041-10-13
Also published as: CN114005806B

Abstract

The invention discloses a parallel stacking chip group structure and an installation method thereof, comprising a chip module and a guide bar; the plurality of chip modules are sequentially arranged on the guide row along the length direction of the guide row and connected through welding; a plurality of low-power chip modules are stacked in parallel or arranged in parallel and then packaged, so that the low-power chip modules have the same power as a high-power chip, the price can be greatly reduced, and the production cost is reduced; the first guide row and the second guide row are arranged to provide structural support for the chip modules, so that the plurality of chip modules can be regularly arranged, and the volume after packaging is reduced.

Description

Parallel stacking type chip set structure and mounting method thereof

Technical Field

The invention relates to the technical field of motor drivers, in particular to a parallel accumulation type chip set structure and an installation method thereof.

Background

Under the condition that the market of new energy vehicles is continuously growing, the demand on IGBT (insulated gate bipolar transistor) or silicon carbide and gallium nitride power modules is increasing day by day, the technical requirements on chips of the driving modules are along with the power of a motor, the voltage is also improved, the improvement of the technical requirements means that the price of the chips is also improved, the price of the whole MCU (micro control unit) is high, and for the new energy vehicles which are products with extremely high sensitivity to the price, the MCU with high price can become the bottleneck of the development of the new energy vehicle industry. For a new energy vehicle driven in a distributed mode, each hub motor needs to be provided with a power module (contained in an MCU), the current general technology is adopted, each hub motor in the distributed mode is provided with a high-power chip (IGBT), the cost is greatly increased, and the new technology of the distributed mode driving can lose market competitiveness in part of new energy vehicle markets.

The present invention is to solve the above-mentioned pain and to reduce the manufacturing cost of the power module. Before the power module is packaged, a plurality of low-power (IGBT, silicon carbide or gallium nitride) chips are stacked in parallel or arranged in parallel, the low-power chips are configured according to power requirements, and then the power module is packaged. The price difference between the small power chip and the large power chip is very large, taking the IGBT chip as an example, the price of the chip with the small power of about 10A is only a few RMB, and the price of the chip with the large power of 500A is thousands of RMB.

Disclosure of Invention

The purpose of the invention is as follows: in order to overcome the defects in the prior art, the invention provides a parallel accumulation type chip set structure and an installation method thereof, which can effectively reduce the production cost of a motor driver.

The technical scheme is as follows: in order to achieve the above object, the present invention provides a parallel stacked chipset structure, which comprises a chip module and a guide bar; and the plurality of chip modules are sequentially arranged on the guide bar along the length direction of the guide bar and are connected with each other by welding.

Further, the guide rows comprise a first guide row and a second guide row; the first guide row is parallel to the second guide row, and two ends of the chip module are erected on the first guide row and the second guide row respectively.

Further, the cross-sectional areas of the first guide row and the second guide row are the same, and the cross-sectional areas of the first guide row and the second guide row are in a positive correlation with the current density of the chip module.

Furthermore, the guide row is made of a copper material.

Further, the method for installing the parallel stacking type chip group structure comprises the following steps,

step one, selecting the number of chip modules according to the power required by the power module, wherein the larger the power required by the power module is, the larger the number of the chip modules is;

arranging and erecting all the chip modules on a first guide row and a second guide row in sequence, and welding and connecting the chip modules;

and step three, carrying out packaging inspection on the chip module which is welded.

Has the advantages that: the parallel accumulation type chip group structure can effectively reduce the production cost of the motor driver, and comprises the following technical effects:

1) a plurality of low-power chip modules are stacked in parallel or arranged in parallel and then packaged, so that the low-power chip modules have the same power as a high-power chip, the price can be greatly reduced, and the production cost is reduced;

2) the first guide row and the second guide row are arranged to provide structural support for the chip modules, so that the plurality of chip modules can be regularly arranged, and the volume after packaging is reduced.

Drawings

FIG. 1 is a block diagram of the present invention.

Detailed Description

The present invention will be further described with reference to the accompanying drawings.

As shown in the attached figure 1: a parallel accumulation type chip group structure comprises a chip module 1 and a guide bar 2; the plurality of chip modules 1 are sequentially arranged on the guide bar 2 along the length direction of the guide bar 2, and the plurality of chip modules 1 are connected by welding; because the price of the high-power chip is higher, a plurality of low-power chip modules 1 are stacked in parallel or arranged in parallel and then packaged, so that the high-power chip module has the same power as the high-power chip module, the price can be greatly reduced, and the production cost is reduced.

The guide row 2 comprises a first guide row 21 and a second guide row 22; the first guide row 21 is parallel to the second guide row 22, and two ends of the chip module 1 are respectively erected on the first guide row 21 and the second guide row 22; the first and

second guide rows

21 and 22 provide structural support for the chip modules 1, so that the plurality of chip modules 1 can be regularly arranged, and the volume after packaging is reduced.

The cross-sectional areas of the first lead bar 21 and the second lead bar 22 are the same, and the cross-sectional areas of the first lead bar 21 and the second lead bar 22 are in a positive correlation with the current density of the chip module 1.

The guide row 2 is made of copper materials.

The method comprises the following steps:

step one, selecting the number of the chip modules 1 according to the power required by the power modules, wherein the larger the power required by the power modules is, the larger the number of the chip modules 1 is;

arranging and erecting all the chip modules 1 on a first guide row 21 and a second guide row 22 in sequence, and welding and connecting the chip modules 1;

and step three, carrying out packaging inspection on the chip module 1 which is welded.

The above description is only of the preferred embodiments of the present invention, and it should be noted that: it will be apparent to those skilled in the art that various modifications and adaptations can be made without departing from the principles of the invention and these are intended to be within the scope of the invention.

Claims

1. A parallel stacked chip set structure, characterized in that it comprises a chip module (1) and a guide row (2); a plurality of the chip modules (1) are sequentially arranged on the guide row along the length direction of the guide row (2) On (2), a plurality of the chip modules (1) are connected by welding.

2 . The parallel stacked chip set structure according to claim 1 , wherein: the guide row ( 2 ) comprises a first guide row ( 21 ) and a second guide row ( 22 ); the first guide row ( 22 ); The guide row (21) is parallel to the second guide row (22), and both ends of the chip module (1) are respectively erected on the first guide row (21) and the second guide row (22).

3. A parallel stacked chip set structure according to claim 2, characterized in that: the cross-sectional areas of the first guide row (21) and the second guide row (22) are the same, and the first guide row (21) and the second guide row (22) have the same cross-sectional area, The cross-sectional area of the lead bar (21) and the second lead bar (22) is positively correlated with the current density of the chip module (1).

4 . The parallel stacked chip set structure according to claim 1 , wherein the guide bar ( 2 ) is made of copper material. 5 .

5. The method for installing a parallel stacked chip group structure according to any one of claims 1-4, characterized in that it comprises the following steps:

Step 1, selecting the number of chip modules (1) according to the power required by the power module, the greater the power required by the power module, the greater the number of chip modules (1);

In step 2, all the chip modules (1) are arranged and erected on the first guide row (21) and the second guide row (22) in sequence, and the chip modules (1) are welded and connected;

In step 3, package inspection is performed on the chip module (1) that has been soldered.