CN103944388B - Power converter controller with multiple power sources - Google Patents

Abstract

A controller includes a bypass terminal, a first power circuit, a second power circuit, and a charge control circuit. The bypass terminal is to be coupled to a bypass capacitor coupled to the secondary side of the isolated power converter. The first power circuit is coupled to the bypass terminal and a first terminal to be coupled to a first node of the secondary side. The first power circuit transfers charge from the first terminal to the bypass terminal for storage on the bypass capacitor. The second power circuit is coupled to the bypass terminal and a second terminal to be coupled to a second node of the secondary side. The second power circuit transfers charge from the second terminal to the bypass terminal for storage on the bypass capacitor. The charge control circuit controls which of the first power circuit and the second power circuit transfers charge to the bypass terminal.

Description

Power Converter Controller with Multiple Power Sources

technical field

The present disclosure relates to power converters, and more particularly, to control circuits for isolated power converters.

Background technique

A switch mode power converter is widely used in household appliances and industrial appliances to convert a low frequency (eg, 50Hz or 60Hz) high voltage alternating current (ac) input voltage into a required level of direct current (dc )The output voltage. For example, switch mode power converters may be included in commonly used electronic devices such as battery chargers for mobile electronic devices. Switch-mode power converters of various types are popular because of their well regulated output, high efficiency and small size, as well as their safety and protection features. Popular topologies for switch mode power converters include: flyback, forward, push-pull and full bridge and many others including resonant Topology.

A challenge in the market for switch mode power converters is to improve the efficiency of the power converters while maintaining high performance. A typical power converter may include various circuit components that dissipate power during operation. For example, a power converter may include a control circuit that senses the output voltage and controls power switching to regulate the output voltage to a desired value in a switch mode power converter. Some circuit components of the power converter (eg, the control circuit) may be powered from voltage levels greater than required for proper operation. Using power supply circuit components of the power converter that are greater than the required voltage level can result in excessive power dissipation of the power converter and a reduction in overall efficiency.

Contents of the invention

According to one aspect of the present invention, a controller is provided, comprising:

a bypass terminal to be coupled to a bypass capacitor coupled to the secondary side of the isolated power converter;

A first power circuit coupled to the bypass terminal and a first terminal, wherein the first terminal is to be coupled to a first node on the secondary side, and wherein the first power circuit is coupled to transfer of charge from the first terminal to the bypass terminal for storage on the bypass capacitor;

A second power circuit coupled to the bypass terminal and a second terminal, wherein the second terminal is to be coupled to a second node on the secondary side, and wherein the second power circuit is coupled to charge is transferred from the second terminal to the bypass terminal for storage on the bypass capacitor; and

a charging control circuit coupled to control the first power circuit and the second power circuit in response to at least one of a bypass voltage developed at the bypass terminal and a voltage at the second terminal Which of the two passes the charge to the bypass terminal.

According to another aspect of the present invention, an integrated circuit package is provided, comprising:

Secondary controllers, including:

a first terminal, a second terminal and a bypass terminal, wherein the bypass terminal is to be coupled to a bypass capacitor coupled to the secondary side of the isolated power converter;

a first power circuit coupled to transfer charge from the first terminal to the bypass terminal for storage on the bypass capacitor;

a second power circuit coupled to transfer charge from the second terminal to the bypass terminal for storage on the bypass capacitor;

a charging control circuit coupled to control the first power circuit and the second power circuit in response to at least one of a bypass voltage developed at the bypass terminal and a voltage at the second terminal which of the passes the charge to the bypass terminal; and

a secondary switching circuit coupled to transmit a signal to the primary side of the isolated power converter;

a primary controller coupled to receive the transmitted signal and to control the power switch in response to the transmitted signal; and

An enclosure, wherein the primary controller and the secondary controller are disposed within the enclosure.

According to yet another aspect of the present invention, a power converter is provided, comprising:

an energy transfer element comprising a primary winding on the primary side of the power converter and a secondary winding on the secondary side of the power converter;

a bypass capacitor coupled to the secondary side of the power converter;

a power switch coupled to the primary winding;

Secondary controllers, including:

a first power circuit coupled to transfer charge from the first node of the secondary side to the bypass capacitor;

a second power circuit coupled to transfer charge from a second node on the secondary side to the bypass capacitor;

a charging control circuit coupled to control the first power circuit and the second power circuit in response to at least one of a bypass voltage developed across the bypass capacitor and a voltage at the second node which of the circuits transfers charge to the bypass capacitor; and

a secondary switching circuit coupled to transmit a signal to the primary side of the isolated power converter; and

A primary controller coupled to receive the transmitted signal and to control the state of the power switch in response to the transmitted signal.

According to yet another aspect of the present invention, there is provided a method for controlling an isolated power converter, the method comprising:

passing charge from a first terminal to a bypass terminal for storage on a bypass capacitor coupled to a secondary side of the isolated power converter to which the first terminal is to be coupled the first node of

passing charge from a second terminal to be coupled to a second node of the secondary side for storage on the bypass capacitor to the bypass terminal; and

Charge transfer to the bypass terminal is controlled in response to at least one of a bypass voltage developed at the bypass terminal and a voltage at the second terminal.

Description of drawings

Non-limiting and non-exhaustive embodiments of the present disclosure are described with reference to the following drawings, wherein like reference numerals refer to like parts throughout the several views, unless otherwise specified.

FIG. 1 is a schematic diagram of an exemplary isolated power converter including a primary controller, a secondary controller and a power switch according to the present disclosure.

2 is a functional block diagram of an exemplary integrated circuit package including an exemplary primary controller, an exemplary secondary controller, and an exemplary power switch according to the present disclosure.

3A-3B are flowcharts of an example method for controlling an isolated power converter during start-up according to the present disclosure.

4 is a flowchart of an exemplary method for controlling an isolated power converter during regulation according to the present disclosure.

5 is a schematic diagram of an exemplary charging control circuit of a secondary controller according to the present disclosure.

6 is a schematic diagram of an exemplary output voltage comparison circuit of a charging control circuit according to the present disclosure.

7 is a schematic diagram of an exemplary first power circuit of a secondary controller according to the present disclosure.

8 is a schematic diagram of an exemplary second power circuit of a secondary controller according to the present disclosure.

9 shows an exemplary voltage waveform of the voltage across an output capacitor and a bypass capacitor of a power converter and a timing diagram of a control signal for controlling charging of the bypass capacitor according to the present disclosure.

Corresponding reference numerals indicate corresponding parts throughout the several views of the drawings. Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of various embodiments of the present disclosure. Additionally, common and well-known elements that are useful or necessary in a commercially feasible embodiment are often not depicted in order to lessen the view of various embodiments of the present disclosure.

Detailed ways

In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. It will be apparent, however, to one of ordinary skill in the art that the specific details need not be employed to practice the present invention. In other instances, well-known materials or methods have not been described in detail in order not to obscure the present invention.

Reference throughout this specification to "one embodiment," "an embodiment," "an example," or "an example" means that a particular feature, structure, or characteristic described in connection with the embodiment or example is included in the present specification. In at least one embodiment of the invention. Thus, appearances of the phrases "in one embodiment," "in an embodiment," "an example," or "an example" in various places throughout this specification are not necessarily all referring to the same embodiment or example. Furthermore, the particular features, structures or characteristics may be combined in any suitable combination and/or subcombination in one or more embodiments or examples. The particular features, structures, or characteristics may be included in integrated circuits, electronic circuits, combinational logic circuits, or other suitable components that provide the described functionality. Furthermore, it should be appreciated that the figures provided herein are for explanation to those of ordinary skill in the art and that these figures are not necessarily drawn to scale.

An isolated power converter according to the present disclosure includes a primary controller and a secondary controller that are galvanically isolated from each other by an energy transfer element (eg, a coupled inductor). In other words, a dc voltage applied between the input side and the output side will generate substantially zero current.

The primary controller is coupled to control a power switch on the primary side of the isolated power converter to control energy transfer from a primary winding of the energy transfer element to a secondary winding of the energy transfer element. The secondary controller is coupled to circuit components on the secondary side of the isolated power converter. Although the primary controller and the secondary controller are galvanically isolated from each other, the secondary controller can transmit a signal to the primary controller that controls how the primary controller switches the power switch to deliver energy to the secondary side.

The secondary side of the isolated power converter includes bypass capacitors that provide operating power to circuits of the secondary controller. The secondary controller of the present disclosure may charge the bypass capacitor from nodes on the secondary side to regulate the bypass voltage across the bypass capacitor at a level sufficient to operate the circuitry of the secondary controller . In one embodiment described herein, the secondary controller can charge the bypass capacitor from a first node connected to the secondary winding and a second node connected to the output of the isolated power converter.

The secondary controller may select which of the first node and the second node to use in response to various operating conditions such as the magnitude of the bypass voltage and/or the magnitude of the output voltage at the second node The bypass capacitor is charged. In general, the secondary controller can use the first node to charge the bypass capacitor to the regulated bypass voltage when the output voltage at the second node is insufficient to charge the bypass capacitor to the regulated bypass voltage. circuit voltage. The secondary controller may transition from using the first node to using the second node when the output voltage at the second node increases enough to charge the bypass capacitor to the regulated bypass voltage.

During start-up of the isolated power converter, the secondary controller may use the secondary winding voltage developed at the first node to charge the bypass capacitor when the output voltage increases from an initial value of zero volts. During start-up, the secondary controller may use the secondary winding voltage because the output voltage of the isolated power converter may initially be at a level insufficient to charge the bypass capacitor. During start-up, the output voltage of the isolated power converter may increase in response to the voltage developed at the secondary winding. After a period of time, the output voltage of the isolated power converter increases to a level sufficient to charge the bypass capacitor. The secondary controller may transition from charging the bypass capacitor using the first node to charging the bypass capacitor using the second node when the output voltage has reached a level sufficient to charge the bypass capacitor.

During normal operation of the isolated power converter, the output voltage of the power converter may be regulated at a level sufficient to charge the bypass capacitor. Thus, during normal operation of the isolated power converter, the secondary controller can continue to charge the bypass capacitor from the secondary node. However, in some cases, excessive loading at the output of the isolated power converter can cause the output voltage to drop to a level insufficient to charge the bypass capacitor. When the output voltage drops, the secondary controller may transition from charging the bypass capacitor using the second node back to charging the bypass capacitor using the first node at the secondary winding. The secondary controller may then transition back to using the second node to charge the bypass capacitor in response to the output voltage reaching a level sufficient to charge the bypass capacitor.

The ability of the secondary controller to select between multiple power sources provides efficient bypass capacitor charging because during typical operation of the isolated power converter, the secondary controller can Charge from a relatively low voltage such as this output voltage. The ability to select between multiple power sources also provides reliable charging of the bypass capacitor as the isolated power converter's lower charging voltage (eg, the output voltage) drops during operation , the secondary controller can switch to a higher charging voltage (eg, the secondary winding).

An exemplary isolated power converter according to the present disclosure is now described with reference to FIGS. 1-9 . 1-2 illustrate an exemplary isolated power converter including a secondary controller coupled to a switch between multiple charging sources. 3A, 3B and 4 illustrate methods for operating a power converter of the present disclosure during start-up and after the output voltage of the power converter has reached a desired regulated output voltage. Exemplary circuitry of the secondary controller is shown in more detail in Figures 5-8. FIG. 9 illustrates output and bypass voltages and control signals of the secondary controller during operation of an exemplary power converter.

FIG. 1 is a schematic diagram of an exemplary power converter 100 according to the present disclosure. The exemplary power converter 100 is an isolated switch-mode power converter with a flyback topology. The power converter 100 includes input terminals 102-1, 102-2 (collectively "input terminals 102") and output terminals 104-1, 104-2 (collectively "output terminals 104"). The input terminal 102 _is coupled to receive an input voltage V _IN 106 , which may be a rectified and filtered ac voltage. For example, the input terminals 102 may be coupled to a full-bridge rectifier (not shown) and filter capacitors (not shown) that are coupled to provide input from the ac voltage source The received ac voltage is rectified and filtered. In one embodiment, the input voltage V _IN 106 may be a time-varying dc voltage. As shown, V _IN 106 is referenced to input terminal 102 - 2 , which may be referred to as "input return 102 - 2 ".

Output terminal 104 provides an output voltage V _OUT 108 to an electrical load (not shown), such as a tablet computer device. After power converter 100 starts up, power converter 100 may adjust the value of output voltage V _OUT 108 to a desired regulated output voltage value (eg, 5-12 Vdc). Start-up may be a period of time from when power converter 100 is introduced to V _IN 106 until control circuitry of power converter 100 begins operating to regulate output voltage V _OUT 108 of power converter 100 . Accordingly, output voltage V _OUT 108 may be referred to as a "regulated output voltage." The output terminal 104 is coupled to an output capacitor 110 to smooth out the regulated output voltage V _OUT 108 . As shown, output voltage V _OUT 108 is referenced to output terminal 104 - 2 , which may be referred to as "output return 104 - 2 ". In one embodiment, output capacitor 110 may have a capacitance value in the range of approximately 200-600 μF.

As further shown, the power converter 100 includes an energy transfer element 112 including a primary winding 114 and a secondary winding 116 . Energy transfer element 112 is coupled to transfer electrical energy from primary coil 114 to secondary coil 116 . In one embodiment, energy transfer element 112 may be a coupled inductor. The circuit electrically coupled between input terminal 102 and primary winding 114 may be referred to as the “primary side” of power converter 100 . The circuitry electrically coupled between secondary winding 116 and output terminal 104 may be referred to as the “secondary side” of power converter 100 . Energy transfer element 112 provides galvanic isolation between circuitry on the primary side of power converter 100 and circuitry on the secondary side of power converter 100 . Therefore, the dc voltage applied between the primary side and the secondary side of the power converter 100 will generate substantially zero current.

The power converter 100 includes a primary side control circuit 118 (hereinafter referred to as “primary controller 118 ”), a secondary side control circuit 120 (hereinafter referred to as “secondary controller 120 ”), and a power switch 122 . Primary controller 118 , secondary controller 120 , and power switch 122 are included in an integrated circuit package 124 , which is illustrated in FIG. 1 as a box.

In one embodiment, the integrated circuit package 124 may include a first integrated circuit die and a second integrated circuit die within an encapsulation. An encapsulation may refer to an encasing or molding that surrounds or encloses one or more integrated circuit chips and a portion of a lead frame. The first integrated circuit chip may include primary controller 118 and power switch 122 . The second integrated circuit chip may include a secondary controller 120 . In another embodiment, integrated circuit package 124 may include three integrated circuit chips within the enclosure. For example, integrated circuit package 124 may include a first integrated circuit chip including power switch 122 , a second integrated circuit chip including primary controller 118 , and a third integrated circuit chip including secondary controller 120 . The chip including the primary controller 118 and the chip including the secondary controller 120 are galvanically isolated from each other. Thus, secondary controller 120 is galvanically isolated from primary controller 118 and power switch 122 . While primary controller 118, secondary controller 120, and power switch 122 are illustrated as being included in a single integrated circuit package, in other embodiments, primary controller 118, secondary controller 120, and power switch 122 are One or more may be located outside the integrated circuit package. For example, power switch 122 may be included in an integrated circuit package that is separate from another integrated circuit package that includes both primary controller 118 and secondary controller 120 .

Although primary controller 118 and secondary controller 120 are galvanically isolated from each other, primary controller 118 and secondary controller 120 may communicate with each other. In one embodiment, secondary controller 120 may communicate with primary controller 118 through a magnetically coupled communication link formed by isolated conductors of a lead frame of integrated circuit package 124 . For example, the communication link between primary controller 118 and secondary controller 120 may be implemented using a galvanically isolated conductive loop included in a lead frame of integrated circuit package 124 . In another embodiment, secondary controller 120 may communicate with primary controller 118 via an optically coupled communication link.

Circuitry external to integrated circuit package 124 may be electrically coupled to package terminals D126-1, S126-2, PBP126-3, FWD126-4, SR126-5, BP126-6, GND126-7, VOUT126 of integrated circuit package 124 -8 and FB126-9 (collectively referred to as "package terminals 126"). Package terminals 126 of integrated circuit package 124 may include conductive pins and/or conductive pads for connection to circuitry external to integrated circuit package 124 .

Package terminals 126 may be connected to terminals (eg, terminals on an integrated circuit chip) of power switch 122 , primary controller 118 , and secondary controller 120 included within integrated circuit package 124 . The power switch 122 includes terminals D128-1 and S128-2. Primary controller 118 includes terminal PBP 128-3. Secondary controller 120 includes terminals FWD 128-4, SR 128-5, BP 128-6, GND 128-7, VOUT 128-8, and FB 128-9. Terminals D128-1, S128-2, PBP128-3, FWD128-4, SR128-5, BP128-6, GND128-7, VOUT128-8, and FB128-9 may be included in power switch 122, primary controller 118 and the conductive connection on the integrated circuit chip of the secondary controller 120 . GND terminal 128-7 is coupled to output terminal 104-2. In one embodiment, GND terminal 128 - 7 may be an output return for secondary controller 120 .

As shown, primary controller 118 is coupled to circuit components of the primary side of power converter 100 , such as power switch 122 . Secondary controller 120 is coupled to circuit components of the secondary side of power converter 100 . For example, secondary controller 120 is coupled to secondary winding 116 , output terminal 104 , bypass capacitor 130 , synchronous rectification circuit 132 , and other circuit components. Primary controller 118 and secondary controller 120 control circuits of power converter 100 (eg, power switch 122 and synchronous rectified current 132 ) to control energy transfer from input terminal 102 to output terminal 104 .

In operation, the secondary controller 120 of the present disclosure receives power from the secondary side of the power converter 100 . For example, secondary controller 120 may receive power to operate from bypass capacitor 130, which is coupled to secondary controller 120 at BP terminal 128-6. Secondary controller 120 includes circuitry to control charging of bypass capacitor 130 and to control regulation of bypass voltage V _BP 134 across bypass capacitor 130 . In one embodiment, bypass capacitor 130 may have a capacitance value in the range of approximately 1-2 μF. Charging of bypass capacitor 130 and adjustment of bypass voltage V _BP 134 during startup and subsequent operation of power converter 100 are described in further detail below.

Although primary controller 118 and secondary controller 120 are galvanically isolated from each other, secondary controller 120 may transmit enable signal 136 to primary controller 118 . For example, secondary controller 120 may transmit enable signal 136 via a galvanically isolated conductive loop included in a lead frame of integrated circuit package 124 . Primary controller 118 may control the state of power switch 122 in response to an enable signal 136 received from secondary controller 120 .

The power switch 122 may be a high voltage power switch, which may have a breakdown voltage in the range of 700V to 800V. In one embodiment, the power switch 122 may be a power metal oxide semiconductor field effect transistor (MOSFET), as illustrated in FIG. 2 . As shown, power switch 122 is coupled to primary winding 114 and input return 102-2. In embodiments where the power switch 122 is a power MOSFET, the drain terminal D128-1 of the power MOSFET may be coupled to the primary winding 114, and the source terminal S128-2 of the power MOSFET may be coupled to the input return 102-2, as Illustrated in Figure 2.

In operation, primary controller 118 controls current flow through power switch 122 and primary winding 114 . In general, power switch 122 may be in an "ON" state (eg, as a closed switch) or an "OFF" state (eg, as an open switch), depending on the The switch drive signal 138. When the power switch 122 is in an on state (eg, a closed switch), the power switch 122 may conduct current. When the power switch 122 is in an off state (eg, an open switch), the power switch 122 may not conduct current when a voltage is applied across the power switch 122 .

When the power switch 122 is in the on state, the current through the primary winding 114 increases, thereby storing energy in the energy transfer element 112 . Additionally, a primary winding voltage V _P 140 having a first polarity is developed across the primary winding 114 when the power switch 122 is in the on state. When the power switch 122 is in the on state, a secondary winding voltage V _S 142 is developed across the secondary winding 116 having an opposite polarity to the primary winding voltage V _P 140 . As described herein, the secondary controller 120 may transfer energy to the bypass capacitor 130 when the power switch 122 is in the on state. Clamp circuit 144 is coupled to input winding 114 of energy transfer element 112 to limit the maximum voltage across power switch 122 when power switch 122 transitions between on and off states.

When the power switch 122 is in the off state, the power switch 122 may act as an open circuit and substantially prevent current from passing through the power switch 122 . When the power switch 122 transitions from the on state to the off state, the secondary winding voltage V _S 142 allows energy to be transferred to the output capacitor 110 , which provides power to an electrical load connected to the output terminal 104 . In one embodiment, when the power switch 122 transitions from the on state to the off state, the secondary controller 120 may control the synchronous rectification circuit 132 to act as a closed switch so that the output capacitor 110 is efficiently charged. For example, during charging of the output capacitor 110 , the transistors of the synchronous rectification circuit 132 may act as closed switches with low on-resistance so that the voltage drop across the synchronous rectification circuit 132 is low. During charging of the output capacitor 110 , the low voltage drop across the rectification circuit 132 may provide an increase in efficiency relative to other converter topologies that include passive components (eg, diodes) instead of the synchronous rectification circuit 132 . Although in some embodiments, the power converter 100 includes the synchronous rectification circuit 132 , the power converter 100 may include passive rectification components, such as diodes, instead of the synchronous rectification circuit 132 .

As shown, primary controller 118 is coupled to power switch 122 to control the state of power switch 122 . The primary controller 118 generates a switch drive signal 138 that drives the power switch 122 in response to the enable signal 136 . In embodiments where power switch 122 is a power MOSFET, primary controller 118 may be coupled to the gate of the power MOSFET, as illustrated in FIG. 2 . In this embodiment, primary controller 118 may apply a gate-source voltage greater than the threshold voltage of the power MOSFET to place the power MOSFET in an on state. Primary controller 118 may apply a gate-source voltage less than the threshold voltage of the power MOSFET to place the power MOSFET in an off state.

In operation, primary controller 118 receives operating power from input terminal 102 and/or primary bypass capacitor 146 . Primary bypass capacitor 146 may store energy received from input terminal 102 when input voltage V _IN 106 is provided at input terminal 102 . The energy stored on primary bypass capacitor 146 may be used by primary controller 118 as operating power, eg, to generate switch drive signal 138 in response to enable signal 136 received from secondary controller 120 . In one embodiment, primary bypass capacitor 146 may be charged when power switch 122 is in the off state.

Secondary controller 120 transmits enable signal 138 to primary controller 118 to instruct primary controller 118 how to switch power switch 122 . Specifically, the primary controller 118 generates a switch drive signal 138 that controls the state of the power switch 122 in response to an enable signal 136 received from the secondary controller 120 . Secondary controller 120 may generate enable signal 136 in response to a sensed output (eg, current and/or voltage) of power converter 100 . For example, secondary controller 120 of FIG. 1 senses feedback voltage V _FB 148 at feedback terminal FB 128 - 9 (eg, relative to GND terminal 128 - 7 ) and generates enable signal 136 in response to feedback voltage V _FB 148 . In one embodiment, the feedback voltage V _FB 148 sensed at the FB terminal 128 - 9 is a scaled down voltage scaled by the resistor divider circuit 150 , which represents the output voltage V of the power converter 100 . _OUT 108. While the exemplary secondary controller 120 of FIG. 1 generates the enable signal 136 in response to a sensed output voltage of the power converter 100 , it is contemplated that in some embodiments the secondary controller 120 may be responsive to other The sensed parameters, such as the output current of the power converter 100 and/or the combination of the output voltage V _OUT 108 and the output current I _OUT 121 , are used to generate the enable signal.

In operation, secondary controller 120 is coupled to transmit enable signal 136 to primary controller 118 to regulate output voltage V _OUT 108 at the regulated output voltage value in response to sensed feedback voltage V _FB 148 place. If secondary controller 120 senses that output voltage V _OUT 108 has dropped to a value less than the regulated output voltage value in response to feedback voltage V _FB 148 , secondary controller 120 may generate enable signal 136 as follows , the enable signal 136 indicates to the primary controller 118 that the primary controller 118 should turn on the power switch 122 . In response to such enable signal 136 , primary controller 118 may turn on power switch 122 to cause output voltage V _OUT 108 to increase toward the regulated output voltage value. If output voltage V _OUT 108 is greater than or equal to the desired regulated output voltage, secondary controller 120 may generate enable signal 136 that indicates to primary controller 118 that primary controller 118 should shut down power switch 122 . In response to such an enable signal 136 , primary controller 118 may turn off power switch 122 to maintain output voltage V _OUT 108 .

In one embodiment, secondary controller 120 controls the operation of synchronous rectification circuit 132 using SR terminal 128-5, which is connected to the gate of the MOSFET switch of synchronous rectification circuit 132 via package terminal SR126-5. pole. In one embodiment, secondary controller 120 controls synchronous rectification circuit 132 by generating a control voltage at SR terminal 128 - 5 that controls the MOSFET switches of synchronous rectification circuit 132 . As described above, in some embodiments, the synchronous rectification circuit 132 can be replaced by a passive rectification circuit. In these embodiments, SR terminal 128 - 5 may be removed from secondary controller 120 .

Bypass capacitor 130 is coupled to bypass terminal BP128-6 and ground terminal GND128-7 of secondary controller 120. Bypass capacitor 130 is coupled to supply power to the internal circuitry of secondary controller 120 . For example, bypass capacitor 130 is coupled to BP terminal 128-6 to supply power to the circuitry of secondary controller 120 that controls synchronous rectification circuit 132, enable signal 136 in response to the generation of feedback voltage V _FB 148 and Additional logic functions within the secondary controller described below.

The voltage developed across bypass capacitor 130 is referred to herein as bypass voltage V _BP 134 . Secondary controller 120 includes circuitry to adjust bypass voltage V _BP 134 to maintain bypass voltage V _BP 134 at a bypass regulation voltage value V _BPREG . In some embodiments described herein, the bypass regulation voltage value V _BPREG may be approximately 4.4V. The bypass regulation voltage value V _BPREG may be set at a voltage value greater than a minimum value of the bypass voltage V _BP 134 sufficient to operate the circuitry of the secondary controller 120 . In some embodiments, the minimum value of bypass voltage V _BP 134 sufficient to operate the circuitry of secondary controller 120 may be approximately 3.9V.

The secondary controller 120 includes: a first power circuit 152 , a second power circuit 154 , a bypass regulation circuit 156 , a charging control circuit 158 and a secondary switching circuit 160 . Secondary switching circuit 160 is coupled to provide various functions for secondary controller 120 . For example, secondary switching circuit 160 may control synchronous rectification circuit 132 and generate enable signal 136 in response to feedback voltage V _FB 148 .

Secondary controller 120 is coupled to charge bypass capacitor 130 from at least one of forward terminal FWD 128-4 and output voltage terminal VOUT 128-8. In the exemplary secondary controller 120 of FIG. 1 , forward terminal FWD 128 - 4 is coupled to node 162 , which is the node of secondary winding 116 . In FIG. 1 , output voltage terminal VOUT 128 - 8 is coupled to node 163 , which is coupled to output terminal 104 - 1 of power converter 100 , which supplies regulated output voltage V _OUT 108 . Accordingly, the example secondary controller 120 of FIG. 1 is coupled to charge the bypass capacitor from at least one of nodes 162 and 163 on the secondary side of the power converter 100 . Although in FIG. 1 forward terminal FWD 128-4 and output voltage terminal VOUT 128-8 are coupled to nodes 162 and 163, it is contemplated that forward terminal FWD 128-4 and/or output voltage terminal VOUT 128-8 could be connected to other nodes of the power converter 100 . Therefore, it is contemplated that in some embodiments, secondary controller 120 may charge bypass capacitor 130 from a node other than node 162 and node 163 on the secondary side of power converter 100 .

As described above, secondary controller 120 is coupled to charge bypass capacitor 130 from at least one of node 162 and node 163 . Stated another way, secondary controller 120 is coupled to transfer charge from at least one of forward terminal FWD 128 - 4 and output voltage terminal VOUT 128 - 8 to bypass terminal BP 128 - 6 to charge bypass capacitor 130 . Secondary controller 120 includes circuitry by which charge is transferred from at least one of forward terminal FWD 128 - 4 and output voltage terminal VOUT 128 - 8 to bypass capacitor 130 . For example, the first power circuit 152 and the second power circuit 154 are circuits through which charges are transferred to the bypass capacitor 130 .

When the first power circuit 152 is enabled, the first power circuit 152 can transfer charge from the forward terminal FWD128-4 to the bypass terminal BP128-6, and when the second power circuit 154 is enabled, the second power Circuit 154 may transfer charge from output voltage terminal VOUT 128-8 to bypass terminal BP 128-6. First power circuit 152 may decouple forward terminal FWD 128-4 from bypass terminal BP 128-6 such that substantially no charge is transferred from forward terminal FWD 128-4 to bypass terminal BP 128 when first power circuit 152 is disabled. -6. Similarly, second power circuit 154 may decouple output voltage terminal VOUT 128-8 from bypass terminal BP 128-6 such that substantially no charge is transferred from output voltage terminal VOUT 128-8 to bypass terminal BP 128-6 when second power circuit 154 is disabled. Road terminal BP128-6. Dashed line 164 in FIG. 1 illustrates that first power circuit 152 is coupled to forward terminal FWD 128 - 4 and bypass terminal BP 128 - 6 to transfer charge from forward terminal FWD 128 - 4 to bypass terminal BP 128 - 6 . Dashed line 166 in FIG. 1 illustrates that second power circuit 154 is coupled to output voltage terminal VOUT 128 - 8 and bypass terminal BP 128 - 6 to transfer charge from output voltage terminal VOUT 128 - 8 to bypass terminal BP 128 - 6 .

Secondary controller 120 also includes circuitry that controls which of forward terminal FWD 128 - 4 and output voltage terminal VOUT 128 - 8 is used to charge bypass capacitor 130 . For example, secondary controller 120 includes charge control circuit 158 that controls which of forward terminal FWD 128-4 and output voltage terminal VOUT 128-8 transfers charge to bypass terminal BP 128-6 so that the bypass capacitor 130 charge. Charging control circuit 158 may control which of forward terminal FWD 128 - 4 and output voltage terminal VOUT 128 - 8 charges bypass capacitor 130 by enabling/disabling first power circuit 152 and second power circuit 154 .

In operation, charge control circuit 158 may control which of forward terminal FWD 128 - 4 and output voltage terminal VOUT 128 - 8 charges bypass capacitor 130 based on a variety of conditions. In one embodiment, charge control circuit 158 may control which of forward terminal FWD 128 - 4 and output voltage terminal VOUT 128 - 8 bypass capacitor in response to the magnitude of output voltage V _OUT 108 relative to bypass voltage V _BP 134 . 130 charge. For example, charge control circuit 158 may select which of forward terminal FWD 128-4 and output voltage terminal VOUT 128-8 is used to charge bypass capacitor 130 based on the relative magnitudes of output voltage V _OUT 108 and bypass voltage V _BP 134 . In one embodiment, charge _{control circuit} 158 may select output voltage terminal VOUT _128-8 ( That is, the second power circuit 154 ) is selected to charge the bypass capacitor 130 . Otherwise, when the output voltage V _OUT 108 is within the threshold voltage V _TH of the bypass voltage V _BP 134 or less than the bypass voltage V _BP 134, the charge control circuit 158 may select the forward terminal FWD 128-4 (ie, select the first power circuit 152) to charge bypass capacitor 130.

Secondary controller 120 may also include bypass regulation circuit 156 that senses bypass voltage V _BP 134 and indicates to charge control circuit 158 whether bypass voltage V _BP 134 is greater or less than the bypass regulation voltage value V _BPREG . The charging control circuit 158 can control the charging control circuit 158 by enabling/disabling a selected one of the first power circuit 152 and the second power circuit 154 in response to whether the bypass voltage V _BP 134 is greater than or less than the bypass regulation voltage value V _BPREG . To which of the terminal FWD128-4 and the output voltage terminal VOUT128-4 is the bypass capacitor 130 charged. For example, charge control circuit 158 may enable selected ones of first power circuit 152 and second power circuit 154 in response to determining that bypass voltage V _BP 134 has dropped to a value below bypass regulation voltage value V _BPREG . One to charge the bypass capacitor 130 such that the bypass voltage V _BP 134 is equal to or greater than the bypass regulation voltage value V _BPREG . When the bypass voltage V _BP 134 is greater than or equal to the bypass regulation voltage value V _BPREG , the charge control circuit 158 may disable the selected one of the first power circuit 152 and the second power circuit 154 such that the bypass voltage V _BP 134 is not charged to a voltage greater than the bypass regulation voltage V _BPREG .

The operation of the circuitry included in the secondary controller 120 is now described in more detail with respect to FIG. 2 . FIG. 2 shows an exemplary integrated circuit package 224 including a power switch 222 (eg, power MOSFET 222 ), an exemplary primary controller 218 , and an exemplary secondary controller 220 . Circuitry external to integrated circuit package 224 may be electrically coupled to package terminals D226-1, S226-2, PBP226-3, FWD226-4, SR226-5, BP226-6, GND226-7, VOUT226 of integrated circuit package 224 -8 and FB226-9 (collectively referred to as "package terminals 226").

Package terminals 226 may be connected to terminals of power switch 222 , primary controller 218 , and secondary controller 220 included on the interior of integrated circuit package 224 (eg, terminals on an integrated circuit chip). The power switch 222 includes a drain terminal D228-1 and a source terminal S228-2. Primary controller 218 includes primary bypass terminal PBP 228-3. Secondary controller 220 includes forward terminal FWD228-4, synchronous rectifier terminal SR228-5, bypass terminal BP228-6, ground terminal GND228-7, output voltage terminal VOUT228-8 and feedback terminal FB228-9. Drain terminal D228-1, source terminal S228-2, primary bypass terminal PBP228-3, forward terminal FWD228-4, synchronous rectifier terminal SR228-5, bypass terminal BP228-6, ground terminal GND228-7, output Voltage terminal VOUT 228 - 8 and feedback terminal FB 228 - 9 may be conductive connections included on an integrated circuit chip including power switch 222 , primary controller 218 and secondary controller 220 . Package terminals 226 may be connected to the power converter in a similar manner to that illustrated in FIG. 1 . Accordingly, integrated circuit package 224 may be described below with reference to components of power converter 100 of FIG. 1 .

The secondary controller 220 includes: a first power circuit 252 , a second power circuit 254 , a bypass regulation circuit 256 , a charging control circuit 258 and a secondary switching circuit 260 . Secondary switching circuit 260 is coupled to provide various functions of secondary controller 220 . For example, secondary switching circuit 260 may generate control signal U _{SR 268} that controls synchronous rectification circuit 132 , which may be coupled to synchronous rectifier terminal SR 228 - 5 .

Secondary switching circuit 260 is coupled to transmit enable signal U _EN 236 to primary controller 218 to regulate output voltage V _OUT 108 at the regulated output voltage value in response to sensed feedback signal U _FB 270 . Secondary switching circuit 260 may receive feedback signal U _FB 270 _representing an output parameter (eg, voltage and/or current) of power converter 100 . In one embodiment, the feedback signal U _FB 270 is the feedback voltage sensed by the secondary switching circuit 260 . Secondary switching circuit 260 may generate enable signal U _EN 236 in response to feedback signal U _FB 270 . Primary controller 218 is coupled to receive enable signal U _EN 236 and controls power switch 222 in response to enable signal U _EN 236 to regulate output voltage V _OUT 108 . Secondary switching circuit 260 may transmit enable signal U _EN 236 to primary controller 218 through magnetic coupling provided by a magnetically coupled communication link via isolated conductors of a lead frame of integrated circuit package 224 form.

The first power circuit 252 is coupled to the forward terminal FWD 228-4 and the bypass terminal BP 228-6 to transfer charge from the forward terminal FWD 228-4 to the bypass terminal BP 228-6. The second power circuit 254 is coupled to the output voltage terminal VOUT 228-8 and the bypass terminal BP228-6 to transfer charge from the output voltage terminal VOUT 228-8 to the bypass terminal BP228-6. The first power circuit 252 can be in an enabled state or a disabled state. Similarly, the second power circuit 254 can be in an enabled state or a disabled state. Charging control circuit 258 is coupled to first power circuit 252 and second power circuit 254 to control states of first power circuit 252 and second power circuit 254 .

With respect to FIG. 2 , the charge control circuit 258 is coupled to generate a control signal U _S1 272 to enable/disable the first power circuit 252 . Charging control circuit 258 is coupled to generate control signals U _S2 274 and U _VOUTCOMP 276 to enable/disable second power circuit 254 . The generation of control signals U _S1 272 , U _S2 274 and U _VOUTCOMP 276 by charge control circuit 258 and the response of first power circuit 252 and second power circuit 254 to control signals U _S1 274 , U _S2 274 and U VOUTCOMP 274 are described in more detail below. U _VOUTCOMP 276 for details of the response.

When the first power circuit 252 is in the enabled state, the first power circuit 258 may transfer charge from the forward terminal FWD 228 - 4 to the bypass terminal BP 228 - 6 to charge the bypass capacitor 130 . When the first power circuit 252 is in the disabled state, the first power circuit 252 may disengage the forward terminal FWD 228-4 from the bypass terminal BP 228-6 so that charge is not transferred from the forward terminal FWD 228-4 to the bypass capacitor 130 . When the second power circuit 254 is in the enabled state, the second power circuit 254 can transfer charge from the output voltage terminal VOUT 228 - 8 to the bypass terminal BP 228 - 6 to charge the bypass capacitor 130 . When the second power circuit 254 is in the disabled state, the second power circuit 254 can disconnect the output voltage terminal VOUT228-8 from the bypass terminal BP228-6 so that charge is not transferred from the output voltage terminal VOUT228-8 to the BP terminal 228- 6.

In one embodiment, charge control circuit 258 may enable first power circuit 252 while disabling second power circuit 254 such that bypass capacitor 130 is charged by forward terminal FWD 228 - 4 . In another embodiment, the charge control circuit 258 may enable the second power circuit 254 while disabling the first power circuit 252 such that the bypass capacitor 130 is charged by the output voltage terminal VOUT 228 - 8 . In another embodiment, the charge control circuit 258 may disable both the first power circuit 252 and the second power circuit 254 such that the output from the forward terminal FWD 228-4 and the Charge transfer from both voltage terminals VOUT 228 - 8 to bypass capacitor 130 . In another embodiment, charge control circuit 258 may enable both first power circuit 252 and second power circuit 254 such that bypass capacitor 130 is charged by forward terminal FWD 228 - 4 and output voltage terminal VOUT 228 - 8 .

Secondary controller 220 includes bypass regulation circuit 256 that senses V _BP 134 at bypass terminal BP 228 - 6 and generates control signal U _BPREG 278 in response to the value of bypass voltage V _BP 134 . Control signal U _BPREG 278 is a signal that indicates whether bypass voltage V _BP 134 is maintained at bypass regulation voltage value V _BPREG . For example, control signal U _BPREG 278 may be a digital control signal indicating whether bypass voltage V _BP 134 is greater or less than bypass regulation voltage value V _BPREG . As described below, charging control circuit 258 may control _charging of bypass capacitor 130 in response to control signal U _BPREG 278 indicating whether bypass voltage V _BP 134 is greater or less than bypass regulation voltage value V _BPREG .

Charge control circuit 258 controls which of first power circuit 252 and second power circuit 254 transfers charge to bypass capacitor 130 in response to various conditions described herein. In general, charge control circuit 258 controls the state of first power circuit 252 and second power circuit 254 in response to bypass voltage V _BP 134 and output voltage V _OUT 108 . Charge control circuit 258 may select which of first power circuit 252 and second power circuit 254 to enable and disable based on the magnitude of output voltage V _OUT 108 relative to the magnitude of bypass voltage V _BP 134 . Charge control circuit 258 may determine whether to enable the selected power circuit based on whether bypass voltage V _BP 134 is less than bypass regulation voltage value V _BPREG (as indicated by U _BPREG 278 ). Selection of first power circuit 252 and second power circuit 254 by charge control circuit 258 and control of states of first power circuit 252 and second power circuit 254 by charge control circuit 258 are described in more detail below.

Charge control circuit 258 may select which of first power circuit 252 and second power circuit 254 to transfer charge to bypass capacitor 130 in response to the magnitude of output voltage V _OUT 108 relative to the magnitude of bypass voltage V _BP 134 . For example, when output voltage V _OUT 108 is greater than bypass voltage V _BP 134 (eg, greater than a threshold voltage amount V _TH ), charge control circuit 258 may select second power circuit 254 to charge bypass capacitor 130 because the output Voltage V _OUT 108 may be at a magnitude sufficient to charge bypass capacitor 130 . As another example, the charge control circuit 258 may select the first power circuit 252 to charge the bypass capacitor 130 when the output voltage V _OUT 108 drops to a value that may not be sufficient to charge the bypass capacitor 130 .

Charge control circuit 258 may enable selected power circuits in response to U _BPREG signal indicating that bypass voltage V _BP 134 has dropped below bypass regulation voltage value V _BPREG . Enabling the selected power circuit may cause the value of bypass voltage V _BP 134 to increase toward bypass regulation voltage value V _BPREG . Alternatively, charge control circuit 258 may disable first power circuit 252 and second power circuit 254 in response to U _BPREG signal indicating bypass voltage V _BP 134 is greater than or equal to bypass regulation voltage value V _BPREG such that bypass voltage V _BP 134 is not charged to a value that substantially exceeds bypass regulation voltage value V _BPREG .

As shown, bypass voltage terminal BP 228 - 6 is coupled to bypass capacitor 130 external to secondary controller 220 . Bypass capacitor 130 supplies power to the circuitry of secondary controller 220 . For example, bypass capacitor 130 is coupled to bypass terminal BP 228 - 6 to supply power to charge control circuit 258 , bypass regulation circuit 256 , and secondary switching circuit 260 .

During start-up of the power converter 100 , for example, when the input voltage V _IN 106 is introduced to the input terminal 102 , the bypass voltage V _BP 134 may be a relatively low voltage value (eg, approximately zero volts) because the bypass Capacitor 130 may be initially uncharged or only slightly charged. Thus, at startup, bypass capacitor 130 may not supply sufficient power to run circuits of secondary controller 220 , such as charge control circuit 258 , bypass regulation circuit 256 , and secondary switching circuit 260 . The operation of power switch 222 , primary controller 218 , and secondary controller 220 during start-up is described in detail below.

At startup, the primary controller 218 , receiving power from the input voltage V _IN 106 , begins switching the state of the power switch 222 between an off state and an on state. Switching of the power switch 222 initiates energy transfer to the secondary side of the power converter 100 . Because bypass voltage V _BP 134 may initially be insufficient to operate secondary switching circuit 260 at startup, secondary switching circuit 260 may not receive sufficient power to transmit enable signal U _EN 236 to initial controller 218 . Thus, at startup, primary controller 218 may initially toggle power switch 222 without receiving enable signal U _EN 236 from secondary controller 220 .

During start-up, when the power switch 222 is in the ON state, the first power circuit 252 may transfer charge to the bypass capacitor 130 via the bypass terminal BP 228 - 6 . In this manner, primary controller 218 may control power switch 222 to switch states during startup to charge bypass capacitor 130 via first power circuit 252 . During startup, the output capacitor 110 may also be charged when the primary controller 218 controls the power switch 222 to switch states.

At startup, if the output voltage V _OUT 108 is a relatively low voltage (eg, less than the sum of the bypass voltage V _BP 134 and the threshold voltage V _TH ), the second power circuit 254 may be disabled. Although the second power circuit 254 can be disabled at start-up if the output voltage V _OUT 108 is relatively low, the bypass capacitor 130 can still be charged from the forward terminal FWD 228-4 by the first power circuit 252 while the output voltage V _OUT 108 continues to charge toward the desired regulated output voltage value sufficient to charge bypass capacitor 130 (eg, to a voltage greater than the sum of bypass voltage V _BP 134 and threshold voltage V _TH ).

The circuitry of secondary controller 220 powered by bypass capacitor 130 may be configured to begin operation after start-up when bypass voltage V _BP 134 initially reaches bypass regulation voltage value V _BPREG . For example, charge control circuit 258 , bypass regulation circuit 256 , and secondary switching circuit 260 may begin operating when bypass voltage V _BP 134 initially reaches bypass regulation voltage value V _BPREG after start-up. After startup, after the circuitry of the secondary controller 220 begins operating, the bypass voltage V _BP 134 may be adjusted by the circuitry of the secondary controller 220 at a bypass regulation voltage value V _BPREG , as described herein. After start-up, the circuitry of secondary controller 220 may continue to operate as described herein unless bypass voltage V _BP 134 drops below the minimum operating voltage of circuitry (eg, logic circuitry) of secondary controller 220 (eg, 3.9V) or less.

In operation, bypass regulation circuit 256 is coupled to monitor bypass voltage V _BP 134 and indicate to charge control circuit 258 when bypass voltage V _BP 134 has reached a value of bypass regulation voltage value V _BPREG . In response to bypass voltage V _BP 134 reaching or exceeding bypass regulation voltage value V _BPREG during start-up, bypass regulation circuit 256 _{may generate control signal U BPREG 278} that indicates the bypass voltage to charge control circuit 258 V _BP 134 has reached the bypass regulation voltage value V _BPREG . In response to control signal U _BPREG 278 indicating that bypass voltage V _BP 134 has reached bypass regulation voltage value V _BPREG , charge control circuit 258 inhibits charging bypass capacitor 130 . In the embodiments described above, if the first power circuit 252 was enabled during start-up, the charging control circuit 258 would use the control signal U _S1 272 to disable the first power circuit 252 . The first power circuit may disengage the forward terminal FWD 228 - 4 from the BP terminal 228 - 6 in response to the disable control signal U _S1 272 . As described above, when both the first power circuit 252 and the second power circuit 254 are disabled, the bypass voltage V _BP 134 may be maintained at approximately the bypass regulation voltage value V _BPREG for a period of time.

If bypass voltage V _BP 134 drops back below the bypass regulation voltage value V _BPREG while bypass capacitor 130 is providing power to the circuitry of secondary controller 220 , bypass regulation circuit 256 may generate an indication of bypass voltage V The signal that _BP 134 has fallen below the bypass regulation voltage value V _BPREG . For example, in response to sensing that bypass voltage V _BP 134 has dropped to a voltage less than the bypass regulation voltage value V _BPREG , control signal U _BPREG 278 indicates to charge control circuit 258 that bypass voltage V _BP 134 is less than the bypass regulation voltage value V _BPREG . In the event that output voltage V _OUT 108 is insufficient to charge bypass capacitor 130 (e.g., output voltage V _OUT 108 is less than the sum of bypass voltage V _BP 134 and threshold voltage V _TH ), charge control circuit 258 may respond to instructing bypass The first power circuit 252 is enabled by the control signal U _BPREG 278 that the bypass voltage V _BP 134 is less than the bypass regulation voltage value V _BPREG . For example, charging control circuit 258 may generate control signal U _S1 272 that enables first power circuit 252 . The first power circuit 252 may then transition to the enabled state in response to the control signal U _S1 272 . When operating in the enabled state, first power circuit 252 may transfer charge from forward terminal FWD 228-4 to BP terminal 228-6 to charge bypass capacitor 130 such that bypass voltage V _BP 134 is restored to Bypass regulation voltage V _BPREG .

In embodiments where output voltage V _OUT 108 is insufficient to charge bypass capacitor 130, charge control circuit 258 may continue to enable and disable first power circuit 252 to regulate bypass voltage V _BP 134 at the bypass regulation voltage value V _BPREG , as described above, until the output voltage V _OUT 108 has reached a value sufficient to charge the bypass capacitor 130 . After a period of time that charge control circuit 258 has continued to enable and disable first power circuit 252 , output voltage V _OUT 108 increases to a voltage value greater than bypass voltage V _BP 134 . The output voltage V _OUT 108 may then be used to charge the bypass capacitor 130 when the output voltage V _OUT 108 is greater than the bypass voltage V _BP 134 (eg, greater than a threshold voltage V _TH ).

Charge control circuit 258 is coupled to determine when output voltage V _OUT 108 is at a voltage sufficient to charge bypass capacitor 130 . For example, charge control circuit 258 may determine that output voltage V _OUT 108 is at a voltage sufficient to charge bypass capacitor 130 when output voltage V _OUT 108 has a value that is one threshold voltage V _TH greater than bypass voltage V _BP 134 . This threshold voltage V _TH may be the amount of voltage dropped across the second power circuit 254 between the output voltage terminal VOUT 228-8 and the bypass terminal BP 228-6 when the second power circuit 254 is used to charge the bypass capacitor 130 . In some embodiments described herein, the threshold voltage V _TH may be approximately 0.4V. Therefore, in the case where the charge control circuit 258 uses the first power circuit 252 to adjust the bypass voltage V _BP 134 to the bypass regulation voltage value V _BPREG (eg, 4.4V), when the output voltage V _OUT 108 has reached the bypass regulation When the voltage value V _BPREG is added to the threshold voltage V _TH (eg, 4.8V or greater), the output voltage terminal VOUT 228 - 8 may become capable of sufficiently charging the bypass capacitor.

Charge control circuit 258 may select second power circuit 254 to charge bypass capacitor 130 when it is determined that output voltage V _OUT 108 has reached a value sufficient to charge bypass capacitor 130 . In other words, the charging control circuit 258 can control the state of the second power circuit 254 to adjust the bypass voltage V _BP 134 . For example, when the signal U _BPREG 278 indicates that the bypass voltage V _BP 134 is less than the bypass regulation voltage value V _BPREG , in order to regulate the bypass voltage V _BP 134 to the bypass regulation voltage value V _BPREG , the charge control circuit 258 may enable the first Two power circuits 254 are used to charge the bypass capacitor 130 . Additionally, the charging control circuit 258 may disable the second power circuit 254 to inhibit charging of the bypass capacitor 130 when the signal U _BPREG 278 indicates that the bypass voltage V _BP 134 is greater than the bypass regulation voltage value V _BPREG .

When the second power circuit 254 is selected to charge the bypass capacitor 130, the charge control circuit 258 may disable the first power circuit 252 so that the first power circuit 252 does not charge the bypass capacitor 130 from the forward terminal FWD 228-4, even when When the bypass voltage V _BP 134 drops below the bypass regulation voltage value V _BPREG . Using the output voltage VOUT terminal 228-8 to charge the bypass capacitor 130 can be more efficient than using the forward terminal FWD 228-4 to charge the bypass capacitor 130 because the output voltage _VOUT 108 can typically be higher than the voltage across the secondary winding 116. The voltage generated at node 162 has a lower voltage value. For example, the output voltage V _OUT 108 may be in the range of 5-12V, while the voltage generated at the secondary winding 116 may reach 15-50V.

Depending on how the circuitry of the secondary controller 220 is implemented, the timing of disabling and enabling the first power circuit 252 and the second power circuit 254 by the charge control circuit 258 may vary. In one embodiment, the charge control circuit 258 may enable the second power circuit 254 before disabling the first power circuit 252 such that both the first power circuit 252 and the second power circuit 254 are simultaneously used to deactivate the bypass capacitor 130 charge. In another embodiment, the charging control circuit 258 may enable the second power circuit 254 after disabling the first power circuit 252, so that both the first power circuit 252 and the second power circuit 254 are independently used to enable The road capacitor 130 is charged. Depending on how the circuitry of secondary controller 220 is implemented, the amount of time between disabling first power circuit 252 and enabling second power circuit 254 may vary.

After start-up, when output voltage V _OUT 108 is being regulated, output voltage V _OUT 108 can typically be maintained at a value greater than bypass voltage V _BP 134 (eg, at least bypass voltage V _BP 134 plus the threshold voltage V _TH value). Therefore, during typical operation, the output voltage V _OUT 108 may be maintained at a voltage sufficient to charge the bypass capacitor 130 . If during operation of power converter 100, output voltage V _OUT 108 is maintained at a value greater than bypass voltage V _BP 134 plus the threshold voltage V _TH , charge control circuit 258 may maintain first power circuit 252 at disabled state, and controls the second power circuit 254 to regulate the bypass voltage V _BP 134 at the bypass terminal 226-6 by charging the bypass capacitor 130 from the output voltage terminal VOUT 228-8.

However, in some cases, the value of output voltage V _OUT 108 may decrease to a voltage insufficient to charge bypass capacitor 130 . For example, output voltage V _OUT 108 may drop to within a threshold of bypass voltage V _BP 134 or a value less than bypass voltage V _BP 134 . In one embodiment, output voltage V _OUT 108 may drop to such a value due to increased power drawn by an electrical load connected to output terminal 104 .

In the event that output voltage V _OUT 108 decreases to a voltage value insufficient to charge bypass capacitor 130 (eg, within threshold voltage V _TH of bypass voltage V _BP 134 ), charge control circuit 258 may disable the second power circuit 254 and enables first power circuit 252 to charge bypass terminal BP 228 - 6 to bypass regulation voltage value V _BPREG using forward terminal FWD 228 - 4 as described above. The higher voltage developed at forward terminal FWD 228-4 relative to the recently decreased output voltage V _OUT 108 can charge bypass capacitor 130 while output voltage V _OUT 108 increases back to the desired regulated The output voltage.

After a period of time when the second power circuit 254 is disabled and the charging control circuit 258 controls the first power circuit 252 to maintain the charge on the bypass capacitor 130, the output voltage V _OUT 108 may increase back to greater than the bypass voltage V _BP 134 value. After the output voltage V _OUT 108 increases to a voltage value greater than the bypass voltage V _BP 134 plus the threshold voltage V _TH , the charge control circuit 258 may control (eg, enable/disable) the second power circuit to charge the voltage from the output voltage terminal VOUT 228 -8 charges the bypass capacitor 130 . Charge control circuit 258 may also disable first power circuit 252 to stop charging capacitor 130 from forward terminal FWD 228 - 4 .

During operation of power converter 100 , charge control circuit 158 and bypass regulation circuit 256 may continue to monitor bypass voltage V _BP 134 and output voltage V _OUT 108 . Generally, after output voltage V _OUT 108 has reached the desired regulated output voltage value, output voltage V _OUT 108 may tend to remain at a value greater than bypass voltage V _BP 134 by at least the threshold V _TH . Therefore, during operation of the power converter 100, the first power circuit 252 may tend to remain in the disabled state while the second power circuit 254 is toggled between the enabled state and the disabled state by the charging control circuit 258, depending on When the bypass voltage V _BP 134 drops below the bypass regulation voltage V _BPREG . While first power circuit 252 may be disabled during typical operation of power converter 100 (eg, after output voltage V _OUT 108 has reached the desired regulated output voltage), charge control circuit 258 may The first power circuit 252 is enabled if V _OUT 108 falls low enough to charge the bypass capacitor 130 .

In some embodiments, charge control circuit 258 may include circuitry that enables second power circuit 254 when bypass voltage V _BP 134 drops to a value that is close enough to bypass voltage V _BP 134 to operate the secondary controller 220 circuit minimum (eg, 3.9V). A voltage value close to the minimum value of bypass voltage V _BP 134 may be referred to herein as minimum bypass voltage value V _BPMIN . The minimum bypass voltage value V _BPMIN may be a voltage value slightly greater than the minimum value of the bypass voltage V _BP 134 sufficient to operate circuits (eg, logic gates) of the secondary controller 220 . For example, when the minimum value of bypass voltage V _BP 134 sufficient to operate the circuitry of secondary controller 220 is approximately 3.9V, the minimum bypass voltage value V _BPMIN may be selected to be approximately 4.1V. Thus, if the bypass voltage V _BP 134 falls below the minimum bypass voltage value V _BPMIN (eg, 4.1V), the secondary controller 220 may transition to using the first power circuit 252 to charge the bypass capacitor 130 . Operation of the exemplary charging control circuit 258 is described in more detail below (eg, with reference to FIG. 5 ). In one sense, the circuit of the charge control circuit 258 that enables the first power circuit 252 to charge the bypass capacitor 130 when the bypass voltage V _BP 134 is less than the minimum bypass voltage value V _BPMIN can be regarded as ensuring bypass Circuit voltage V _BP 134 does not drop below the minimum operating voltage of the circuits of secondary controller 220 .

3A-3B illustrate an example method 300 for controlling an isolated power converter during start-up according to the present disclosure. During startup, it may be assumed that bypass voltage V _BP 134 may be a relatively low voltage value (eg, approximately zero volts) because bypass capacitor 130 may be initially uncharged or only slightly charged. Thus, at start-up, bypass capacitor 130 may not supply sufficient power to run circuits of secondary controller 220 , such as charge control circuit 258 , bypass regulation circuit 256 , and secondary switching circuit 260 .

After starting in block 302 , in block 304 the power converter 100 is coupled to an ac source such that the input voltage V _IN 106 is provided to the input terminal 102 . In block 306 , the primary controller 218 receives power from the input voltage V _IN 106 . In block 308 , the primary controller 218 begins switching the state of the power switch 222 between the on state and the off state to begin transferring energy to the secondary side of the power converter 100 . In block 310 , the output capacitor 110 begins charging while the primary controller 218 switches the state of the power switch 222 . In block 312 , the secondary controller 220 charges the bypass capacitor 130 from the node 162 of the secondary winding 116 while the primary controller 218 switches the state of the power switch 222 .

In block 314 , the bypass capacitor 130 is charged to the bypass regulation voltage value V _BPREG . The circuitry of secondary controller 220 may be configured to begin initial operation during start-up when bypass voltage V _BP 134 has reached bypass regulation voltage value V _BPREG . In block 316 , the secondary controller 220 determines whether the output voltage V _OUT 108 is greater than the bypass voltage V _BP 134 by a threshold voltage V _TH . If output voltage V _OUT 108 is not greater than bypass voltage V _BP 134 by a threshold voltage V _TH , secondary controller 220 continues to charge bypass capacitor 130 from node 162 on secondary winding 116 . If the output voltage V _OUT 108 is greater than the bypass voltage V _BP 134 by a threshold voltage V _TH , the secondary controller 220 transitions to the slave output in block 318 by charging the bypass capacitor 130 at node 162 on the slave secondary winding 116 . Terminal 104-1 charges the bypass capacitor. In block 320, the method 300 ends.

FIG. 4 illustrates an example method 400 for controlling an isolated power converter after the isolated power converter has reached a desired regulated output voltage in accordance with the present disclosure. Before method 400 begins, it may be assumed that secondary controller 220 has charged bypass capacitor 130 to bypass regulation voltage value V _BPREG , and that output voltage V _OUT 108 has reached a threshold voltage V greater than bypass voltage V _BP 134 . The value of _TH is such that secondary controller 220 charges bypass capacitor 130 using output terminal 104-1.

In block 402 , the power converter 100 regulates the output voltage V _OUT 108 at the desired regulated output voltage. In block 404 , secondary controller 220 regulates bypass voltage V _BP 134 at bypass regulation voltage value V _BPREG by charging bypass capacitor 130 from output terminal 104 - 1 (ie, output voltage V _OUT 108 ).

If the bypass voltage V _BP 134 drops below the minimum bypass voltage value V _BPMIN in block 406 , the secondary controller 220 transitions to using node 162 on the secondary winding 116 to charge the bypass capacitor 130 in block 408 . If the bypass voltage V _BP 134 is maintained at a value greater than the minimum bypass voltage value V _BPMIN at block 406 , the method 400 continues at block 410 . If in block 410 output voltage V _OUT 108 falls to a voltage value within threshold voltage V _TH of bypass voltage V _BP 134 , then in block 408 the secondary controller transitions to using node 162 on secondary winding 116 to enable Bypass capacitor 130 is charged.

If the output voltage V _OUT 108 is greater than the threshold voltage V _TH than the bypass voltage V _BP 134 in block 410 and the bypass voltage V _BP 134 is greater than the bypass regulation voltage value V _BPREG in block 412, the secondary controller 220 inhibits the The bypass capacitor 130 is charged (eg, by disabling the second power circuit 254 ), and the method 400 continues at block 402 . If the output voltage V _OUT 108 is greater than the threshold voltage V _TH than the bypass voltage V _BP 134 in block 410 and the bypass voltage V _BP 134 is less than the bypass regulation voltage value V _BPREG in block 412 , the secondary controller 220 operates by making The bypass capacitor 130 can be charged by the second power circuit 254 .

5-8 illustrate detailed embodiments of the charge control circuit 258 , the first power circuit 252 and the second power circuit 254 . FIG. 9 shows exemplary output voltage V _OUT 108 waveforms, bypass voltage V _BP 134 waveforms and timing diagrams for control signals U _VOUTCOMP , U _VBCOMP , U _BPREG , U _S1 , and U _S2 . The waveform and timing diagram of FIG. 9 graphically illustrate the operation of the circuit illustrated in FIG. 5 . Figures 5-9 are described in detail below.

As described above, bypass adjustment circuit 256 receives bypass voltage V _BP 134 and outputs digital control signal U _BPREG 278 . In general, bypass adjustment circuit 256 generates control signal U _BPREG 278 that indicates the magnitude of bypass voltage V _BP 134 relative to bypass adjustment _voltage value V _BPREG . If the bypass voltage _{V BP} 134 is less than the bypass regulation voltage value V _BPREG , the bypass regulation circuit 256 outputs a high U _BPREG signal, which can indicate to the charge control circuit 258 that the charge control circuit 258 should enable the first One of the power circuit 252 and the second power circuit 254 is used to charge the bypass capacitor 130 so that the bypass voltage V _BP 134 increases toward the bypass regulation voltage value V _BPREG . If the bypass voltage V _BP 134 is _greater than or equal to the bypass adjustment voltage value V _BPREG , the bypass adjustment circuit 256 outputs a low U _BPREG signal, which can indicate to the charging control circuit 258 that the charging control circuit 258 should prohibit charging , because the bypass voltage V _BP 134 has reached or exceeded the bypass regulation voltage value V _BPREG .

FIG. 5 shows a functional block diagram of an exemplary charging control circuit 258 . The charge control circuit 258 includes an output voltage comparison circuit 500 , a bypass voltage comparison circuit 502 and a plurality of logic gates. Charge control circuit 258 receives voltages V _OUT 108 and V _BP 134 . Charge control circuit 258 also receives a digital control signal U _BPREG from bypass regulation circuit 256 . The charge control circuit 258 outputs a digital control signal U _S1 272 that controls the state of the first power circuit 252 . The charge control circuit 258 outputs digital control signals U _S2 274 and U _VOUTCOMP 276 that control the state of the second power circuit 254 .

In operation, the bypass voltage comparison circuit 502 receives the bypass voltage V _BP 134 and outputs a logic control signal U _VBCOMP 504 indicating whether the bypass voltage V _BP 134 is greater than or _less than the minimum bypass voltage value V _BPMIN . If the bypass voltage V _BP 134 is greater than the minimum bypass voltage value V _BPMIN , the comparator 506 outputs a low U _VBCOMP signal 504 . If the bypass voltage V _BP 134 is less than the minimum bypass voltage value V _BPMIN , the comparator 506 outputs a high U _VBCOMP signal 504 . After start-up, the bypass voltage V _BP 134 can generally remain above the minimum bypass voltage value V _BPMIN . Therefore, U _VBCOMP 504 may generally be maintained at a logic low value and input 508 of NAND gate 510 maintained at a logic high value. However, in the event that bypass voltage V _BP 134 falls below the minimum bypass voltage value V _BPMIN , U _VBCOMP 504 may be driven to a logic high value and input 508 of NAND gate 510 driven to a logic low value . Under these conditions, control signal U _BPREG 278 will also have a logic high value because bypass voltage V _BP 134 will be less than bypass regulation voltage value V _BPREG . Therefore, in the event that the bypass voltage V _BP 134 falls below the minimum bypass voltage value V _BPMIN , the control signal U _S1 272 will be driven low to enable the first power circuit 252 .

In operation, _the output voltage comparison circuit 500 receives the output voltage V _OUT 108 and the bypass voltage V _BP 134 and outputs a logic control signal U _VOUTCOMP 276 indicating whether the output voltage V _OUT 108 is greater than the bypass voltage V _BP 134 is one threshold voltage V _TH higher. If output voltage V _OUT 108 is greater than bypass voltage V _BP 134 by the threshold voltage V _TH , comparator 512 outputs low U _VOUTCOMP signal 276 . If the output voltage V _OUT 108 is less than the sum of the bypass voltage V _BP 134 and the threshold voltage V _TH , the comparator 512 outputs a high U _VOUTCOMP signal 276 .

As described above, at startup the first power circuit 252 may be enabled to charge the bypass capacitor 130 , after which the logic gates of the charge control circuit 258 function as illustrated. During the operation of the power converter 100, when the bypass voltage V _BP 134 is less than the bypass regulation voltage value V _BPREG and the output voltage V _OUT 108 is less than the sum of the bypass voltage V _BP 134 and the threshold voltage V _TH , the first power Circuit 252 may also be enabled. In this case, the second power circuit 254 is disabled, as described below, and the input 514 to the NAND gate 516 determines the state of the control signal U _S1 272 because the input 518 of the NAND gate 516 is logic high. Stated another way, the _UBPREG 278 controls the state of the first power circuit 252 in this situation. If the bypass regulation circuit 256 determines that the bypass voltage V _BP 134 is less than the bypass regulation voltage value V _BPREG , the bypass regulation circuit 256 outputs a logic control signal U _BPREG 278 having a logic high value, which controls Signal U _BPREG 278 enables first power circuit 252 to charge bypass capacitor 130 . If the bypass regulation circuit 256 determines that the bypass voltage V _BP 134 is greater than the bypass regulation voltage value V _BPREG , the bypass regulation circuit 256 outputs a logic control signal U _BPREG 278 having a logic low value, which controls Signal U _BPREG 278 disables first power circuit 252 to prevent charging of bypass capacitor 130 from forward terminal FWD 228 - 4 .

When output voltage V _OUT 108 is greater than bypass voltage V _BP 134 by a threshold voltage V _TH (i.e., U _VOUTCOMP 276 is logic low), second power circuit 254 may be enabled (i.e., U _S2 274 is logic high and U _VOUTCOMP 276 is logic low) to charge bypass capacitor 130. In this case, the input 520 to the NOR gate 522 is logic low, which means that the input 524 to the NOR gate 522 controls the state of U _S2 274, thereby controlling the state of the second power circuit 254. state. If _the bypass regulation circuit 256 determines that the bypass voltage V _BP 134 is less than the bypass regulation voltage value V _BPREG , the bypass regulation circuit 256 outputs a logic high logic control signal U _BPREG , which enables the The second power circuit 254 charges the bypass capacitor 130 . If _the bypass regulation circuit 256 determines that the bypass voltage V _BP 134 is greater than the bypass regulation voltage value V _BPREG , the bypass regulation circuit 256 outputs a logic control signal U _BPREG of logic low, which disables the first A second power circuit 254 prevents charging of the bypass capacitor 130 from the output voltage terminal VOUT 228-8.

In one sense, after start-up, during operation of power converter 100, U _VOUTCOMP 276 acts as a selection signal indicating which of first power circuit 252 and second power circuit 254 control circuit 258 may control. . Regarding first power circuit 252 , because U _VBCOMP 504 is normally logic low, U _VOUTCOMP 276 having a logic high value causes the state of first power circuit 252 to be controlled by U _BPREG 278 . Regarding the second power control circuit 254 , U _VOUTCOMP 276 having a low value causes the state of the second power circuit 254 to be controlled by U _BPRG 278 . Accordingly, charge control circuit 258 may select which of first power circuit 252 and second power circuit 254 to control in response to the relative magnitudes of bypass voltage V _BP 134 and output voltage V _OUT 108 . Charge control circuit 258 then enables/disables selected power circuits in response to the magnitude of bypass voltage V _BP 134 relative to bypass adjustment voltage value V _BPREG . For example, charge control circuit 258 may enable the selected power circuit when bypass voltage V _BP 134 is less than bypass regulation voltage value V _BPREG , and when bypass voltage V _BP 134 is greater than bypass regulation voltage value V _BPREG , selected power circuits can be disabled, as described above.

FIG. 6 is a schematic diagram of an exemplary output voltage (V _OUT ) comparison circuit 600 . V _OUT comparison circuit 600 receives bypass voltage V _BP 134 and output voltage V _OUT 108 , and outputs U _VOUTCOMP 276 . V _DD 602 in V _OUT comparison circuit 600 may be a supply voltage derived from bypass voltage V _BP 134 . In FIG. 6 , node 604 may be driven high (eg, greater than the threshold voltage of MOSFET 606 ) when output voltage V _OUT 108 is greater than threshold voltage V _TH than bypass voltage V _BP 134 . MOSFET 606 may be turned on in response to node 604 being driven high, which in turn may set U _VOUTCOMP 276 to a logic low level, as described above. In FIG. 6 , node 604 may be pulled low (eg, less than the threshold voltage of MOSFET 606 ) when output voltage V _OUT 108 is not greater than the sum of bypass voltage V _BP 134 and threshold voltage V _TH . MOSFET 606 may be turned off in response to node 604 being pulled low, which in turn may set U _VOUTCOMP 276 to a logic high level, as described above. The value of resistor R _TH 608 can be changed to change the threshold voltage V _TH of V _OUT comparison circuit 600 .

FIG. 7 is a schematic diagram of an exemplary first power circuit 252 . The first power circuit 252 receives the control signal U _S1 272 . When U _S1 272 is logic low, first power circuit 252 is enabled to transfer charge from forward terminal FWD 228-4 to bypass terminal BP terminal 228-6. For example, if U _S1 272 is logic low, then when the voltage at forward terminal FWD228-4 is greater than bypass voltage V _BP 134, using forward voltage FWD228-4, MOSFET 700 is turned off, MOSFET 702 is turned on, and p- Trench MOSFET 704 forms a conduction path for charging bypass capacitor 130 . Diode 706 prevents charge transfer from bypass terminal BP228-6 to forward terminal FWD228-4 when p-channel MOSFET 705 is on. When U _S1 272 is logic high, first power circuit 252 is disabled. For example, if U _S1 272 is logic high, MOSFET 700 is turned on, MOSFET 702 is turned off, and p-channel MOSFET 704 is turned off, which disconnects forward terminal FWD 228-4 from bypass terminal BP 228-6.

FIG. 8 is a schematic diagram of an exemplary second power circuit 254 . The second power circuit 254 receives a control signal U _S2 274 and a control signal U _VOUTCOMP 276 . If U _VOUTCOMP 276 is logic low and U _S2 274 is logic high, p-channel MOSFETs 800, 802 are on and a conduction path is formed between the output voltage terminal VOUT 228-8 and the bypass terminal BP228-6 so that output Voltage terminal VOUT 228 - 8 charges bypass capacitor 130 . If U _VOUTCOMP 276 is logic high or U _S2 274 is logic low, at least one of p-channel MOSFETs 800, 802 is turned off, which disconnects output voltage terminal VOUT 228-8 from bypass terminal BP228-6.

9 shows exemplary output voltage V _OUT 108 waveforms and bypass voltage V _BP 134 waveforms during and after start-up of power converter 100 and for control signals U _VOUTCOMP 276 , U _VBCOMP 504 , U Timing diagram of _BPREG 278, _US1 272 and _US2 274. Time (t) is along the x-axis. It may be assumed that, prior to time 0, bypass capacitor 130 and output capacitor 110 may be sufficiently discharged such that bypass voltage V _BP 134 and output voltage V _OUT 108 are both substantially zero volts.

At time 0, the input voltage V _IN 106 is provided at the input terminal 102 and the primary controller 218 begins switching the state of the power switch 222 to transfer energy to the secondary side. Bypass capacitor 130 and output capacitor 110 may begin charging. For example, at time 0, the first power circuit 252 may be initially enabled to charge the bypass voltage V _BP 134 . In the exemplary waveforms illustrated in FIG. 9 , output capacitor 110 may tend to generate voltage at a slower rate than bypass capacitor 130 . Accordingly, the bypass voltage V _BP 134 may reach the minimum bypass voltage value V _BPMIN before the output voltage V _OUT 108 reaches the desired regulated output voltage V _OUTREG 900 . While FIG. 9 illustrates an embodiment in which output capacitor 110 generates voltage at a slower rate than bypass capacitor 130 , in other embodiments output capacitor 110 may generate voltage at a higher rate than bypass capacitor 130 .

At time t ₁ , bypass voltage V _BP 134 reaches minimum bypass voltage value V _BPMIN . From time t ₁ to t ₂ , the first power circuit 252 may be enabled to charge the bypass voltage V _BP 134 up to the bypass regulation voltage value V _BPREG . At time t ₂ , bypass voltage V _BP 134 reaches bypass regulation voltage value V _BPREG , and the circuitry of secondary controller 220 , powered by bypass capacitor 130 , may begin operating as described above. U _VBCOMP 504 may assume a logic low value at t ₂ because bypass voltage V _BP 134 is greater than the minimum bypass voltage value V _BPMIN . In FIG. 9 , the bypass voltage V _BP 134 is maintained at a level greater than the minimum bypass voltage value V _BPMIN . Thus, in FIG. 9, after _t2 , _UVBCOMP 504 is maintained at a logic low value. In embodiments where bypass voltage V _BP 134 falls below the minimum bypass voltage value V _BPMIN , _UVBCOMP 504 may be driven to a logic high value that may cause bypass capacitor 130 to be powered using first power source 252 . Charge, as described above.

At t ₂ , bypass voltage V _BP 134 is at bypass regulation voltage value V _BPREG . From t ₂ to t ₃ , the first power circuit 252 is disabled because the bypass voltage V _BP 134 is greater than the bypass regulation voltage value V _BPREG . At t ₃ , the output voltage V _OUT 108 reaches the desired output regulation voltage V _OUTREG 900 . At t ₃ , U _VOUTCOMP 276 transitions to logic low when output voltage V _OUT 108 has reached a value greater than bypass voltage V _BP 134 by one threshold voltage V _TH . At t ₃ , the second power circuit 254 remains disabled because the bypass voltage V _BP 134 is still greater than the bypass regulation voltage value V _BPREG . From t ₃ to t ₄ , both the first power circuit 252 and the second power circuit 254 are disabled.

At t ₄ , bypass voltage V _BP 134 drops to a value less than bypass regulation voltage value V _BPREG . Accordingly, U _BPREG 278 is driven high, and second power circuit 254 charges bypass capacitor 130 . The second power circuit 254 charges the bypass capacitor 130 from t ₄ to t ₅ until the bypass voltage V _BP 134 reaches the bypass regulation voltage value V _BPREG . At t ₅ , when U _BPREG 278 is driven to a logic low value, second power circuit 254 is disabled.

Just before _t6 , the magnitude of the output voltage V _OUT 108 decreases. At t ₆ , the output voltage V _OUT 108 is at a value less than the sum of the threshold voltage V _TH and the bypass voltage V _BP 134 . Therefore, at t ₆ , U _VOUTCOMP 276 is driven to logic high, which disables the second power circuit 254 . At t ₆ , the bypass voltage V _BP 134 is greater than the minimum bypass voltage value V _BPMIN , so both the first power circuit 252 and the second power circuit 254 are disabled.

At _t7 , bypass voltage _VBP 134 drops below bypass regulation voltage value _VBPREG , which causes _UBPREG 278 to be driven to logic high, which enables first power circuit 252 to operate from _t7 to _t8 Bypass capacitor 130 is charged from forward terminal FWD228-4. At t ₈ , output voltage V _OUT 108 reaches a value greater than bypass value V _BP 134 plus threshold voltage V _TH . At t ₈ , the bypass voltage V _BP 134 is also less than the bypass regulation voltage value V _BPREG . Therefore, at t ₈ , the second power circuit 254 is enabled to charge the bypass capacitor 130 . The second power circuit 254 continues to charge the bypass capacitor 130 from t ₈ to t ₉ until the bypass voltage V _BP 134 reaches the bypass regulation voltage value V _BPREG .

The above description of illustrated embodiments of the invention, including what is described in the Abstract, is not intended to be exhaustive or to be limited to the precise forms disclosed. While specific embodiments of, and examples for, the invention are described herein for illustrative purposes, various equivalent modifications are possible without departing from the broader spirit and scope of the invention. Rather, it should be appreciated that specific exemplary voltages, currents, times, etc., are provided for explanatory purposes and that other values may be employed in other embodiments and examples in accordance with the teachings of this disclosure.

Claims (20)

1. a kind of controller for isolated power converters, including：

Bypass terminal, is coupled to feed-through capacitor, and the feed-through capacitor is coupled to time of isolated power converters Grade side；

First power circuit is coupled to the bypass terminal and first terminal, wherein the first terminal is coupled to institute State the first node of the secondary windings of the energy transfer element of primary side, and wherein described first power circuit be coupled to by Charge is transferred to the bypass terminal from the first terminal, to be stored on the feed-through capacitor；

Second power circuit is coupled to the bypass terminal and Second terminal, wherein the Second terminal is coupled to institute The section point of primary side is stated, wherein the section point of the primary side is the isolated power converters for defeated Send the output node of adjusted output voltage, and wherein described second power circuit is coupled to charge from described second Terminal is transferred to the bypass terminal, to be stored on the feed-through capacitor；And

Charging control circuit is coupled in response to the bypass voltage of generation at the bypass terminal and in the Second terminal At least one in the voltage at place controls which of first power circuit and second power circuit to pass charge It is handed to the bypass terminal.

2. controller according to claim 1, wherein the charging control circuit is coupled in response to the bypass electricity Pressure and the comparison between the voltage at the Second terminal control first power circuit and second power Which of circuit is by charge transfer to the bypass terminal.

3. controller according to claim 1, wherein the charging control circuit is coupled to disable first power Circuit so that the bypass terminal departs from from the first terminal, and wherein described charging control circuit be coupled so that Energy first power circuit, so as to which charge is transferred to the bypass terminal from the first terminal.

4. controller according to claim 1, wherein the charging control circuit is coupled to disable second power Circuit so that the bypass terminal departs from from the Second terminal, and wherein described charging control circuit be coupled so that Energy second power circuit, so as to which charge is transferred to the bypass terminal from the Second terminal.

5. controller according to claim 1 further comprises bypassing adjustment circuit, the bypass adjustment circuit is treated by coupling It closes to sense the bypass voltage, determines whether the bypass voltage is less than adjustment voltage, and to the charging control circuit Indicate whether the bypass voltage is less than the adjustment voltage, wherein the charging control circuit is coupled to control described first It is at least one in power circuit and second power circuit, so as to be incited somebody to action when the bypass voltage is less than the adjustment voltage Charge transfer is to the bypass terminal.

6. controller according to claim 1, wherein the charging control circuit is coupled at the Second terminal The voltage bigger than the bypass voltage threshold voltage when disable first power circuit, wherein when first work( When rate circuit is disabled, first power circuit blocks from the first terminal to the charge transfer of the bypass terminal, and And the voltage that wherein described charging control circuit is coupled at the Second terminal is more described greatly than the bypass voltage During threshold voltage, second power circuit is enabled, so as to which charge is transferred to the bypass terminal from the Second terminal.

7. controller according to claim 1, wherein the charging control circuit is coupled at the Second terminal Voltage when being less than the summation of the bypass voltage and threshold voltage, disabling second power circuit, wherein when When second power circuit is disabled, the second power circuit obstruction is from the Second terminal to the electricity of the bypass terminal Lotus is transferred, and the voltage that wherein described charging control circuit is coupled at the Second terminal is less than the bypass During the summation of voltage and the threshold voltage, first power circuit is enabled, so as to which charge be transferred from the first terminal To the bypass terminal.

8. controller according to claim 1, wherein the charging control circuit includes multiple logic gates, and wherein institute The first power circuit is stated to be coupled to when the bypass voltage is less than or equal to the minimum operating voltages of the multiple logic gate, Charge is transferred to the bypass terminal from the first terminal.

9. controller according to claim 1 further comprises secondary switching circuit, which is coupled to The feedback signal for the output parameter for representing the isolated power converters is received, and is coupled to enable signal being transmitted to The primary side of the isolated power converters, wherein the secondary switching circuit is also coupled to receive from the bypass end The operation power of son.

10. a kind of ic package for isolated power converters, the ic package includes：

Secondary controller, including：

First terminal, Second terminal and bypass terminal, wherein the bypass terminal is coupled to feed-through capacitor, the bypass Capacitor is coupled to the primary side of isolated power converters；

First power circuit is coupled to charge being transferred to the bypass terminal from the first terminal, described to be stored in On feed-through capacitor；

Second power circuit is coupled to charge being transferred to the bypass terminal from the Second terminal, described to be stored in On feed-through capacitor；

Charging control circuit is coupled in response to the bypass voltage of generation at the bypass terminal and in the Second terminal At least one in the voltage at place controls which of first power circuit and second power circuit to pass charge It is handed to the bypass terminal；And

Secondary switching circuit is coupled to receive the feedback signal for the output parameter for representing the isolated power converters, and And it is coupled to enable signal being transmitted to the primary side of the isolated power converters；

Docket No, be coupled to receive transmitted enable signal, and the enable signal in response to being transmitted controls Power switch；And

Encapsulated member, wherein the Docket No and the secondary controller are disposed in the encapsulated member.

11. ic package according to claim 10, wherein the Docket No and the secondary controller It is galvanically isolated each other, and wherein described first terminal is coupled to the secondary windings of the energy transfer element of the primary side First node, the Second terminal are coupled to the section point of the primary side, wherein the section point be it is described every The output node for being used to convey adjusted output voltage from formula power converter.

12. ic package according to claim 10 further comprises the power switch,

Wherein described power switch is disposed in the encapsulated member.

13. ic package according to claim 10, further comprises lead frame, wherein the secondary switching Circuit is coupled to the enable signal being transmitted to the Docket No via the lead frame.

14. a kind of power converter, including：

Energy transfer element is included in armature winding in the primary side of the power converter and in the power converter Secondary windings in primary side；

Feed-through capacitor is coupled to the primary side of the power converter；

Power switch is coupled to the armature winding；

Secondary controller, including：

First power circuit is coupled to the first node of charge from the primary side being transferred to the feed-through capacitor, Described in primary side the first node be the secondary windings node；

Second power circuit is coupled to the section point of charge from the primary side being transferred to the feed-through capacitor, Described in primary side the section point be the power converter output node；

Charging control circuit is coupled to bypass voltage in response to being generated at the feed-through capacitor both ends and described second At least one in voltage at node controls which of first power circuit and second power circuit by electricity Lotus is transferred to the feed-through capacitor；And

Secondary switching circuit, is coupled to receive the feedback signal for the output parameter for representing isolated power converters, and by Enable signal to be transmitted to the primary sides of the isolated power converters by coupling；And

Docket No, be coupled to receive transmitted enable signal, and the enable signal in response to being transmitted controls The state of the power switch.

15. power converter according to claim 14, the section point is coupled to convey adjusted output electricity Pressure.

16. a kind of method for controlling isolated power converters, the described method includes：

Charge is transferred to bypass terminal from first terminal, to be stored in the secondary for being coupled to the isolated power converters On the feed-through capacitor of side, wherein the first terminal is coupled to the first node of the primary side, wherein the first segment Point belongs to the secondary windings of energy transfer element：

Charge is transferred to the bypass terminal from Second terminal, to be stored on the feed-through capacitor, wherein described second Terminal is coupled to the section point of the primary side, wherein the section point is the output node of the power converter； And

In response to the bypass voltage and at least one in the voltage at the Second terminal generated at the bypass terminal To control the charge transfer of the bypass terminal.

17. according to the method for claim 16, further comprise in response at the bypass voltage and the Second terminal Voltage between comparison control the charge transfer of the bypass terminal.

18. according to the method for claim 16, further comprise：

Sense the bypass voltage；

Determine whether the bypass voltage is less than adjustment voltage；And

When the bypass voltage is less than the adjustment voltage, by charge transfer to the bypass terminal.

19. according to the method for claim 16, further comprise：

During bigger than the bypass voltage threshold voltage of the voltage at the Second terminal, make the bypass terminal from The first terminal departs from；And

When the voltage at the Second terminal is than the bypass voltage threshold voltage greatly, by charge from described second Terminal is transferred to the bypass terminal.

20. according to the method for claim 16, further comprise：

When the voltage at the Second terminal is less than the summation of the bypass voltage and threshold voltage, make the side Road terminal departs from from the Second terminal；And the voltage at the Second terminal be less than the bypass voltage with it is described During the summation of threshold voltage, charge is transferred to the bypass terminal from the first terminal.