Detailed Description
The present invention is described in further detail below with reference to the attached drawing figures.
Fig. 1 shows a signal processing device 1 for implementing signal processing based on a large-point fourier transform according to an aspect of the present invention, wherein the signal processing device 1 comprises conversion means 11 and execution means 12. Specifically, the conversion device 11 converts a large-point fourier transform corresponding to a signal to be processed into a two-dimensional small-point fourier transform, where the two-dimensional small-point fourier transform includes a first fourier transform based on a first sequence length, a second fourier transform based on a second sequence length, and a corresponding twiddle factor, where the signal to be processed satisfies a signal sparsity threshold, a product of the first sequence length and the second sequence length is a target sequence length of the large-point fourier transform, and the second sequence length matches sequence length information of the signal to be processed; the executing device 12 repeatedly executes the second fourier transform on the product of the first fourier transform result and the twiddle factor according to the second sequence length to obtain a resultant signal obtained by the large-point fourier transform, wherein the first fourier transform result corresponds to a signal sequence corresponding to the second sequence length in the signal to be processed; wherein the Fourier transform comprises an FFT or IFFT. Here, the signal processing apparatus 1 includes, but is not limited to, an electronic product for fourier transforming a signal, such as a PRACH transmitter, UE, etc. generating a preamble sequence in LTE, which includes an electronic apparatus capable of automatically performing numerical calculation and information processing according to instructions set in advance or stored, and hardware thereof includes, but is not limited to, a microprocessor, an Application Specific Integrated Circuit (ASIC), a programmable gate array (FPGA), a digital processor (DSP), an embedded apparatus, etc. Here, the base station refers to a device, such as an eNB base station, which connects a fixed part and a radio part in a mobile communication system and connects to a mobile station by radio transmission over the air. Here, the UE refers to a part of terminating wireless transmission from or to a network in a mobile communication device, and adapting the capability of a terminal device to the wireless transmission, that is, a device for a user to access to the mobile network, and includes, but is not limited to, any electronic product, such as a tablet computer, a smart phone, a PDA, a vehicle-mounted computer, etc., which can perform man-machine interaction with the user through a keyboard, a touch panel, or a voice control device, and can perform mutual transmission and reception of signals with a base station through the mobile network to achieve transmission of mobile communication signals. Here, the mobile network includes, but is not limited to, GSM, 3G, LTE-Advanced, Wi-Fi, WiMax, WCDMA, CDMA2000, TD-SCDMA, HSPA, LTD, etc. It should be understood by those skilled in the art that the above-mentioned signal processing apparatus 1, UE and base station are only examples, and other existing or future signal processing apparatuses 1, UEs or base stations may be applicable to the present invention, and are included in the scope of the present invention and are herein incorporated by reference.
Specifically, the conversion device 11 converts a large-point fourier transform corresponding to a signal to be processed into a two-dimensional small-point fourier transform, where the two-dimensional small-point fourier transform includes a first fourier transform based on a first sequence length, a second fourier transform based on a second sequence length, and a corresponding twiddle factor, where the signal to be processed satisfies a signal sparsity threshold, a product of the first sequence length and the second sequence length is a target sequence length of the large-point fourier transform, and the second sequence length is matched with sequence length information of the signal to be processedAnd (4) preparing. Here, the matching of the second sequence length with the sequence length information of the signal to be processed means that the second sequence length is greater than or equal to the sequence length information of the signal to be processed, for example, the size requirement of fourier transform is satisfied, for example, 2n。
For example, assume that it is desired to convert the length to N1Is carried out for a finite length sequence x (N) of N ═ N1N2Point Fourier transform such as FFT operation, i.e. x (N) is only in the range of N0-N1If the value of-1 is "1", and if there are other N, x (N) ═ 0 ", then the finite length sequence x (N) satisfies the signal sparsity threshold, then the conversion device 11 can convert the large-point fourier transform corresponding to x (N) into the two-dimensional small-point fourier transform when performing FFT operation on x (N), for example, N ═ N of x (N) can be obtained according to the Cooley-Tukey FFT algorithm1N2Point fourier transform, as explained with FFT as an example:
wherein,n=N2n1+n2,k=N1k2+k1the conversion device 11 converts the large-point Fourier transform corresponding to x (N) into two-dimensional small-point Fourier transform, i.e. N2Sub N1Point FFT and N1Sub N2A point FFT, wherein the two-dimensional decimal point number Fourier transform comprises a first Fourier transform based on a first sequence length, i.e., an inner loop FFT in equation (1), i.e., a point FFTIf N24576 and x (N) are assumed to have a sequence length of 839, the sequence of x (N) may be zero-padded, and if the size requirement of FFT is satisfied, e.g., the sequence of x (N) is zero-padded to 1024, the large-point FFT of N24576 may be converted into a two-dimensional small-point FFT of N24 × 1024, i.e., 1024 times of 24-point FFT are performed first, and then 24 times of 1024-point FFT are performed to obtain two-dimensional small-point FFTAnd (5) a few FFT.
It should be understood by those skilled in the art that the above-mentioned manner of transforming a large-point fourier transform into a two-dimensional small-point fourier transform is merely exemplary, and other existing or hereafter-occurring manners of transforming a large-point fourier transform into a two-dimensional small-point fourier transform may be applicable to the present invention, and are included within the scope of the present invention and are incorporated herein by reference.
The executing device 12 repeatedly executes the second fourier transform on the product of the first fourier transform result and the twiddle factor according to the second sequence length to obtain a resultant signal obtained by the large-point fourier transform, wherein the first fourier transform result corresponds to a signal sequence corresponding to the second sequence length in the signal to be processed; wherein the Fourier transform comprises an FFT or IFFT. Specifically, the executing device 12, based on each second sequence length, first performs a first fourier transform based on the first sequence length on the signal to be processed to obtain a corresponding first fourier transform result; then, the second fourier transform is repeatedly performed on the product of the first fourier transform result and the twiddle factor according to the second sequence length to obtain a resultant signal obtained by the large-point fourier transform.
For example, in the above example, the conversion device 11 decomposes x (N) into N2Each length is N1When expressed in a matrix, the sequence of (1) has:
if orderThenIf the sequence length of x (N) is 839, N ═ 23 needs to be performed on it576, the conversion device 11 may zero-fill the sequence of x (N) to obtain N24 × 1024, N1=24,N21024, that is, the conversion device 11 converts the large-point FFT with N24576 into the two-dimensional small-point FFT with N24 × 1024, and the corresponding matrixIf the decomposition matrix corresponding to the x (n) sequence does not satisfy that only the first column has a value, the matrix can be converted into a matrix satisfying that only the first column has a value by means of, for example, a block matrix, a matrix transformation, or the like, and the executing device 12 first performs a first fourier transform based on the first sequence length on the signal to be processed according to each second sequence length to obtain a corresponding first fourier transform result, if the formula (1) is used, the matrix only needs to be continuously distributed, and if the decomposition matrix corresponding to the x (n) sequence does not satisfy that only the first column has a value:
when n is2When the content is equal to 0, the content,wherein,
when n is2When the number is equal to 1, the alloy is put into a container,
wherein n is2=0,x'(n)=x(0),n2When the number is equal to 1, the alloy is put into a container,
when n is2When the number is equal to 2, the alloy is put into a container,
wherein n is2When 0, x' (n) is x (0), n2When the number is equal to 1, the alloy is put into a container,
n2when the number is equal to 2, the alloy is put into a container,
by analogy, as can be seen from the above analysis, the execution device 12 first obtains the length n of each second sequence2Corresponding first Fourier transform result, the first Fourier transform result only ANDWherein the first Fourier transform result corresponds to the length N of the second sequence in the signal x (N) to be processed2A corresponding signal sequence; the execution means 12 then again follow the second sequence length N2From the above derivation, the executing device 12 performs the second fourier transform repeatedly on the product of the first fourier transform result and the twiddle factor to obtain the resultant signal obtained by the large-point fourier transform, and when performing the second fourier transform, it is actually performed on N of the new sequence x' (N)2Point N1Second decimal point FFT, i.e. only N has to be performed2Point N1The small-point FFT of the second dimension omits N in the traditional large-point FFT1Point N2The small number of points FFT in this dimension. The invention realizes that the Fourier transform of the large point can be realized only by adding the product factor to the Fourier transform of the small point, and not only reduces the complexity of the algorithm but also reduces the resource expense of hardware equipment compared with the existing Fourier algorithm of the large point.
It will be understood by those skilled in the art that the matrix representation of the signals to be processed is merely exemplary, and other existing or future matrix representations of the signals to be processed may be suitable for the present invention, and are included within the scope of the present invention and are hereby incorporated by reference.
It will be understood by those skilled in the art that the above-described manner of performing the second fourier transform is merely exemplary, and other existing or future manners of performing the second fourier transform, such as may be applicable to the present invention, are also included within the scope of the present invention and are hereby incorporated by reference.
The various devices of the signal processing apparatus 1 are constantly in operation. Specifically, the conversion device 11 continuously converts a large-point fourier transform corresponding to a signal to be processed into a two-dimensional small-point fourier transform, where the two-dimensional small-point fourier transform includes a first fourier transform based on a first sequence length, a second fourier transform based on a second sequence length, and a corresponding twiddle factor, where the signal to be processed satisfies a signal sparsity threshold, a product of the first sequence length and the second sequence length is a target sequence length of the large-point fourier transform, and the second sequence length matches sequence length information of the signal to be processed; the executing device 12 repeatedly executes the second fourier transform on the product of the first fourier transform result and the twiddle factor according to the second sequence length to obtain a resultant signal obtained by the large-point fourier transform, wherein the first fourier transform result corresponds to a signal sequence corresponding to the second sequence length in the signal to be processed; wherein the Fourier transform comprises an FFT or IFFT. It should be understood by those skilled in the art that "continuously" means that each device of the signal processing apparatus 1 continuously performs the conversion of the two-dimensional decimal fourier transform and the repeated execution of the second fourier transform, respectively, until the signal processing apparatus 1 stops the conversion of the two-dimensional decimal fourier transform for a longer time.
Fig. 2 shows a schematic diagram of an apparatus for implementing signal processing based on large-point fourier transform according to a preferred embodiment of the present invention, wherein the signal processing apparatus 1 includes signal acquiring means 13 ', cyclic shift means 14', converting means 11 'and executing means 12'. Specifically, the signal acquiring device 13' takes a ZC root sequence to be transmitted through the PRACH as the signal to be processed; the cyclic shift device 14' performs cyclic shift on the signal to be processed to obtain the length of the target sequence of the large-point Fourier transform; the conversion device 11' converts a large-point Fourier transform corresponding to a signal to be processed into a two-dimensional small-point Fourier transform, wherein the two-dimensional small-point Fourier transform includes a first Fourier transform based on a first sequence length, a second Fourier transform based on a second sequence length, and a corresponding twiddle factor, wherein the signal to be processed satisfies a signal sparsity threshold, a product of the first sequence length and the second sequence length is a target sequence length of the large-point Fourier transform, and the second sequence length matches with sequence length information of the signal to be processed; the executing device 12' repeatedly executes the second fourier transform on the product of the first fourier transform result and the twiddle factor according to the second sequence length to obtain a resultant signal obtained by the large-point fourier transform, wherein the first fourier transform result corresponds to a signal sequence corresponding to the second sequence length in the signal to be processed; wherein the Fourier transform comprises an FFT or IFFT. Here, the conversion device 11 'and the execution device 12' are respectively the same as or similar to the corresponding devices in the embodiment of fig. 1, and for the sake of brevity, are not described again and are included herein by reference.
Specifically, the signal acquiring device 13' takes the ZC root sequence to be transmitted through the PRACH as the signal to be processed. For example, assume that in a 3GPP LTE system, when a UE initiates a random access procedure, a physical layer at a UE end learns parameter information of a random access preamble SEQUENCE, such as a logical ROOT SEQUENCE index RACH _ ROOT _ SEQUENCE, from an upper layer, and obtains an actually used u by looking up a table (for example, looking up tables 5.7.2-4 and 5.7.2-5 in 3GPP protocols TS 362.11-870) according to the parameter to generate a ZC ROOT SEQUENCE:
according to parameters such as format preamble format of the random access preamble sequence, cyclic shift value configuration Ncs, preamble sequence group type identifier High-speed-flag, and the like, the length and cyclic shift value of the random access preamble ZC sequence are determined, and then the signal acquisition device 13' may use the ZC root sequence to be transmitted through the PRACH as the signal to be processed, as shown in fig. 3, a schematic diagram of the transmission process of the PRACH at the UE end is shown.
For example, in the above example, the cyclic shift device 14 ' may determine, by using the parameter cyclic shift value configuration Ncs, the number of bits that can be cyclically shifted for the ZC root sequence, and obtain the target sequence length of the large-point fourier transform, and if it is assumed that the signal acquisition device 13 ' obtains preamble format preamble 0 by looking up a random access channel configuration index prach-configuration index, and if the cyclic shift value Ncs is 13 and the length Nzc of the ZC root sequence is 839, the cyclic shift device 14 ' cyclically shifts the ZC root sequence according to the cyclic shift value Ncs 13, and obtains the target sequence length of the large-point fourier transform, such as 24576.
Preferably, the signal obtaining device 13' may further perform zero padding on the ZC root sequence to obtain the signal to be processed, where the sequence length information of the signal to be processed matches with the length information of the ZC root sequence. For example, the signal obtaining device 13 'first obtains preamble format 0 through random access channel configuration index prach-configuration index table lookup, where Ncs is 13, and Nzc is 839, then the signal obtaining device 13' may further perform zero padding on the ZC root sequence, for example, zero padding the ZC root sequence to 1024, so that it satisfies the size of fourier transform, and obtain the signal to be processed, where the sequence length information of the signal to be processed matches the length information of the ZC root sequence.
More preferably, the signal processing apparatus 1 further includes second sequence determining means (not shown) and first sequence determining means (not shown). Specifically, the second sequence determining means takes the sequence length information of the signal to be processed after zero padding as the second sequence length; the first sequence determining device determines the first sequence length according to the target sequence length and the second sequence length.
Specifically, the second sequence determining means takes the sequence length information of the signal to be processed after zero padding as the second sequence length. For example, as described above, if the signal acquiring device 13' zero-fills the ZC root sequence to 1024, the second sequence determining device uses the sequence length information of the ZC root sequence after zero-filling as the second sequence length, that is, N2=1024。
The first sequence determining device determines the first sequence length according to the target sequence length and the second sequence length. For example, assuming that the cyclic shift device 14' obtains the target sequence length of the large-point fourier transform as N24576, the second sequence length determined by the second sequence determination device, i.e., N, in the above example2The first sequence determining means may then N/N10242As the length of the first sequence, i.e. N1=24。
Preferably, the signal processing apparatus 1 further comprises an inserting means (not shown), in particular, the inserting means inserts a corresponding cyclic prefix in the resultant signal obtained by the large-point fourier transform for transmission via the PRACH. For example, assuming that the target sequence length for the cyclic shift device 14 ' to obtain the large-point fourier transform is N24576, the inserting device inserts the corresponding cyclic prefix CP into the resultant signal y (N) obtained by performing the large-point fourier transform on the ZC root sequence acquired by the signal acquiring device 13 ' by the executing device 12 ' for transmission via the PRACH, as shown in fig. 3.
More preferably, for the resultant signal obtained by the fourier transform of the large number of points, when the corresponding preamble format includes format 2 or 3, the inserting device may further copy the resultant signal, and insert a corresponding cyclic prefix into the copied resultant signal for transmission via the PRACH. For example, assuming that the ZC root sequence obtained by the signal obtaining means 13 ' is in preamble format 2 or 3 to generate a preamble sequence, and the cyclic shift means 14 ' obtains the target sequence length N ═ 2 × 24576 of the large-point-number fourier transform, the inserting means performs the large-point-number fourier transform on the ZC root sequence obtained by the signal obtaining means 13 ' to obtain a result signal y (N) and first copies the result signal, and then inserts a corresponding cyclic prefix CP into the copied result signal for transmission via the PRACH, as shown in fig. 3.
Fig. 4 illustrates a flow diagram of a method for implementing signal processing based on a large-point fourier transform in accordance with another aspect of the disclosure.
Specifically, in step S1, the signal processing apparatus 1 converts a large-point fourier transform corresponding to a signal to be processed into a two-dimensional small-point fourier transform, wherein the two-dimensional small-point fourier transform includes a first fourier transform based on a first sequence length, a second fourier transform based on a second sequence length, and a corresponding twiddle factor, wherein the signal to be processed satisfies a signal sparsity threshold, a product of the first sequence length and the second sequence length is a target sequence length of the large-point fourier transform, and the second sequence length matches sequence length information of the signal to be processed; in step S2, the signal processing apparatus 1 repeatedly performs the second fourier transform on the product of the first fourier transform result and the twiddle factor according to the second sequence length to obtain a resultant signal obtained by the large-point fourier transform, wherein the first fourier transform result corresponds to a signal sequence corresponding to the second sequence length in the signal to be processed; wherein the Fourier transform comprises an FFT or IFFT. Here, the signal processing apparatus 1 includes, but is not limited to, an electronic product for fourier transforming a signal, such as a PRACH transmitter, UE, etc. generating a preamble sequence in LTE, which includes an electronic apparatus capable of automatically performing numerical calculation and information processing according to instructions set in advance or stored, and hardware thereof includes, but is not limited to, a microprocessor, an Application Specific Integrated Circuit (ASIC), a programmable gate array (FPGA), a digital processor (DSP), an embedded apparatus, etc. Here, the base station refers to a device, such as an eNB base station, which connects a fixed part and a radio part in a mobile communication system and connects to a mobile station by radio transmission over the air. Here, the UE refers to a part of terminating wireless transmission from or to a network in a mobile communication device, and adapting the capability of a terminal device to the wireless transmission, that is, a device for a user to access to the mobile network, and includes, but is not limited to, any electronic product, such as a tablet computer, a smart phone, a PDA, a vehicle-mounted computer, etc., which can perform man-machine interaction with the user through a keyboard, a touch panel, or a voice control device, and can perform mutual transmission and reception of signals with a base station through the mobile network to achieve transmission of mobile communication signals. Here, the mobile network includes, but is not limited to, GSM, 3G, LTE-Advanced, Wi-Fi, WiMax, WCDMA, CDMA2000, TD-SCDMA, HSPA, LTD, etc. It should be understood by those skilled in the art that the above-mentioned signal processing apparatus 1, UE and base station are only examples, and other existing or future signal processing apparatuses 1, UEs or base stations may be applicable to the present invention, and are included in the scope of the present invention and are herein incorporated by reference.
Specifically, in step S1, the signal processing apparatus 1 converts a large-point fourier transform corresponding to a signal to be processed into a two-dimensional small-point fourier transform, wherein the two-dimensional small-point fourier transform includes a first fourier transform based on a first sequence length, a second fourier transform based on a second sequence length, and a corresponding twiddle factor, wherein the signal to be processed satisfies a signal sparsity threshold, a product of the first sequence length and the second sequence length is a target sequence length of the large-point fourier transform, and the second sequence length matches sequence length information of the signal to be processed. Here, the matching of the second sequence length with the sequence length information of the signal to be processed means that the second sequence length is greater than or equal to the sequence length of the signal to be processedDegree information, e.g. size requirements for Fourier transform such as 2n。
For example, assume that it is desired to convert the length to N1Is carried out for a finite length sequence x (N) of N ═ N1N2Point Fourier transform such as FFT operation, i.e. x (N) is only in the range of N0-N1If the value of-1 is "1", and if there is another N, x (N) ═ 0, then the finite length sequence x (N) satisfies the signal sparsity threshold, then in step S1, when the signal processing apparatus 1 performs FFT operation on x (N), the large-point fourier transform corresponding to x (N) can be converted into a two-dimensional small-point fourier transform, for example, according to the Cooley-Tukey FFT algorithm, N ═ N of x (N) × can be obtained1N2Point fourier transform, as explained with FFT as an example:
wherein,n=N2n1+n2,k=N1k2+k1then, in step S1, the signal processing device 1 converts the large-point fourier transform corresponding to x (N) into a two-dimensional small-point fourier transform, i.e., N2Sub N1Point FFT and N1Sub N2A point FFT, wherein the two-dimensional decimal point Fourier transform comprises a first Fourier transform based on a first sequence length, equation (3)Corresponding twiddle factorIf N24576 and x (N) are assumed to have a sequence length of 839, the sequence of x (N) may be zero-padded, and if the size requirement of FFT is satisfied, e.g., the sequence of x (N) is zero-padded to 1024, the large-point FFT of N24576 may be converted into a two-dimensional small-point FFT of N24 × 1024, i.e., 1024 times of 24-point FFT are performed first, and then 24 times of 1024-point FFT are performedThe number of dimension points is FFT.
It should be understood by those skilled in the art that the above-mentioned manner of transforming a large-point fourier transform into a two-dimensional small-point fourier transform is merely exemplary, and other existing or hereafter-occurring manners of transforming a large-point fourier transform into a two-dimensional small-point fourier transform may be applicable to the present invention, and are included within the scope of the present invention and are incorporated herein by reference.
In step S2, the signal processing apparatus 1 repeatedly performs the second fourier transform on the product of the first fourier transform result and the twiddle factor according to the second sequence length to obtain a resultant signal obtained by the large-point fourier transform, wherein the first fourier transform result corresponds to a signal sequence corresponding to the second sequence length in the signal to be processed; wherein the Fourier transform comprises an FFT or IFFT. Specifically, in step S2, the signal processing apparatus 1 first performs a first fourier transform based on the first sequence length on the signal to be processed based on each second sequence length, to obtain a corresponding first fourier transform result; then, the second fourier transform is repeatedly performed on the product of the first fourier transform result and the twiddle factor according to the second sequence length to obtain a resultant signal obtained by the large-point fourier transform.
For example, as described above, in step S1, the signal processing apparatus 1 decomposes x (N) into N2Each length is N1When expressed in a matrix, the sequence of (1) has:
if orderThenIf the sequence length of x (N) is 839 and a large-point FFT with N ═ 23576 needs to be performed on the sequence length, in step S1, the signal processing apparatus 1 may zero-fill the sequence of x (N) to obtain N ═ 24 × 1024, N ═ 24 ×, N1=24,N2In step S1, the signal processing device 1 converts the large-point FFT with N24576 into a two-dimensional small-point FFT with N24 × 1024, and the corresponding matrixIf the decomposition matrix corresponding to the x (n) sequence does not satisfy that only the first column has a value, the matrix may be converted into a matrix satisfying the value of only the first column by means of, for example, a block matrix, a matrix transformation, or the like, in step S2, the signal processing apparatus 1 first performs a first fourier transform based on each second sequence length on the signal to be processed to obtain a corresponding first fourier transform result, if the matrix satisfies the value of only the first column, based on equation (3):
when n is2When the content is equal to 0, the content,wherein,
when n is2When the number is equal to 1, the alloy is put into a container,
wherein n is2=0,x'(n)=x(0),n2When the number is equal to 1, the alloy is put into a container,
when n is2When the number is equal to 2, the alloy is put into a container,
wherein n is2When 0, x' (n) is x (0), n2When the number is equal to 1, the alloy is put into a container,
n2when the number is equal to 2, the alloy is put into a container,
……
by analogy, as can be seen from the above analysis, in step S2, the signal processing apparatus 1 first obtains the length n of each second sequence2A corresponding first Fourier transform result, wherein the first Fourier transform result corresponds to a signal sequence corresponding to the second sequence length in the signal to be processed, and the first Fourier transform result only corresponds to the second sequence lengthWherein the first Fourier transform result corresponds to the length N of the second sequence in the signal x (N) to be processed2A corresponding signal sequence; then, in step S2, the signal processing device 1 again follows the second sequence length N2As can be seen from the above derivation, the signal processing apparatus 1, when performing the second fourier transform, actually performs the second fourier transform on N of the new sequence x' (N) in step S2, by repeatedly performing the second fourier transform on the product of the first fourier transform result and the twiddle factor to obtain the resultant signal obtained by the large-point fourier transform2Point N1Second decimal point FFT, i.e. only N has to be performed2Point N1The small-point FFT of the second dimension omits N in the traditional large-point FFT1Point N2The small number of points FFT in this dimension. The invention realizes the application of only small pointsThe Fourier transform of the large point number can be realized by adding the multiplication factor to the Fourier transform of the number, and compared with the existing large point number Fourier algorithm, the algorithm complexity is reduced, and the resource expense of hardware equipment is also reduced.
It will be understood by those skilled in the art that the matrix representation of the signals to be processed is merely exemplary, and other existing or future matrix representations of the signals to be processed may be suitable for the present invention, and are included within the scope of the present invention and are hereby incorporated by reference.
It will be understood by those skilled in the art that the above-described manner of performing the second fourier transform is merely exemplary, and other existing or future manners of performing the second fourier transform, such as may be applicable to the present invention, are also included within the scope of the present invention and are hereby incorporated by reference.
The signal processing device 1 is continuously operated between the various steps. Specifically, in step S1, the signal processing apparatus 1 continuously converts a large-point fourier transform corresponding to a signal to be processed into a two-dimensional small-point fourier transform, wherein the two-dimensional small-point fourier transform includes a first fourier transform based on a first sequence length, a second fourier transform based on a second sequence length, and a corresponding twiddle factor, wherein the signal to be processed satisfies a signal sparsity threshold, a product of the first sequence length and the second sequence length is a target sequence length of the large-point fourier transform, and the second sequence length matches sequence length information of the signal to be processed; in step S2, the signal processing apparatus 1 repeatedly performs the second fourier transform on the product of the first fourier transform result and the twiddle factor according to the second sequence length to obtain a resultant signal obtained by the large-point fourier transform, wherein the first fourier transform result corresponds to the signal sequence corresponding to the second sequence length in the signal to be processed; wherein the Fourier transform comprises an FFT or IFFT. It should be understood by those skilled in the art that "continuously" means that each device of the signal processing apparatus 1 continuously performs the conversion of the two-dimensional decimal fourier transform and the repeated execution of the second fourier transform, respectively, until the signal processing apparatus 1 stops the conversion of the two-dimensional decimal fourier transform for a longer time.
Fig. 5 shows a flow chart of a method for implementing signal processing based on a large-point fourier transform according to a preferred embodiment of the present invention.
Wherein, the signal processing apparatus 1 includes step S3 ', step S4', step S1 ', and step S2'. Specifically, in step S3', the signal processing apparatus 1 takes the ZC root sequence to be transmitted by the PRACH as the signal to be processed; in step S4', the signal processing apparatus 1 performs cyclic shift on the signal to be processed to obtain a target sequence length of the large-point fourier transform; in step S1', the signal processing apparatus 1 converts a large-point fourier transform corresponding to a signal to be processed into a two-dimensional small-point fourier transform, wherein the two-dimensional small-point fourier transform includes a first fourier transform based on a first sequence length, a second fourier transform based on a second sequence length, and a corresponding twiddle factor, wherein the signal to be processed satisfies a signal sparsity threshold, a product of the first sequence length and the second sequence length is a target sequence length of the large-point fourier transform, and the second sequence length matches sequence length information of the signal to be processed; in step S2', the signal processing apparatus 1 repeatedly performs the second fourier transform on the product of the first fourier transform result and the twiddle factor according to the second sequence length to obtain a resultant signal obtained by the large-point fourier transform, wherein the first fourier transform result corresponds to the signal sequence corresponding to the second sequence length in the signal to be processed; wherein the Fourier transform comprises an FFT or IFFT. Here, the contents of step S1 'and step S2' are the same as or similar to the contents of the corresponding steps in the embodiment of fig. 4, and are not repeated for brevity and are included herein by way of reference.
Specifically, in step S3', the signal processing apparatus 1 takes the ZC root sequence to be transmitted through the PRACH as the signal to be processed. For example, assume that in a 3GPP LTE system, when a UE initiates a random access procedure, a physical layer at a UE end learns parameter information of a random access preamble SEQUENCE, such as a logical ROOT SEQUENCE index RACH _ ROOT _ SEQUENCE, from an upper layer, and obtains an actually used u by looking up a table (for example, looking up tables 5.7.2-4 and 5.7.2-5 in 3GPP protocols TS 362.11-870) according to the parameter to generate a ZC ROOT SEQUENCE:
according to parameters such as format preamble format of the random access preamble sequence, cyclic shift value configuration Ncs, preamble sequence group type identifier High-speed-flag, and the like, the length and cyclic shift value of the random access preamble ZC sequence are determined, then in step S3', the signal processing device 1 may use the ZC root sequence to be transmitted through the PRACH as the signal to be processed, as shown in fig. 3, a schematic diagram of the transmission process of the PRACH at the UE end.
In step S4 ', the signal processing apparatus 1 performs cyclic shift on the signal to be processed to obtain the target sequence length of the large-point fourier transform, for example, as described above, in step S4', the signal processing apparatus 1 may determine the number of bits that can perform cyclic shift on the ZC root sequence by the parameter cyclic shift value configuration Ncs to obtain the target sequence length of the large-point fourier transform, for example, assuming that in step S3 ', the signal processing apparatus 1 obtains preamble sequence format preamble format 0 by using a random access channel configuration index prach-configuration index lookup table, corresponding to the cyclic shift value Ncs 13, the length Nzc 839 of the ZC root sequence, and then in step S4', the signal processing apparatus 1 performs cyclic shift on the ZC root sequence according to the cyclic shift value Ncs 13 to obtain the target sequence length of the large-point fourier transform, such as 76.
Preferably, in step S3', the signal processing apparatus 1 may further perform zero padding on the ZC root sequence to obtain the signal to be processed, wherein the sequence length information of the signal to be processed matches the length information of the ZC root sequence. For example, in step S3 ', the signal processing device 1 first obtains preamble format 0 by table lookup of the rach-configuration index, where the corresponding cyclic shift value Ncs is 13 and the length Nzc of the ZC root sequence is 839, and then in step S3', the signal processing device 1 may further perform zero padding on the ZC root sequence, such as zero padding the ZC root sequence to 1024 so as to satisfy the size of fourier transform, and obtain the signal to be processed, where the sequence length information of the signal to be processed matches the length information of the ZC root sequence.
More preferably, the signal processing apparatus 1 further includes step S5 '(not shown) and step S6' (not shown). Specifically, in step S5', the signal processing apparatus 1 takes the sequence length information of the zero-padded signal to be processed as the second sequence length; in step S6', the signal processing apparatus 1 determines the first sequence length from the target sequence length and the second sequence length.
Specifically, in step S5', the signal processing apparatus 1 takes the sequence length information of the zero-padded signal to be processed as the second sequence length. For example, as in the above example, in step S3 ', the signal processing apparatus 1 zero-fills the ZC root sequence to 1024, and in step S5', the signal processing apparatus 1 takes the sequence length information of the ZC root sequence after zero-filling as the second sequence length, that is, N2=1024。
In step S6', the signal processing apparatus 1 determines the first sequence length from the target sequence length and the second sequence length. For example, assuming that the signal processing device 1 obtains the target sequence length of the large-point fourier transform as N24576 in step S4', in the following example, the signal processing device 1 determines the second sequence length, that is, N, in step S5 ″2When the signal processing apparatus 1 is determined to be 1024, in step S6', the signal processing apparatus 1 may compare N/N2As the length of the first sequence, i.e. N1=24。
Preferably, the signal processing apparatus 1 further includes step S7 '(not shown), and in particular, in step S7', the signal processing apparatus 1 inserts a corresponding cyclic prefix in the resultant signal obtained by the large-point fourier transform for transmission via the PRACH. For example, assuming that in step S4 ', the target sequence length for which the signal processing apparatus 1 obtains the large-point fourier transform is N24576, then in step S7', the signal processing apparatus 1 inserts a corresponding cyclic prefix CP into a resultant signal y (N) through which the large-point fourier transform is performed in step S2 'on the ZC root sequence acquired in step S3' for transmission through the PRACH, as shown in fig. 3.
More preferably, in step S7', the signal processing apparatus 1 may further copy, when the corresponding preamble format includes format 2 or 3, the resultant signal obtained through the large-point fourier transform, and insert a corresponding cyclic prefix into the copied resultant signal for transmission via the PRACH. For example, assuming that in step S3 ', the ZC root sequence obtained by the signal processing device 1 is in preamble format 2 or 3 to generate a preamble sequence, and in step S4 ', the signal processing device 1 obtains a target sequence length of the large-point fourier transform as N2 × 24576, then in step S7 ', the signal processing device 1 will first copy the result signal obtained by performing the large-point fourier transform on the ZC root sequence obtained in step S3 ' in step S2 ', and then insert a corresponding cyclic prefix CP into the copied result signal for transmission via the PRACH, as shown in fig. 3.
It should be noted that the present invention may be implemented in software and/or in a combination of software and hardware, for example, as an Application Specific Integrated Circuit (ASIC), a general purpose computer or any other similar hardware device. In one embodiment, the software program of the present invention may be executed by a processor to implement the steps or functions described above. Also, the software programs (including associated data structures) of the present invention can be stored in a computer readable recording medium, such as RAM memory, magnetic or optical drive or diskette and the like. Further, some of the steps or functions of the present invention may be implemented in hardware, for example, as circuitry that cooperates with the processor to perform various steps or functions.
In addition, some of the present invention can be applied as a computer program product, such as computer program instructions, which when executed by a computer, can invoke or provide the method and/or technical solution according to the present invention through the operation of the computer. Program instructions which invoke the methods of the present invention may be stored on a fixed or removable recording medium and/or transmitted via a data stream on a broadcast or other signal-bearing medium and/or stored within a working memory of a computer device operating in accordance with the program instructions. An embodiment according to the invention herein comprises an apparatus comprising a memory for storing computer program instructions and a processor for executing the program instructions, wherein the computer program instructions, when executed by the processor, trigger the apparatus to perform a method and/or solution according to embodiments of the invention as described above.
It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned. Furthermore, it is obvious that the word "comprising" does not exclude other elements or steps, and the singular does not exclude the plural. A plurality of units or means recited in the apparatus claims may also be implemented by one unit or means in software or hardware. The terms first, second, etc. are used to denote names, but not any particular order.