CN103810079B - A kind of cue circuit and electronic equipment - Google Patents
A kind of cue circuit and electronic equipment Download PDFInfo
- Publication number
- CN103810079B CN103810079B CN201210454940.9A CN201210454940A CN103810079B CN 103810079 B CN103810079 B CN 103810079B CN 201210454940 A CN201210454940 A CN 201210454940A CN 103810079 B CN103810079 B CN 103810079B
- Authority
- CN
- China
- Prior art keywords
- tip element
- draw
- groove
- circuit
- electronic equipment
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000013078 crystal Substances 0.000 claims description 31
- 238000003860 storage Methods 0.000 claims description 25
- 230000005611 electricity Effects 0.000 claims description 9
- 238000011900 installation process Methods 0.000 abstract description 7
- 238000010586 diagram Methods 0.000 description 22
- 238000000034 method Methods 0.000 description 15
- 230000008569 process Effects 0.000 description 12
- 238000004590 computer program Methods 0.000 description 7
- 238000005516 engineering process Methods 0.000 description 4
- 230000008859 change Effects 0.000 description 3
- 230000006870 function Effects 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- CNQCVBJFEGMYDW-UHFFFAOYSA-N lawrencium atom Chemical compound [Lr] CNQCVBJFEGMYDW-UHFFFAOYSA-N 0.000 description 2
- 230000008901 benefit Effects 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Landscapes
- Power Sources (AREA)
Abstract
A kind of cue circuit of embodiment of the present invention offer and electronic equipment, this cue circuit can be provided with 2 or more than 2 processor systems at electronic equipment, during for draw-in groove or the internal memory of non-installation process device, this circuit can generate a cue effectively and timely, user can determine in whether this draw-in groove or this internal memory according to this cue and is supported, thus solve in prior art for including the system of multiple processor, when not installing whole processors, corresponding uninstalled processor PCIE expansion slot can not have PCIE signal, cannot support that PCIE device and memory slot cannot support internal memory, thus electronic equipment can not provide the technical problem of corresponding cue.
Description
Technical field
The present invention relates to electronic technology field, particularly relate to a kind of cue circuit and electronic equipment.
Background technology
Along with improving constantly of electronic technology, the expansion equipment of electronic equipment is also gradually increasing, such as in existing skill
Being provided with the expresscard slot of various standard on computer main board in art, wherein, Intel a new generation processor platform Romley puts down
PCIE expansion slot is integrated in CPU by platform, so for containing 2 or the system of the processor of more than 2, complete when not installing
During the processor in portion, PCIE (interface standard) expansion slot of corresponding uninstalled processor can not have PCIE signal, it is impossible to supports
PCIE device, contains the system of the processor of 2 or more than 2 similarly for memory bar, when not installing whole processors,
Corresponding uninstalled processor.
Therefore, inventor find in the practice of the invention existing in there are the following problems or defect:
For including the system of multiple processor, when not installing whole processors, corresponding uninstalled processor
PCIE expansion slot can not have PCIE signal, it is impossible to supports PCIE device, and memory slot cannot support internal memory, thus electronic equipment
The technical problem of the cue of correspondence can not be provided, in order to point out whether this slot of user can be used.
Summary of the invention
The invention provides a kind of cue circuit and electronic equipment, in order to solve in prior art for including multiple place
The system of reason device, when not installing whole processors, corresponding uninstalled processor PCIE expansion slot can not have PCIE signal,
Cannot support that PCIE device and memory slot cannot support internal memory, thus electronic equipment can not provide the skill of corresponding cue
Art problem, this technical scheme specifically includes:
A kind of cue circuit, is applied to one first electronic equipment, and described first electronic equipment includes a power supply and a CPU
Pin interface, the first draw-in groove, wherein, the first end of described first draw-in groove is connected with electronegative potential point, and described circuit includes:
First Tip element, one end is connected with described positive source；
First crystal tube module, the drain electrode of described first crystal tube module is connected with described first Tip element, and described
The source electrode of one transistor modular is connected with the second end of described first draw-in groove, and the grid of described first crystal tube module is with described
CPU pin interface connects；
Wherein, when inserting the first storage card in described CPU pin interface is low level and described first draw-in groove, then described
First Tip element output one first information, to point out whether the first draw-in groove described in user can be used.
Optionally, described circuit also includes:
Transistor seconds module, the drain electrode of described transistor seconds module and a positive source and described the first transistor
The grid of module connects, and the source electrode of described transistor seconds module is connected with the negative pole of described power supply, described transistor seconds mould
The grid of block is connected with described CPU pin interface.
Wherein, when described CPU pin interface is to insert the first storage card in high level and described first draw-in groove, the most described
One Tip element output one second information, to point out whether the first draw-in groove described in user can be used.
Optionally, described circuit also includes:
Second Tip element, one end is connected with the positive pole of described power supply；
Third transistor module, the drain electrode of described third transistor module is with the other end of described second Tip element even
Connecing, the source electrode of described third transistor module is connected with the negative pole of described power supply, the grid of described third transistor module and
Four transistor modular drain electrodes connect；
4th transistor modular, the drain electrode of described 4th transistor modular and power supply and described third transistor module
Grid connects, and the described source electrode of the 4th transistor modular is connected with the negative pole of described power supply, the grid of described 4th transistor modular
Pole is connected with described CPU pin interface.
Wherein, when inserting the first storage card in described CPU pin interface is low level and described first draw-in groove, then described
First Tip element output one first information, to point out the first draw-in groove described in user unavailable, described CPU pin interface is
When high level and described first draw-in groove insert the first storage card, the most described second Tip element output one second information,
Can use with the first draw-in groove described in prompting user.
Optionally, described circuit also includes:
Time control unit, is connected with described first Tip element and described second Tip element, for according to presetting
Described first Tip element and described second Tip element are closed by the time.
A kind of circuit, is applied to one first electronic equipment, and described first electronic equipment includes a power supply and a CPU pin
Interface, the first draw-in groove, wherein, the first end of described first draw-in groove is connected with electronegative potential point, and described circuit includes:
First Tip element；
Second Tip element；
Baseboard controller BMC, the first signal input part of described baseboard controller is connected with described CPU pin interface, the
Binary signal input is connected with the second end of described first draw-in groove, and the first signal output part is connected with described first Tip element,
Secondary signal outfan is connected with described second Tip element；
Wherein, when described first signal input part input low level signal, and input at described secondary signal input
When high level signal or low level, the most described first Tip element generates cue；When described first signal input part input
High level signal, during described secondary signal input input low level signal, described second Tip element generates signal.
Optionally, described circuit also includes:
Time control unit, is connected with described first Tip element and described second Tip element, for according to presetting
Time close described first Tip element and described second Tip element.
A kind of electronic equipment, described electronic equipment includes a power supply, CPU pin interface, the first draw-in groove, wherein, described the
First end of one draw-in groove is connected with electronegative potential point, and described electronic equipment also includes:
First Tip element, one end is connected with described positive source；
First crystal tube module, the drain electrode of described first crystal tube module is connected with described first Tip element, and described
The source electrode of one transistor modular is connected with the second end of described first draw-in groove, and the grid of described first crystal tube module is with described
CPU pin interface connects；
Wherein, when inserting the first storage card in described CPU pin interface is low level and described first draw-in groove, then described
First Tip element output one first information, to point out whether the first draw-in groove described in user can be used.
A kind of electronic equipment, described electronic equipment, described electronic equipment include a power supply and a CPU pin interface, the
One draw-in groove, wherein, the first end of described first draw-in groove is connected with electronegative potential point, and described electronic equipment also includes:
First Tip element；
Second Tip element；
Baseboard controller BMC, the first signal input part of described baseboard controller is connected with described CPU pin interface, the
Binary signal input is connected with the second end of described first draw-in groove, and the first signal output part is connected with described first Tip element,
Secondary signal outfan is connected with described second Tip element；
Wherein, when described first signal input part input low level signal, and input at described secondary signal input
When high level signal or low level, the most described first Tip element generates cue；When described first signal input part input
High level signal, during described secondary signal input input low level signal, described second Tip element generates signal.
A kind of cue circuit provided by the embodiment of the present invention can be provided with 2 or more than 2 at electronic equipment
Processor system, during for draw-in groove or the internal memory of non-installation process device, this circuit can generate a prompting letter effectively and timely
Number, user can determine in whether this draw-in groove or this internal memory according to this cue and is supported, thus solves existing skill
For including the system of multiple processor in art, when not installing whole processors, corresponding uninstalled processor PCIE expands
Exhibition groove can not have PCIE signal, it is impossible to support that PCIE device and memory slot cannot support internal memory, thus electronic equipment can not be given
Go out the technical problem of the cue of correspondence.And then achieve electronic equipment is provided with 2 or more than 2 processor systems
System, during for draw-in groove or the internal memory of non-installation process device, it is possible to realize whether effectively pointing out this draw-in groove to this draw-in groove
Available.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of a kind of cue circuit of the embodiment of the present invention；
Fig. 2 is principles of signal processing figure in the embodiment of the present invention；
Fig. 3 is the cue circuit figure that in the embodiment of the present invention, processor is installed；
Fig. 4 is the circuit theory diagrams in the embodiment of the present invention；
Fig. 5 is embodiment of the present invention one cue circuit figure；
Fig. 6 is NOT gate logic circuit handling principle figure in the embodiment of the present invention；
Fig. 7 is NAND gate logic circuit handling principle figure in the embodiment of the present invention；
Fig. 8 is the truth table that in this circuit, cue generates；
Fig. 9 is the circuit diagram that in the embodiment of the present invention, this cue circuit is applied to expansion card；
Figure 10 is another circuit diagram that in the embodiment of the present invention, this cue circuit is applied to expansion card；
Figure 11 is another cue circuit schematic diagram of the embodiment of the present invention；
Figure 12 is the concrete structure schematic diagram of a kind of electronic equipment of the embodiment of the present invention；
Figure 13 is the concrete structure schematic diagram of embodiment of the present invention another kind electronic equipment.
Detailed description of the invention
The invention provides a kind of cue circuit, this circuit is applied in one first electronic equipment, this first electronic equipment
Including a power supply and a CPU pin interface, the first draw-in groove, the first end of the first draw-in groove is connected with electronegative potential point, described circuit
Including: the first Tip element, one end is connected with described positive source；First crystal tube module, the first end of first crystal module
Being connected with the first Tip element, the second end of first crystal tube module and the first end of the first draw-in groove connect, first crystal module
The 3rd end be connected with CPU pin interface；Wherein, in CPU pin interface is low level and the first draw-in groove, the first storage is inserted
During card, then the first Tip element output one first information, to point out whether the first draw-in groove described in user can be used.In order to solve
For including the system of multiple processor in prior art, when not installing whole processors, corresponding uninstalled processor
PCIE expansion slot can not have PCIE signal, it is impossible to supports PCIE device and memory slot cannot support internal memory, thus electronic equipment
The technical problem of the cue of correspondence can not be given.
Below by accompanying drawing and specific embodiment, technical solution of the present invention is described in detail, it will be appreciated that this
Technical characteristic in bright embodiment and embodiment is the detailed description to technical solution of the present invention, in situation about not conflicting
Under, the technical characteristic in the embodiment of the present invention and embodiment can be mutually combined.
In the application of this circuit of the embodiment of the present invention with an electronic equipment, this electronic equipment includes a power supply and
CPU pin interface, the first draw-in groove, wherein, the first end of the first draw-in groove is connected with electronegative potential point, also includes in certain electronic equipment
One cue circuit.
Being illustrated in figure 1 the schematic diagram of a kind of cue circuit of the embodiment of the present invention, this cue circuit includes:
First Tip element 101, one end is connected with power supply 102 positive pole；
First crystal tube module 103, the first end and first Tip element 101 of this first crystal tube module 103 connect, and are somebody's turn to do
First end of the second end of first crystal tube module 103 and the first draw-in groove 104 connects, the 3rd end of this first crystal tube module with
CPU pin interface 105 connects.
Wherein, when inserting the first storage card in CPU pin interface 105 is for low level and the first draw-in groove 104, then this first
Tip element 101 exports the first information, to point out whether user's the first draw-in groove 104 can be used.
Specifically, when this electronic equipment there are two or more processor, or set at this electronics
In Bei during non-installation process device, now CPU pin interface 105 is low level signal, and the grid of the first transistor 103 receives low
Level signal, and the source electrode of the first transistor 103 is connected with the positive pole of power supply, thus in the source electrode reception of the first transistor 103
To high level signal, after receiving above-mentioned two signal, when storage card or other equipment are inserted into first by user
Time in draw-in groove 104, the pin of this first draw-in groove 104 will be connected with electronegative potential, therefore, will pass through at the first Tip element 101
One high level signal, principles of signal processing figure the most as shown in Figure 2, in this figure, the first transistor 103 is equivalent to a not gate and patrols
Collecting circuit, when not installing CPU in electronic equipment, now, one end of NOT gate logic circuit will receive a low level signal, logical
After crossing the conversion of NOT gate logic circuit, the other end of this NOT gate logic circuit will export high level signal, and at non-gate logic
The other end of circuit connects the first Tip element 101, the first Tip element 101 after receiving this high level signal, so
First Tip element 101 will generate a cue, and in implementing, this first Tip element 101 can be a sound
Tip element or a light emitting diode, this first Tip element 101 is set to light emitting diode in embodiments of the present invention.
Therefore, electronic equipment can be provided with 2 or more than 2 processor systems by above-mentioned cue circuit,
When draw-in groove or the internal memory of non-installation process device, this circuit can generate a cue effectively and timely, and user can root
Determine in whether this draw-in groove or this internal memory according to this cue and be supported, thus solve in prior art many for including
The system of individual processor, when not installing whole processors, corresponding uninstalled processor PCIE expansion slot can not have PCIE
Signal, it is impossible to support that PCIE device and memory slot cannot support internal memory, thus electronic equipment can not provide the prompting letter of correspondence
Number technical problem.
It addition, in the case of CPU in the electronic device is mounted, its circuit diagram, by corresponding adjustment, is illustrated in figure 3
The cue circuit figure that processor is installed, this circuit diagram includes:
Transistor seconds module 301, the first end of this transistor seconds module 301 and positive source and the first transistor
The three-terminal link of module 301, the second end of this transistor seconds module 301 is connected with the negative pole of power supply, this transistor seconds
3rd end of module 301 is connected with CPU pin interface 105.
Wherein, the signal of this CPU pin interface 105 output is high level signal, and inserts first in the first draw-in groove 104
During storage card, then this first Tip element 101 will export the second cue, and this cue is used for pointing out user the first draw-in groove
Whether 104 can use.
Specifically, this cue circuit adds transistor seconds module 301 to be equivalent on the basis of former cue circuit
Upper interpolation one logic circuit, such as, cue circuit in FIG is a NOT gate logic circuit, now, adds in the circuit
Transistor seconds module 301, i.e. adds another NOT gate logic circuit, electricity the most as shown in Figure 4 in former NOT gate logic circuit
Road schematic diagram, is made up of two NOT gate logic circuits in the figure, and for being connected in series between two NOT gate logic circuits, non-
One end of gate logic is connected with CPU pin interface 105, and the other end is then connected with the first Tip element 101, when user will deposit
When card storage is inserted in the first draw-in groove 104, now, CPU will export a high level signal, when through transistor seconds module 301 it
After, this high level signal will be converted into low level signal, and this low level signal will be transmitted to first crystal tube module
103, then this low level signal is converted to high level signal by this first crystal tube module 103, finally by this high level signal
It is transferred to the first Tip element 103, thus the first Tip element 103 is after receiving this high level signal, this first prompting
Unit 103 will generate an information, thus point out whether this first draw-in groove 104 of this user can be used.
It is obvious that first crystal tube module 103 and transistor seconds module 301 all play in embodiments of the present invention
Reverse process effect to signal, is equivalent to NOT gate logic circuit.
Further, in embodiments of the present invention, can also is that in the circuit and two kinds of prompting modes are combined, from
And form a complete cue circuit.
Being illustrated in figure 5 embodiment of the present invention one cue circuit figure, this circuit includes:
Second Tip element 501, one end is connected with the positive pole of power supply 102；
Third transistor module 502, the first end of third transistor module 502 is connected with the positive pole of described power supply 102, the
Second end of three transistor modulars 502 is connected with the negative pole of power supply 102, the 3rd end of third transistor module and the 4th transistor
Module 503 first end connects；
4th transistor modular 503, the first end of the 4th transistor modular 503 and power supply 102 and the 3rd crystal module
The three-terminal link of 502, the second end of the 4th transistor modular 503 is connected with the negative pole of power supply 102, the 4th transistor modular
3rd end of 503 is connected with described CPU pin interface 105.
Wherein, when inserting the first storage card in described CPU pin interface 105 is for low level and described first draw-in groove 104,
The most described first Tip element 101 exports one first information, to point out the first draw-in groove 104 described in user unavailable, described
When CPU pin interface 105 is for inserting the first storage card in high level and described first draw-in groove 104, the most described second Tip element
501 output one second informations, to point out the first draw-in groove described in user to use.
Specifically, in the circuit, the first Tip element 101 and the second Tip element 501 are all light emitting diode, but
Be the first Tip element 101 be red light emitting diodes, the second Tip element 501 is green LED, when the first draw-in groove
When being not inserted into any storage card or other equipment in 104, this first Tip element 101 and the second Tip element 501 will not
Have any information to generate.
When user by storage card or other may be inserted into the peripheral in the first draw-in groove 104 time, then this circuit will have
Corresponding information generates, and when CPU does not installs, then this CPU pin interface 105 will have the generation of a low level signal,
And after this low level signal will be changed by the signal of the 4th transistor modular 503 and third transistor module 502, should
Second Tip element 501 will receive a low level signal, so this second Tip element 501 will not have any prompting
Information generates, and this low level signal is also by through transistor seconds module 301 and the signal of first crystal tube module 103 simultaneously
Conversion, upon the transition, this first crystal tube module 103 will export a high level signal, and this first Tip element 101 will receive
To a high level signal, so this first Tip element 101 is by corresponding generation one first cue, this first cue
For pointing out this first draw-in groove 104 of user unavailable.
The generation process of this cue can illustrate with following logic circuit, first for, in the circuit,
This CPU pin interface 105 connects a not circuit (as shown in Figure 6), and then the other end of this not circuit connects the second prompting
Unit 501, when there being CPU to install, when this CPU pin interface 105 (the A point in Fig. 6) is low level signal, this low level signal
Be converted to high level signal through NOT gate logic circuit, thus this second Tip element 501 will receive a high level signal, when
When user inserts storage card in the first draw-in groove, this second Tip element 501 will generate an information, and this cue is used for
Pointing out with this first draw-in groove 104 is available draw-in groove, if certain user does not insert storage card in the first draw-in groove 104, the most not
Have any information to generate.
Certainly, when CPU does not installs, then this CPU pin interface 105 is by output one high level signal, thus this high level
Signal is by after a NOT gate logic circuit, and this NOT gate logic circuit is by corresponding generation one low level signal, and then second carries
Showing that unit 501 will receive a low level signal, now, the second Tip element 501 can also be not generate any prompting letter
Breath.
For the first Tip element 101, after being mounted with CPU in this electronic equipment, this first Tip element 101 will not
Having any information to generate, when not installing CPU in this electronic equipment, this CPU pin interface 105 will generate a high electricity
Ordinary mail number (A point as shown in Figure 7), this high level signal will be transmitted to an AND gate, then, if user will be for depositing
When card storage is inserted in the first draw-in groove 104, then will generate a high level signal (B as shown in Figure 7 on the first draw-in groove 104
Point), then this high level signal will be by a NOT gate logic circuit, and then high level signal is converted to by this NOT gate logic circuit
Low level signal, is then transferred to AND gate by this low level signal, then should by the output of this AND gate
Low level signal is to the first Tip element 101, and receive due to the first Tip element 101 is low level signal, so first carries
Show that unit 101 will not generate information.
After user inserts the storage card of correspondence in the first draw-in groove, the first draw-in groove in this circuit will generate a low electricity
Ordinary mail number, after being then passed through NOT gate logic circuit, this NOT gate logic circuit will generate a high level signal, and by this height electricity
Ordinary mail number output is to AND gate.Thus AND gate is after receiving two high level signals, should patrol with door
Collect circuit also by corresponding output one high level signal, finally this high level signal is exported to the first Tip element 101, thus
First Tip element 101 will generate a cue, and this cue is used for pointing out this first draw-in groove 104 of user unavailable.Fig. 8
The truth table generated for cue in this circuit, this truth table can be used in representing the signal processing of this NAND gate logic circuit
Process, wherein, A characterizes CPU pin interface 105, and B characterizes the first draw-in groove 104, and X is the second Tip element 101, and Y is the second prompting
Unit 501,1 characterizes high level and does not installs CPU；0 low level and be provided with CPU.
Further, for being more widely applied of cue circuit, and cue circuit can give user prompting timely,
Therefore, this cue circuit is also applied in an expansion card, is illustrated in figure 9 in the embodiment of the present invention application of this cue circuit
To the circuit diagram of expansion card, this circuit diagram includes:
First Tip element 901；
Second Tip element 902；
Expansion card 903；
Wherein, one end of the first Tip element 901 connects a resistance, then with the second draw-in groove 904 on expansion card 903 even
Connecing, one end that the other end of the first Tip element 901 is connected with another resistance connects, then the other end of this resistance and expansion card
The seam of 903 connects, and in like manner, the second Tip element 902 on this expansion card 903 and the first Tip element 901 are at expansion card
Connected mode on 903 is identical, does not repeats at this.
It addition, the mode of the cue generating principle that is arranged on expansion card 903 of this cue circuit and prompting is with front
Cue circuit described in face is identical, does not therefore repeat at this.
Further, this cue circuit can also is that between the first Tip element 901 and the second draw-in groove 904 and second carries
Showing and arrange switch between unit 902 and the second draw-in groove 904, the selection that this switch may be used for according to user is pointed out, specifically
Attachment structure is as shown in Figure 10.
This switch 114 is arranged on expansion card 904, and arranges in the circuit loop with the first Tip element 901, switch
115 are arranged on expansion card 904, and arrange in the circuit loop with the second Tip element 902.Thus this cue circuit is permissible
Demand according to user does the prompting of correspondence.
It addition, the embodiment of the present invention additionally provides a kind of cue circuit, for the embodiment of the present invention, another carries as shown in figure 11
Showing circuit diagram, this circuit includes:
First Tip element 120；
Second Tip element 121；
Baseboard controller BMC122, the first signal input part of described baseboard controller 122 and described CPU pin interface
105 connect, and secondary signal input is connected with described first end of described first draw-in groove 104, and the first signal output part is with described
First Tip element 120 connects, and secondary signal outfan is connected with described second Tip element 121；
Wherein, when described first signal input part input low level signal, and input at described secondary signal input
When high level signal or low level, the most described first Tip element 120 generates cue；When described first signal input part is defeated
Entering high level signal, during described secondary signal input input low level signal, described second Tip element 121 generates signal.
Herein, the generating principle of the cue of baseboard controller 122 with in Fig. 5 to realize principle identical, therefore, do not do superfluous at this
State.
A kind of cue circuit in the corresponding embodiment of the present invention, the embodiment of the present invention additionally provides a kind of electronic equipment, as
Figure 12 is the concrete structure schematic diagram of a kind of electronic equipment of the embodiment of the present invention, and this electronic equipment includes that a power supply 133, CPU manage
Foot interface the 134, first draw-in groove 135, wherein, the first end of the first draw-in groove 135 is connected with electronegative potential point, and described electronic equipment also wraps
Include:
First Tip element 131, one end is connected with described power supply 133 positive pole；
First crystal tube module 132, the first end of described first crystal module 132 is with described first Tip element 131 even
Connecing, the second end of described first crystal tube module 132 is connected with described first end of described first draw-in groove 135, and described first is brilliant
3rd end of module 132 is connected with described CPU pin interface 134；
Wherein, in described CPU pin interface 134 is low level and described first draw-in groove during 135 insertion the first storage card,
The most described first Tip element 131 exports one first information, to point out whether the first draw-in groove 135 described in user can be used.
A kind of cue circuit in the corresponding embodiment of the present invention, the embodiment of the present invention additionally provides another kind of electronic equipment,
Such as the concrete structure schematic diagram that Figure 13 is embodiment of the present invention another kind electronic equipment, described first electronic equipment, described first
Electronic equipment includes power supply 144 and CPU pin interface 145, first draw-in groove 146, wherein, described first draw-in groove 146
First end is connected with electronegative potential point, and described electronic equipment also includes:
First Tip element 141；
Second Tip element 142；
Baseboard controller BMC143, the first signal input part of described baseboard controller 143 and described CPU pin interface
145 connect, and secondary signal input is connected with described first end of described first draw-in groove 146, and the first signal output part is with described
First Tip element 141 connects, and secondary signal outfan is connected with described second Tip element 142；
Wherein, when described first signal input part input low level signal, and input at described secondary signal input
When high level signal or low level, the most described first Tip element 141 generates cue；When described first signal input part is defeated
Entering high level signal, during described secondary signal input input low level signal, described second Tip element 142 generates signal.
At least there is following technique effect or advantage in one or more embodiment that the present invention provides:
A kind of cue circuit provided by the embodiment of the present invention can be provided with 2 or more than 2 at electronic equipment
Processor system, during for draw-in groove or the internal memory of non-installation process device, this circuit can generate a prompting letter effectively and timely
Number, user can determine in whether this draw-in groove or this internal memory according to this cue and is supported, thus solves existing skill
For including the system of multiple processor in art, when not installing whole processors, corresponding uninstalled processor PCIE expands
Exhibition groove can not have PCIE signal, it is impossible to support that PCIE device and memory slot cannot support internal memory, thus electronic equipment can not be given
Go out the technical problem of the cue of correspondence.And then achieve electronic equipment is provided with 2 or more than 2 processor systems
System, during for draw-in groove or the internal memory of non-installation process device, it is possible to realize whether effectively pointing out this draw-in groove to this draw-in groove
Available.
Those skilled in the art are it should be appreciated that embodiments of the invention can be provided as method, system or computer program
Product.Therefore, the reality in terms of the present invention can use complete hardware embodiment, complete software implementation or combine software and hardware
Execute the form of example.And, the present invention can use at one or more computers wherein including computer usable program code
The upper computer program product implemented of usable storage medium (including but not limited to disk memory, CD-ROM, optical memory etc.)
The form of product.
The present invention is with reference to method, equipment (system) and the flow process of computer program according to embodiments of the present invention
Figure and/or block diagram describe.It should be understood that can the most first-class by computer program instructions flowchart and/or block diagram
Flow process in journey and/or square frame and flow chart and/or block diagram and/or the combination of square frame.These computer programs can be provided
Instruction arrives the processor of general purpose computer, special-purpose computer, Embedded Processor or other programmable data processing device to produce
A raw machine so that the instruction performed by the processor of computer or other programmable data processing device is produced for real
The device of the function specified in one flow process of flow chart or multiple flow process and/or one square frame of block diagram or multiple square frame now.
These computer program instructions may be alternatively stored in and computer or other programmable data processing device can be guided with spy
Determine in the computer-readable memory that mode works so that the instruction being stored in this computer-readable memory produces and includes referring to
Make the manufacture of device, this command device realize at one flow process of flow chart or multiple flow process and/or one square frame of block diagram or
The function specified in multiple square frames.
These computer program instructions also can be loaded in computer or other programmable data processing device so that at meter
Perform sequence of operations step on calculation machine or other programmable devices to produce computer implemented process, thus at computer or
The instruction performed on other programmable devices provides for realizing at one flow process of flow chart or multiple flow process and/or block diagram one
The step of the function specified in individual square frame or multiple square frame.
Although preferred embodiments of the present invention have been described, but those skilled in the art once know basic creation
Property concept, then can make other change and amendment to these embodiments.So, claims are intended to be construed to include excellent
Select embodiment and fall into all changes and the amendment of the scope of the invention.
Obviously, those skilled in the art can carry out various change and modification without deviating from this to the present invention
Bright spirit and scope.So, if the present invention these amendment and modification belong to the claims in the present invention and
Within the scope of equivalent technologies, then the present invention is also intended to comprise these change and modification.
Claims (8)
1. a cue circuit, is applied to one first electronic equipment, and described first electronic equipment includes a power supply and CPU pipe
Foot interface, the first draw-in groove, wherein, the first end of described first draw-in groove is connected with electronegative potential point, it is characterised in that described circuit bag
Include:
First Tip element, one end is connected with described positive source；
First crystal tube module, the drain electrode of described first crystal tube module is connected with described first Tip element, and described first is brilliant
The source electrode of body tube module is connected with the second end of described first draw-in groove, and the grid of described first crystal tube module is managed with described CPU
Foot interface connects；
Wherein, when inserting the first storage card in described CPU pin interface is low level and described first draw-in groove, the most described first
Tip element output one first information, to point out whether the first draw-in groove described in user can be used.
2. circuit as claimed in claim 1, it is characterised in that described circuit also includes:
Transistor seconds module, the drain electrode of described transistor seconds module and a positive source and described first crystal tube module
Grid connect, the source electrode of described transistor seconds module is connected with the negative pole of described power supply, described transistor seconds module
Grid is connected with described CPU pin interface；
Wherein, when described CPU pin interface is to insert the first storage card in high level and described first draw-in groove, the most described first carries
Show that unit exports one second information, to point out whether the first draw-in groove described in user can be used.
3. circuit as claimed in claim 2, it is characterised in that described circuit also includes:
Second Tip element, one end is connected with the positive pole of described power supply；
Third transistor module, the drain electrode of described third transistor module is connected with the other end of described second Tip element, institute
The negative pole of the source electrode and described power supply of stating third transistor module is connected, the grid of described third transistor module and the 4th crystal
Tube module drain electrode connects；
4th transistor modular, the drain electrode of described 4th transistor modular and power supply and the grid of described third transistor module
Connect, the described source electrode of the 4th transistor modular is connected with the negative pole of described power supply, the grid of described 4th transistor modular and
Described CPU pin interface connects；
Wherein, when inserting the first storage card in described CPU pin interface is low level and described first draw-in groove, the most described first
Tip element output one first information, to point out the first draw-in groove described in user unavailable, described CPU pin interface is high electricity
When putting down and insert the first storage card in described first draw-in groove, the most described second Tip element output one second information, to carry
Show that described in user, the first draw-in groove can be used.
4. circuit as claimed in claim 3, it is characterised in that described circuit also includes:
Time control unit, is connected with described first Tip element and described second Tip element, for according to Preset Time
Described first Tip element and described second Tip element are closed.
5. a circuit, it is characterised in that be applied to one first electronic equipment, described first electronic equipment include a power supply and
One CPU pin interface, the first draw-in groove, wherein, the first end of described first draw-in groove is connected with electronegative potential point, and described circuit includes:
First Tip element；
Second Tip element；
Baseboard controller BMC, the first signal input part of described baseboard controller is connected with described CPU pin interface, the second letter
Number input is connected with the second end of described first draw-in groove, and the first signal output part is connected with described first Tip element, and second
Signal output part is connected with described second Tip element；
Wherein, when described first signal input part input low level signal, and at the high electricity of described secondary signal input input
When ordinary mail number or low level, the most described first Tip element generates cue；When the described first high electricity of signal input part input
Ordinary mail number, during described secondary signal input input low level signal, described second Tip element generates signal.
6. circuit as claimed in claim 5, it is characterised in that described circuit also includes:
Time control unit, is connected with described first Tip element and described second Tip element, for according to preset time
Between close described first Tip element and described second Tip element.
7. an electronic equipment, it is characterised in that described electronic equipment includes a power supply, CPU pin interface, the first draw-in groove, its
In, the first end of described first draw-in groove is connected with electronegative potential point, and described electronic equipment also includes:
First Tip element, one end is connected with described positive source；
First crystal tube module, the drain electrode of described first crystal tube module is connected with described first Tip element, and described first is brilliant
The source electrode of body tube module is connected with the second end of described first draw-in groove, and the grid of described first crystal tube module is managed with described CPU
Foot interface connects；
Wherein, when inserting the first storage card in described CPU pin interface is low level and described first draw-in groove, the most described first
Tip element output one first information, to point out whether the first draw-in groove described in user can be used.
8. an electronic equipment, it is characterised in that described electronic equipment, described electronic equipment includes a power supply and CPU pipe
Foot interface, the first draw-in groove, wherein, the first end of described first draw-in groove is connected with electronegative potential point, and described electronic equipment also includes:
First Tip element；
Second Tip element；
Baseboard controller BMC, the first signal input part of described baseboard controller is connected with described CPU pin interface, the second letter
Number input is connected with the second end of described first draw-in groove, and the first signal output part is connected with described first Tip element, and second
Signal output part is connected with described second Tip element；
Wherein, when described first signal input part input low level signal, and at the high electricity of described secondary signal input input
When ordinary mail number or low level, the most described first Tip element generates cue；When the described first high electricity of signal input part input
Ordinary mail number, during described secondary signal input input low level signal, described second Tip element generates signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210454940.9A CN103810079B (en) | 2012-11-13 | 2012-11-13 | A kind of cue circuit and electronic equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210454940.9A CN103810079B (en) | 2012-11-13 | 2012-11-13 | A kind of cue circuit and electronic equipment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103810079A CN103810079A (en) | 2014-05-21 |
| CN103810079B true CN103810079B (en) | 2016-12-28 |
Family
ID=50706878
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201210454940.9A Active CN103810079B (en) | 2012-11-13 | 2012-11-13 | A kind of cue circuit and electronic equipment |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN103810079B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110008151B (en) * | 2019-03-27 | 2020-12-18 | 联想(北京)有限公司 | Electronic device, data transmission device and data transmission method |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5812762A (en) * | 1995-03-31 | 1998-09-22 | Samsung Electronics Co., Ltd. | Personal computer having card read/write controller |
| CN1503132A (en) * | 2002-11-21 | 2004-06-09 | ��ʢ���ӹɷ�����˾ | Testing device for computer mainboard input/output port |
| CN101212139A (en) * | 2006-12-29 | 2008-07-02 | 鸿富锦精密工业（深圳）有限公司 | Motherboard power supply protection circuit |
| CN201449603U (en) * | 2008-12-29 | 2010-05-05 | 深圳市先冠电子有限公司 | AMD platform main board for supporting dual-mode internal storage and automatically identifying CPU type |
| CN201805437U (en) * | 2010-10-14 | 2011-04-20 | 环达电脑(上海)有限公司 | Detection device of baseplate management controller |
| CN102203742A (en) * | 2008-10-29 | 2011-09-28 | 惠普开发有限公司 | Component installation guide |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6501660B1 (en) * | 2001-06-22 | 2002-12-31 | Sun Microsystems, Inc. | Reliable card detection in a CPCI system |
-
2012
- 2012-11-13 CN CN201210454940.9A patent/CN103810079B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5812762A (en) * | 1995-03-31 | 1998-09-22 | Samsung Electronics Co., Ltd. | Personal computer having card read/write controller |
| CN1503132A (en) * | 2002-11-21 | 2004-06-09 | ��ʢ���ӹɷ�����˾ | Testing device for computer mainboard input/output port |
| CN101212139A (en) * | 2006-12-29 | 2008-07-02 | 鸿富锦精密工业（深圳）有限公司 | Motherboard power supply protection circuit |
| CN102203742A (en) * | 2008-10-29 | 2011-09-28 | 惠普开发有限公司 | Component installation guide |
| CN201449603U (en) * | 2008-12-29 | 2010-05-05 | 深圳市先冠电子有限公司 | AMD platform main board for supporting dual-mode internal storage and automatically identifying CPU type |
| CN201805437U (en) * | 2010-10-14 | 2011-04-20 | 环达电脑(上海)有限公司 | Detection device of baseplate management controller |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103810079A (en) | 2014-05-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102087621B (en) | Processor device with self-diagnosis function | |
| CN102024066B (en) | Method of Automatically Generating Analog Circuit Schematic Diagram from Analog Circuit Netlist | |
| US20140298068A1 (en) | Distribution of power gating controls for hierarchical power domains | |
| CN106531654B (en) | A chip input pin testing method and device | |
| CN102203742B (en) | Component installation guide | |
| KR20110023836A (en) | Computer assembling method, computer and controller board | |
| CN105472846A (en) | Lamplight controller and lamplight control method | |
| CN109189203A (en) | Server power saving apparatus and its power-saving method | |
| CN103793483B (en) | Clock tree generating method and system based on clock node clusters | |
| CN109815619B (en) | Method for converting synchronous circuit into asynchronous circuit | |
| CN106326154A (en) | Control circuit and control method of hard disk address | |
| CN107832078A (en) | FPGA program online updating circuits based on DSP | |
| CN103810079B (en) | A kind of cue circuit and electronic equipment | |
| CN102789521B (en) | Method and system for verifying integrated circuit pipeline design, and model implementation method of integrated circuit pipeline | |
| CN114896919B (en) | FPGA-based integrated circuit prototype verification system and method | |
| CN108228185A (en) | A kind of plug in software module metaplasia is into method and apparatus | |
| US9378027B2 (en) | Field-programmable module for interface bridging and input/output expansion | |
| CN109582371A (en) | low-power-consumption awakening method and device | |
| CN109086191A (en) | The lighting system and method for machine box for server front panel network indicator light | |
| CN201708785U (en) | System for realizing real-time dynamic configuration of FPGA | |
| CN108874635A (en) | A kind of double indicator light parameter module control methods of more hard disks based on CPLD/FPGA | |
| CN104217620B (en) | Nuclear power plant full-scope simulator auxiliary operation panel lamp test system and method | |
| JP4738216B2 (en) | Semiconductor integrated circuit device and circuit insertion method thereof | |
| CA3213923C (en) | Electric power transmission system, method for transmission of electric power and plug-in inverter | |
| CN117632420A (en) | Timing checking method and device based on state driving, electronic equipment and storage medium |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |