CN103560759A - Low-power channel power amplifier provided with heterojunction bipolar transistor - Google Patents
Low-power channel power amplifier provided with heterojunction bipolar transistor Download PDFInfo
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Abstract
The invention discloses a power amplifier. A first channel for realizing a low-power mode comprises a heterojunction bipolar transistor which is very small in size, so that the static current of the heterojunction bipolar transistor can be reduced to 3.0 mA, and high power accessory efficiency is realized while low-power output is realized.
Description
Technical field
The present invention relates to power electronic equipment technical field, relate in particular to a kind of power amplifier.
Background technology
Power amplifier (RFPA) is applied in various Wireless Telecom Equipments and electronic system widely, as mobile phone, router or other mobile terminals etc.For example be applied to the power amplifier in mobile phone, for amplifying the input signal having modulated, and export load to after obtaining the power output meeting the demands.Electromagnetic Wave Propagation between mobile phone and base station is not only subject to the impact of communication distance, is also subject to the impact of landform, atural object; Basicly stable in order to make to arrive the signal magnitude of base station, therefore the power amplifier in mobile phone circuit generally can have many power modes.Conventional power mode is generally divided into three kinds: high-power mode, middle power mode and low-power mode.
Traditional multimode power amplifier circuit as shown in Figure 1, when high-power mode, only has the first switch S 1 conducting, high-power passage conducting; During central power mode, only have second switch S2 and the 4th switch S 4 conductings, middle power flow conducting; When low-power mode, only have the 3rd switch S 3 and the 5th switch S 5 conductings, the conducting of low-power path.
Due to no matter be in city or suburbs, good base station coverage rate makes mobile phone often with lower power input service, therefore for to guarantee in the situation that not improving battery capacity, the service time of extending cell phone battery, the efficiency while improving low-power output has become the very important designing requirement of mobile phone power amplifier.
Summary of the invention
In view of this, the invention provides a kind of power amplifier, the problem that efficiency has much room for improvement when solving the output of low-power in prior art.
To achieve these goals, the existing scheme proposing is as follows:
, comprising: the first path, for realizing low-power mode; Described the first path comprises heterojunction bipolar transistor.
Preferably, also comprise:
The alternate path being connected in parallel with described the first path;
The control circuit being connected with described the first path and alternate path respectively, for control the bias voltage of described the first path and alternate path by VM0/VM1 pattern, so that described power amplifier is realized high-power mode, middle power mode or low-power mode;
The power supply circuits that are connected with described the first path and alternate path respectively;
Be connected in the first matching network between described power supply circuits and described the first path or alternate path, for perfectly straight stream every exchanging or transforming impedance;
Described the first path also comprises: be connected in the second matching network between described heterojunction bipolar transistor collector electrode and described the first path output.
Preferably, the base stage of described heterojunction bipolar transistor is as the input of described the first path; The base stage of described heterojunction bipolar transistor is connected with described control circuit; The collector electrode of described heterojunction bipolar transistor is connected with described power supply circuits; The grounded emitter of described heterojunction bipolar transistor;
Described alternate path comprises:
Input is as the driving stage of described alternate path input; The feeder ear of described driving stage is connected with described power supply circuits; The control end of described driving stage is connected with described control circuit;
The first power stage that input is connected with described driving stage output; The feeder ear of described the first power stage is connected with described power supply circuits; The control end of described the first power stage is connected with described control circuit;
The second power stage that input is connected with described the first power stage output; The feeder ear of described the second power stage is connected with described the first matching network; The control end of described the second power stage is connected with described control circuit; The output of described the second power stage is the output of described alternate path.
Preferably, described the first path also comprises:
Be connected in the first switch between described the first path input and described heterojunction bipolar transistor base stage;
Be connected in the second switch between described the second matching network and described the first path output;
Described alternate path also comprises:
Be connected in the 3rd switch between described alternate path input and described driving stage input.
Preferably, described the first path also comprises:
Be connected in the 3rd matching network between described the first path input and described heterojunction bipolar transistor base stage;
Described alternate path also comprises:
Be connected in the 4th matching network between described alternate path input and described driving stage input;
Be connected in the 5th matching network between described the first power stage output and described the second power stage input;
Described power amplifier also comprises:
The 6th matching network being connected with described the first path and alternate path output in parallel.
Preferably, described the first path also comprises:
The first power stage that input is connected with described heterojunction bipolar transistor collector electrode; Described the first power stage feeder ear is connected with described power supply circuits; The control end of described the first power stage is connected with described control circuit;
Described heterojunction bipolar transistor base stage is as the input of described the first path; The base stage of described heterojunction bipolar transistor is connected with described control circuit; The collector electrode of described heterojunction bipolar transistor is connected with described the first matching network; The grounded emitter of described heterojunction bipolar transistor.
Preferably, described alternate path comprises:
Input is as the driving stage of described alternate path input; The feeder ear of described driving stage is connected with described power supply circuits; The control end of described driving stage is connected with described control circuit;
The second power stage that input is connected with described driving stage output; The feeder ear of described the second power stage is connected with described power supply circuits; The control end of described the second power stage is connected with described control circuit; The output of described the second power stage is the output of described alternate path.
From above-mentioned technical scheme, can find out, power amplifier disclosed by the invention, describedly for realizing the first path of low-power mode, comprise heterojunction bipolar transistor, because of described heterojunction bipolar transistor small-sized, can make its quiescent current be reduced to 3.0mA, when meeting low-power output, realize high power annex efficiency.
Accompanying drawing explanation
In order to be illustrated more clearly in the embodiment of the present invention or technical scheme of the prior art, to the accompanying drawing of required use in embodiment or description of the Prior Art be briefly described below, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skills, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the power amplifier circuit figure of prior art;
Fig. 2 is the disclosed power amplifier circuit figure of the embodiment of the present invention;
Fig. 3 is the disclosed power amplifier circuit figure of another embodiment of the present invention;
Fig. 4 is the disclosed power amplifier circuit figure of another embodiment of the present invention;
Fig. 5 is the disclosed power amplifier circuit figure of another embodiment of the present invention;
Fig. 6 is the disclosed power amplifier circuit figure of another embodiment of the present invention;
Fig. 7 is the disclosed power amplifier circuit figure of another embodiment of the present invention;
Fig. 8 is the disclosed power amplifier circuit figure of another embodiment of the present invention.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described, obviously, described embodiment is only the present invention's part embodiment, rather than whole embodiment.Embodiment based in the present invention, those of ordinary skills, not making the every other embodiment obtaining under creative work prerequisite, belong to the scope of protection of the invention.
The invention provides a kind of power amplifier, the problem that efficiency has much room for improvement when solving the output of low-power in prior art.
Concrete, as shown in Figure 2, comprising: the first path 101, for realizing low-power mode; The first path 101 comprises heterojunction bipolar transistor Q1.
Concrete operation principle is:
Power amplifier generally has high-power mode, middle power mode and low-power mode, so that it is basicly stable to arrive the signal magnitude of base station.In prior art, exist by PHEMT(pseudomorphic high-electron-mobility transistor, a kind of radio frequency GaAs Power transistor that utilizes the special epitaxial loayer manufacture of growing on GaAs) switch that device is realized, also utilize HBT (Heterojunction bipolar transistor, InGaP base heterojunction bipolar transistor) device, even if there is now the nesistor Bi FET technique of mixed mode, but it still exists cost high, inefficient problem; Especially, at present general good base station coverage rate, make mobile phone often with lower power input service, therefore for to guarantee in the situation that not improving battery capacity, the service time of extending cell phone battery, the efficiency while improving low-power output has become the very important designing requirement of mobile phone power amplifier.
The power amplifier that the present embodiment provides, the first path 101 of realizing low-power mode adopts heterojunction bipolar transistor HBT Q1, because of heterojunction bipolar transistor HBT Q1 small-sized, can make its quiescent current be reduced to 3.0mA, when meeting low-power output, realized high power annex efficiency, the problem that while having solved the output of prior art low-power, efficiency has much room for improvement.
Another embodiment of the present invention also provides another power amplifier, as shown in Figure 3, comprising:
The first path 101;
The alternate path 102 being connected in parallel with the first path 101;
The control circuit 103 being connected with the first path 101 and alternate path 102 respectively;
The power supply circuits 104 that are connected with the first path 101 and alternate path 102 respectively;
Be connected in the first matching network 105 between power supply circuits 104 and the first path 101 or alternate path 102; Dotted line in Fig. 3 represents that the first matching network 105 is connected with the first path 101 or alternate path 102;
Wherein, the first path 101 comprises:
Heterojunction bipolar transistor HBT Q1;
Be connected in the second matching network 106 between heterojunction bipolar transistor HBT Q1 collector electrode and the first path 101 outputs.
Concrete operation principle is:
The power amplifier that the present embodiment provides, not only realizes low-power mode by heterojunction bipolar transistor HBT Q1, the problem that while having solved the output of prior art low-power, efficiency has much room for improvement; Meanwhile, by control circuit 103 control the first paths 101 and alternate path 102, realize different conducting forms, so that described power amplifier is realized high-power mode, middle power mode or low-power mode; Adopt compared to existing technology three road paths to realize respectively described high-power mode, middle power mode and low-power mode, circuit structure is simple, and can avoid causing larger phase difference.
The connection of interior other components and parts of the present embodiment and concrete operation principle are same as the previously described embodiments, repeat no more herein.
Another embodiment of the present invention also provides another power amplifier, as shown in Figure 4, comprising:
The first path 101;
The alternate path 102 being connected in parallel with the first path 101;
The control circuit 103 being connected with the first path 101 and alternate path 102 respectively;
The power supply circuits 104 that are connected with the first path 101 and alternate path 102 respectively;
Be connected in the first matching network 105 between power supply circuits 104 and alternate path 102;
Wherein, the first path 101 comprises:
Heterojunction bipolar transistor HBT Q1; The base stage of heterojunction bipolar transistor HBT Q1 is as the input of the first path 101; The base stage of heterojunction bipolar transistor HBT Q1 is connected with control circuit 103; The collector electrode of heterojunction bipolar transistor HBT Q1 is connected with power supply circuits 104; The grounded emitter of heterojunction bipolar transistor HBT Q1;
Be connected in the second matching network 106 between heterojunction bipolar transistor HBT Q1 collector electrode and the first path 101 outputs.
Input is as the driving stage P1 of alternate path 102 inputs; The feeder ear of driving stage P1 is connected with power supply circuits 104; The control end of driving stage P1 is connected with control circuit 103;
The first power stage U1 that input is connected with driving stage P1 output; The feeder ear of the first power stage U1 is connected with power supply circuits 104; The control end of the first power stage U1 is connected with control circuit 103;
The second power stage U2 that input is connected with the first power stage U1 output; The feeder ear of the second power stage U2 is connected with the first matching network 105; The control end of the second power stage U2 is connected with control circuit 103; The output of the second power stage U2 is the output of alternate path 102.
Concrete operation principle is:
When high-power mode is worked, the bias voltage that control circuit 103 is controlled alternate path 102 by VM0/VM1 pattern makes its driving stage P1, the first power stage U1 and the second power stage U2 conducting, and the choke induction that now the first matching network 105 can be regarded the second power stage U2 as plays the perfectly straight effect every handing over.The bias voltage of the first path 101 can not be opened heterojunction bipolar transistor HBT Q1, and the now impedance of heterojunction bipolar transistor HBT Q1 and the second matching network 106 is the more than 10 times of the second power stage U2 impedance, very little on the impact of alternate path 102.And the second harmonic that effectively produces during filtering alternate path 102 work of matching network, improve the operating efficiency of alternate path 102.
When in middle power mode work, the bias voltage that control circuit 103 is controlled alternate path 102 by VM0/VM1 pattern makes its driving stage P1 and the first power stage U1 conducting, and the second power stage U2 can not open, now the first matching network 105 plays the effect of impedance transformation, load resistance is transformed into a relatively low impedance and makes it reach best power and the efficiency under middle power mode.The bias voltage of the first path 101 can not be opened heterojunction bipolar transistor HBT Q1.
When low-power mode is worked, the bias voltage that control circuit 103 is controlled alternate path 102 by VM0/VM1 pattern all can not be opened its driving stage P1, the first power stage U1 and the second power stage U2, and the bias voltage of controlling the first path 101 makes heterojunction bipolar transistor HBT Q1 conducting.The impedance now being formed by the first matching network 105, the first power stage U1 and the second power stage U2 is very large, very little on the impact of the first path 101.And the second matching network 106 plays the effect of impedance transformation, load resistance is transformed into a low impedance and makes it reach best power and the efficiency under low-power mode.
The power amplifier that the present embodiment provides, not only realizes low-power mode by heterojunction bipolar transistor HBT Q1, the problem that while having solved the output of prior art low-power, efficiency has much room for improvement; Meanwhile, by control circuit 103 control the first paths 101 and alternate path 102, realize different conducting forms, so that described power amplifier is realized high-power mode, middle power mode or low-power mode; Adopt compared to existing technology three road paths to realize respectively described high-power mode, middle power mode and low-power mode, circuit structure is simple, and can avoid causing larger phase difference; And the power amplifier that the present embodiment provides, has omitted a plurality of radio-frequency (RF) switch compared to existing technology.
In addition, as shown in Figure 5, shown in the first path 101 in power amplifier also can also comprise:
Be connected in the first switch S 1 between the first path 101 inputs and heterojunction bipolar transistor HBT Q1 base stage;
Be connected in the second switch S2 between the second matching network 106 and the first path 101 outputs;
Be connected in the 3rd switch S 3 between alternate path 102 inputs and driving stage P1 input.
When high-power mode or the work of middle power mode, the 3rd switch S 3 is opened, and the first switch S 1 and second switch S2 close.When low-power mode is worked, the first switch S 1 and second switch S2 open, and the 3rd switch S 3 is closed.
The connection of interior other components and parts of the present embodiment and concrete operation principle are same as the previously described embodiments, repeat no more herein.
Preferably, another embodiment of the present invention also provides another power amplifier, and as shown in Figure 6, the first path 101 also comprises:
Be connected in the 3rd matching network 107 between the first path 101 inputs and heterojunction bipolar transistor HBT Q1 base stage;
Be connected in the 4th matching network 108 between alternate path 102 inputs and driving stage P1 input;
Be connected in the 5th matching network 109 between the first power stage U1 output and the second power stage U2 input;
Described power amplifier also comprises:
The 6th matching network 110 being connected with the first path 101 and alternate path 102 output in parallel.
Concrete operation principle is:
Each matching network can be the network of single L network, single C network or LC.The concrete LC network diagram of implementing as shown in Figure 7; The 4th matching network 108 is for the Input matching of alternate path 102, the 3rd matching network 107 is for the Input matching of the first path 101, the 5th matching network 109 is the interstage matched that connect the first power stage U1 and the second power stage U2 on alternate path 102 passages, for the relatively high impedance of the impedance transformation to from the second power stage U2 input being given to the output of the first power stage U1.The first matching network 105 has two effects, and when high-power mode, power supply circuits 104 are entering the second power stage U2 by the first matching network 105, as choke induction, plays the effect that perfectly straight resistance is handed over; During central power mode, it plays the effect of impedance transformation, and the low-resistance resistance of the second power stage U2 is large so that the index request that the power output of the first power stage U1 on alternate path 102 and efficiency reach middle power mode.The function of the second matching network 106 is mainly used in impedance transformation lower impedance is become to large so that the index demand that on the first path 101, the power output of heterojunction bipolar transistor HBT Q1 and efficiency reach low-power mode.The function of the 6th matching network 110 be mainly used in load resistance to be transformed into a lower impedance so that on alternate path 102 power output of the second power stage U2 and efficiency reach the index demand of high-power mode.
The connection of interior other components and parts of the present embodiment and concrete operation principle are same as the previously described embodiments, repeat no more herein.
Another embodiment of the present invention also provides another power amplifier, as shown in Figure 8, comprising:
The first path 101;
The alternate path 102 being connected in parallel with the first path 101;
The control circuit 103 being connected with the first path 101 and alternate path 102 respectively;
The power supply circuits 104 that are connected with the first path 101 and alternate path 102 respectively;
Be connected in the first matching network 105 between power supply circuits 104 and the first path 101;
Wherein, the first path 101 comprises:
Heterojunction bipolar transistor HBT Q1; The base stage of heterojunction bipolar transistor HBT Q1 is as the input of the first path 101; The base stage of heterojunction bipolar transistor HBT Q1 is connected with control circuit 103; The collector electrode of heterojunction bipolar transistor HBT Q1 is connected with power supply circuits 104; The grounded emitter of heterojunction bipolar transistor HBT Q1;
The first power stage U1 that input is connected with heterojunction bipolar transistor HBT Q1 input; The first power stage U1 feeder ear is connected with power supply circuits 104; The control end of the first power stage U1 is connected with control circuit 103;
Be connected in the second matching network 106 between heterojunction bipolar transistor HBT Q1 collector electrode and the first path 101 outputs.
Preferably, alternate path 102 comprises:
Input is as the driving stage P1 of alternate path 102 inputs; The feeder ear of driving stage P1 is connected with power supply circuits 104; The control end of driving stage P1 is connected with control circuit 103;
The second power stage U2 that input is connected with driving stage P1 output; The feeder ear of the second power stage U2 is connected with power supply circuits 104; The control end of the second power stage U2 is connected with control circuit 103; The output of the second power stage U2 is the output of alternate path 102.
When high-power mode is worked, the bias voltage that control circuit 103 is controlled alternate path 102 by VM0/VM1 pattern makes its driving stage P1 and the second power stage U2 conducting, the bias voltage of controlling the first path 101 can not be opened its heterojunction bipolar transistor HBT Q1 and the first power stage U1, the impedance now being formed by the second matching network 106, heterojunction bipolar transistor HBT Q1 and the first power stage U1 is the more than 10 times of the second power stage U2 impedance on alternate path 102, very little on the impact of alternate path 102.And the second harmonic that effectively produces during filtering alternate path 102 work of matching network, improve the operating efficiency of alternate path 102.
When in middle power mode work, the bias voltage that control circuit 103 is controlled alternate path 102 by VM0/VM1 pattern can not be opened its driving stage P1 and the second power stage U2, the bias voltage of controlling the first path 101 makes its heterojunction bipolar transistor HBT Q1 and the first power stage U1 conducting, the choke induction that now the first matching network 105 can be regarded heterojunction bipolar transistor HBT Q1 on the first path 101 as plays the perfectly straight effect every handing over, and the second matching network 106 plays the effect of impedance transformation, load resistance is transformed into a relatively low impedance makes it reach best power and the efficiency under middle power mode.
When low-power mode is worked, the bias voltage that control circuit 103 is controlled alternate path 102 by VM0/VM1 pattern can not be opened its driving stage P1 and the second power stage U2, and the bias voltage of controlling the first path 101 can not be opened and heterojunction bipolar transistor HBT Q1 conducting its first power stage U1.Now, by the effect as impedance transformation together with the second matching network 106 of the first matching network 105, load resistance is transformed into a low impedance and makes it reach best power and the efficiency under low-power mode.
The connection of interior other components and parts of the present embodiment and concrete operation principle are same as the previously described embodiments, repeat no more herein.
Above-mentioned explanation to the disclosed embodiments, makes professional and technical personnel in the field can realize or use the present invention.To the multiple modification of these embodiment, will be apparent for those skilled in the art, General Principle as defined herein can, in the situation that not departing from the spirit or scope of the present invention, realize in other embodiments.Therefore, the present invention will can not be restricted to these embodiment shown in this article, but will meet the widest scope consistent with principle disclosed herein and features of novelty.
Claims (7)
1. a power amplifier, is characterized in that, comprising: the first path, for realizing low-power mode; Described the first path comprises heterojunction bipolar transistor.
2. power amplifier according to claim 1, is characterized in that, also comprises:
The alternate path being connected in parallel with described the first path;
The control circuit being connected with described the first path and alternate path respectively, for control the bias voltage of described the first path and alternate path by VM0/VM1 pattern, so that described power amplifier is realized high-power mode, middle power mode or low-power mode;
The power supply circuits that are connected with described the first path and alternate path respectively;
Be connected in the first matching network between described power supply circuits and described the first path or alternate path, for perfectly straight stream every exchanging or transforming impedance;
Described the first path also comprises: be connected in the collector electrode of described heterojunction bipolar transistor and the second matching network between described the first path output.
3. power amplifier according to claim 2, is characterized in that, the base stage of described heterojunction bipolar transistor is as the input of described the first path; The base stage of described heterojunction bipolar transistor is connected with described control circuit; The collector electrode of described heterojunction bipolar transistor is connected with described power supply circuits; The grounded emitter of described heterojunction bipolar transistor;
Described alternate path comprises:
Input is as the driving stage of described alternate path input; The feeder ear of described driving stage is connected with described power supply circuits; The control end of described driving stage is connected with described control circuit;
The first power stage that input is connected with described driving stage output; The feeder ear of described the first power stage is connected with described power supply circuits; The control end of described the first power stage is connected with described control circuit;
The second power stage that input is connected with described the first power stage output; The feeder ear of described the second power stage is connected with described the first matching network; The control end of described the second power stage is connected with described control circuit; The output of described the second power stage is the output of described alternate path.
4. power amplifier according to claim 3, is characterized in that, described the first path also comprises:
Be connected in the first switch between described the first path input and described heterojunction bipolar transistor control end;
Be connected in the second switch between described the second matching network and described the first path output;
Described alternate path also comprises:
Be connected in the 3rd switch between described alternate path input and described driving stage input.
5. power amplifier according to claim 3, is characterized in that, described the first path also comprises:
Be connected in the 3rd matching network between described the first path input and described heterojunction bipolar transistor control end;
Described alternate path also comprises:
Be connected in the 4th matching network between described alternate path input and described driving stage input;
Be connected in the 5th matching network between described the first power stage output and described the second power stage input;
Described power amplifier also comprises:
The 6th matching network being connected with described the first path and alternate path output in parallel.
6. power amplifier according to claim 2, is characterized in that, described the first path also comprises:
The first power stage that input is connected with described heterojunction bipolar transistor collector electrode; Described the first power stage feeder ear is connected with described power supply circuits; The control end of described the first power stage is connected with described control circuit;
The base stage of described heterojunction bipolar transistor is as the input of described the first path; The base stage of described heterojunction bipolar transistor is connected with described control circuit; The collector electrode of described heterojunction bipolar transistor is connected with described the first matching network; The grounded emitter of described heterojunction bipolar transistor.
7. power amplifier according to claim 6, is characterized in that, described alternate path comprises:
Input is as the driving stage of described alternate path input; The feeder ear of described driving stage is connected with described power supply circuits; The control end of described driving stage is connected with described control circuit;
The second power stage that input is connected with described driving stage output; The feeder ear of described the second power stage is connected with described power supply circuits; The control end of described the second power stage is connected with described control circuit; The output of described the second power stage is the output of described alternate path.
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| CN203590164U (en) * | 2013-11-07 | 2014-05-07 | 广州钧衡微电子科技有限公司 | Heterojunction bipolar transistor low-power channel power amplifier |
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Application publication date: 20140205 |