CN103400080B - A kind of terminal - Google Patents

Abstract

The invention provides a kind of terminal, including: first processor, for processing the private data in described terminal；Second processor, for processing the non-private data in described terminal；At least one external equipment, is connected to described first processor；Wherein, described first processor is realized and the connection of at least one external equipment described and alternately by Peripheral Interface, and realized the connection with described second processor by forwarding interface, and set up DMA transfer passage by configuration between described forwarding interface and described Peripheral Interface, it is achieved the connection of described second processor and at least one external equipment described and alternately.By technical scheme, the private data in terminal and non-private data can be made to be physically isolated process, it is ensured that private data cannot be obtained by unsafe application program, is effectively improved the safety of terminal.

Description

A kind of terminal

Technical field

The present invention relates to technical field of data security, in particular to a kind of terminal.

Background technology

As it is shown in figure 1, terminal is provided with a lot of peripheral hardware (i.e. external equipment 102), such as show Screen, touch screen, photographing unit, button, communication module, sensor assembly etc..In the related, Be provided only with single processor (CPU shown in Fig. 1) in terminal, then this processor can be in office Under the control of meaning application program, send data to any peripheral hardware, it is also possible to receive from any peripheral hardware Data, then, when tag memory has the application program of too high authority at some, especially originate indefinite Third party application, then these application programs can control only process in terminal easily Device, calls private data, is the most arbitrarily uploaded to other-end or server.Simultaneously as should All data handled by only processor are all in identical memory space (shown in Fig. 1 RAM and ROM) in, thus above-mentioned application program is the most most probably by simple breaking techniques, i.e. Private data can be obtained in this memory space.Therefore, for the application program in terminal, particularly When some third party application in terminal, it is from some unique hacker or personal information The when of dealer, the private datas such as the user profile caused in terminal are in the most unsafe shape Under state.

So, how to solve the problem of data safety that single processor brings to terminal, become the most urgently Technical problem to be solved.

Summary of the invention

The present invention is based at least one of the problems referred to above, it is proposed that a kind of new technical scheme, can So that private data and non-private data in terminal are physically isolated process, it is ensured that private data Cannot be obtained by unsafe application program, be effectively improved the safety of terminal.

In view of this, the present invention proposes a kind of terminal, including: first processor, it is used for processing institute State the private data in terminal；Second processor, for processing the non-private data in described terminal； At least one external equipment, is connected to described first processor；Wherein, described first processor is by outward If interface realizes and the connection of at least one external equipment described and mutual, and realized by forwarding interface and The connection of described second processor, and by configuring between described forwarding interface and described Peripheral Interface Set up DMA transfer passage, it is achieved described second processor and the company of at least one external equipment described Connect and alternately.

In this technical scheme, first pass through setting and be respectively used to process private data and non-private data Multiple processors so that be able between private data and non-private data physically by effectively every From, thus when avoiding the most only using single processor, only just may be used by cracking in authority etc. Any application is made to obtain private data from this single processor easily.Meanwhile, by configuring Interface sets up corresponding DMA transfer passage in first processor, it is achieved the number to first processor Calling according to transfer bus so that the interaction of the second processor and external equipment is completely without warp By the process of first processor, it is ensured that only at first processor with private data, the second processor with non- Incidence relation is there is, without any intersection occurs, it is to avoid private data is acquired between private data With the problem leaked.

In technique scheme, it is preferable that also include: the first storage device, corresponding to described the One processor, carries out the storage of private data for described first processor；Second storage device, right Second processor described in Ying Yu, carries out the storage of non-private data for described second processor.

In this technical scheme, the processor for private data and non-private data uses physically The storage device being separated so that private data and non-private data are processing and store when, all Realize isolation physically, thus obtain more preferable data safe effect.

In technique scheme, it is preferable that at least one external equipment described is used for: by all need Data to be transmitted all are passed through in described Peripheral Interface transmission extremely described first processor；At described first Reason device is used for: directly process private data, and by non-private data by described forwarding interface Transmission is to described second processor.

In this technical scheme, owing to external equipment cannot carry out type identification to data, thus by institute There are data all to send to first processor, and performed type identification and data distribution by first processor. Owing to first processor is specifically designed to process private data, it is for the second processor, more The processor of safety, thus all data are all sent to first processor, even if non-secret therein Data are obtained and profit by other application programs (application program relative to being originally sent to) With, also it is not result in the leakage of private information；As long as and ensure that private data will not be by second Reason device processes, it becomes possible to be physically segregated unauthorized applications based on the second processor to secret The acquisition of data and utilization, ensure that the data safety of terminal.

In technique scheme, it is preferable that Peripheral Interface, forwarding on described first processor connect One_to_one corresponding between mouth and at least one external equipment described.

In this technical scheme, by one a pair between Peripheral Interface, forwarding interface, external equipment Should so that in first processor, set up the special DMA transfer corresponding to each external equipment lead to Road, it is simple to the individual transmission of data, it is to avoid data cross and confusion occur.

In technique scheme, it is preferable that be provided with on described second processor with described first at The transceiver interface that forwarding interface on reason device connects one to one, the most described second processor is used for: In the case of the external equipment needed and specify interacts, by setting corresponding to the described outside specified Standby appointed transceiving interface sends to described first processor and goes code；Described first processor is used In: according to going code of receiving, determine forwarding interface that described appointed transceiving interface is corresponding and outer If interface, and DMA transfer passage is set up in configuration between this forwarding interface and Peripheral Interface.

In this technical scheme, hand over by going code between first processor and the second processor Mutually, and further by the control of first processor, it is achieved between the second processor and external equipment The control of DMA transfer path, it is to avoid peripheral hardware is carried out by first processor and the second processor simultaneously Call, and prevent private data and the contact of the second processor further, contribute to promoting terminal Safety.

In technique scheme, it is preferable that described second processor is additionally operable to: complete with described The external equipment specified mutual in the case of, by described appointed transceiving interface to described first process Device sends interrupt instruction；Described first processor is additionally operable to: according to the interrupt instruction received, and disconnects Described DMA transfer passage.

In this technical scheme, owing to first processor is for processing private data, its relative to For second processor it is " safe processor ", then can preferentially realize in order to ensure first processor Mutual with external equipment so that the second processor carries out data interaction unnecessary with external equipment In the case of, all actively disconnect the connection with external equipment, and first processor is recovered in time with outward The connection of portion's equipment.

In technique scheme, it is preferable that also include: at least one first communication module, respectively It is connected to described first processor and described second processor, for carrying out private with described first processor Ciphertext data mutual, and carry out the mutual of non-private data with described second processor.

In this technical scheme, when data uplink, then first processor and the second processor profit respectively Carry out data transmission with first communication module；When data downstream, can be direct by first communication module Downlink data is carried out type identification, thus carries out data distribution according to recognition result so that secret number It is respectively allocated to first processor and the second processor according to non-private data, it is achieved number physically According to isolation, contribute to promoting the safety of terminal.

In technique scheme, it is preferable that also include: at least one second communication module, with institute State first processor be connected and carry out data interaction；Wherein, described first processor is to from described The private data of at least one second communication module processes, and will from described at least one second The non-private data transmission of communication module processes to described second processor.

In this technical scheme, owing to first processor is the " safe handling relative to the second processor Device ", only it is connected with first processor thereby through by second communication module so that private data will not Through the second processor, it is impossible to got by the second processor by unauthorized applications, contribute to carrying Rise the safety of terminal.Meanwhile, by being carried out the type identification of data by first processor, contribute to Reduce the configuration needs to second communication module, and correspondingly control the manufacturing cost of terminal.

By above technical scheme, the private data in terminal and non-private data can be made physically It is isolated process, it is ensured that private data cannot be obtained by unsafe application program, is effectively improved end The safety of end.

Accompanying drawing explanation

Fig. 1 shows the structural representation of the terminal in correlation technique；

Fig. 2 shows the concrete structure schematic diagram of terminal according to an embodiment of the invention；

Fig. 3 shows that the terminal comprising two or more processor according to an embodiment of the invention is tied Structure schematic diagram；

Fig. 4 shows the terminal comprising two or more processor according to another embodiment of the invention Structural representation；

Fig. 5 is the terminal structure schematic diagram under a kind of detailed description of the invention of the embodiment shown in Fig. 4；

Fig. 6 shows the connection of single communication module according to an embodiment of the invention and processor Structural representation；

Fig. 7 shows the connection of multiple communication module according to an embodiment of the invention and processor Structural representation；

Fig. 8 is Fig. 6 or each communication module of embodiment illustrated in fig. 7 and the one of more than 2 processors Plant attachment structure schematic diagram；

Fig. 9 is Fig. 6 or each communication module of embodiment illustrated in fig. 7 and more than 2 processors another A kind of attachment structure schematic diagram；

Figure 10 is the attachment structure schematic diagram under a kind of detailed description of the invention of embodiment illustrated in fig. 9；

Figure 11 shows single communication module according to another embodiment of the invention and processor Attachment structure schematic diagram；

Figure 12 shows multiple communication modules according to another embodiment of the invention and processor Attachment structure schematic diagram；

Figure 13 is Figure 11 or each communication module of embodiment illustrated in fig. 12 and more than 2 processors A kind of attachment structure schematic diagram；

Figure 14 is Figure 11 or each communication module of embodiment illustrated in fig. 12 and more than 2 processors Another kind of attachment structure schematic diagram；

Figure 15 is the attachment structure schematic diagram under a kind of detailed description of the invention of embodiment illustrated in fig. 14.

Detailed description of the invention

In order to be more clearly understood that the above-mentioned purpose of the present invention, feature and advantage, below in conjunction with attached The present invention is further described in detail by figure and detailed description of the invention.It should be noted that not In the case of conflict, the feature in embodiments herein and embodiment can be mutually combined.

Elaborate a lot of detail in the following description so that fully understanding the present invention, but, The present invention can implement to use other to be different from other modes described here, therefore, and the present invention Protection domain do not limited by following public specific embodiment.

Fig. 2 shows the concrete structure schematic diagram of terminal according to an embodiment of the invention.

As in figure 2 it is shown, the present invention proposes a kind of terminal, including CPU1, it is used for processing described Private data in terminal；CPU2, for processing the non-private data in described terminal；At least one Individual external equipment 102, is connected to described CPU1；Wherein, described CPU1 is realized by Peripheral Interface Connection with at least one external equipment 102 described and mutual, and realized with described by forwarding interface The connection of CPU2, and set up DMA by configuration between described forwarding interface and described Peripheral Interface Transmission channel, it is achieved the connection of described CPU2 and at least one external equipment 102 described and alternately.

In this technical scheme, first pass through setting and be respectively used to process private data and non-private data CPU1 and CPU2 so that be able between private data and non-private data physically by effectively Isolation, thus when avoiding the most only using single processor, only by cracking in authority etc. just Any application can be made easily to obtain private data from this single processor.Meanwhile, by joining Put interface in CPU1, set up corresponding DMA transfer passage, it is achieved the data of CPU1 are transmitted Calling of bus so that the interaction of CPU2 and external equipment 102 completely without via The process of CPU1, it is ensured that only deposit between CPU1 and private data, CPU2 and non-private data At incidence relation, without any intersection occurs, it is to avoid the problem that private data is acquired and leaks.

Specifically, for private data and non-private data, can be preset by manufacturer, it is also possible to by User determines according to the practical situation of oneself.Such as, in the case of one, journey will can be applied with some The data that sequence is associated all as private data or non-private data, such as will with " address list ", The data that the application program such as " message registration ", " short message ", " mail " is relevant, no matter reading Or write, all can be regarded as private data, or by the data relevant to certain game application, all as non- Private data；Such as in the case of another kind, can be using the data of certain type as private data or non- Private data, such as using the interaction data with Web bank all as private data, and by software more New bag data are as non-private data etc., it is also possible to comprise other differentiation mode, the most do not carry out one One enumerates.

For external equipment 102, including the multiple hardwares equipment pre-set in terminal, except Fig. 2 Shown in display screen (such as LCD, Liquid Crystal Display, liquid crystal display), touch Touch screen (TW:Touch Window), photographing unit (CAMERA), button (KEY) etc. it Outward, it is also possible to include such as: for communication module, the sensor of wireless mobile communications (SENSOR), WIFI(Wireless Fidelity, WLAN) module, bluetooth (BT, Bluetooth) module, GPS(Global Position System, global positioning system) module, NFC(Near field Communication, near-field communication) module, audio codec (AUDIO CODEC) etc..

In technique scheme, it is preferable that CPU1 and CPU2 can be with common storage space, i.e. RAM, ROM etc., but in order to prevent malicious application from obtaining private from shared memory space Ciphertext data, the most in fig. 2, CPU1 employs RAM1 and ROM1, CPU2 and then uses RAM2 and ROM2, can physically separate the memory space that CPU1 with CPU2 uses mutually From.Separated storage device is used physically so that private data due to CPU1 and CPU2 With non-private data processing and store when, all realize isolation physically, thus obtain more preferably Data safe effect.

In technique scheme, it is preferable that at least one external equipment 102 described is used for: by institute The data that there is a need to transmission are all passed through in described Peripheral Interface transmission extremely described CPU1；Described CPU1 For: directly private data is processed, and non-private data is transmitted by described forwarding interface To described CPU2.

In this technical scheme, owing to external equipment 102 cannot carry out type identification to data, thus All data are all sent to CPU1, and is performed type identification and data distribution by CPU1.Due to CPU1 is specifically designed to process private data, is for CPU2, safer process Device, thus all data are all sent to CPU1, even if non-private data therein is applied by other Program (application program relative to being originally sent to) obtains and utilizes, and is also not result in private The leakage of confidential information；As long as and ensure that private data will not be by CPU2 process, it becomes possible to It is physically segregated unauthorized applications based on CPU2 to the acquisition of private data and utilization, thus really Protect the data safety of terminal.

In technique scheme, it is preferable that Peripheral Interface on described CPU1, forwarding interface and One_to_one corresponding between at least one external equipment 102 described.

In this technical scheme, by between Peripheral Interface, forwarding interface, external equipment 102 One is corresponding so that sets up the special DMA corresponding to each external equipment 102 in CPU1 and passes Defeated passage, it is simple to the individual transmission of data, it is to avoid data cross and confusion occur.

In technique scheme, it is preferable that be provided with on described CPU2 with on described CPU1 The transceiver interface that forwarding interface connects one to one, the most described CPU2 is used for: is needing and is specifying In the case of external equipment 102 interacts, by corresponding to the described external equipment 102 specified Appointed transceiving interface sends to described CPU1 and goes code；Described CPU1 is used for: according to receiving Go code, determine forwarding interface and Peripheral Interface that described appointed transceiving interface is corresponding, and at this Between forwarding interface and Peripheral Interface, DMA transfer passage is set up in configuration.

In this technical scheme, interact by going code between CPU1 and CPU2, go forward side by side One step control by CPU1, it is achieved to the DMA transfer between CPU2 and external equipment 102 The control of path, it is to avoid peripheral hardware is called by CPU1 and CPU2 simultaneously, and prevent further Private data contacts with CPU2's, contributes to promoting the safety of terminal.

In technique scheme, it is preferable that described CPU2 is additionally operable to: complete and described appointment External equipment 102 mutual in the case of, sent out to described CPU1 by described appointed transceiving interface Send interrupt instruction；Described CPU1 is additionally operable to: according to the interrupt instruction received, and disconnects described DMA transfer passage.

In this technical scheme, owing to CPU1 is for processing private data, its relative to It is " safe processor " for CPU2, then can preferentially realize setting with outside in order to ensure CPU1 Standby 102 mutual so that CPU2 is in the unnecessary situation carrying out data interaction with external equipment 102 Under, all actively disconnect the connection with external equipment 102, and CPU1 is recovered in time with outside and sets The connection of standby 102.

Below be all with terminal comprise the situation of an a CPU1 and CPU2 carry out be describe and Analyze, but in order to obtain higher disposal ability, or reach more excellent safe effect, eventually End can comprise greater number of CPU1 and/or greater number of CPU2, below in conjunction with Fig. 3- 5, terminal to include CPU1, CPU1A and CPU1B etc. for process that private data processes The processor that device and CPU2, CPU2A and CPU2B etc. process for non-private data is Example, illustrates the terminal structure in the case of greater number of processor and process strategy.When So, it should be appreciated by those skilled in the art: multiple for secret number for terminal only comprises According to the processor processed or only comprise the situation of multiple processor processed for non-private data, with And in the case of processor is more, its catenation principle is actually identical, will not in the application Repeat again.

Although it should be noted that there is a lot of external equipment 102 in terminal, but each external equipment Attachment structure between 102 and CPU1, CPU2 and data transfer mode, the most similar , thus in order to clearly describe its concrete attachment structure and data transmission policies, under Each embodiment of face will be described in detail as a example by some external equipment 102.And this area Technical staff it is clearly understood that: below based on the attachment structure described by " external equipment 102 " and Data transmission policies, actually display can be applicable to any external equipment 102 terminal.

It addition, the various circuit switching control modes mentioned in above technical scheme, all can apply to In each technical scheme following, it is achieved kind judging device 104 is to CPU and external equipment 102 Interactive controlling.

Embodiment one

For processing in multiple CPU of private data/non-private data, using certain CPU as with " relaying " of external equipment 102, other CPU are then by should " relaying " realize with outside Equipment 102 mutual.

Specifically, as shown in Figure 3, it is assumed that set up between CPU1 and external equipment 102 and connect, And other are for processing multiple CPU of private data, it is connected by " series connection " mode with CPU1； Simultaneously, it is assumed that connected by " in parallel " mode for processing multiple CPU of non-private data.

For " series connection " mode: when CPU1 needs mutual with external equipment 102, then CPU1 Direct and external equipment 102 carries out data interaction；When CPU1A needs to carry out with external equipment 102 Time mutual, then carried out data forwarding by CPU1；When CPU1B needs to carry out with external equipment 102 Time mutual, then carried out data forwarding by CPU1A, CPU1.

For " in parallel " mode: when CPU2 needs mutual with external equipment 102, then CPU2 Can set up between CPU2 and external equipment 102 by CPU1 by sending request to CPU1 DMA transfer passage, it is achieved data interaction between the two；When CPU2A needs and external equipment 102 when interacting, then carried out data forwarding successively by CPU2 and CPU1；When CPU2B needs When interacting with external equipment 102, also carried out data forwarding successively by CPU2 and CPU1.

Certainly, the connected mode of " in parallel " can also be used for the CPU of private data process, Even part uses " series connection ", part to use the connected mode of " in parallel "；And for non-secret number The connected mode of " series connection ", even part can also be used " string is used according to the CPU processed Connection ", part use " in parallel " connected mode, this is apparent from.But due to only CPU1 is directly connected with external equipment 102, if thus other any CPU hope and external equipment 102 is mutual, and the most at least needing to be carried out forwarding by CPU1 can realize.

Mutual, when interacting between multiple CPU except with external equipment 102, it is also possible to The data needing other CPU forward.Such as interact as CPU1 with CPU2 or CPU1A Time, then direct interaction；When CPU1 Yu CPU1B interacts, then CPU1A is needed to enter Row forwards；When CPU2 Yu CPU1, CPU2A or CPU2B interact, then direct interaction ?；When CPU2A Yu CPU2B interacts, then CPU2 is needed to forward.

Additionally, on the basis of " in parallel ", also likely to be present between CPU2A with CPU2B and be connected (not shown), it is possible to realize directly data interaction between the two.Further, CPU is worked as More time, between all of CPU, the most all may directly perform data interaction, and nothing Need the forwarding of other CPU.

Embodiment two

In the multiple CPU for processing private data, each CPU all " in parallel " to outsides set Standby 102, and directly interact with external equipment 102, without other CPU as " in Continue ".

Specifically, as shown in Figure 4, for processing CPU1, CPU1A, CPU1B of private data It is respectively connecting to external equipment 102；Meanwhile, for process non-private data CPU2, CPU2A, CPU2B are not then connected with external equipment 102.

Meanwhile, between multiple CPU with same treatment function, can use in above-mentioned word " series connection " and/or " in parallel " mode mentioned.As a kind of specific embodiment, Fig. 4 shows Go out: have employed " series connection " side for processing CPU1, CPU1A, CPU1B of private data Formula, and have employed " in parallel " side for processing CPU2, CPU2A, CPU2B of non-private data Formula.

When the externally connected equipment 102 of a part of CPU, such as process for private data CPU, then these CPU can directly interact with external equipment 102, including the transmission of data And reception；And other CPU not being directly connected to external equipment 102, it is the most now for non- The CPU that private data processes, when these CPU need to interact with external equipment 102, needs Relate to the interaction between these CPU and the CPU being connected directly to external equipment 102.

(1) processing procedure of data uplink

(figure does not shows assuming that each CPU all can directly carry out data interaction with other any CPU Go out concrete annexation), then CPU2A or CPU2B can be directly outside certain be connected directly to The CPU of portion's equipment 102 sends request so that it is set up CPU2A or CPU2B and external equipment DMA transfer passage between 102, is such as received in request foundation by CPU1A or CPU1B DMA transfer passage between CPU2A or CPU2B and the external equipment 102 stated.

Assuming that each CPU is only capable of carries out direct interaction with adjacent CPU, ratio as shown in Figure 4, CPU2A or CPU2B is merely able to carry out direct interaction with CPU2, then CPU2A or CPU2B can To send data to CPU2, CPU2 send request to CPU1, CPU1 set up CPU2 with DMA transfer passage between external equipment 102, then data are sent directly to outside and set by CPU2 Standby 102.

Assuming that each CPU is except carrying out direct interaction with adjacent CPU, additionally it is possible to appointment Other kinds of CPU interact, than as it is shown in figure 5, as same type of CPU, CPU2 with CPU2A be adjacent, can direct interaction, and as different types of CPU, CPU2 also Can be with CPU1 direct interaction；Similarly, then CPU2A can directly with adjacent CPU2, CPU2B direct interaction, additionally it is possible to CPU1A direct interaction, then CPU2A can pass through The adjacent C PU indirect communication such as CPU2 are to CPU1, and are further transmitted to external equipment by CPU1 102, it is also possible to by being directly transferred to CPU1A, and be further transmitted to outside by CPU1A and set Standby 102.Now, CPU2, CPU2A, CPU2B can by corresponding CPU1, CPU1A, CPU1B send request so that it is set up corresponding DMA transfer passage, it is achieved CPU2, CPU2A, CPU2B are mutual with external equipment 102.

(2) processing procedure of data downstream

A) there is not the DMA transfer passage having built up, then need number by external equipment 102 According to transmission to the CPU being joined directly together, such as transmit to CPU1A, be then further transmitted to target CPU.Such as after external equipment 102 sends data to CPU1A: in the case of the first, CPU1A finds that these data are non-private data, but unclear by which CPU process；Second In the case of Zhong, CPU1A finds that these data are non-private data, and knows and be entered by which CPU Row processes.

In above-mentioned two situations, it is still necessary to be analyzed according to the concrete connection of CPU:

(figure does not shows assuming that each CPU all can directly carry out data interaction with other any CPU Go out concrete annexation), then for the first situation, data can directly be transmitted by CPU1A To any one for processing CPU, the such as CPU2A of non-private data, then true by CPU2A Fixed concrete target CPU；For the second situation, CPU1A can directly send data to mesh Mark CPU, such as CPU2A.

Assuming that each CPU is only capable of carries out direct interaction with adjacent CPU, ratio as shown in Figure 4, CPU1A is merely able to carry out direct interaction with CPU1 and CPU1B, then CPU1A can be by data Send to CPU1, CPU1 send to CPU2, and be forwarded to target CPU by CPU2.

Assuming that each CPU is except carrying out direct interaction with adjacent CPU, additionally it is possible to appointment Other kinds of CPU interact, than as it is shown in figure 5, as same type of CPU, CPU1 with CPU1A be adjacent, can direct interaction, and as different types of CPU, CPU1 also Can be with CPU2 direct interaction；Similarly, then CPU1A can directly with adjacent CPU1, CPU1B direct interaction, additionally it is possible to CPU2A direct interaction, then receive outside as CPU1A During the non-private data that equipment 102 sends, can by adjacent C PU indirect communication such as CPU1 extremely For processing the CPU of non-private data, it is also possible to by being directly transferred to CPU2A, and by CPU2A determines and transmits to final target CPU.

B) there is the DMA transfer passage having built up.

Assuming that as shown in Figure 3 and Figure 4, set up in CPU1 have CPU2 and external equipment 102 it Between DMA transfer passage.When external equipment 102 needs transmission to CPU2, can be directly sharp It is transmitted with this DMA transfer passage；Need transmission to CPU2A when external equipment 102 or During CPU2B, can be sent to CPU2 by DMA transfer passage, and be carried out turning by CPU2 Send out, it is also possible in the case of transmission to the CPU(being directly connected to is for Fig. 3, be CPU1；Or In the case of Fig. 4, including CPU1, CPU1A or CPU1B), then turned by this CPU Send to concrete target CPU.

Assuming that as it is shown in figure 5, each CPU being the most directly connected with external equipment 102, all pass through The corresponding CPU being joined directly together with external equipment 102 sets up DMA transfer passage, thus outward Portion's equipment 102 can directly send data to correspondence by the selection to DMA transfer passage Target CPU(CPU2, CPU2A or CPU2B).

Described above is all the data interaction between CPU and external equipment 102, and for end For end, also include the data interaction between other-end or server, then relate to CPU with logical Up-downgoing data interaction between letter module.

As shown in Figure 6, it is assumed that CPU1 is used for processing private data, CPU2 is used for processing non-secret Data, and communication module 106 is for the transmitting-receiving of up-downgoing data.So, for upstream data, by It is respectively connecting to CPU1 and CPU2 in communication module 106, thus from the data of CPU1 is exactly Private data, data from CPU2 are just non-private datas；For downlink data, by communication mould Block 106 directly carries out type identification to the data received, if private data, is then directly transferred to CPU1, if non-private data, is then directly transferred to CPU2.

By communication module 106, data are carried out type identification so that private data and non-private data It is respectively allocated to CPU1 and CPU2, it is achieved data isolation physically, contributes to promoting terminal Safety.

Meanwhile, in order to promote safety further, it is also possible to add a merit for communication module 106 Can, i.e. when communication module 106 is mutual with CPU1, cut off the connection with CPU2, when communication mould When block 106 is mutual with CPU2, cut off the connection with CPU1；Or, communication module 106 with Add circuit switch module (not shown) between CPU1, CPU2, pass through circuit switch module Self or CPU1, CPU2 are controlled, it is achieved when communication module 106 is mutual with CPU1, Cut off the connection with CPU2, when communication module 106 is mutual with CPU2, cut off with CPU1's Connect.By to the connection of circuit and disconnection so that physically separate private data and non-secret number According to, contribute to promoting further the safety of terminal.

Terminal can also exist multiple communication module 106, than as it is shown in fig. 7, comprises communication module 106A and communication module 106B, be both respectively connecting to CPU1 and CPU2, then for communication For module 106A or communication module 106B, with the communication module 106 shown in Fig. 6 it is actually Identical, can use for reference and use the process strategy of communication module 106 correspondence shown in Fig. 6, thus Here is omitted.

Similar situation shown in Fig. 3-5, multiple for processing private data when terminal exists CPU, and/or multiple when the CPU processing non-private data, described in Fig. 6-7 Communication module 106(is used for illustrating, and communication module 106A and communication module 106B are same), Above-mentioned multiple CPU can take following strategy.

Wherein, the most still for process private data CPU include CPU1, CPU1A and CPU1B, as a example by the CPU for processing non-private data includes CPU2, CPU2A and CPU2B Illustrate.

Embodiment one

Communication module 106 is only connected to one for processing the CPU of private data and one for locating Manage the CPU of non-private data, be such as connected to CPU1 and CPU2.

So, during for data uplink, private data/non-private data is directly passed by CPU1/CPU2 Transport to communication module 106, and CPU1A, CPU1B need to transmit to CPU1 private data, and It is forwarded to communication module 106 by CPU1；Similarly, CPU2A, CPU2B need non-secret number According to transmission to CPU2, and it is forwarded to communication module 106 by CPU2.

During for data downstream, all of private data is all sent to CPU1 by communication module 106, All of non-private data is all sent to CPU2, wherein, in the case of the first, communication module 106 can be by modes such as the parsings to data, it is thus understood that for processing target CPU of these data, Then communication module 106 can add corresponding mark on the data, thus as CPU1 or CPU2 After receiving these data, corresponding target CPU can be determined according to the mark added, to realize Forward；In the case of the second, communication module 106 cannot learn target CPU of the data received, Then communication module 106 directly transmits it to CPU1 or CPU2, by CPU1 or CPU2 voluntarily Determine corresponding target CPU.

Based on the different connected modes between multiple CPU, when carrying out data transmission between CPU, Different situations can be there is.As shown in Figure 8, CPU1, CPU1A and CPU1B use ratio The mode " connected ", CPU2, CPU2A and CPU2B use the mode of " in parallel ", Then when CPU1B needs send upstream data or receive downlink data, need via CPU1A and The two-stage transmission of CPU1, can realize；And for CPU2A and CPU2B, the most only need The Primary Transmit wanting CPU2 can realize.

Certainly, it is similar to description during Fig. 3-5, for any type of multiple CPU, as being used for locating Reason private data or the CPU of non-private data, all can according to actual needs and use " series connection " or The connected mode of " in parallel ", it might even be possible to simultaneously use the mode of " series connection " and " in parallel " to carry out Connect.

Embodiment two

As it is shown in figure 9, communication module 106 can also be respectively connecting to all of CPU, then for upper Row data, each CPU can be directly transferred to communication module 106, and without by other CPU performs forwarding, advantageously reduces data transmission delay.And for downlink data, if communication module 106 will be understood that concrete target CPU, then can be directly transferred to this target CPU；If communication Module 106 can not recognize concrete target CPU, then take following manner:

In the case of the first, communication module 106 carries out type identification to downlink data, and according to identification As a result, send data to certain acquiescence or arbitrary for processing the CPU of same type data, than As by private data default transport to CPU1, non-private data default transport is to CPU2, or by private Ciphertext data arbitrarily transmits to CPU1, CPU1A or CPU1B, non-private data is arbitrarily transmitted to CPU2, CPU2A or CPU2B, then further determined that by the CPU receiving this downlink data And it is forwarded to concrete target CPU.

In the case of the second, communication module 106 does not carry out type identification to downlink data, the most directly will Downlink data transmission is to certain acquiescence or arbitrary CPU, and is directly carried out type identification by this CPU Or be forwarded to other CPU and carry out type identification, then according to recognition result, send to target CPU.Specifically, such as default transport is to CPU1, then by CPU1 carry out type identification (or Specify that all downlink datas are carried out type identification by CPU1A, then need transmission to enter to CPU1A Row type identification), and according to recognition result by downlink data transmission to concrete target CPU.

Above-mentioned in the case of each, actually further comprises the data between dissimilar CPU and hand over Mutually, following multiple situation is the most also comprised:

(figure does not shows assuming that each CPU all can directly carry out data interaction with other any CPU Go out concrete annexation).Assuming that CPU1A have received non-private data, if then CPU1A Do not know target CPU that these data are corresponding, then can directly send data to any one for locating Manage the CPU of non-private data, such as CPU2A, then decided specific aims by CPU2A CPU；If CPU1A knows target CPU that these data are corresponding, then can directly data be transmitted To target CPU, such as CPU2A.

Assuming that each CPU is only capable of carries out direct interaction with adjacent CPU, than as it is shown in figure 9, CPU1A is merely able to carry out direct interaction with CPU1 and CPU1B, then CPU1A can be by data Send to CPU1, CPU1 send to CPU2, and be forwarded to target CPU by CPU2.

Assuming that each CPU is except carrying out direct interaction with adjacent CPU, additionally it is possible to appointment Other kinds of CPU interact, ratio as shown in Figure 10, as same type of CPU, CPU1 with CPU1A be adjacent, can direct interaction, and as different types of CPU, CPU1 also Can be with CPU2 direct interaction；Similarly, then CPU1A can directly with adjacent CPU1, CPU1B direct interaction, additionally it is possible to CPU2A direct interaction, then receive communication as CPU1A During the non-private data that module 106 sends, can by adjacent C PU indirect communication such as CPU1 extremely For processing the CPU of non-private data, it is also possible to by being directly transferred to CPU2A, and by CPU2A determines and transmits to final target CPU.

In the technical scheme described by Fig. 6-10, communication module 106 is respectively connecting to for processing The CPU of private data and for processing the CPU of non-private data；And at following Figure 11-15 In, communication module 106A shown in each communication module 106(or Figure 12 and communication module 106B) all it is only attached to a type of CPU, is such as only connected to for processing private data CPU, or it is only connected to the CPU for processing non-private data.

Specifically, as shown in figure 11, communication module 106 is only connected to CPU1, then for upper line number According to, CPU1 can directly interact with communication module 106, and CPU2 then needs CPU1 to make For relaying, indirectly interact with communication module 106.For downlink data, in the case of the first, Communication module 106 can carry out type identification to downlink data, and according to recognition result to downlink data Add mark, then all send to CPU1, by CPU1 according to the mark on downlink data, really Determine to process voluntarily, or send to CPU2 process；In the case of the second, communication module 106 Downlink data is not carried out type identification, then after it being carried out type identification by CPU1, to secret number According to directly processing, and non-private data is forwarded to CPU2 process.

Certainly, communication module 106 can also be connected to CPU2, the direct and communication module by CPU2 106 interact, and CPU1 must realize and the mould that communicates indirectly using CPU2 as " relaying " Block 106 mutual.But owing to CPU2 is used for processing non-private data, for CPU1 it is Unsafe CPU, because private data can circulate in CPU2, may cause unauthorized applications Therefrom steal.Therefore, in order to obtain safer applied environment, it is more likely to the mould that communicates Block 106 is directly connected with CPU1.In each technical scheme following, will with communication module 106 with CPU1 illustrates as a example by being connected, but based on foregoing description, this obviously can not be understood as that A kind of restriction or restriction.

As shown in figure 12, when terminal exists multiple communication module, such as include communication module 106A and communication module 106B, then be respectively connecting to CPU1.So, for communication module 106A Or for communication module 106B, be identical with the communication module 106 shown in Figure 10, can use Corresponding connected mode or process strategy, here is omitted.

Similar situation shown in Fig. 6-10, multiple for processing private data when terminal exists CPU, and/or multiple when the CPU processing non-private data, described in Figure 11-12 Communication module 106(be used for illustrating, communication module 106A and communication module 106B phase therewith With), above-mentioned multiple CPU can take following strategy.

Wherein, the most still for process private data CPU include CPU1, CPU1A and CPU1B, as a example by the CPU for processing non-private data includes CPU2, CPU2A and CPU2B Illustrate.

Embodiment one

Communication module 106 is only connected to one for processing the CPU of private data or one for locating Manage the CPU of non-private data, be such as connected to CPU1.

So, during for data uplink, CPU1 directly interacts with communication module 106, and its He all of CPU be required to directly or indirectly by need the data sent transmission to CPU1, by CPU1 is forwarded to communication module 106, it is achieved the up transmission of data.

During for data downstream, in the case of the first, communication module 106 can be by the solution to data The modes such as analysis, it is thus understood that for processing target CPU of these data, then communication module 106 can be at this Corresponding mark is added in data, thus after CPU1 receives these data, can be according to interpolation Mark, determine corresponding target CPU, with realize forward；In the case of the second, communication module 106 targets CPU that cannot learn the data received, then communication module 106 directly transmits it to CPU1, is determined corresponding target CPU voluntarily by CPU1, and certainly, communication module 106 can be right The type of data is identified, and after determining that it is private data or non-private data, is just sent to CPU1, or communication module 106 do not performs type identification operation, but is transmitted directly to CPU1, Type identification is carried out by the CPU1 data to receiving.

Based on the different connected modes between multiple CPU, when carrying out data transmission between CPU, Different situations can be there is.As shown in figure 13, CPU1, CPU1A and CPU1B use ratio The mode " connected ", CPU2, CPU2A and CPU2B use the mode of " in parallel ", Then when CPU1B needs send upstream data or receive downlink data, need via CPU1A and The two-stage transmission of CPU1, can realize；And for CPU2A and CPU2B, the most only need The Primary Transmit wanting CPU2 can realize.

Certainly, it is similar to description during Fig. 8-10, for any type of multiple CPU, as being used for Process private data or the CPU of non-private data, all can use " series connection " according to actual needs Or the connected mode of " in parallel ", it might even be possible to use the mode of " series connection " and " in parallel " to enter simultaneously Row connects.

Embodiment two

As shown in figure 14, communication module 106 can also be respectively connecting to all of same type CPU, is such as connected simultaneously to all CPU(for processing private data and refers specifically in figure CPU1, CPU1A and CPU1B).

So, for upstream data, each CPU for processing private data can directly pass Transport to communication module 106, and without performing forwarding by other CPU, advantageously reduce data transmission Time delay, and for processing the CPU of non-private data, then remain a need for forwarding the data to certain for locating CPU, the such as CPU1 of reason private data, can realize the up transmission of data.

And for downlink data, if communication module 106 will be understood that concrete target CPU, it is assumed that These data are private data, then can be directly transferred to this target CPU, it is assumed that these data are non-secret Data, then, after this non-private data being added mark, being directly transferred to certain CPU(being connected should CPU can be acquiescence or arbitrary, such as gives tacit consent to and all sends to CPU1, or randomly chooses one The CPU being connected), it is assumed that for CPU1, then it is forwarded to accordingly according to the mark in data by CPU1 Target CPU；If communication module 106 can not recognize concrete target CPU, then take down State mode:

In the case of the first, communication module 106 carries out type identification to downlink data, and according to identification As a result, send data to certain acquiescence or arbitrary for processing the CPU of same type data, than As by private data default transport to CPU1, write from memory after non-private data is added corresponding type identification Recognize and transmit to CPU1, or private data is arbitrarily transmitted to CPU1, CPU1A or CPU1B, will Non-private data add after corresponding type identification arbitrarily transmission to CPU1, CPU1A or CPU1B, is then further determined that by the CPU receiving this downlink data and is forwarded to concrete mesh Mark CPU.

In the case of the second, communication module 106 does not carry out type identification to downlink data, the most directly will Downlink data transmission is to certain acquiescence or arbitrary CPU, and is directly carried out type identification by this CPU Or be forwarded to other CPU and carry out type identification, then according to recognition result, send to target CPU.Specifically, such as default transport is to CPU1, then by CPU1 carry out type identification (or Specify that all downlink datas are carried out type identification by CPU1A, then need transmission to enter to CPU1A Row type identification), and according to recognition result by downlink data transmission to concrete target CPU.

Above-mentioned in the case of each, actually further comprises the data between dissimilar CPU and hand over Mutually, following multiple situation is the most also comprised:

(figure does not shows assuming that each CPU all can directly carry out data interaction with other any CPU Go out concrete annexation).Assuming that CPU1A have received non-private data, if then CPU1A Do not know target CPU that these data are corresponding, then can directly send data to any one for locating Manage the CPU of non-private data, such as CPU2A, then decided specific aims by CPU2A CPU；If CPU1A knows target CPU that these data are corresponding, then can directly data be transmitted To target CPU, such as CPU2A.

Assuming that each CPU is only capable of carries out direct interaction with adjacent CPU, such as Figure 14 institute Showing, CPU1A is merely able to carry out direct interaction with CPU1 and CPU1B, then CPU1A can be by Data send to CPU1, CPU1 send to CPU2, and be forwarded to target by CPU2 CPU。

Assuming that each CPU is except carrying out direct interaction with adjacent CPU, additionally it is possible to appointment Other kinds of CPU interact, ratio as shown in figure 15, as same type of CPU, CPU1 with CPU1A be adjacent, can direct interaction, and as different types of CPU, CPU1 also Can be with CPU2 direct interaction；Similarly, then CPU1A can directly with adjacent CPU1, CPU1B direct interaction, additionally it is possible to CPU2A direct interaction, then receive communication as CPU1A During the non-private data that module 106 sends, can by adjacent C PU indirect communication such as CPU1 extremely For processing the CPU of non-private data, it is also possible to by being directly transferred to CPU2A, and by CPU2A determines and transmits to final target CPU.

Technical scheme is described in detail, it is contemplated that in correlation technique, eventually above in association with accompanying drawing End only comprises single cpu, the operation such as the most all data all are carried out processing by this CPU, storage, holds Easily obtained private data by any application the most easily, cause the leakage of privacy of user.Therefore, Present applicant proposes a kind of terminal, the private data in terminal and non-private data can be made physically It is isolated process, it is ensured that private data cannot be obtained by unsafe application program, is effectively improved end The safety of end.

The foregoing is only the preferred embodiments of the present invention, be not limited to the present invention, for For those skilled in the art, the present invention can have various modifications and variations.All essences in the present invention Within god and principle, any modification, equivalent substitution and improvement etc. made, should be included in the present invention Protection domain within.

Claims (6)

1. a terminal, it is characterised in that including:

First processor, for processing the private data in described terminal；

Second processor, for processing the non-private data in described terminal；

At least one external equipment, is connected to described first processor；

Wherein, described first processor is realized the company with at least one external equipment described by Peripheral Interface Connect and alternately, and realized the connection with described second processor by forwarding interface, and by described turn Send out configuration between interface and described Peripheral Interface and set up DMA transfer passage, it is achieved described second processes The connection of device and at least one external equipment described and alternately；

Peripheral Interface, forwarding interface and at least one external equipment described on described first processor it Between one_to_one corresponding；

It is provided with on described second processor with the forwarding interface one_to_one corresponding on described first processor even The transceiver interface connect, the most described second processor is used for: hand over the external equipment specified at needs In the case of Hu, by the appointed transceiving interface corresponding to the described external equipment specified to described first Processor sends and goes code；

Described first processor is used for: according to going code of receiving, and determines that described appointed transceiving connects The forwarding interface of mouth correspondence and Peripheral Interface, and configuration is set up between this forwarding interface and Peripheral Interface DMA transfer passage.

Terminal the most according to claim 1, it is characterised in that also include:

First storage device, corresponding to described first processor, carries out private for described first processor The storage of ciphertext data；

Second storage device, corresponding to described second processor, carries out non-for described second processor The storage of private data.

Terminal the most according to claim 1, it is characterised in that described set outside at least one It is ready for use on: the data that be there is a need to transmission are all passed through the transmission of described Peripheral Interface and processes to described first In device；

Described first processor is used for: directly processes private data, and is led to by non-private data Cross the transmission of described forwarding interface to described second processor.

Terminal the most according to claim 1, it is characterised in that described second processor is also used In: complete with the described external equipment specified mutual in the case of, connect by described appointed transceiving Mouth sends interrupt instruction to described first processor；

Described first processor is additionally operable to: according to the interrupt instruction received, and disconnects described DMA and passes Defeated passage.

Terminal the most according to any one of claim 1 to 4, it is characterised in that also wrap Include:

At least one first communication module, is respectively connecting to described first processor and described second and processes Device, for carrying out the mutual of private data with described first processor, and enters with described second processor Row non-private data mutual.

Terminal the most according to any one of claim 1 to 4, it is characterised in that also wrap Include:

At least one second communication module, is connected with described first processor and carries out data interaction；

Wherein, described first processor is to the private data from least one second communication module described Process, and the non-private data from least one second communication module described is transmitted to described Second processor processes.